1b8e80941Smrg/*
2b8e80941Smrg * Copyright © 2018 Intel Corporation
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the next
12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the
13b8e80941Smrg * Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21b8e80941Smrg * IN THE SOFTWARE.
22b8e80941Smrg *
23b8e80941Smrg */
24b8e80941Smrg
25b8e80941Smrg#ifndef INTEL_AUB_MEM
26b8e80941Smrg#define INTEL_AUB_MEM
27b8e80941Smrg
28b8e80941Smrg#include <stdint.h>
29b8e80941Smrg
30b8e80941Smrg#include "util/list.h"
31b8e80941Smrg#include "util/rb_tree.h"
32b8e80941Smrg
33b8e80941Smrg#include "dev/gen_device_info.h"
34b8e80941Smrg#include "common/gen_decoder.h"
35b8e80941Smrg
36b8e80941Smrg#ifdef __cplusplus
37b8e80941Smrgextern "C" {
38b8e80941Smrg#endif
39b8e80941Smrg
40b8e80941Smrgstruct aub_mem {
41b8e80941Smrg   uint64_t pml4;
42b8e80941Smrg
43b8e80941Smrg   int mem_fd;
44b8e80941Smrg   off_t mem_fd_len;
45b8e80941Smrg
46b8e80941Smrg   struct list_head maps;
47b8e80941Smrg   struct rb_tree ggtt;
48b8e80941Smrg   struct rb_tree mem;
49b8e80941Smrg};
50b8e80941Smrg
51b8e80941Smrgbool aub_mem_init(struct aub_mem *mem);
52b8e80941Smrgvoid aub_mem_fini(struct aub_mem *mem);
53b8e80941Smrg
54b8e80941Smrgvoid aub_mem_clear_bo_maps(struct aub_mem *mem);
55b8e80941Smrg
56b8e80941Smrgvoid aub_mem_phys_write(void *mem, uint64_t virt_address,
57b8e80941Smrg                        const void *data, uint32_t size);
58b8e80941Smrgvoid aub_mem_ggtt_write(void *mem, uint64_t virt_address,
59b8e80941Smrg                        const void *data, uint32_t size);
60b8e80941Smrgvoid aub_mem_ggtt_entry_write(void *mem, uint64_t virt_address,
61b8e80941Smrg                              const void *data, uint32_t size);
62b8e80941Smrgvoid aub_mem_local_write(void *mem, uint64_t virt_address,
63b8e80941Smrg                         const void *data, uint32_t size);
64b8e80941Smrg
65b8e80941Smrgstruct gen_batch_decode_bo aub_mem_get_ggtt_bo(void *mem, uint64_t address);
66b8e80941Smrgstruct gen_batch_decode_bo aub_mem_get_ppgtt_bo(void *mem, uint64_t address);
67b8e80941Smrg
68b8e80941Smrgstruct gen_batch_decode_bo aub_mem_get_phys_addr_data(struct aub_mem *mem, uint64_t phys_addr);
69b8e80941Smrgstruct gen_batch_decode_bo aub_mem_get_ppgtt_addr_data(struct aub_mem *mem, uint64_t virt_addr);
70b8e80941Smrg
71b8e80941Smrgstruct gen_batch_decode_bo aub_mem_get_ppgtt_addr_aub_data(struct aub_mem *mem, uint64_t virt_addr);
72b8e80941Smrg
73b8e80941Smrg
74b8e80941Smrg#ifdef __cplusplus
75b8e80941Smrg}
76b8e80941Smrg#endif
77b8e80941Smrg
78b8e80941Smrg#endif /* INTEL_AUB_MEM */
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