1b8e80941Smrg/*
2b8e80941Smrg * Copyright © 2015 Intel Corporation
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the next
12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the
13b8e80941Smrg * Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21b8e80941Smrg * IN THE SOFTWARE.
22b8e80941Smrg */
23b8e80941Smrg
24b8e80941Smrg#ifndef ANV_NIR_H
25b8e80941Smrg#define ANV_NIR_H
26b8e80941Smrg
27b8e80941Smrg#include "nir/nir.h"
28b8e80941Smrg#include "anv_private.h"
29b8e80941Smrg
30b8e80941Smrg#ifdef __cplusplus
31b8e80941Smrgextern "C" {
32b8e80941Smrg#endif
33b8e80941Smrg
34b8e80941Smrgvoid anv_nir_lower_input_attachments(nir_shader *shader);
35b8e80941Smrg
36b8e80941Smrgvoid anv_nir_lower_push_constants(nir_shader *shader);
37b8e80941Smrg
38b8e80941Smrgbool anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask);
39b8e80941Smrg
40b8e80941Smrgbool anv_nir_lower_ycbcr_textures(nir_shader *shader,
41b8e80941Smrg                                  struct anv_pipeline_layout *layout);
42b8e80941Smrg
43b8e80941Smrgstatic inline nir_address_format
44b8e80941Smrganv_nir_ssbo_addr_format(const struct anv_physical_device *pdevice,
45b8e80941Smrg                         bool robust_buffer_access)
46b8e80941Smrg{
47b8e80941Smrg   if (pdevice->has_a64_buffer_access) {
48b8e80941Smrg      if (robust_buffer_access)
49b8e80941Smrg         return nir_address_format_64bit_bounded_global;
50b8e80941Smrg      else
51b8e80941Smrg         return nir_address_format_64bit_global;
52b8e80941Smrg   } else {
53b8e80941Smrg      return nir_address_format_32bit_index_offset;
54b8e80941Smrg   }
55b8e80941Smrg}
56b8e80941Smrg
57b8e80941Smrgvoid anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice,
58b8e80941Smrg                                   bool robust_buffer_access,
59b8e80941Smrg                                   struct anv_pipeline_layout *layout,
60b8e80941Smrg                                   nir_shader *shader,
61b8e80941Smrg                                   struct brw_stage_prog_data *prog_data,
62b8e80941Smrg                                   struct anv_pipeline_bind_map *map);
63b8e80941Smrg
64b8e80941Smrgbool anv_nir_add_base_work_group_id(nir_shader *shader,
65b8e80941Smrg                                    struct brw_cs_prog_data *prog_data);
66b8e80941Smrg
67b8e80941Smrg#ifdef __cplusplus
68b8e80941Smrg}
69b8e80941Smrg#endif
70b8e80941Smrg
71b8e80941Smrg#endif /* ANV_NIR_H */
72