1848b8605Smrg/* 2848b8605Smrg * Mesa 3-D graphics library 3848b8605Smrg * 4848b8605Smrg * Copyright (C) 1999-2008 Brian Paul All Rights Reserved. 5848b8605Smrg * 6848b8605Smrg * Permission is hereby granted, free of charge, to any person obtaining a 7848b8605Smrg * copy of this software and associated documentation files (the "Software"), 8848b8605Smrg * to deal in the Software without restriction, including without limitation 9848b8605Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10848b8605Smrg * and/or sell copies of the Software, and to permit persons to whom the 11848b8605Smrg * Software is furnished to do so, subject to the following conditions: 12848b8605Smrg * 13848b8605Smrg * The above copyright notice and this permission notice shall be included 14848b8605Smrg * in all copies or substantial portions of the Software. 15848b8605Smrg * 16848b8605Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17848b8605Smrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18848b8605Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19848b8605Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 20848b8605Smrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21848b8605Smrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22848b8605Smrg * OTHER DEALINGS IN THE SOFTWARE. 23848b8605Smrg */ 24848b8605Smrg 25848b8605Smrg 26848b8605Smrg/** 27848b8605Smrg * \file prog_instruction.h 28848b8605Smrg * 29848b8605Smrg * Vertex/fragment program instruction datatypes and constants. 30848b8605Smrg * 31848b8605Smrg * \author Brian Paul 32848b8605Smrg * \author Keith Whitwell 33848b8605Smrg * \author Ian Romanick <idr@us.ibm.com> 34848b8605Smrg */ 35848b8605Smrg 36848b8605Smrg 37848b8605Smrg#ifndef PROG_INSTRUCTION_H 38848b8605Smrg#define PROG_INSTRUCTION_H 39848b8605Smrg 40848b8605Smrg 41848b8605Smrg#include "main/glheader.h" 42848b8605Smrg 43848b8605Smrg 44848b8605Smrg/** 45848b8605Smrg * Swizzle indexes. 46848b8605Smrg * Do not change! 47848b8605Smrg */ 48848b8605Smrg/*@{*/ 49848b8605Smrg#define SWIZZLE_X 0 50848b8605Smrg#define SWIZZLE_Y 1 51848b8605Smrg#define SWIZZLE_Z 2 52848b8605Smrg#define SWIZZLE_W 3 53848b8605Smrg#define SWIZZLE_ZERO 4 /**< For SWZ instruction only */ 54848b8605Smrg#define SWIZZLE_ONE 5 /**< For SWZ instruction only */ 55848b8605Smrg#define SWIZZLE_NIL 7 /**< used during shader code gen (undefined value) */ 56848b8605Smrg/*@}*/ 57848b8605Smrg 58848b8605Smrg#define MAKE_SWIZZLE4(a,b,c,d) (((a)<<0) | ((b)<<3) | ((c)<<6) | ((d)<<9)) 59848b8605Smrg#define SWIZZLE_NOOP MAKE_SWIZZLE4(0,1,2,3) 60848b8605Smrg#define GET_SWZ(swz, idx) (((swz) >> ((idx)*3)) & 0x7) 61848b8605Smrg#define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1) 62b8e80941Smrg/** Determine if swz contains SWIZZLE_ZERO/ONE/NIL for any components. */ 63b8e80941Smrg#define HAS_EXTENDED_SWIZZLE(swz) (swz & 0x924) 64848b8605Smrg 65848b8605Smrg#define SWIZZLE_XYZW MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W) 66848b8605Smrg#define SWIZZLE_XXXX MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X) 67848b8605Smrg#define SWIZZLE_YYYY MAKE_SWIZZLE4(SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y) 68848b8605Smrg#define SWIZZLE_ZZZZ MAKE_SWIZZLE4(SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z, SWIZZLE_Z) 69848b8605Smrg#define SWIZZLE_WWWW MAKE_SWIZZLE4(SWIZZLE_W, SWIZZLE_W, SWIZZLE_W, SWIZZLE_W) 70848b8605Smrg 71848b8605Smrg 72848b8605Smrg/** 73848b8605Smrg * Writemask values, 1 bit per component. 74848b8605Smrg */ 75848b8605Smrg/*@{*/ 76848b8605Smrg#define WRITEMASK_X 0x1 77848b8605Smrg#define WRITEMASK_Y 0x2 78848b8605Smrg#define WRITEMASK_XY 0x3 79848b8605Smrg#define WRITEMASK_Z 0x4 80848b8605Smrg#define WRITEMASK_XZ 0x5 81848b8605Smrg#define WRITEMASK_YZ 0x6 82848b8605Smrg#define WRITEMASK_XYZ 0x7 83848b8605Smrg#define WRITEMASK_W 0x8 84848b8605Smrg#define WRITEMASK_XW 0x9 85848b8605Smrg#define WRITEMASK_YW 0xa 86848b8605Smrg#define WRITEMASK_XYW 0xb 87848b8605Smrg#define WRITEMASK_ZW 0xc 88848b8605Smrg#define WRITEMASK_XZW 0xd 89848b8605Smrg#define WRITEMASK_YZW 0xe 90848b8605Smrg#define WRITEMASK_XYZW 0xf 91848b8605Smrg/*@}*/ 92848b8605Smrg 93848b8605Smrg 94848b8605Smrg/** 95848b8605Smrg * Per-component negation masks 96848b8605Smrg */ 97848b8605Smrg/*@{*/ 98848b8605Smrg#define NEGATE_X 0x1 99848b8605Smrg#define NEGATE_Y 0x2 100848b8605Smrg#define NEGATE_Z 0x4 101848b8605Smrg#define NEGATE_W 0x8 102848b8605Smrg#define NEGATE_XYZ 0x7 103848b8605Smrg#define NEGATE_XYZW 0xf 104848b8605Smrg#define NEGATE_NONE 0x0 105848b8605Smrg/*@}*/ 106848b8605Smrg 107848b8605Smrg 108848b8605Smrg/** 109848b8605Smrg * Program instruction opcodes for vertex, fragment and geometry programs. 110848b8605Smrg */ 111b8e80941Smrgenum prog_opcode { 112848b8605Smrg /* ARB_vp ARB_fp NV_vp NV_fp GLSL */ 113848b8605Smrg /*------------------------------------------*/ 114848b8605Smrg OPCODE_NOP = 0, /* X */ 115848b8605Smrg OPCODE_ABS, /* X X 1.1 X */ 116848b8605Smrg OPCODE_ADD, /* X X X X X */ 117848b8605Smrg OPCODE_ARL, /* X X X */ 118848b8605Smrg OPCODE_BGNLOOP, /* opt */ 119848b8605Smrg OPCODE_BGNSUB, /* opt */ 120848b8605Smrg OPCODE_BRK, /* 2 opt */ 121848b8605Smrg OPCODE_CAL, /* 2 2 opt */ 122848b8605Smrg OPCODE_CMP, /* X X */ 123848b8605Smrg OPCODE_CONT, /* opt */ 124848b8605Smrg OPCODE_COS, /* X 2 X X */ 125848b8605Smrg OPCODE_DDX, /* X X */ 126848b8605Smrg OPCODE_DDY, /* X X */ 127848b8605Smrg OPCODE_DP2, /* 2 X */ 128848b8605Smrg OPCODE_DP3, /* X X X X X */ 129848b8605Smrg OPCODE_DP4, /* X X X X X */ 130848b8605Smrg OPCODE_DPH, /* X X 1.1 */ 131848b8605Smrg OPCODE_DST, /* X X X X */ 132848b8605Smrg OPCODE_ELSE, /* opt */ 133848b8605Smrg OPCODE_END, /* X X X X opt */ 134848b8605Smrg OPCODE_ENDIF, /* opt */ 135848b8605Smrg OPCODE_ENDLOOP, /* opt */ 136848b8605Smrg OPCODE_ENDSUB, /* opt */ 137848b8605Smrg OPCODE_EX2, /* X X 2 X X */ 138848b8605Smrg OPCODE_EXP, /* X X */ 139848b8605Smrg OPCODE_FLR, /* X X 2 X X */ 140848b8605Smrg OPCODE_FRC, /* X X 2 X X */ 141848b8605Smrg OPCODE_IF, /* opt */ 142848b8605Smrg OPCODE_KIL, /* X X */ 143848b8605Smrg OPCODE_LG2, /* X X 2 X X */ 144848b8605Smrg OPCODE_LIT, /* X X X X */ 145848b8605Smrg OPCODE_LOG, /* X X */ 146848b8605Smrg OPCODE_LRP, /* X X */ 147848b8605Smrg OPCODE_MAD, /* X X X X X */ 148848b8605Smrg OPCODE_MAX, /* X X X X X */ 149848b8605Smrg OPCODE_MIN, /* X X X X X */ 150848b8605Smrg OPCODE_MOV, /* X X X X X */ 151848b8605Smrg OPCODE_MUL, /* X X X X X */ 152848b8605Smrg OPCODE_NOISE1, /* X */ 153848b8605Smrg OPCODE_NOISE2, /* X */ 154848b8605Smrg OPCODE_NOISE3, /* X */ 155848b8605Smrg OPCODE_NOISE4, /* X */ 156848b8605Smrg OPCODE_POW, /* X X X X */ 157848b8605Smrg OPCODE_RCP, /* X X X X X */ 158848b8605Smrg OPCODE_RET, /* 2 2 opt */ 159848b8605Smrg OPCODE_RSQ, /* X X X X X */ 160848b8605Smrg OPCODE_SCS, /* X X */ 161848b8605Smrg OPCODE_SGE, /* X X X X X */ 162848b8605Smrg OPCODE_SIN, /* X 2 X X */ 163848b8605Smrg OPCODE_SLT, /* X X X X X */ 164848b8605Smrg OPCODE_SSG, /* 2 X */ 165848b8605Smrg OPCODE_SUB, /* X X 1.1 X X */ 166848b8605Smrg OPCODE_SWZ, /* X X X */ 167848b8605Smrg OPCODE_TEX, /* X 3 X X */ 168848b8605Smrg OPCODE_TXB, /* X 3 X */ 169848b8605Smrg OPCODE_TXD, /* X X */ 170848b8605Smrg OPCODE_TXL, /* 3 2 X */ 171848b8605Smrg OPCODE_TXP, /* X X */ 172848b8605Smrg OPCODE_TRUNC, /* X */ 173848b8605Smrg OPCODE_XPD, /* X X */ 174848b8605Smrg MAX_OPCODE 175b8e80941Smrg}; 176848b8605Smrg 177848b8605Smrg 178848b8605Smrg/** 179848b8605Smrg * Number of bits for the src/dst register Index field. 180848b8605Smrg * This limits the size of temp/uniform register files. 181848b8605Smrg */ 182848b8605Smrg#define INST_INDEX_BITS 12 183848b8605Smrg 184848b8605Smrg 185848b8605Smrg/** 186848b8605Smrg * Instruction source register. 187848b8605Smrg */ 188848b8605Smrgstruct prog_src_register 189848b8605Smrg{ 190848b8605Smrg GLuint File:4; /**< One of the PROGRAM_* register file values. */ 191848b8605Smrg GLint Index:(INST_INDEX_BITS+1); /**< Extra bit here for sign bit. 192848b8605Smrg * May be negative for relative addressing. 193848b8605Smrg */ 194848b8605Smrg GLuint Swizzle:12; 195848b8605Smrg GLuint RelAddr:1; 196848b8605Smrg 197848b8605Smrg /** 198b8e80941Smrg * Negation. 199848b8605Smrg * This will either be NEGATE_NONE or NEGATE_XYZW, except for the SWZ 200848b8605Smrg * instruction which allows per-component negation. 201848b8605Smrg */ 202848b8605Smrg GLuint Negate:4; 203848b8605Smrg}; 204848b8605Smrg 205848b8605Smrg 206848b8605Smrg/** 207848b8605Smrg * Instruction destination register. 208848b8605Smrg */ 209848b8605Smrgstruct prog_dst_register 210848b8605Smrg{ 211848b8605Smrg GLuint File:4; /**< One of the PROGRAM_* register file values */ 212848b8605Smrg GLuint Index:INST_INDEX_BITS; /**< Unsigned, never negative */ 213848b8605Smrg GLuint WriteMask:4; 214848b8605Smrg GLuint RelAddr:1; 215848b8605Smrg}; 216848b8605Smrg 217848b8605Smrg 218848b8605Smrg/** 219848b8605Smrg * Vertex/fragment program instruction. 220848b8605Smrg */ 221848b8605Smrgstruct prog_instruction 222848b8605Smrg{ 223b8e80941Smrg enum prog_opcode Opcode; 224848b8605Smrg struct prog_src_register SrcReg[3]; 225848b8605Smrg struct prog_dst_register DstReg; 226848b8605Smrg 227848b8605Smrg /** 228b8e80941Smrg * Saturate each value of the vectored result to the range [0,1]. 229848b8605Smrg * 230848b8605Smrg * \since 231b8e80941Smrg * ARB_fragment_program 232848b8605Smrg */ 233b8e80941Smrg GLuint Saturate:1; 234848b8605Smrg 235848b8605Smrg /** 236848b8605Smrg * \name Extra fields for TEX, TXB, TXD, TXL, TXP instructions. 237848b8605Smrg */ 238848b8605Smrg /*@{*/ 239848b8605Smrg /** Source texture unit. */ 240848b8605Smrg GLuint TexSrcUnit:5; 241848b8605Smrg 242848b8605Smrg /** Source texture target, one of TEXTURE_{1D,2D,3D,CUBE,RECT}_INDEX */ 243848b8605Smrg GLuint TexSrcTarget:4; 244848b8605Smrg 245848b8605Smrg /** True if tex instruction should do shadow comparison */ 246848b8605Smrg GLuint TexShadow:1; 247848b8605Smrg /*@}*/ 248848b8605Smrg 249848b8605Smrg /** 250848b8605Smrg * For BRA and CAL instructions, the location to jump to. 251848b8605Smrg * For BGNLOOP, points to ENDLOOP (and vice-versa). 252848b8605Smrg * For BRK, points to ENDLOOP 253848b8605Smrg * For IF, points to ELSE or ENDIF. 254848b8605Smrg * For ELSE, points to ENDIF. 255848b8605Smrg */ 256848b8605Smrg GLint BranchTarget; 257848b8605Smrg}; 258848b8605Smrg 259848b8605Smrg 260848b8605Smrg#ifdef __cplusplus 261848b8605Smrgextern "C" { 262848b8605Smrg#endif 263848b8605Smrg 264b8e80941Smrgstruct gl_program; 265b8e80941Smrg 266848b8605Smrgextern void 267848b8605Smrg_mesa_init_instructions(struct prog_instruction *inst, GLuint count); 268848b8605Smrg 269848b8605Smrgextern struct prog_instruction * 270848b8605Smrg_mesa_copy_instructions(struct prog_instruction *dest, 271848b8605Smrg const struct prog_instruction *src, GLuint n); 272848b8605Smrg 273848b8605Smrgextern GLuint 274b8e80941Smrg_mesa_num_inst_src_regs(enum prog_opcode opcode); 275848b8605Smrg 276848b8605Smrgextern GLuint 277b8e80941Smrg_mesa_num_inst_dst_regs(enum prog_opcode opcode); 278848b8605Smrg 279848b8605Smrgextern GLboolean 280b8e80941Smrg_mesa_is_tex_instruction(enum prog_opcode opcode); 281848b8605Smrg 282848b8605Smrgextern GLboolean 283848b8605Smrg_mesa_check_soa_dependencies(const struct prog_instruction *inst); 284848b8605Smrg 285848b8605Smrgextern const char * 286b8e80941Smrg_mesa_opcode_string(enum prog_opcode opcode); 287848b8605Smrg 288848b8605Smrg 289848b8605Smrg#ifdef __cplusplus 290848b8605Smrg} /* extern "C" */ 291848b8605Smrg#endif 292848b8605Smrg 293848b8605Smrg#endif /* PROG_INSTRUCTION_H */ 294