1/* 2 * Copyright (C) 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 25/* Instructions, enums and structures for ICL. 26 * 27 * This file has been generated, do not hand edit. 28 */ 29 30#ifndef GEN11_PACK_H 31#define GEN11_PACK_H 32 33#include <stdio.h> 34#include <stdint.h> 35#include <stdbool.h> 36#include <assert.h> 37#include <math.h> 38 39#ifndef __gen_validate_value 40#define __gen_validate_value(x) 41#endif 42 43#ifndef __gen_field_functions 44#define __gen_field_functions 45 46#ifdef NDEBUG 47#define NDEBUG_UNUSED __attribute__((unused)) 48#else 49#define NDEBUG_UNUSED 50#endif 51 52union __gen_value { 53 float f; 54 uint32_t dw; 55}; 56 57static inline uint64_t 58__gen_mbo(uint32_t start, uint32_t end) 59{ 60 return (~0ull >> (64 - (end - start + 1))) << start; 61} 62 63static inline uint64_t 64__gen_uint(uint64_t v, uint32_t start, NDEBUG_UNUSED uint32_t end) 65{ 66 __gen_validate_value(v); 67 68#ifndef NDEBUG 69 const int width = end - start + 1; 70 if (width < 64) { 71 const uint64_t max = (1ull << width) - 1; 72 assert(v <= max); 73 } 74#endif 75 76 return v << start; 77} 78 79static inline uint64_t 80__gen_sint(int64_t v, uint32_t start, uint32_t end) 81{ 82 const int width = end - start + 1; 83 84 __gen_validate_value(v); 85 86#ifndef NDEBUG 87 if (width < 64) { 88 const int64_t max = (1ll << (width - 1)) - 1; 89 const int64_t min = -(1ll << (width - 1)); 90 assert(min <= v && v <= max); 91 } 92#endif 93 94 const uint64_t mask = ~0ull >> (64 - width); 95 96 return (v & mask) << start; 97} 98 99static inline uint64_t 100__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) 101{ 102 __gen_validate_value(v); 103#ifndef NDEBUG 104 uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; 105 106 assert((v & ~mask) == 0); 107#endif 108 109 return v; 110} 111 112static inline uint32_t 113__gen_float(float v) 114{ 115 __gen_validate_value(v); 116 return ((union __gen_value) { .f = (v) }).dw; 117} 118 119static inline uint64_t 120__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) 121{ 122 __gen_validate_value(v); 123 124 const float factor = (1 << fract_bits); 125 126#ifndef NDEBUG 127 const float max = ((1 << (end - start)) - 1) / factor; 128 const float min = -(1 << (end - start)) / factor; 129 assert(min <= v && v <= max); 130#endif 131 132 const int64_t int_val = llroundf(v * factor); 133 const uint64_t mask = ~0ull >> (64 - (end - start + 1)); 134 135 return (int_val & mask) << start; 136} 137 138static inline uint64_t 139__gen_ufixed(float v, uint32_t start, NDEBUG_UNUSED uint32_t end, uint32_t fract_bits) 140{ 141 __gen_validate_value(v); 142 143 const float factor = (1 << fract_bits); 144 145#ifndef NDEBUG 146 const float max = ((1 << (end - start + 1)) - 1) / factor; 147 const float min = 0.0f; 148 assert(min <= v && v <= max); 149#endif 150 151 const uint64_t uint_val = llroundf(v * factor); 152 153 return uint_val << start; 154} 155 156#ifndef __gen_address_type 157#error #define __gen_address_type before including this file 158#endif 159 160#ifndef __gen_user_data 161#error #define __gen_combine_address before including this file 162#endif 163 164#undef NDEBUG_UNUSED 165 166#endif 167 168 169enum GEN11_3D_Color_Buffer_Blend_Factor { 170 BLENDFACTOR_ONE = 1, 171 BLENDFACTOR_SRC_COLOR = 2, 172 BLENDFACTOR_SRC_ALPHA = 3, 173 BLENDFACTOR_DST_ALPHA = 4, 174 BLENDFACTOR_DST_COLOR = 5, 175 BLENDFACTOR_SRC_ALPHA_SATURATE = 6, 176 BLENDFACTOR_CONST_COLOR = 7, 177 BLENDFACTOR_CONST_ALPHA = 8, 178 BLENDFACTOR_SRC1_COLOR = 9, 179 BLENDFACTOR_SRC1_ALPHA = 10, 180 BLENDFACTOR_ZERO = 17, 181 BLENDFACTOR_INV_SRC_COLOR = 18, 182 BLENDFACTOR_INV_SRC_ALPHA = 19, 183 BLENDFACTOR_INV_DST_ALPHA = 20, 184 BLENDFACTOR_INV_DST_COLOR = 21, 185 BLENDFACTOR_INV_CONST_COLOR = 23, 186 BLENDFACTOR_INV_CONST_ALPHA = 24, 187 BLENDFACTOR_INV_SRC1_COLOR = 25, 188 BLENDFACTOR_INV_SRC1_ALPHA = 26, 189}; 190 191enum GEN11_3D_Color_Buffer_Blend_Function { 192 BLENDFUNCTION_ADD = 0, 193 BLENDFUNCTION_SUBTRACT = 1, 194 BLENDFUNCTION_REVERSE_SUBTRACT = 2, 195 BLENDFUNCTION_MIN = 3, 196 BLENDFUNCTION_MAX = 4, 197}; 198 199enum GEN11_3D_Compare_Function { 200 COMPAREFUNCTION_ALWAYS = 0, 201 COMPAREFUNCTION_NEVER = 1, 202 COMPAREFUNCTION_LESS = 2, 203 COMPAREFUNCTION_EQUAL = 3, 204 COMPAREFUNCTION_LEQUAL = 4, 205 COMPAREFUNCTION_GREATER = 5, 206 COMPAREFUNCTION_NOTEQUAL = 6, 207 COMPAREFUNCTION_GEQUAL = 7, 208}; 209 210enum GEN11_3D_Logic_Op_Function { 211 LOGICOP_CLEAR = 0, 212 LOGICOP_NOR = 1, 213 LOGICOP_AND_INVERTED = 2, 214 LOGICOP_COPY_INVERTED = 3, 215 LOGICOP_AND_REVERSE = 4, 216 LOGICOP_INVERT = 5, 217 LOGICOP_XOR = 6, 218 LOGICOP_NAND = 7, 219 LOGICOP_AND = 8, 220 LOGICOP_EQUIV = 9, 221 LOGICOP_NOOP = 10, 222 LOGICOP_OR_INVERTED = 11, 223 LOGICOP_COPY = 12, 224 LOGICOP_OR_REVERSE = 13, 225 LOGICOP_OR = 14, 226 LOGICOP_SET = 15, 227}; 228 229enum GEN11_3D_Prim_Topo_Type { 230 _3DPRIM_POINTLIST = 1, 231 _3DPRIM_LINELIST = 2, 232 _3DPRIM_LINESTRIP = 3, 233 _3DPRIM_TRILIST = 4, 234 _3DPRIM_TRISTRIP = 5, 235 _3DPRIM_TRIFAN = 6, 236 _3DPRIM_QUADLIST = 7, 237 _3DPRIM_QUADSTRIP = 8, 238 _3DPRIM_LINELIST_ADJ = 9, 239 _3DPRIM_LINESTRIP_ADJ = 10, 240 _3DPRIM_TRILIST_ADJ = 11, 241 _3DPRIM_TRISTRIP_ADJ = 12, 242 _3DPRIM_TRISTRIP_REVERSE = 13, 243 _3DPRIM_POLYGON = 14, 244 _3DPRIM_RECTLIST = 15, 245 _3DPRIM_LINELOOP = 16, 246 _3DPRIM_POINTLIST_BF = 17, 247 _3DPRIM_LINESTRIP_CONT = 18, 248 _3DPRIM_LINESTRIP_BF = 19, 249 _3DPRIM_LINESTRIP_CONT_BF = 20, 250 _3DPRIM_TRIFAN_NOSTIPPLE = 22, 251 _3DPRIM_PATCHLIST_1 = 32, 252 _3DPRIM_PATCHLIST_2 = 33, 253 _3DPRIM_PATCHLIST_3 = 34, 254 _3DPRIM_PATCHLIST_4 = 35, 255 _3DPRIM_PATCHLIST_5 = 36, 256 _3DPRIM_PATCHLIST_6 = 37, 257 _3DPRIM_PATCHLIST_7 = 38, 258 _3DPRIM_PATCHLIST_8 = 39, 259 _3DPRIM_PATCHLIST_9 = 40, 260 _3DPRIM_PATCHLIST_10 = 41, 261 _3DPRIM_PATCHLIST_11 = 42, 262 _3DPRIM_PATCHLIST_12 = 43, 263 _3DPRIM_PATCHLIST_13 = 44, 264 _3DPRIM_PATCHLIST_14 = 45, 265 _3DPRIM_PATCHLIST_15 = 46, 266 _3DPRIM_PATCHLIST_16 = 47, 267 _3DPRIM_PATCHLIST_17 = 48, 268 _3DPRIM_PATCHLIST_18 = 49, 269 _3DPRIM_PATCHLIST_19 = 50, 270 _3DPRIM_PATCHLIST_20 = 51, 271 _3DPRIM_PATCHLIST_21 = 52, 272 _3DPRIM_PATCHLIST_22 = 53, 273 _3DPRIM_PATCHLIST_23 = 54, 274 _3DPRIM_PATCHLIST_24 = 55, 275 _3DPRIM_PATCHLIST_25 = 56, 276 _3DPRIM_PATCHLIST_26 = 57, 277 _3DPRIM_PATCHLIST_27 = 58, 278 _3DPRIM_PATCHLIST_28 = 59, 279 _3DPRIM_PATCHLIST_29 = 60, 280 _3DPRIM_PATCHLIST_30 = 61, 281 _3DPRIM_PATCHLIST_31 = 62, 282 _3DPRIM_PATCHLIST_32 = 63, 283}; 284 285enum GEN11_3D_Stencil_Operation { 286 STENCILOP_KEEP = 0, 287 STENCILOP_ZERO = 1, 288 STENCILOP_REPLACE = 2, 289 STENCILOP_INCRSAT = 3, 290 STENCILOP_DECRSAT = 4, 291 STENCILOP_INCR = 5, 292 STENCILOP_DECR = 6, 293 STENCILOP_INVERT = 7, 294}; 295 296enum GEN11_3D_Vertex_Component_Control { 297 VFCOMP_NOSTORE = 0, 298 VFCOMP_STORE_SRC = 1, 299 VFCOMP_STORE_0 = 2, 300 VFCOMP_STORE_1_FP = 3, 301 VFCOMP_STORE_1_INT = 4, 302 VFCOMP_STORE_PID = 7, 303}; 304 305enum GEN11_Atomic_OPCODE { 306 MI_ATOMIC_OP_AND = 1, 307 MI_ATOMIC_OP_OR = 2, 308 MI_ATOMIC_OP_XOR = 3, 309 MI_ATOMIC_OP_MOVE = 4, 310 MI_ATOMIC_OP_INC = 5, 311 MI_ATOMIC_OP_DEC = 6, 312 MI_ATOMIC_OP_ADD = 7, 313 MI_ATOMIC_OP_SUB = 8, 314 MI_ATOMIC_OP_RSUB = 9, 315 MI_ATOMIC_OP_IMAX = 10, 316 MI_ATOMIC_OP_IMIN = 11, 317 MI_ATOMIC_OP_UMAX = 12, 318 MI_ATOMIC_OP_UMIN = 13, 319 MI_ATOMIC_OP_CMP_WR = 14, 320 MI_ATOMIC_OP_PREDEC = 15, 321 MI_ATOMIC_OP_AND8B = 33, 322 MI_ATOMIC_OP_OR8B = 34, 323 MI_ATOMIC_OP_XOR8B = 35, 324 MI_ATOMIC_OP_MOVE8B = 36, 325 MI_ATOMIC_OP_INC8B = 37, 326 MI_ATOMIC_OP_DEC8B = 38, 327 MI_ATOMIC_OP_ADD8B = 39, 328 MI_ATOMIC_OP_SUB8B = 40, 329 MI_ATOMIC_OP_RSUB8B = 41, 330 MI_ATOMIC_OP_IMAX8B = 42, 331 MI_ATOMIC_OP_IMIN8B = 43, 332 MI_ATOMIC_OP_UMAX8B = 44, 333 MI_ATOMIC_OP_UMIN8B = 45, 334 MI_ATOMIC_OP_CMP_WR8B = 46, 335 MI_ATOMIC_OP_PREDEC8B = 47, 336 MI_ATOMIC_OP_CMP_WR16B = 78, 337}; 338 339enum GEN11_Attribute_Component_Format { 340 ACF_DISABLED = 0, 341 ACF_XY = 1, 342 ACF_XYZ = 2, 343 ACF_XYZW = 3, 344}; 345 346enum GEN11_COMPONENT_ENABLES { 347 CE_NONE = 0, 348 CE_X = 1, 349 CE_Y = 2, 350 CE_XY = 3, 351 CE_Z = 4, 352 CE_XZ = 5, 353 CE_YZ = 6, 354 CE_XYZ = 7, 355 CE_W = 8, 356 CE_XW = 9, 357 CE_YW = 10, 358 CE_XYW = 11, 359 CE_ZW = 12, 360 CE_XZW = 13, 361 CE_YZW = 14, 362 CE_XYZW = 15, 363}; 364 365enum GEN11_ShaderChannelSelect { 366 SCS_ZERO = 0, 367 SCS_ONE = 1, 368 SCS_RED = 4, 369 SCS_GREEN = 5, 370 SCS_BLUE = 6, 371 SCS_ALPHA = 7, 372}; 373 374enum GEN11_TextureCoordinateMode { 375 TCM_WRAP = 0, 376 TCM_MIRROR = 1, 377 TCM_CLAMP = 2, 378 TCM_CUBE = 3, 379 TCM_CLAMP_BORDER = 4, 380 TCM_MIRROR_ONCE = 5, 381 TCM_HALF_BORDER = 6, 382 TCM_MIRROR_101 = 7, 383}; 384 385enum GEN11_WRAP_SHORTEST_ENABLE { 386 WSE_X = 1, 387 WSE_Y = 2, 388 WSE_XY = 3, 389 WSE_Z = 4, 390 WSE_XZ = 5, 391 WSE_YZ = 6, 392 WSE_XYZ = 7, 393 WSE_W = 8, 394 WSE_XW = 9, 395 WSE_YW = 10, 396 WSE_XYW = 11, 397 WSE_ZW = 12, 398 WSE_XZW = 13, 399 WSE_YZW = 14, 400 WSE_XYZW = 15, 401}; 402 403#define GEN11_3DSTATE_CONSTANT_BODY_length 10 404struct GEN11_3DSTATE_CONSTANT_BODY { 405 uint32_t ReadLength[4]; 406 __gen_address_type Buffer[4]; 407}; 408 409static inline void 410GEN11_3DSTATE_CONSTANT_BODY_pack(__attribute__((unused)) __gen_user_data *data, 411 __attribute__((unused)) void * restrict dst, 412 __attribute__((unused)) const struct GEN11_3DSTATE_CONSTANT_BODY * restrict values) 413{ 414 uint32_t * restrict dw = (uint32_t * restrict) dst; 415 416 dw[0] = 417 __gen_uint(values->ReadLength[0], 0, 15) | 418 __gen_uint(values->ReadLength[1], 16, 31); 419 420 dw[1] = 421 __gen_uint(values->ReadLength[2], 0, 15) | 422 __gen_uint(values->ReadLength[3], 16, 31); 423 424 const uint64_t v2_address = 425 __gen_combine_address(data, &dw[2], values->Buffer[0], 0); 426 dw[2] = v2_address; 427 dw[3] = v2_address >> 32; 428 429 const uint64_t v4_address = 430 __gen_combine_address(data, &dw[4], values->Buffer[1], 0); 431 dw[4] = v4_address; 432 dw[5] = v4_address >> 32; 433 434 const uint64_t v6_address = 435 __gen_combine_address(data, &dw[6], values->Buffer[2], 0); 436 dw[6] = v6_address; 437 dw[7] = v6_address >> 32; 438 439 const uint64_t v8_address = 440 __gen_combine_address(data, &dw[8], values->Buffer[3], 0); 441 dw[8] = v8_address; 442 dw[9] = v8_address >> 32; 443} 444 445#define GEN11_BINDING_TABLE_EDIT_ENTRY_length 1 446struct GEN11_BINDING_TABLE_EDIT_ENTRY { 447 uint64_t SurfaceStatePointer; 448 uint32_t BindingTableIndex; 449}; 450 451static inline void 452GEN11_BINDING_TABLE_EDIT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 453 __attribute__((unused)) void * restrict dst, 454 __attribute__((unused)) const struct GEN11_BINDING_TABLE_EDIT_ENTRY * restrict values) 455{ 456 uint32_t * restrict dw = (uint32_t * restrict) dst; 457 458 dw[0] = 459 __gen_offset(values->SurfaceStatePointer, 0, 15) | 460 __gen_uint(values->BindingTableIndex, 16, 23); 461} 462 463#define GEN11_BINDING_TABLE_STATE_length 1 464struct GEN11_BINDING_TABLE_STATE { 465 uint64_t SurfaceStatePointer; 466}; 467 468static inline void 469GEN11_BINDING_TABLE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 470 __attribute__((unused)) void * restrict dst, 471 __attribute__((unused)) const struct GEN11_BINDING_TABLE_STATE * restrict values) 472{ 473 uint32_t * restrict dw = (uint32_t * restrict) dst; 474 475 dw[0] = 476 __gen_offset(values->SurfaceStatePointer, 6, 31); 477} 478 479#define GEN11_BLEND_STATE_ENTRY_length 2 480struct GEN11_BLEND_STATE_ENTRY { 481 bool WriteDisableBlue; 482 bool WriteDisableGreen; 483 bool WriteDisableRed; 484 bool WriteDisableAlpha; 485 enum GEN11_3D_Color_Buffer_Blend_Function AlphaBlendFunction; 486 enum GEN11_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 487 enum GEN11_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 488 enum GEN11_3D_Color_Buffer_Blend_Function ColorBlendFunction; 489 enum GEN11_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 490 enum GEN11_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 491 bool ColorBufferBlendEnable; 492 bool PostBlendColorClampEnable; 493 bool PreBlendColorClampEnable; 494 uint32_t ColorClampRange; 495#define COLORCLAMP_UNORM 0 496#define COLORCLAMP_SNORM 1 497#define COLORCLAMP_RTFORMAT 2 498 bool PreBlendSourceOnlyClampEnable; 499 enum GEN11_3D_Logic_Op_Function LogicOpFunction; 500 bool LogicOpEnable; 501}; 502 503static inline void 504GEN11_BLEND_STATE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 505 __attribute__((unused)) void * restrict dst, 506 __attribute__((unused)) const struct GEN11_BLEND_STATE_ENTRY * restrict values) 507{ 508 uint32_t * restrict dw = (uint32_t * restrict) dst; 509 510 dw[0] = 511 __gen_uint(values->WriteDisableBlue, 0, 0) | 512 __gen_uint(values->WriteDisableGreen, 1, 1) | 513 __gen_uint(values->WriteDisableRed, 2, 2) | 514 __gen_uint(values->WriteDisableAlpha, 3, 3) | 515 __gen_uint(values->AlphaBlendFunction, 5, 7) | 516 __gen_uint(values->DestinationAlphaBlendFactor, 8, 12) | 517 __gen_uint(values->SourceAlphaBlendFactor, 13, 17) | 518 __gen_uint(values->ColorBlendFunction, 18, 20) | 519 __gen_uint(values->DestinationBlendFactor, 21, 25) | 520 __gen_uint(values->SourceBlendFactor, 26, 30) | 521 __gen_uint(values->ColorBufferBlendEnable, 31, 31); 522 523 dw[1] = 524 __gen_uint(values->PostBlendColorClampEnable, 0, 0) | 525 __gen_uint(values->PreBlendColorClampEnable, 1, 1) | 526 __gen_uint(values->ColorClampRange, 2, 3) | 527 __gen_uint(values->PreBlendSourceOnlyClampEnable, 4, 4) | 528 __gen_uint(values->LogicOpFunction, 27, 30) | 529 __gen_uint(values->LogicOpEnable, 31, 31); 530} 531 532#define GEN11_BLEND_STATE_length 1 533struct GEN11_BLEND_STATE { 534 uint32_t YDitherOffset; 535 uint32_t XDitherOffset; 536 bool ColorDitherEnable; 537 enum GEN11_3D_Compare_Function AlphaTestFunction; 538 bool AlphaTestEnable; 539 bool AlphaToCoverageDitherEnable; 540 bool AlphaToOneEnable; 541 bool IndependentAlphaBlendEnable; 542 bool AlphaToCoverageEnable; 543 /* variable length fields follow */ 544}; 545 546static inline void 547GEN11_BLEND_STATE_pack(__attribute__((unused)) __gen_user_data *data, 548 __attribute__((unused)) void * restrict dst, 549 __attribute__((unused)) const struct GEN11_BLEND_STATE * restrict values) 550{ 551 uint32_t * restrict dw = (uint32_t * restrict) dst; 552 553 dw[0] = 554 __gen_uint(values->YDitherOffset, 19, 20) | 555 __gen_uint(values->XDitherOffset, 21, 22) | 556 __gen_uint(values->ColorDitherEnable, 23, 23) | 557 __gen_uint(values->AlphaTestFunction, 24, 26) | 558 __gen_uint(values->AlphaTestEnable, 27, 27) | 559 __gen_uint(values->AlphaToCoverageDitherEnable, 28, 28) | 560 __gen_uint(values->AlphaToOneEnable, 29, 29) | 561 __gen_uint(values->IndependentAlphaBlendEnable, 30, 30) | 562 __gen_uint(values->AlphaToCoverageEnable, 31, 31); 563} 564 565#define GEN11_CC_VIEWPORT_length 2 566struct GEN11_CC_VIEWPORT { 567 float MinimumDepth; 568 float MaximumDepth; 569}; 570 571static inline void 572GEN11_CC_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 573 __attribute__((unused)) void * restrict dst, 574 __attribute__((unused)) const struct GEN11_CC_VIEWPORT * restrict values) 575{ 576 uint32_t * restrict dw = (uint32_t * restrict) dst; 577 578 dw[0] = 579 __gen_float(values->MinimumDepth); 580 581 dw[1] = 582 __gen_float(values->MaximumDepth); 583} 584 585#define GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_length 2 586struct GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY { 587 float Table1XFilterCoefficientn2; 588 float Table1YFilterCoefficientn2; 589 float Table1XFilterCoefficientn3; 590 float Table1YFilterCoefficientn3; 591 float Table1XFilterCoefficientn4; 592 float Table1YFilterCoefficientn4; 593 float Table1XFilterCoefficientn5; 594 float Table1YFilterCoefficientn5; 595}; 596 597static inline void 598GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(__attribute__((unused)) __gen_user_data *data, 599 __attribute__((unused)) void * restrict dst, 600 __attribute__((unused)) const struct GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY * restrict values) 601{ 602 uint32_t * restrict dw = (uint32_t * restrict) dst; 603 604 dw[0] = 605 __gen_sfixed(values->Table1XFilterCoefficientn2, 0, 7, 6) | 606 __gen_sfixed(values->Table1YFilterCoefficientn2, 8, 15, 6) | 607 __gen_sfixed(values->Table1XFilterCoefficientn3, 16, 23, 6) | 608 __gen_sfixed(values->Table1YFilterCoefficientn3, 24, 31, 6); 609 610 dw[1] = 611 __gen_sfixed(values->Table1XFilterCoefficientn4, 0, 7, 6) | 612 __gen_sfixed(values->Table1YFilterCoefficientn4, 8, 15, 6) | 613 __gen_sfixed(values->Table1XFilterCoefficientn5, 16, 23, 6) | 614 __gen_sfixed(values->Table1YFilterCoefficientn5, 24, 31, 6); 615} 616 617#define GEN11_CLEAR_COLOR_length 8 618struct GEN11_CLEAR_COLOR { 619 int32_t RawClearColorRed; 620 int32_t RawClearColorGreen; 621 int32_t RawClearColorBlue; 622 int32_t RawClearColorAlpha; 623 uint64_t ConvertedClearValueHiLow; 624}; 625 626static inline void 627GEN11_CLEAR_COLOR_pack(__attribute__((unused)) __gen_user_data *data, 628 __attribute__((unused)) void * restrict dst, 629 __attribute__((unused)) const struct GEN11_CLEAR_COLOR * restrict values) 630{ 631 uint32_t * restrict dw = (uint32_t * restrict) dst; 632 633 dw[0] = 634 __gen_sint(values->RawClearColorRed, 0, 31); 635 636 dw[1] = 637 __gen_sint(values->RawClearColorGreen, 0, 31); 638 639 dw[2] = 640 __gen_sint(values->RawClearColorBlue, 0, 31); 641 642 dw[3] = 643 __gen_sint(values->RawClearColorAlpha, 0, 31); 644 645 const uint64_t v4 = 646 __gen_uint(values->ConvertedClearValueHiLow, 0, 63); 647 dw[4] = v4; 648 dw[5] = v4 >> 32; 649 650 dw[6] = 0; 651 652 dw[7] = 0; 653} 654 655#define GEN11_COLOR_CALC_STATE_length 6 656struct GEN11_COLOR_CALC_STATE { 657 uint32_t AlphaTestFormat; 658#define ALPHATEST_UNORM8 0 659#define ALPHATEST_FLOAT32 1 660 bool RoundDisableFunctionDisable; 661 uint32_t AlphaReferenceValueAsUNORM8; 662 float AlphaReferenceValueAsFLOAT32; 663 float BlendConstantColorRed; 664 float BlendConstantColorGreen; 665 float BlendConstantColorBlue; 666 float BlendConstantColorAlpha; 667}; 668 669static inline void 670GEN11_COLOR_CALC_STATE_pack(__attribute__((unused)) __gen_user_data *data, 671 __attribute__((unused)) void * restrict dst, 672 __attribute__((unused)) const struct GEN11_COLOR_CALC_STATE * restrict values) 673{ 674 uint32_t * restrict dw = (uint32_t * restrict) dst; 675 676 dw[0] = 677 __gen_uint(values->AlphaTestFormat, 0, 0) | 678 __gen_uint(values->RoundDisableFunctionDisable, 15, 15); 679 680 dw[1] = 681 __gen_uint(values->AlphaReferenceValueAsUNORM8, 0, 31) | 682 __gen_float(values->AlphaReferenceValueAsFLOAT32); 683 684 dw[2] = 685 __gen_float(values->BlendConstantColorRed); 686 687 dw[3] = 688 __gen_float(values->BlendConstantColorGreen); 689 690 dw[4] = 691 __gen_float(values->BlendConstantColorBlue); 692 693 dw[5] = 694 __gen_float(values->BlendConstantColorAlpha); 695} 696 697#define GEN11_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length 1 698struct GEN11_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR { 699 uint32_t TargetFunctionID; 700 uint32_t EndOfThread; 701#define NoTermination 0 702#define EOT 1 703 uint32_t ExtendedMessageLength; 704}; 705 706static inline void 707GEN11_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_pack(__attribute__((unused)) __gen_user_data *data, 708 __attribute__((unused)) void * restrict dst, 709 __attribute__((unused)) const struct GEN11_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR * restrict values) 710{ 711 uint32_t * restrict dw = (uint32_t * restrict) dst; 712 713 dw[0] = 714 __gen_uint(values->TargetFunctionID, 0, 3) | 715 __gen_uint(values->EndOfThread, 5, 5) | 716 __gen_uint(values->ExtendedMessageLength, 6, 9); 717} 718 719#define GEN11_FILTER_COEFFICIENT_length 1 720struct GEN11_FILTER_COEFFICIENT { 721 float FilterCoefficient; 722}; 723 724static inline void 725GEN11_FILTER_COEFFICIENT_pack(__attribute__((unused)) __gen_user_data *data, 726 __attribute__((unused)) void * restrict dst, 727 __attribute__((unused)) const struct GEN11_FILTER_COEFFICIENT * restrict values) 728{ 729 uint32_t * restrict dw = (uint32_t * restrict) dst; 730 731 dw[0] = 732 __gen_sfixed(values->FilterCoefficient, 0, 7, 6); 733} 734 735#define GEN11_FRAMEDELTAQP_length 2 736struct GEN11_FRAMEDELTAQP { 737 int32_t FrameDeltaQP[8]; 738}; 739 740static inline void 741GEN11_FRAMEDELTAQP_pack(__attribute__((unused)) __gen_user_data *data, 742 __attribute__((unused)) void * restrict dst, 743 __attribute__((unused)) const struct GEN11_FRAMEDELTAQP * restrict values) 744{ 745 uint32_t * restrict dw = (uint32_t * restrict) dst; 746 747 dw[0] = 748 __gen_sint(values->FrameDeltaQP[0], 0, 7) | 749 __gen_sint(values->FrameDeltaQP[1], 8, 15) | 750 __gen_sint(values->FrameDeltaQP[2], 16, 23) | 751 __gen_sint(values->FrameDeltaQP[3], 24, 31); 752 753 dw[1] = 754 __gen_sint(values->FrameDeltaQP[4], 0, 7) | 755 __gen_sint(values->FrameDeltaQP[5], 8, 15) | 756 __gen_sint(values->FrameDeltaQP[6], 16, 23) | 757 __gen_sint(values->FrameDeltaQP[7], 24, 31); 758} 759 760#define GEN11_FRAMEDELTAQPRANGE_length 2 761struct GEN11_FRAMEDELTAQPRANGE { 762 uint32_t FrameDeltaQPRange[8]; 763}; 764 765static inline void 766GEN11_FRAMEDELTAQPRANGE_pack(__attribute__((unused)) __gen_user_data *data, 767 __attribute__((unused)) void * restrict dst, 768 __attribute__((unused)) const struct GEN11_FRAMEDELTAQPRANGE * restrict values) 769{ 770 uint32_t * restrict dw = (uint32_t * restrict) dst; 771 772 dw[0] = 773 __gen_uint(values->FrameDeltaQPRange[0], 0, 7) | 774 __gen_uint(values->FrameDeltaQPRange[1], 8, 15) | 775 __gen_uint(values->FrameDeltaQPRange[2], 16, 23) | 776 __gen_uint(values->FrameDeltaQPRange[3], 24, 31); 777 778 dw[1] = 779 __gen_uint(values->FrameDeltaQPRange[4], 0, 7) | 780 __gen_uint(values->FrameDeltaQPRange[5], 8, 15) | 781 __gen_uint(values->FrameDeltaQPRange[6], 16, 23) | 782 __gen_uint(values->FrameDeltaQPRange[7], 24, 31); 783} 784 785#define GEN11_GATHER_CONSTANT_ENTRY_length 1 786struct GEN11_GATHER_CONSTANT_ENTRY { 787 uint32_t BindingTableIndexOffset; 788 uint32_t ChannelMask; 789 uint64_t ConstantBufferOffset; 790}; 791 792static inline void 793GEN11_GATHER_CONSTANT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 794 __attribute__((unused)) void * restrict dst, 795 __attribute__((unused)) const struct GEN11_GATHER_CONSTANT_ENTRY * restrict values) 796{ 797 uint32_t * restrict dw = (uint32_t * restrict) dst; 798 799 dw[0] = 800 __gen_uint(values->BindingTableIndexOffset, 0, 3) | 801 __gen_uint(values->ChannelMask, 4, 7) | 802 __gen_offset(values->ConstantBufferOffset, 8, 15); 803} 804 805#define GEN11_HEVC_ARBITRATION_PRIORITY_length 1 806struct GEN11_HEVC_ARBITRATION_PRIORITY { 807 uint32_t Priority; 808#define Highestpriority 0 809#define Secondhighestpriority 1 810#define Thirdhighestpriority 2 811#define Lowestpriority 3 812}; 813 814static inline void 815GEN11_HEVC_ARBITRATION_PRIORITY_pack(__attribute__((unused)) __gen_user_data *data, 816 __attribute__((unused)) void * restrict dst, 817 __attribute__((unused)) const struct GEN11_HEVC_ARBITRATION_PRIORITY * restrict values) 818{ 819 uint32_t * restrict dw = (uint32_t * restrict) dst; 820 821 dw[0] = 822 __gen_uint(values->Priority, 0, 1); 823} 824 825#define GEN11_MEMORYADDRESSATTRIBUTES_length 1 826struct GEN11_MEMORYADDRESSATTRIBUTES { 827 uint32_t MOCS; 828 struct GEN11_HEVC_ARBITRATION_PRIORITY ArbitrationPriorityControl; 829 bool MemoryCompressionEnable; 830 uint32_t MemoryCompressionMode; 831 uint32_t RowStoreScratchBufferCacheSelect; 832 uint32_t TiledResourceMode; 833#define TRMODE_NONE 0 834#define TRMODE_TILEYF 1 835#define TRMODE_TILEYS 2 836}; 837 838static inline void 839GEN11_MEMORYADDRESSATTRIBUTES_pack(__attribute__((unused)) __gen_user_data *data, 840 __attribute__((unused)) void * restrict dst, 841 __attribute__((unused)) const struct GEN11_MEMORYADDRESSATTRIBUTES * restrict values) 842{ 843 uint32_t * restrict dw = (uint32_t * restrict) dst; 844 845 uint32_t v0_0; 846 GEN11_HEVC_ARBITRATION_PRIORITY_pack(data, &v0_0, &values->ArbitrationPriorityControl); 847 848 dw[0] = 849 __gen_uint(values->MOCS, 1, 6) | 850 __gen_uint(v0_0, 7, 8) | 851 __gen_uint(values->MemoryCompressionEnable, 9, 9) | 852 __gen_uint(values->MemoryCompressionMode, 10, 10) | 853 __gen_uint(values->RowStoreScratchBufferCacheSelect, 12, 12) | 854 __gen_uint(values->TiledResourceMode, 13, 14); 855} 856 857#define GEN11_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_length 4 858struct GEN11_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD { 859 uint32_t IndirectPayloadDataSizeinbits; 860 __gen_address_type IndirectPayloadBaseAddress; 861 struct GEN11_MEMORYADDRESSATTRIBUTES IndirectPayloadBaseAddress2; 862}; 863 864static inline void 865GEN11_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_pack(__attribute__((unused)) __gen_user_data *data, 866 __attribute__((unused)) void * restrict dst, 867 __attribute__((unused)) const struct GEN11_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD * restrict values) 868{ 869 uint32_t * restrict dw = (uint32_t * restrict) dst; 870 871 dw[0] = 872 __gen_uint(values->IndirectPayloadDataSizeinbits, 0, 31); 873 874 const uint64_t v1_address = 875 __gen_combine_address(data, &dw[1], values->IndirectPayloadBaseAddress, 0); 876 dw[1] = v1_address; 877 dw[2] = v1_address >> 32; 878 879 GEN11_MEMORYADDRESSATTRIBUTES_pack(data, &dw[3], &values->IndirectPayloadBaseAddress2); 880} 881 882#define GEN11_HCP_REF_LIST_ENTRY_length 1 883struct GEN11_HCP_REF_LIST_ENTRY { 884 uint32_t ReferencePicturetbValue; 885 uint32_t ListEntry; 886 uint32_t ChromaWeightedPrediction; 887#define Default 0 888#define Explicit 1 889 uint32_t LumaWeightedPrediction; 890#define Default 0 891#define Explicit 1 892 bool LongTermReference; 893 bool FieldPic; 894 bool TopField; 895}; 896 897static inline void 898GEN11_HCP_REF_LIST_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 899 __attribute__((unused)) void * restrict dst, 900 __attribute__((unused)) const struct GEN11_HCP_REF_LIST_ENTRY * restrict values) 901{ 902 uint32_t * restrict dw = (uint32_t * restrict) dst; 903 904 dw[0] = 905 __gen_uint(values->ReferencePicturetbValue, 0, 7) | 906 __gen_uint(values->ListEntry, 8, 10) | 907 __gen_uint(values->ChromaWeightedPrediction, 11, 11) | 908 __gen_uint(values->LumaWeightedPrediction, 12, 12) | 909 __gen_uint(values->LongTermReference, 13, 13) | 910 __gen_uint(values->FieldPic, 14, 14) | 911 __gen_uint(values->TopField, 15, 15); 912} 913 914#define GEN11_HCP_TILE_POSITION_IN_CTB_length 1 915struct GEN11_HCP_TILE_POSITION_IN_CTB { 916 uint32_t CtbPos0i; 917 uint32_t CtbPos1i; 918 uint32_t CtbPos2i; 919 uint32_t CtbPos3i; 920}; 921 922static inline void 923GEN11_HCP_TILE_POSITION_IN_CTB_pack(__attribute__((unused)) __gen_user_data *data, 924 __attribute__((unused)) void * restrict dst, 925 __attribute__((unused)) const struct GEN11_HCP_TILE_POSITION_IN_CTB * restrict values) 926{ 927 uint32_t * restrict dw = (uint32_t * restrict) dst; 928 929 dw[0] = 930 __gen_uint(values->CtbPos0i, 0, 7) | 931 __gen_uint(values->CtbPos1i, 8, 15) | 932 __gen_uint(values->CtbPos2i, 16, 23) | 933 __gen_uint(values->CtbPos3i, 24, 31); 934} 935 936#define GEN11_HCP_TILE_POSITION_IN_CTB_MSB_length 2 937struct GEN11_HCP_TILE_POSITION_IN_CTB_MSB { 938 uint32_t CtbRowPositionofTileColumn[22]; 939}; 940 941static inline void 942GEN11_HCP_TILE_POSITION_IN_CTB_MSB_pack(__attribute__((unused)) __gen_user_data *data, 943 __attribute__((unused)) void * restrict dst, 944 __attribute__((unused)) const struct GEN11_HCP_TILE_POSITION_IN_CTB_MSB * restrict values) 945{ 946 uint32_t * restrict dw = (uint32_t * restrict) dst; 947 948 dw[0] = 949 __gen_uint(values->CtbRowPositionofTileColumn[0], 0, 1) | 950 __gen_uint(values->CtbRowPositionofTileColumn[1], 2, 3) | 951 __gen_uint(values->CtbRowPositionofTileColumn[2], 4, 5) | 952 __gen_uint(values->CtbRowPositionofTileColumn[3], 6, 7) | 953 __gen_uint(values->CtbRowPositionofTileColumn[4], 8, 9) | 954 __gen_uint(values->CtbRowPositionofTileColumn[5], 10, 11) | 955 __gen_uint(values->CtbRowPositionofTileColumn[6], 12, 13) | 956 __gen_uint(values->CtbRowPositionofTileColumn[7], 14, 15) | 957 __gen_uint(values->CtbRowPositionofTileColumn[8], 16, 17) | 958 __gen_uint(values->CtbRowPositionofTileColumn[9], 18, 19) | 959 __gen_uint(values->CtbRowPositionofTileColumn[10], 20, 21) | 960 __gen_uint(values->CtbRowPositionofTileColumn[11], 22, 23) | 961 __gen_uint(values->CtbRowPositionofTileColumn[12], 24, 25) | 962 __gen_uint(values->CtbRowPositionofTileColumn[13], 26, 27) | 963 __gen_uint(values->CtbRowPositionofTileColumn[14], 28, 29) | 964 __gen_uint(values->CtbRowPositionofTileColumn[15], 30, 31); 965 966 dw[1] = 967 __gen_uint(values->CtbRowPositionofTileColumn[16], 0, 1) | 968 __gen_uint(values->CtbRowPositionofTileColumn[17], 2, 3) | 969 __gen_uint(values->CtbRowPositionofTileColumn[18], 4, 5) | 970 __gen_uint(values->CtbRowPositionofTileColumn[19], 6, 7) | 971 __gen_uint(values->CtbRowPositionofTileColumn[20], 8, 9) | 972 __gen_uint(values->CtbRowPositionofTileColumn[21], 10, 11); 973} 974 975#define GEN11_HCP_WEIGHTOFFSET_CHROMA_ENTRY_length 1 976struct GEN11_HCP_WEIGHTOFFSET_CHROMA_ENTRY { 977 int32_t DeltaChromaWeightLX0; 978 uint32_t ChromaOffsetLX0; 979 int32_t DeltaChromaWeightLX1; 980 uint32_t ChromaOffsetLX1; 981}; 982 983static inline void 984GEN11_HCP_WEIGHTOFFSET_CHROMA_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 985 __attribute__((unused)) void * restrict dst, 986 __attribute__((unused)) const struct GEN11_HCP_WEIGHTOFFSET_CHROMA_ENTRY * restrict values) 987{ 988 uint32_t * restrict dw = (uint32_t * restrict) dst; 989 990 dw[0] = 991 __gen_sint(values->DeltaChromaWeightLX0, 0, 7) | 992 __gen_uint(values->ChromaOffsetLX0, 8, 15) | 993 __gen_sint(values->DeltaChromaWeightLX1, 16, 23) | 994 __gen_uint(values->ChromaOffsetLX1, 24, 31); 995} 996 997#define GEN11_HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_length 1 998struct GEN11_HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY { 999 uint32_t ChromaOffsetLX0MSBytei; 1000 uint32_t ChromaOffsetLX0MSBytei1; 1001 uint32_t ChromaOffsetLX1MSBytei; 1002 uint32_t ChromaOffsetLX1MSBytei1; 1003}; 1004 1005static inline void 1006GEN11_HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 1007 __attribute__((unused)) void * restrict dst, 1008 __attribute__((unused)) const struct GEN11_HCP_WEIGHTOFFSET_CHROMA_EXT_ENTRY * restrict values) 1009{ 1010 uint32_t * restrict dw = (uint32_t * restrict) dst; 1011 1012 dw[0] = 1013 __gen_uint(values->ChromaOffsetLX0MSBytei, 0, 7) | 1014 __gen_uint(values->ChromaOffsetLX0MSBytei1, 8, 15) | 1015 __gen_uint(values->ChromaOffsetLX1MSBytei, 16, 23) | 1016 __gen_uint(values->ChromaOffsetLX1MSBytei1, 24, 31); 1017} 1018 1019#define GEN11_HCP_WEIGHTOFFSET_LUMA_ENTRY_length 1 1020struct GEN11_HCP_WEIGHTOFFSET_LUMA_ENTRY { 1021 int32_t DeltaLumaWeightLX; 1022 uint32_t LumaOffsetLX; 1023 uint32_t LumaOffsetLXMSByte; 1024}; 1025 1026static inline void 1027GEN11_HCP_WEIGHTOFFSET_LUMA_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 1028 __attribute__((unused)) void * restrict dst, 1029 __attribute__((unused)) const struct GEN11_HCP_WEIGHTOFFSET_LUMA_ENTRY * restrict values) 1030{ 1031 uint32_t * restrict dw = (uint32_t * restrict) dst; 1032 1033 dw[0] = 1034 __gen_sint(values->DeltaLumaWeightLX, 0, 7) | 1035 __gen_uint(values->LumaOffsetLX, 8, 15) | 1036 __gen_uint(values->LumaOffsetLXMSByte, 24, 31); 1037} 1038 1039#define GEN11_HEVC_VP9_RDOQ_LAMBDA_FIELDS_length 1 1040struct GEN11_HEVC_VP9_RDOQ_LAMBDA_FIELDS { 1041 uint32_t LambdaValue0; 1042 uint32_t LambdaValue1; 1043}; 1044 1045static inline void 1046GEN11_HEVC_VP9_RDOQ_LAMBDA_FIELDS_pack(__attribute__((unused)) __gen_user_data *data, 1047 __attribute__((unused)) void * restrict dst, 1048 __attribute__((unused)) const struct GEN11_HEVC_VP9_RDOQ_LAMBDA_FIELDS * restrict values) 1049{ 1050 uint32_t * restrict dw = (uint32_t * restrict) dst; 1051 1052 dw[0] = 1053 __gen_uint(values->LambdaValue0, 0, 15) | 1054 __gen_uint(values->LambdaValue1, 16, 31); 1055} 1056 1057#define GEN11_HUC_VIRTUAL_ADDR_REGION_length 3 1058struct GEN11_HUC_VIRTUAL_ADDR_REGION { 1059 __gen_address_type Address; 1060 struct GEN11_MEMORYADDRESSATTRIBUTES MemoryAddressAttributes; 1061}; 1062 1063static inline void 1064GEN11_HUC_VIRTUAL_ADDR_REGION_pack(__attribute__((unused)) __gen_user_data *data, 1065 __attribute__((unused)) void * restrict dst, 1066 __attribute__((unused)) const struct GEN11_HUC_VIRTUAL_ADDR_REGION * restrict values) 1067{ 1068 uint32_t * restrict dw = (uint32_t * restrict) dst; 1069 1070 const uint64_t v0_address = 1071 __gen_combine_address(data, &dw[0], values->Address, 0); 1072 dw[0] = v0_address; 1073 dw[1] = v0_address >> 32; 1074 1075 GEN11_MEMORYADDRESSATTRIBUTES_pack(data, &dw[2], &values->MemoryAddressAttributes); 1076} 1077 1078#define GEN11_IMAGE_STATE_COST_length 2 1079struct GEN11_IMAGE_STATE_COST { 1080 uint32_t MV0Cost; 1081 uint32_t MV1Cost; 1082 uint32_t MV2Cost; 1083 uint32_t MV3Cost; 1084 uint32_t MV4Cost; 1085 uint32_t MV5Cost; 1086 uint32_t MV6Cost; 1087 uint32_t MV7Cost; 1088}; 1089 1090static inline void 1091GEN11_IMAGE_STATE_COST_pack(__attribute__((unused)) __gen_user_data *data, 1092 __attribute__((unused)) void * restrict dst, 1093 __attribute__((unused)) const struct GEN11_IMAGE_STATE_COST * restrict values) 1094{ 1095 uint32_t * restrict dw = (uint32_t * restrict) dst; 1096 1097 dw[0] = 1098 __gen_uint(values->MV0Cost, 0, 7) | 1099 __gen_uint(values->MV1Cost, 8, 15) | 1100 __gen_uint(values->MV2Cost, 16, 23) | 1101 __gen_uint(values->MV3Cost, 24, 31); 1102 1103 dw[1] = 1104 __gen_uint(values->MV4Cost, 0, 7) | 1105 __gen_uint(values->MV5Cost, 8, 15) | 1106 __gen_uint(values->MV6Cost, 16, 23) | 1107 __gen_uint(values->MV7Cost, 24, 31); 1108} 1109 1110#define GEN11_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_length 3 1111struct GEN11_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT { 1112 bool MBErrorConcealmentPSliceWeightPredictionDisable; 1113 bool MBErrorConcealmentPSliceMotionVectorsOverrideDisable; 1114 bool MBErrorConcealmentBSpatialWeightPredictionDisable; 1115 bool MBErrorConcealmentBSpatialMotionVectorsOverrideDisable; 1116 uint32_t MBErrorConcealmentBSpatialPredictionMode; 1117 bool MBHeaderErrorHandling; 1118 bool EntropyErrorHandling; 1119 bool MPRErrorHandling; 1120 bool BSDPrematureCompleteErrorHandling; 1121 uint32_t ConcealmentPictureID; 1122 bool MBErrorConcealmentBTemporalWeightPredictionDisable; 1123 bool MBErrorConcealmentBTemporalMotionVectorsOverrideEnable; 1124 uint32_t MBErrorConcealmentBTemporalPredictionMode; 1125 bool IntraPredMode4x48x8LumaErrorControl; 1126 bool InitCurrentMBNumber; 1127 uint32_t ConcealmentMethod; 1128 uint32_t FirstMBBitOffset; 1129 bool LastSlice; 1130 bool EmulationPreventionBytePresent; 1131 bool FixPrevMBSkipped; 1132 uint32_t FirstMBByteOffsetofSliceDataorSliceHeader; 1133 bool IntraPredictionErrorControl; 1134 bool Intra8x84x4PredictionErrorConcealmentControl; 1135 uint32_t BSliceTemporalInterConcealmentMode; 1136 uint32_t BSliceSpatialInterConcealmentMode; 1137 uint32_t BSliceInterDirectTypeConcealmentMode; 1138 uint32_t BSliceConcealmentMode; 1139#define IntraConcealment 1 1140#define InterConcealment 0 1141 uint32_t PSliceInterConcealmentMode; 1142 uint32_t PSliceConcealmentMode; 1143#define IntraConcealment 1 1144#define InterConcealment 0 1145 uint32_t ConcealmentReferencePictureFieldBit; 1146 uint32_t ISliceConcealmentMode; 1147#define IntraConcealment 1 1148#define InterConcealment 0 1149}; 1150 1151static inline void 1152GEN11_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 1153 __attribute__((unused)) void * restrict dst, 1154 __attribute__((unused)) const struct GEN11_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT * restrict values) 1155{ 1156 uint32_t * restrict dw = (uint32_t * restrict) dst; 1157 1158 dw[0] = 1159 __gen_uint(values->MBErrorConcealmentPSliceWeightPredictionDisable, 0, 0) | 1160 __gen_uint(values->MBErrorConcealmentPSliceMotionVectorsOverrideDisable, 1, 1) | 1161 __gen_uint(values->MBErrorConcealmentBSpatialWeightPredictionDisable, 3, 3) | 1162 __gen_uint(values->MBErrorConcealmentBSpatialMotionVectorsOverrideDisable, 4, 4) | 1163 __gen_uint(values->MBErrorConcealmentBSpatialPredictionMode, 6, 7) | 1164 __gen_uint(values->MBHeaderErrorHandling, 8, 8) | 1165 __gen_uint(values->EntropyErrorHandling, 10, 10) | 1166 __gen_uint(values->MPRErrorHandling, 12, 12) | 1167 __gen_uint(values->BSDPrematureCompleteErrorHandling, 14, 14) | 1168 __gen_uint(values->ConcealmentPictureID, 16, 21) | 1169 __gen_uint(values->MBErrorConcealmentBTemporalWeightPredictionDisable, 24, 24) | 1170 __gen_uint(values->MBErrorConcealmentBTemporalMotionVectorsOverrideEnable, 25, 25) | 1171 __gen_uint(values->MBErrorConcealmentBTemporalPredictionMode, 27, 28) | 1172 __gen_uint(values->IntraPredMode4x48x8LumaErrorControl, 29, 29) | 1173 __gen_uint(values->InitCurrentMBNumber, 30, 30) | 1174 __gen_uint(values->ConcealmentMethod, 31, 31); 1175 1176 dw[1] = 1177 __gen_uint(values->FirstMBBitOffset, 0, 2) | 1178 __gen_uint(values->LastSlice, 3, 3) | 1179 __gen_uint(values->EmulationPreventionBytePresent, 4, 4) | 1180 __gen_uint(values->FixPrevMBSkipped, 7, 7) | 1181 __gen_uint(values->FirstMBByteOffsetofSliceDataorSliceHeader, 16, 31); 1182 1183 dw[2] = 1184 __gen_uint(values->IntraPredictionErrorControl, 0, 0) | 1185 __gen_uint(values->Intra8x84x4PredictionErrorConcealmentControl, 1, 1) | 1186 __gen_uint(values->BSliceTemporalInterConcealmentMode, 4, 6) | 1187 __gen_uint(values->BSliceSpatialInterConcealmentMode, 8, 10) | 1188 __gen_uint(values->BSliceInterDirectTypeConcealmentMode, 12, 13) | 1189 __gen_uint(values->BSliceConcealmentMode, 15, 15) | 1190 __gen_uint(values->PSliceInterConcealmentMode, 16, 18) | 1191 __gen_uint(values->PSliceConcealmentMode, 23, 23) | 1192 __gen_uint(values->ConcealmentReferencePictureFieldBit, 24, 29) | 1193 __gen_uint(values->ISliceConcealmentMode, 31, 31); 1194} 1195 1196#define GEN11_INTERFACE_DESCRIPTOR_DATA_length 8 1197struct GEN11_INTERFACE_DESCRIPTOR_DATA { 1198 uint64_t KernelStartPointer; 1199 bool SoftwareExceptionEnable; 1200 bool MaskStackExceptionEnable; 1201 bool IllegalOpcodeExceptionEnable; 1202 uint32_t FloatingPointMode; 1203#define IEEE754 0 1204#define Alternate 1 1205 uint32_t ThreadPriority; 1206#define NormalPriority 0 1207#define HighPriority 1 1208 bool SingleProgramFlow; 1209 uint32_t DenormMode; 1210#define Ftz 0 1211#define SetByKernel 1 1212 uint32_t SamplerCount; 1213#define Nosamplersused 0 1214#define Between1and4samplersused 1 1215#define Between5and8samplersused 2 1216#define Between9and12samplersused 3 1217#define Between13and16samplersused 4 1218 uint64_t SamplerStatePointer; 1219 uint32_t BindingTableEntryCount; 1220 uint64_t BindingTablePointer; 1221 uint32_t ConstantURBEntryReadOffset; 1222 uint32_t ConstantURBEntryReadLength; 1223 uint32_t NumberofThreadsinGPGPUThreadGroup; 1224 bool GlobalBarrierEnable; 1225 uint32_t SharedLocalMemorySize; 1226#define Encodes0K 0 1227#define Encodes1K 1 1228#define Encodes2K 2 1229#define Encodes4K 3 1230#define Encodes8K 4 1231#define Encodes16K 5 1232#define Encodes32K 6 1233#define Encodes64K 7 1234 bool BarrierEnable; 1235 uint32_t RoundingMode; 1236#define RTNE 0 1237#define RU 1 1238#define RD 2 1239#define RTZ 3 1240 uint32_t CrossThreadConstantDataReadLength; 1241}; 1242 1243static inline void 1244GEN11_INTERFACE_DESCRIPTOR_DATA_pack(__attribute__((unused)) __gen_user_data *data, 1245 __attribute__((unused)) void * restrict dst, 1246 __attribute__((unused)) const struct GEN11_INTERFACE_DESCRIPTOR_DATA * restrict values) 1247{ 1248 uint32_t * restrict dw = (uint32_t * restrict) dst; 1249 1250 const uint64_t v0 = 1251 __gen_offset(values->KernelStartPointer, 6, 47); 1252 dw[0] = v0; 1253 dw[1] = v0 >> 32; 1254 1255 dw[2] = 1256 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 1257 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 1258 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 1259 __gen_uint(values->FloatingPointMode, 16, 16) | 1260 __gen_uint(values->ThreadPriority, 17, 17) | 1261 __gen_uint(values->SingleProgramFlow, 18, 18) | 1262 __gen_uint(values->DenormMode, 19, 19); 1263 1264 dw[3] = 1265 __gen_uint(values->SamplerCount, 2, 4) | 1266 __gen_offset(values->SamplerStatePointer, 5, 31); 1267 1268 dw[4] = 1269 __gen_uint(values->BindingTableEntryCount, 0, 4) | 1270 __gen_offset(values->BindingTablePointer, 5, 15); 1271 1272 dw[5] = 1273 __gen_uint(values->ConstantURBEntryReadOffset, 0, 15) | 1274 __gen_uint(values->ConstantURBEntryReadLength, 16, 31); 1275 1276 dw[6] = 1277 __gen_uint(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) | 1278 __gen_uint(values->GlobalBarrierEnable, 15, 15) | 1279 __gen_uint(values->SharedLocalMemorySize, 16, 20) | 1280 __gen_uint(values->BarrierEnable, 21, 21) | 1281 __gen_uint(values->RoundingMode, 22, 23); 1282 1283 dw[7] = 1284 __gen_uint(values->CrossThreadConstantDataReadLength, 0, 7); 1285} 1286 1287#define GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_length 4 1288struct GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY { 1289 float Table0XFilterCoefficientn0; 1290 float Table0YFilterCoefficientn0; 1291 float Table0XFilterCoefficientn1; 1292 float Table0YFilterCoefficientn1; 1293 float Table0XFilterCoefficientn2; 1294 float Table0YFilterCoefficientn2; 1295 float Table0XFilterCoefficientn3; 1296 float Table0YFilterCoefficientn3; 1297 float Table0XFilterCoefficientn4; 1298 float Table0YFilterCoefficientn4; 1299 float Table0XFilterCoefficientn5; 1300 float Table0YFilterCoefficientn5; 1301 float Table0XFilterCoefficientn6; 1302 float Table0YFilterCoefficientn6; 1303 float Table0XFilterCoefficientn7; 1304 float Table0YFilterCoefficientn7; 1305}; 1306 1307static inline void 1308GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(__attribute__((unused)) __gen_user_data *data, 1309 __attribute__((unused)) void * restrict dst, 1310 __attribute__((unused)) const struct GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY * restrict values) 1311{ 1312 uint32_t * restrict dw = (uint32_t * restrict) dst; 1313 1314 dw[0] = 1315 __gen_sfixed(values->Table0XFilterCoefficientn0, 0, 7, 6) | 1316 __gen_sfixed(values->Table0YFilterCoefficientn0, 8, 15, 6) | 1317 __gen_sfixed(values->Table0XFilterCoefficientn1, 16, 23, 6) | 1318 __gen_sfixed(values->Table0YFilterCoefficientn1, 24, 31, 6); 1319 1320 dw[1] = 1321 __gen_sfixed(values->Table0XFilterCoefficientn2, 0, 7, 6) | 1322 __gen_sfixed(values->Table0YFilterCoefficientn2, 8, 15, 6) | 1323 __gen_sfixed(values->Table0XFilterCoefficientn3, 16, 23, 6) | 1324 __gen_sfixed(values->Table0YFilterCoefficientn3, 24, 31, 6); 1325 1326 dw[2] = 1327 __gen_sfixed(values->Table0XFilterCoefficientn4, 0, 7, 6) | 1328 __gen_sfixed(values->Table0YFilterCoefficientn4, 8, 15, 6) | 1329 __gen_sfixed(values->Table0XFilterCoefficientn5, 16, 23, 6) | 1330 __gen_sfixed(values->Table0YFilterCoefficientn5, 24, 31, 6); 1331 1332 dw[3] = 1333 __gen_sfixed(values->Table0XFilterCoefficientn6, 0, 7, 6) | 1334 __gen_sfixed(values->Table0YFilterCoefficientn6, 8, 15, 6) | 1335 __gen_sfixed(values->Table0XFilterCoefficientn7, 16, 23, 6) | 1336 __gen_sfixed(values->Table0YFilterCoefficientn7, 24, 31, 6); 1337} 1338 1339#define GEN11_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_length 2 1340struct GEN11_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION { 1341 uint32_t FirstMBBitOffset; 1342 bool LastMB; 1343 bool LastPicSlice; 1344 uint32_t SliceConcealmentType; 1345 uint32_t SliceConcealmentOverride; 1346 uint32_t MBCount; 1347 uint32_t SliceVerticalPosition; 1348 uint32_t SliceHorizontalPosition; 1349 uint32_t NextSliceHorizontalPosition; 1350 uint32_t NextSliceVerticalPosition; 1351 uint32_t QuantizerScaleCode; 1352}; 1353 1354static inline void 1355GEN11_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_pack(__attribute__((unused)) __gen_user_data *data, 1356 __attribute__((unused)) void * restrict dst, 1357 __attribute__((unused)) const struct GEN11_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION * restrict values) 1358{ 1359 uint32_t * restrict dw = (uint32_t * restrict) dst; 1360 1361 dw[0] = 1362 __gen_uint(values->FirstMBBitOffset, 0, 2) | 1363 __gen_uint(values->LastMB, 3, 3) | 1364 __gen_uint(values->LastPicSlice, 5, 5) | 1365 __gen_uint(values->SliceConcealmentType, 6, 6) | 1366 __gen_uint(values->SliceConcealmentOverride, 7, 7) | 1367 __gen_uint(values->MBCount, 8, 15) | 1368 __gen_uint(values->SliceVerticalPosition, 16, 23) | 1369 __gen_uint(values->SliceHorizontalPosition, 24, 31); 1370 1371 dw[1] = 1372 __gen_uint(values->NextSliceHorizontalPosition, 0, 7) | 1373 __gen_uint(values->NextSliceVerticalPosition, 8, 16) | 1374 __gen_uint(values->QuantizerScaleCode, 24, 28); 1375} 1376 1377#define GEN11_MI_MATH_ALU_INSTRUCTION_length 1 1378struct GEN11_MI_MATH_ALU_INSTRUCTION { 1379 uint32_t Operand2; 1380#define MI_ALU_REG0 0 1381#define MI_ALU_REG1 1 1382#define MI_ALU_REG2 2 1383#define MI_ALU_REG3 3 1384#define MI_ALU_REG4 4 1385#define MI_ALU_REG5 5 1386#define MI_ALU_REG6 6 1387#define MI_ALU_REG7 7 1388#define MI_ALU_REG8 8 1389#define MI_ALU_REG9 9 1390#define MI_ALU_REG10 10 1391#define MI_ALU_REG11 11 1392#define MI_ALU_REG12 12 1393#define MI_ALU_REG13 13 1394#define MI_ALU_REG14 14 1395#define MI_ALU_REG15 15 1396#define MI_ALU_SRCA 32 1397#define MI_ALU_SRCB 33 1398#define MI_ALU_ACCU 49 1399#define MI_ALU_ZF 50 1400#define MI_ALU_CF 51 1401 uint32_t Operand1; 1402#define MI_ALU_REG0 0 1403#define MI_ALU_REG1 1 1404#define MI_ALU_REG2 2 1405#define MI_ALU_REG3 3 1406#define MI_ALU_REG4 4 1407#define MI_ALU_REG5 5 1408#define MI_ALU_REG6 6 1409#define MI_ALU_REG7 7 1410#define MI_ALU_REG8 8 1411#define MI_ALU_REG9 9 1412#define MI_ALU_REG10 10 1413#define MI_ALU_REG11 11 1414#define MI_ALU_REG12 12 1415#define MI_ALU_REG13 13 1416#define MI_ALU_REG14 14 1417#define MI_ALU_REG15 15 1418#define MI_ALU_SRCA 32 1419#define MI_ALU_SRCB 33 1420#define MI_ALU_ACCU 49 1421#define MI_ALU_ZF 50 1422#define MI_ALU_CF 51 1423 uint32_t ALUOpcode; 1424#define MI_ALU_NOOP 0 1425#define MI_ALU_LOAD 128 1426#define MI_ALU_LOADINV 1152 1427#define MI_ALU_LOAD0 129 1428#define MI_ALU_LOAD1 1153 1429#define MI_ALU_ADD 256 1430#define MI_ALU_SUB 257 1431#define MI_ALU_AND 258 1432#define MI_ALU_OR 259 1433#define MI_ALU_XOR 260 1434#define MI_ALU_STORE 384 1435#define MI_ALU_STOREINV 1408 1436}; 1437 1438static inline void 1439GEN11_MI_MATH_ALU_INSTRUCTION_pack(__attribute__((unused)) __gen_user_data *data, 1440 __attribute__((unused)) void * restrict dst, 1441 __attribute__((unused)) const struct GEN11_MI_MATH_ALU_INSTRUCTION * restrict values) 1442{ 1443 uint32_t * restrict dw = (uint32_t * restrict) dst; 1444 1445 dw[0] = 1446 __gen_uint(values->Operand2, 0, 9) | 1447 __gen_uint(values->Operand1, 10, 19) | 1448 __gen_uint(values->ALUOpcode, 20, 31); 1449} 1450 1451#define GEN11_PALETTE_ENTRY_length 1 1452struct GEN11_PALETTE_ENTRY { 1453 uint32_t Blue; 1454 uint32_t Green; 1455 uint32_t Red; 1456 uint32_t Alpha; 1457}; 1458 1459static inline void 1460GEN11_PALETTE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 1461 __attribute__((unused)) void * restrict dst, 1462 __attribute__((unused)) const struct GEN11_PALETTE_ENTRY * restrict values) 1463{ 1464 uint32_t * restrict dw = (uint32_t * restrict) dst; 1465 1466 dw[0] = 1467 __gen_uint(values->Blue, 0, 7) | 1468 __gen_uint(values->Green, 8, 15) | 1469 __gen_uint(values->Red, 16, 23) | 1470 __gen_uint(values->Alpha, 24, 31); 1471} 1472 1473#define GEN11_RENDER_SURFACE_STATE_length 16 1474struct GEN11_RENDER_SURFACE_STATE { 1475 bool CubeFaceEnablePositiveZ; 1476 bool CubeFaceEnableNegativeZ; 1477 bool CubeFaceEnablePositiveY; 1478 bool CubeFaceEnableNegativeY; 1479 bool CubeFaceEnablePositiveX; 1480 bool CubeFaceEnableNegativeX; 1481 uint32_t MediaBoundaryPixelMode; 1482#define NORMAL_MODE 0 1483#define PROGRESSIVE_FRAME 2 1484#define INTERLACED_FRAME 3 1485 uint32_t RenderCacheReadWriteMode; 1486#define WriteOnlyCache 0 1487#define ReadWriteCache 1 1488 bool SamplerL2BypassModeDisable; 1489 uint32_t VerticalLineStrideOffset; 1490 uint32_t VerticalLineStride; 1491 uint32_t TileMode; 1492#define LINEAR 0 1493#define WMAJOR 1 1494#define XMAJOR 2 1495#define YMAJOR 3 1496 uint32_t SurfaceHorizontalAlignment; 1497#define HALIGN4 1 1498#define HALIGN8 2 1499#define HALIGN16 3 1500 uint32_t SurfaceVerticalAlignment; 1501#define VALIGN4 1 1502#define VALIGN8 2 1503#define VALIGN16 3 1504 uint32_t SurfaceFormat; 1505 bool SurfaceArray; 1506 uint32_t SurfaceType; 1507#define SURFTYPE_1D 0 1508#define SURFTYPE_2D 1 1509#define SURFTYPE_3D 2 1510#define SURFTYPE_CUBE 3 1511#define SURFTYPE_BUFFER 4 1512#define SURFTYPE_STRBUF 5 1513#define SURFTYPE_NULL 7 1514 uint32_t SurfaceQPitch; 1515 float BaseMipLevel; 1516 uint32_t MOCS; 1517 uint32_t Width; 1518 uint32_t Height; 1519 uint32_t SurfacePitch; 1520 uint32_t TileAddressMappingMode; 1521#define Gen9 0 1522#define Gen10 1 1523 uint32_t Depth; 1524 uint32_t MultisamplePositionPaletteIndex; 1525 uint32_t NumberofMultisamples; 1526#define MULTISAMPLECOUNT_1 0 1527#define MULTISAMPLECOUNT_2 1 1528#define MULTISAMPLECOUNT_4 2 1529#define MULTISAMPLECOUNT_8 3 1530#define MULTISAMPLECOUNT_16 4 1531 uint32_t MultisampledSurfaceStorageFormat; 1532#define MSFMT_MSS 0 1533#define MSFMT_DEPTH_STENCIL 1 1534 uint32_t RenderTargetViewExtent; 1535 uint32_t MinimumArrayElement; 1536 uint32_t RenderTargetAndSampleUnormRotation; 1537#define _0DEG 0 1538#define _90DEG 1 1539#define _180DEG 2 1540#define _270DEG 3 1541 bool ForceNonComparisonReductionType; 1542 uint32_t MIPCountLOD; 1543 uint32_t SurfaceMinLOD; 1544 uint32_t MipTailStartLOD; 1545 uint32_t CoherencyType; 1546#define GPUcoherent 0 1547#define IAcoherent 1 1548 uint32_t TiledResourceMode; 1549#define NONE 0 1550#define _4KB 1 1551#define _64KB 2 1552#define TILEYF 1 1553#define TILEYS 2 1554 bool EWADisableForCube; 1555 uint32_t YOffset; 1556 uint32_t XOffset; 1557 uint32_t AuxiliarySurfaceMode; 1558#define AUX_NONE 0 1559#define AUX_CCS_D 1 1560#define AUX_APPEND 2 1561#define AUX_HIZ 3 1562#define AUX_CCS_E 5 1563 uint32_t YOffsetforUorUVPlane; 1564 uint32_t AuxiliarySurfacePitch; 1565 uint32_t AuxiliarySurfaceQPitch; 1566 uint32_t XOffsetforUorUVPlane; 1567 bool SeparateUVPlaneEnable; 1568 float ResourceMinLOD; 1569 enum GEN11_ShaderChannelSelect ShaderChannelSelectAlpha; 1570 enum GEN11_ShaderChannelSelect ShaderChannelSelectBlue; 1571 enum GEN11_ShaderChannelSelect ShaderChannelSelectGreen; 1572 enum GEN11_ShaderChannelSelect ShaderChannelSelectRed; 1573 bool MemoryCompressionEnable; 1574 uint32_t MemoryCompressionMode; 1575#define Horizontal 0 1576#define Vertical 1 1577 __gen_address_type SurfaceBaseAddress; 1578 uint32_t QuiltWidth; 1579 uint32_t QuiltHeight; 1580 bool ClearValueAddressEnable; 1581 __gen_address_type AuxiliarySurfaceBaseAddress; 1582 uint32_t AuxiliaryTableIndexforMediaCompressedSurface; 1583 uint32_t YOffsetforVPlane; 1584 uint32_t XOffsetforVPlane; 1585 int32_t RedClearColor; 1586 uint32_t ClearColorConversionEnable; 1587 __gen_address_type ClearValueAddress; 1588 int32_t GreenClearColor; 1589 int32_t BlueClearColor; 1590 int32_t AlphaClearColor; 1591}; 1592 1593static inline void 1594GEN11_RENDER_SURFACE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1595 __attribute__((unused)) void * restrict dst, 1596 __attribute__((unused)) const struct GEN11_RENDER_SURFACE_STATE * restrict values) 1597{ 1598 uint32_t * restrict dw = (uint32_t * restrict) dst; 1599 1600 dw[0] = 1601 __gen_uint(values->CubeFaceEnablePositiveZ, 0, 0) | 1602 __gen_uint(values->CubeFaceEnableNegativeZ, 1, 1) | 1603 __gen_uint(values->CubeFaceEnablePositiveY, 2, 2) | 1604 __gen_uint(values->CubeFaceEnableNegativeY, 3, 3) | 1605 __gen_uint(values->CubeFaceEnablePositiveX, 4, 4) | 1606 __gen_uint(values->CubeFaceEnableNegativeX, 5, 5) | 1607 __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | 1608 __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | 1609 __gen_uint(values->SamplerL2BypassModeDisable, 9, 9) | 1610 __gen_uint(values->VerticalLineStrideOffset, 10, 10) | 1611 __gen_uint(values->VerticalLineStride, 11, 11) | 1612 __gen_uint(values->TileMode, 12, 13) | 1613 __gen_uint(values->SurfaceHorizontalAlignment, 14, 15) | 1614 __gen_uint(values->SurfaceVerticalAlignment, 16, 17) | 1615 __gen_uint(values->SurfaceFormat, 18, 27) | 1616 __gen_uint(values->SurfaceArray, 28, 28) | 1617 __gen_uint(values->SurfaceType, 29, 31); 1618 1619 dw[1] = 1620 __gen_uint(values->SurfaceQPitch, 0, 14) | 1621 __gen_ufixed(values->BaseMipLevel, 19, 23, 1) | 1622 __gen_uint(values->MOCS, 24, 30); 1623 1624 dw[2] = 1625 __gen_uint(values->Width, 0, 13) | 1626 __gen_uint(values->Height, 16, 29); 1627 1628 dw[3] = 1629 __gen_uint(values->SurfacePitch, 0, 17) | 1630 __gen_uint(values->TileAddressMappingMode, 20, 20) | 1631 __gen_uint(values->Depth, 21, 31); 1632 1633 dw[4] = 1634 __gen_uint(values->MultisamplePositionPaletteIndex, 0, 2) | 1635 __gen_uint(values->NumberofMultisamples, 3, 5) | 1636 __gen_uint(values->MultisampledSurfaceStorageFormat, 6, 6) | 1637 __gen_uint(values->RenderTargetViewExtent, 7, 17) | 1638 __gen_uint(values->MinimumArrayElement, 18, 28) | 1639 __gen_uint(values->RenderTargetAndSampleUnormRotation, 29, 30) | 1640 __gen_uint(values->ForceNonComparisonReductionType, 31, 31); 1641 1642 dw[5] = 1643 __gen_uint(values->MIPCountLOD, 0, 3) | 1644 __gen_uint(values->SurfaceMinLOD, 4, 7) | 1645 __gen_uint(values->MipTailStartLOD, 8, 11) | 1646 __gen_uint(values->CoherencyType, 14, 14) | 1647 __gen_uint(values->TiledResourceMode, 18, 19) | 1648 __gen_uint(values->EWADisableForCube, 20, 20) | 1649 __gen_uint(values->YOffset, 21, 23) | 1650 __gen_uint(values->XOffset, 25, 31); 1651 1652 dw[6] = 1653 __gen_uint(values->AuxiliarySurfaceMode, 0, 2) | 1654 __gen_uint(values->YOffsetforUorUVPlane, 0, 13) | 1655 __gen_uint(values->AuxiliarySurfacePitch, 3, 11) | 1656 __gen_uint(values->AuxiliarySurfaceQPitch, 16, 30) | 1657 __gen_uint(values->XOffsetforUorUVPlane, 16, 29) | 1658 __gen_uint(values->SeparateUVPlaneEnable, 31, 31); 1659 1660 dw[7] = 1661 __gen_ufixed(values->ResourceMinLOD, 0, 11, 8) | 1662 __gen_uint(values->ShaderChannelSelectAlpha, 16, 18) | 1663 __gen_uint(values->ShaderChannelSelectBlue, 19, 21) | 1664 __gen_uint(values->ShaderChannelSelectGreen, 22, 24) | 1665 __gen_uint(values->ShaderChannelSelectRed, 25, 27) | 1666 __gen_uint(values->MemoryCompressionEnable, 30, 30) | 1667 __gen_uint(values->MemoryCompressionMode, 31, 31); 1668 1669 const uint64_t v8_address = 1670 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, 0); 1671 dw[8] = v8_address; 1672 dw[9] = v8_address >> 32; 1673 1674 const uint64_t v10 = 1675 __gen_uint(values->QuiltWidth, 0, 4) | 1676 __gen_uint(values->QuiltHeight, 5, 9) | 1677 __gen_uint(values->ClearValueAddressEnable, 10, 10) | 1678 __gen_uint(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) | 1679 __gen_uint(values->YOffsetforVPlane, 32, 45) | 1680 __gen_uint(values->XOffsetforVPlane, 48, 61); 1681 const uint64_t v10_address = 1682 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, v10); 1683 dw[10] = v10_address; 1684 dw[11] = (v10_address >> 32) | (v10 >> 32); 1685 1686 const uint64_t v12 = 1687 __gen_sint(values->RedClearColor, 0, 31) | 1688 __gen_uint(values->ClearColorConversionEnable, 5, 5) | 1689 __gen_sint(values->GreenClearColor, 32, 63); 1690 const uint64_t v12_address = 1691 __gen_combine_address(data, &dw[12], values->ClearValueAddress, v12); 1692 dw[12] = v12_address; 1693 dw[13] = (v12_address >> 32) | (v12 >> 32); 1694 1695 dw[14] = 1696 __gen_sint(values->BlueClearColor, 0, 31); 1697 1698 dw[15] = 1699 __gen_sint(values->AlphaClearColor, 0, 31); 1700} 1701 1702#define GEN11_ROUNDINGPRECISIONTABLE_3_BITS_length 1 1703struct GEN11_ROUNDINGPRECISIONTABLE_3_BITS { 1704 uint32_t RoundingPrecision; 1705#define _116 0 1706#define _216 1 1707#define _316 2 1708#define _416 3 1709#define _516 4 1710#define _616 5 1711#define _716 6 1712#define _816 7 1713}; 1714 1715static inline void 1716GEN11_ROUNDINGPRECISIONTABLE_3_BITS_pack(__attribute__((unused)) __gen_user_data *data, 1717 __attribute__((unused)) void * restrict dst, 1718 __attribute__((unused)) const struct GEN11_ROUNDINGPRECISIONTABLE_3_BITS * restrict values) 1719{ 1720 uint32_t * restrict dw = (uint32_t * restrict) dst; 1721 1722 dw[0] = 1723 __gen_uint(values->RoundingPrecision, 0, 2); 1724} 1725 1726#define GEN11_SAMPLER_BORDER_COLOR_STATE_length 4 1727struct GEN11_SAMPLER_BORDER_COLOR_STATE { 1728 float BorderColorFloatRed; 1729 uint32_t BorderColor32bitRed; 1730 float BorderColorFloatGreen; 1731 uint32_t BorderColor32bitGreen; 1732 float BorderColorFloatBlue; 1733 uint32_t BorderColor32bitBlue; 1734 float BorderColorFloatAlpha; 1735 uint32_t BorderColor32bitAlpha; 1736}; 1737 1738static inline void 1739GEN11_SAMPLER_BORDER_COLOR_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1740 __attribute__((unused)) void * restrict dst, 1741 __attribute__((unused)) const struct GEN11_SAMPLER_BORDER_COLOR_STATE * restrict values) 1742{ 1743 uint32_t * restrict dw = (uint32_t * restrict) dst; 1744 1745 dw[0] = 1746 __gen_float(values->BorderColorFloatRed) | 1747 __gen_uint(values->BorderColor32bitRed, 0, 31); 1748 1749 dw[1] = 1750 __gen_float(values->BorderColorFloatGreen) | 1751 __gen_uint(values->BorderColor32bitGreen, 0, 31); 1752 1753 dw[2] = 1754 __gen_float(values->BorderColorFloatBlue) | 1755 __gen_uint(values->BorderColor32bitBlue, 0, 31); 1756 1757 dw[3] = 1758 __gen_float(values->BorderColorFloatAlpha) | 1759 __gen_uint(values->BorderColor32bitAlpha, 0, 31); 1760} 1761 1762#define GEN11_SAMPLER_INDIRECT_STATE_BORDER_COLOR_length 4 1763struct GEN11_SAMPLER_INDIRECT_STATE_BORDER_COLOR { 1764 int32_t BorderColorRedAsS31; 1765 uint32_t BorderColorRedAsU32; 1766 float BorderColorRedAsFloat; 1767 uint32_t BorderColorRedAsU8; 1768 uint32_t BorderColorGreenAsU8; 1769 uint32_t BorderColorBlueAsU8; 1770 uint32_t BorderColorAlphaAsU8; 1771 int32_t BorderColorGreenAsS31; 1772 uint32_t BorderColorGreenAsU32; 1773 float BorderColorGreenAsFloat; 1774 int32_t BorderColorBlueAsS31; 1775 uint32_t BorderColorBlueAsU32; 1776 float BorderColorBlueAsFloat; 1777 int32_t BorderColorAlphaAsS31; 1778 uint32_t BorderColorAlphaAsU32; 1779 float BorderColorAlphaAsFloat; 1780}; 1781 1782static inline void 1783GEN11_SAMPLER_INDIRECT_STATE_BORDER_COLOR_pack(__attribute__((unused)) __gen_user_data *data, 1784 __attribute__((unused)) void * restrict dst, 1785 __attribute__((unused)) const struct GEN11_SAMPLER_INDIRECT_STATE_BORDER_COLOR * restrict values) 1786{ 1787 uint32_t * restrict dw = (uint32_t * restrict) dst; 1788 1789 dw[0] = 1790 __gen_sint(values->BorderColorRedAsS31, 0, 31) | 1791 __gen_uint(values->BorderColorRedAsU32, 0, 31) | 1792 __gen_float(values->BorderColorRedAsFloat) | 1793 __gen_uint(values->BorderColorRedAsU8, 0, 7) | 1794 __gen_uint(values->BorderColorGreenAsU8, 8, 15) | 1795 __gen_uint(values->BorderColorBlueAsU8, 16, 23) | 1796 __gen_uint(values->BorderColorAlphaAsU8, 24, 31); 1797 1798 dw[1] = 1799 __gen_sint(values->BorderColorGreenAsS31, 0, 31) | 1800 __gen_uint(values->BorderColorGreenAsU32, 0, 31) | 1801 __gen_float(values->BorderColorGreenAsFloat); 1802 1803 dw[2] = 1804 __gen_sint(values->BorderColorBlueAsS31, 0, 31) | 1805 __gen_uint(values->BorderColorBlueAsU32, 0, 31) | 1806 __gen_float(values->BorderColorBlueAsFloat); 1807 1808 dw[3] = 1809 __gen_sint(values->BorderColorAlphaAsS31, 0, 31) | 1810 __gen_uint(values->BorderColorAlphaAsU32, 0, 31) | 1811 __gen_float(values->BorderColorAlphaAsFloat); 1812} 1813 1814#define GEN11_SAMPLER_STATE_length 4 1815struct GEN11_SAMPLER_STATE { 1816 uint32_t AnisotropicAlgorithm; 1817#define LEGACY 0 1818#define EWAApproximation 1 1819 float TextureLODBias; 1820 uint32_t MinModeFilter; 1821#define MAPFILTER_NEAREST 0 1822#define MAPFILTER_LINEAR 1 1823#define MAPFILTER_ANISOTROPIC 2 1824#define MAPFILTER_MONO 6 1825 uint32_t MagModeFilter; 1826#define MAPFILTER_NEAREST 0 1827#define MAPFILTER_LINEAR 1 1828#define MAPFILTER_ANISOTROPIC 2 1829#define MAPFILTER_MONO 6 1830 uint32_t MipModeFilter; 1831#define MIPFILTER_NONE 0 1832#define MIPFILTER_NEAREST 1 1833#define MIPFILTER_LINEAR 3 1834 uint32_t CoarseLODQualityMode; 1835 uint32_t LODPreClampMode; 1836#define CLAMP_MODE_NONE 0 1837#define CLAMP_MODE_OGL 2 1838 uint32_t TextureBorderColorMode; 1839#define DX10OGL 0 1840#define DX9 1 1841 bool SamplerDisable; 1842 uint32_t CubeSurfaceControlMode; 1843#define PROGRAMMED 0 1844#define OVERRIDE 1 1845 uint32_t ShadowFunction; 1846#define PREFILTEROPALWAYS 0 1847#define PREFILTEROPNEVER 1 1848#define PREFILTEROPLESS 2 1849#define PREFILTEROPEQUAL 3 1850#define PREFILTEROPLEQUAL 4 1851#define PREFILTEROPGREATER 5 1852#define PREFILTEROPNOTEQUAL 6 1853#define PREFILTEROPGEQUAL 7 1854 uint32_t ChromaKeyMode; 1855#define KEYFILTER_KILL_ON_ANY_MATCH 0 1856#define KEYFILTER_REPLACE_BLACK 1 1857 uint32_t ChromaKeyIndex; 1858 bool ChromaKeyEnable; 1859 float MaxLOD; 1860 float MinLOD; 1861 uint32_t LODClampMagnificationMode; 1862#define MIPNONE 0 1863#define MIPFILTER 1 1864 uint32_t SRGBDECODE; 1865#define DECODE_EXT 0 1866#define SKIP_DECODE_EXT 1 1867 uint32_t ReturnFilterWeightforNullTexels; 1868 uint32_t ReturnFilterWeightforBorderTexels; 1869 bool Forcegather4Behavior; 1870 uint64_t BorderColorPointer; 1871 enum GEN11_TextureCoordinateMode TCZAddressControlMode; 1872 enum GEN11_TextureCoordinateMode TCYAddressControlMode; 1873 enum GEN11_TextureCoordinateMode TCXAddressControlMode; 1874 bool ReductionTypeEnable; 1875 bool NonnormalizedCoordinateEnable; 1876 uint32_t TrilinearFilterQuality; 1877#define FULL 0 1878#define HIGH 1 1879#define MED 2 1880#define LOW 3 1881 bool RAddressMinFilterRoundingEnable; 1882 bool RAddressMagFilterRoundingEnable; 1883 bool VAddressMinFilterRoundingEnable; 1884 bool VAddressMagFilterRoundingEnable; 1885 bool UAddressMinFilterRoundingEnable; 1886 bool UAddressMagFilterRoundingEnable; 1887 uint32_t MaximumAnisotropy; 1888#define RATIO21 0 1889#define RATIO41 1 1890#define RATIO61 2 1891#define RATIO81 3 1892#define RATIO101 4 1893#define RATIO121 5 1894#define RATIO141 6 1895#define RATIO161 7 1896 uint32_t ReductionType; 1897#define STD_FILTER 0 1898#define COMPARISON 1 1899#define MINIMUM 2 1900#define MAXIMUM 3 1901}; 1902 1903static inline void 1904GEN11_SAMPLER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1905 __attribute__((unused)) void * restrict dst, 1906 __attribute__((unused)) const struct GEN11_SAMPLER_STATE * restrict values) 1907{ 1908 uint32_t * restrict dw = (uint32_t * restrict) dst; 1909 1910 dw[0] = 1911 __gen_uint(values->AnisotropicAlgorithm, 0, 0) | 1912 __gen_sfixed(values->TextureLODBias, 1, 13, 8) | 1913 __gen_uint(values->MinModeFilter, 14, 16) | 1914 __gen_uint(values->MagModeFilter, 17, 19) | 1915 __gen_uint(values->MipModeFilter, 20, 21) | 1916 __gen_uint(values->CoarseLODQualityMode, 22, 26) | 1917 __gen_uint(values->LODPreClampMode, 27, 28) | 1918 __gen_uint(values->TextureBorderColorMode, 29, 29) | 1919 __gen_uint(values->SamplerDisable, 31, 31); 1920 1921 dw[1] = 1922 __gen_uint(values->CubeSurfaceControlMode, 0, 0) | 1923 __gen_uint(values->ShadowFunction, 1, 3) | 1924 __gen_uint(values->ChromaKeyMode, 4, 4) | 1925 __gen_uint(values->ChromaKeyIndex, 5, 6) | 1926 __gen_uint(values->ChromaKeyEnable, 7, 7) | 1927 __gen_ufixed(values->MaxLOD, 8, 19, 8) | 1928 __gen_ufixed(values->MinLOD, 20, 31, 8); 1929 1930 dw[2] = 1931 __gen_uint(values->LODClampMagnificationMode, 0, 0) | 1932 __gen_uint(values->SRGBDECODE, 1, 1) | 1933 __gen_uint(values->ReturnFilterWeightforNullTexels, 2, 2) | 1934 __gen_uint(values->ReturnFilterWeightforBorderTexels, 3, 3) | 1935 __gen_uint(values->Forcegather4Behavior, 5, 5) | 1936 __gen_offset(values->BorderColorPointer, 6, 23); 1937 1938 dw[3] = 1939 __gen_uint(values->TCZAddressControlMode, 0, 2) | 1940 __gen_uint(values->TCYAddressControlMode, 3, 5) | 1941 __gen_uint(values->TCXAddressControlMode, 6, 8) | 1942 __gen_uint(values->ReductionTypeEnable, 9, 9) | 1943 __gen_uint(values->NonnormalizedCoordinateEnable, 10, 10) | 1944 __gen_uint(values->TrilinearFilterQuality, 11, 12) | 1945 __gen_uint(values->RAddressMinFilterRoundingEnable, 13, 13) | 1946 __gen_uint(values->RAddressMagFilterRoundingEnable, 14, 14) | 1947 __gen_uint(values->VAddressMinFilterRoundingEnable, 15, 15) | 1948 __gen_uint(values->VAddressMagFilterRoundingEnable, 16, 16) | 1949 __gen_uint(values->UAddressMinFilterRoundingEnable, 17, 17) | 1950 __gen_uint(values->UAddressMagFilterRoundingEnable, 18, 18) | 1951 __gen_uint(values->MaximumAnisotropy, 19, 21) | 1952 __gen_uint(values->ReductionType, 22, 23); 1953} 1954 1955#define GEN11_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 8 1956struct GEN11_SAMPLER_STATE_8X8_AVS_COEFFICIENTS { 1957 float Table0FilterCoefficient[4]; 1958 float Table1FilterCoefficient0[4]; 1959 float Table1FilterCoefficient1[4]; 1960}; 1961 1962static inline void 1963GEN11_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_pack(__attribute__((unused)) __gen_user_data *data, 1964 __attribute__((unused)) void * restrict dst, 1965 __attribute__((unused)) const struct GEN11_SAMPLER_STATE_8X8_AVS_COEFFICIENTS * restrict values) 1966{ 1967 uint32_t * restrict dw = (uint32_t * restrict) dst; 1968 1969 dw[0] = 1970 __gen_sfixed(values->Table0FilterCoefficient[0], 0, 7, 6) | 1971 __gen_sfixed(values->Table0FilterCoefficient[1], 8, 15, 6) | 1972 __gen_sfixed(values->Table0FilterCoefficient[2], 16, 23, 6) | 1973 __gen_sfixed(values->Table0FilterCoefficient[3], 24, 31, 6) | 1974 __gen_sfixed(values->Table1FilterCoefficient0[0], 0, 7, 6) | 1975 __gen_sfixed(values->Table1FilterCoefficient1[0], 8, 15, 6); 1976 1977 dw[1] = 1978 __gen_sfixed(values->Table1FilterCoefficient0[1], 0, 7, 6) | 1979 __gen_sfixed(values->Table1FilterCoefficient1[1], 8, 15, 6); 1980 1981 dw[2] = 1982 __gen_sfixed(values->Table1FilterCoefficient0[2], 0, 7, 6) | 1983 __gen_sfixed(values->Table1FilterCoefficient1[2], 8, 15, 6); 1984 1985 dw[3] = 1986 __gen_sfixed(values->Table1FilterCoefficient0[3], 0, 7, 6) | 1987 __gen_sfixed(values->Table1FilterCoefficient1[3], 8, 15, 6); 1988 1989 dw[4] = 0; 1990 1991 dw[5] = 0; 1992 1993 dw[6] = 0; 1994 1995 dw[7] = 0; 1996} 1997 1998#define GEN11_SCISSOR_RECT_length 2 1999struct GEN11_SCISSOR_RECT { 2000 uint32_t ScissorRectangleXMin; 2001 uint32_t ScissorRectangleYMin; 2002 uint32_t ScissorRectangleXMax; 2003 uint32_t ScissorRectangleYMax; 2004}; 2005 2006static inline void 2007GEN11_SCISSOR_RECT_pack(__attribute__((unused)) __gen_user_data *data, 2008 __attribute__((unused)) void * restrict dst, 2009 __attribute__((unused)) const struct GEN11_SCISSOR_RECT * restrict values) 2010{ 2011 uint32_t * restrict dw = (uint32_t * restrict) dst; 2012 2013 dw[0] = 2014 __gen_uint(values->ScissorRectangleXMin, 0, 15) | 2015 __gen_uint(values->ScissorRectangleYMin, 16, 31); 2016 2017 dw[1] = 2018 __gen_uint(values->ScissorRectangleXMax, 0, 15) | 2019 __gen_uint(values->ScissorRectangleYMax, 16, 31); 2020} 2021 2022#define GEN11_SFC_AVS_CHROMA_COEFF_TABLE_BODY_length 64 2023struct GEN11_SFC_AVS_CHROMA_COEFF_TABLE_BODY { 2024 float Table1XFilterCoefficientn2; 2025 float Table1YFilterCoefficientn2; 2026 float Table1XFilterCoefficientn3; 2027 float Table1YFilterCoefficientn3; 2028 float Table1XFilterCoefficientn4; 2029 float Table1YFilterCoefficientn4; 2030 float Table1XFilterCoefficientn5; 2031 float Table1YFilterCoefficientn5; 2032 struct GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY FilterCoefficients[31]; 2033}; 2034 2035static inline void 2036GEN11_SFC_AVS_CHROMA_COEFF_TABLE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2037 __attribute__((unused)) void * restrict dst, 2038 __attribute__((unused)) const struct GEN11_SFC_AVS_CHROMA_COEFF_TABLE_BODY * restrict values) 2039{ 2040 uint32_t * restrict dw = (uint32_t * restrict) dst; 2041 2042 dw[0] = 2043 __gen_sfixed(values->Table1XFilterCoefficientn2, 0, 7, 6) | 2044 __gen_sfixed(values->Table1YFilterCoefficientn2, 8, 15, 6) | 2045 __gen_sfixed(values->Table1XFilterCoefficientn3, 16, 23, 6) | 2046 __gen_sfixed(values->Table1YFilterCoefficientn3, 24, 31, 6); 2047 2048 dw[1] = 2049 __gen_sfixed(values->Table1XFilterCoefficientn4, 0, 7, 6) | 2050 __gen_sfixed(values->Table1YFilterCoefficientn4, 8, 15, 6) | 2051 __gen_sfixed(values->Table1XFilterCoefficientn5, 16, 23, 6) | 2052 __gen_sfixed(values->Table1YFilterCoefficientn5, 24, 31, 6); 2053 2054 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[2], &values->FilterCoefficients[0]); 2055 2056 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[4], &values->FilterCoefficients[1]); 2057 2058 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[6], &values->FilterCoefficients[2]); 2059 2060 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[8], &values->FilterCoefficients[3]); 2061 2062 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[10], &values->FilterCoefficients[4]); 2063 2064 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[12], &values->FilterCoefficients[5]); 2065 2066 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[14], &values->FilterCoefficients[6]); 2067 2068 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[16], &values->FilterCoefficients[7]); 2069 2070 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[18], &values->FilterCoefficients[8]); 2071 2072 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[20], &values->FilterCoefficients[9]); 2073 2074 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[22], &values->FilterCoefficients[10]); 2075 2076 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[24], &values->FilterCoefficients[11]); 2077 2078 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[26], &values->FilterCoefficients[12]); 2079 2080 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[28], &values->FilterCoefficients[13]); 2081 2082 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[30], &values->FilterCoefficients[14]); 2083 2084 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[32], &values->FilterCoefficients[15]); 2085 2086 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[34], &values->FilterCoefficients[16]); 2087 2088 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[36], &values->FilterCoefficients[17]); 2089 2090 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[38], &values->FilterCoefficients[18]); 2091 2092 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[40], &values->FilterCoefficients[19]); 2093 2094 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[42], &values->FilterCoefficients[20]); 2095 2096 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[44], &values->FilterCoefficients[21]); 2097 2098 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[46], &values->FilterCoefficients[22]); 2099 2100 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[48], &values->FilterCoefficients[23]); 2101 2102 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[50], &values->FilterCoefficients[24]); 2103 2104 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[52], &values->FilterCoefficients[25]); 2105 2106 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[54], &values->FilterCoefficients[26]); 2107 2108 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[56], &values->FilterCoefficients[27]); 2109 2110 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[58], &values->FilterCoefficients[28]); 2111 2112 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[60], &values->FilterCoefficients[29]); 2113 2114 GEN11_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[62], &values->FilterCoefficients[30]); 2115} 2116 2117#define GEN11_SFC_AVS_LUMA_COEFF_TABLE_BODY_length 128 2118struct GEN11_SFC_AVS_LUMA_COEFF_TABLE_BODY { 2119 float Table0XFilterCoefficientn0; 2120 float Table0YFilterCoefficientn0; 2121 float Table0XFilterCoefficientn1; 2122 float Table0YFilterCoefficientn1; 2123 float Table0XFilterCoefficientn2; 2124 float Table0YFilterCoefficientn2; 2125 float Table0XFilterCoefficientn3; 2126 float Table0YFilterCoefficientn3; 2127 float Table0XFilterCoefficientn4; 2128 float Table0YFilterCoefficientn4; 2129 float Table0XFilterCoefficientn5; 2130 float Table0YFilterCoefficientn5; 2131 float Table0XFilterCoefficientn6; 2132 float Table0YFilterCoefficientn6; 2133 float Table0XFilterCoefficientn7; 2134 float Table0YFilterCoefficientn7; 2135 struct GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY FilterCoefficients[31]; 2136}; 2137 2138static inline void 2139GEN11_SFC_AVS_LUMA_COEFF_TABLE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2140 __attribute__((unused)) void * restrict dst, 2141 __attribute__((unused)) const struct GEN11_SFC_AVS_LUMA_COEFF_TABLE_BODY * restrict values) 2142{ 2143 uint32_t * restrict dw = (uint32_t * restrict) dst; 2144 2145 dw[0] = 2146 __gen_sfixed(values->Table0XFilterCoefficientn0, 0, 7, 6) | 2147 __gen_sfixed(values->Table0YFilterCoefficientn0, 8, 15, 6) | 2148 __gen_sfixed(values->Table0XFilterCoefficientn1, 16, 23, 6) | 2149 __gen_sfixed(values->Table0YFilterCoefficientn1, 24, 31, 6); 2150 2151 dw[1] = 2152 __gen_sfixed(values->Table0XFilterCoefficientn2, 0, 7, 6) | 2153 __gen_sfixed(values->Table0YFilterCoefficientn2, 8, 15, 6) | 2154 __gen_sfixed(values->Table0XFilterCoefficientn3, 16, 23, 6) | 2155 __gen_sfixed(values->Table0YFilterCoefficientn3, 24, 31, 6); 2156 2157 dw[2] = 2158 __gen_sfixed(values->Table0XFilterCoefficientn4, 0, 7, 6) | 2159 __gen_sfixed(values->Table0YFilterCoefficientn4, 8, 15, 6) | 2160 __gen_sfixed(values->Table0XFilterCoefficientn5, 16, 23, 6) | 2161 __gen_sfixed(values->Table0YFilterCoefficientn5, 24, 31, 6); 2162 2163 dw[3] = 2164 __gen_sfixed(values->Table0XFilterCoefficientn6, 0, 7, 6) | 2165 __gen_sfixed(values->Table0YFilterCoefficientn6, 8, 15, 6) | 2166 __gen_sfixed(values->Table0XFilterCoefficientn7, 16, 23, 6) | 2167 __gen_sfixed(values->Table0YFilterCoefficientn7, 24, 31, 6); 2168 2169 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[4], &values->FilterCoefficients[0]); 2170 2171 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[8], &values->FilterCoefficients[1]); 2172 2173 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[12], &values->FilterCoefficients[2]); 2174 2175 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[16], &values->FilterCoefficients[3]); 2176 2177 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[20], &values->FilterCoefficients[4]); 2178 2179 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[24], &values->FilterCoefficients[5]); 2180 2181 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[28], &values->FilterCoefficients[6]); 2182 2183 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[32], &values->FilterCoefficients[7]); 2184 2185 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[36], &values->FilterCoefficients[8]); 2186 2187 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[40], &values->FilterCoefficients[9]); 2188 2189 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[44], &values->FilterCoefficients[10]); 2190 2191 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[48], &values->FilterCoefficients[11]); 2192 2193 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[52], &values->FilterCoefficients[12]); 2194 2195 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[56], &values->FilterCoefficients[13]); 2196 2197 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[60], &values->FilterCoefficients[14]); 2198 2199 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[64], &values->FilterCoefficients[15]); 2200 2201 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[68], &values->FilterCoefficients[16]); 2202 2203 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[72], &values->FilterCoefficients[17]); 2204 2205 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[76], &values->FilterCoefficients[18]); 2206 2207 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[80], &values->FilterCoefficients[19]); 2208 2209 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[84], &values->FilterCoefficients[20]); 2210 2211 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[88], &values->FilterCoefficients[21]); 2212 2213 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[92], &values->FilterCoefficients[22]); 2214 2215 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[96], &values->FilterCoefficients[23]); 2216 2217 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[100], &values->FilterCoefficients[24]); 2218 2219 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[104], &values->FilterCoefficients[25]); 2220 2221 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[108], &values->FilterCoefficients[26]); 2222 2223 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[112], &values->FilterCoefficients[27]); 2224 2225 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[116], &values->FilterCoefficients[28]); 2226 2227 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[120], &values->FilterCoefficients[29]); 2228 2229 GEN11_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[124], &values->FilterCoefficients[30]); 2230} 2231 2232#define GEN11_SFC_AVS_STATE_BODY_length 3 2233struct GEN11_SFC_AVS_STATE_BODY { 2234 uint32_t TransitionAreawith8Pixels; 2235 uint32_t TransitionAreawith4Pixels; 2236 uint32_t SharpnessLevel; 2237 uint32_t MaxDerivative8Pixels; 2238 uint32_t MaxDerivative4Pixels; 2239 uint32_t InputVerticalSiting; 2240#define _18 1 2241#define _28 2 2242#define _38 3 2243#define _48 4 2244#define _58 5 2245#define _68 6 2246#define _78 7 2247#define _88 8 2248}; 2249 2250static inline void 2251GEN11_SFC_AVS_STATE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2252 __attribute__((unused)) void * restrict dst, 2253 __attribute__((unused)) const struct GEN11_SFC_AVS_STATE_BODY * restrict values) 2254{ 2255 uint32_t * restrict dw = (uint32_t * restrict) dst; 2256 2257 dw[0] = 2258 __gen_uint(values->TransitionAreawith8Pixels, 0, 2) | 2259 __gen_uint(values->TransitionAreawith4Pixels, 4, 6) | 2260 __gen_uint(values->SharpnessLevel, 24, 31); 2261 2262 dw[1] = 2263 __gen_uint(values->MaxDerivative8Pixels, 0, 7) | 2264 __gen_uint(values->MaxDerivative4Pixels, 16, 23); 2265 2266 dw[2] = 2267 __gen_uint(values->InputVerticalSiting, 0, 3); 2268} 2269 2270#define GEN11_SFC_IEF_STATE_BODY_length 23 2271struct GEN11_SFC_IEF_STATE_BODY { 2272 uint32_t GainFactor; 2273 uint32_t WeakEdgeThreshold; 2274 uint32_t StrongEdgeThreshold; 2275 float R3xCoefficient; 2276 float R3cCoefficient; 2277 uint32_t GlobalNoiseEstimation; 2278 uint32_t NonEdgeWeight; 2279 uint32_t RegularWeight; 2280 uint32_t StrongEdgeWeight; 2281 float R5xCoefficient; 2282 float R5cxCoefficient; 2283 float R5cCoefficient; 2284 float STDSinalpha; 2285 float STDCosalpha; 2286 uint32_t Sat_Max; 2287 uint32_t Hue_Max; 2288 float S3U; 2289 uint32_t DiamondMargin; 2290 bool VY_STD_Enable; 2291 uint32_t U_Mid; 2292 uint32_t V_Mid; 2293 int32_t Diamond_dv; 2294 uint32_t Diamond_Th; 2295 float Diamond_alpha; 2296 uint32_t HS_margin; 2297 int32_t Diamond_du; 2298 uint32_t SkinDetailFactor; 2299#define DetailRevealed 0 2300#define NotDetailRevealed 1 2301 uint32_t Y_point_1; 2302 uint32_t Y_point_2; 2303 uint32_t Y_point_3; 2304 uint32_t Y_point_4; 2305 float INV_Margin_VYL; 2306 float INV_Margin_VYU; 2307 uint32_t P0L; 2308 uint32_t P1L; 2309 uint32_t P2L; 2310 uint32_t P3L; 2311 uint32_t B0L; 2312 uint32_t B1L; 2313 uint32_t B2L; 2314 uint32_t B3L; 2315 float S0L; 2316 float Y_Slope_2; 2317 float S1L; 2318 float S2L; 2319 float S3L; 2320 uint32_t P0U; 2321 uint32_t P1U; 2322 float Y_Slope1; 2323 uint32_t P2U; 2324 uint32_t P3U; 2325 uint32_t B0U; 2326 uint32_t B1U; 2327 uint32_t B2U; 2328 uint32_t B3U; 2329 float S0U; 2330 float S1U; 2331 float S2U; 2332 bool TransformEnable; 2333 bool YUVChannelSwap; 2334 float C0; 2335 float C1; 2336 float C2; 2337 float C3; 2338 float C4; 2339 float C5; 2340 float C6; 2341 float C7; 2342 float C8; 2343 float OffsetIn1; 2344 float OffsetOut1; 2345 float OffsetIn2; 2346 float OffsetOut2; 2347 float OffsetIn3; 2348 float OffsetOut3; 2349}; 2350 2351static inline void 2352GEN11_SFC_IEF_STATE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2353 __attribute__((unused)) void * restrict dst, 2354 __attribute__((unused)) const struct GEN11_SFC_IEF_STATE_BODY * restrict values) 2355{ 2356 uint32_t * restrict dw = (uint32_t * restrict) dst; 2357 2358 dw[0] = 2359 __gen_uint(values->GainFactor, 0, 5) | 2360 __gen_uint(values->WeakEdgeThreshold, 6, 11) | 2361 __gen_uint(values->StrongEdgeThreshold, 12, 17) | 2362 __gen_ufixed(values->R3xCoefficient, 18, 22, 5) | 2363 __gen_ufixed(values->R3cCoefficient, 23, 27, 5); 2364 2365 dw[1] = 2366 __gen_uint(values->GlobalNoiseEstimation, 0, 7) | 2367 __gen_uint(values->NonEdgeWeight, 8, 10) | 2368 __gen_uint(values->RegularWeight, 11, 13) | 2369 __gen_uint(values->StrongEdgeWeight, 14, 16) | 2370 __gen_ufixed(values->R5xCoefficient, 17, 21, 5) | 2371 __gen_ufixed(values->R5cxCoefficient, 22, 26, 5) | 2372 __gen_ufixed(values->R5cCoefficient, 27, 31, 5); 2373 2374 dw[2] = 2375 __gen_sfixed(values->STDSinalpha, 0, 7, 7) | 2376 __gen_sfixed(values->STDCosalpha, 8, 15, 7) | 2377 __gen_uint(values->Sat_Max, 16, 21) | 2378 __gen_uint(values->Hue_Max, 22, 27); 2379 2380 dw[3] = 2381 __gen_sfixed(values->S3U, 0, 10, 8) | 2382 __gen_uint(values->DiamondMargin, 12, 14) | 2383 __gen_uint(values->VY_STD_Enable, 15, 15) | 2384 __gen_uint(values->U_Mid, 16, 23) | 2385 __gen_uint(values->V_Mid, 24, 31); 2386 2387 dw[4] = 2388 __gen_sint(values->Diamond_dv, 0, 6) | 2389 __gen_uint(values->Diamond_Th, 7, 12) | 2390 __gen_ufixed(values->Diamond_alpha, 13, 20, 6) | 2391 __gen_uint(values->HS_margin, 21, 23) | 2392 __gen_sint(values->Diamond_du, 24, 30) | 2393 __gen_uint(values->SkinDetailFactor, 31, 31); 2394 2395 dw[5] = 2396 __gen_uint(values->Y_point_1, 0, 7) | 2397 __gen_uint(values->Y_point_2, 8, 15) | 2398 __gen_uint(values->Y_point_3, 16, 23) | 2399 __gen_uint(values->Y_point_4, 24, 31); 2400 2401 dw[6] = 2402 __gen_ufixed(values->INV_Margin_VYL, 0, 15, 16); 2403 2404 dw[7] = 2405 __gen_ufixed(values->INV_Margin_VYU, 0, 15, 16) | 2406 __gen_uint(values->P0L, 16, 23) | 2407 __gen_uint(values->P1L, 24, 31); 2408 2409 dw[8] = 2410 __gen_uint(values->P2L, 0, 7) | 2411 __gen_uint(values->P3L, 8, 15) | 2412 __gen_uint(values->B0L, 16, 23) | 2413 __gen_uint(values->B1L, 24, 31); 2414 2415 dw[9] = 2416 __gen_uint(values->B2L, 0, 7) | 2417 __gen_uint(values->B3L, 8, 15) | 2418 __gen_sfixed(values->S0L, 16, 26, 8) | 2419 __gen_ufixed(values->Y_Slope_2, 27, 31, 3); 2420 2421 dw[10] = 2422 __gen_sfixed(values->S1L, 0, 10, 8) | 2423 __gen_sfixed(values->S2L, 11, 21, 8); 2424 2425 dw[11] = 2426 __gen_sfixed(values->S3L, 0, 10, 8) | 2427 __gen_uint(values->P0U, 11, 18) | 2428 __gen_uint(values->P1U, 19, 26) | 2429 __gen_ufixed(values->Y_Slope1, 27, 31, 3); 2430 2431 dw[12] = 2432 __gen_uint(values->P2U, 0, 7) | 2433 __gen_uint(values->P3U, 8, 15) | 2434 __gen_uint(values->B0U, 16, 23) | 2435 __gen_uint(values->B1U, 24, 31); 2436 2437 dw[13] = 2438 __gen_uint(values->B2U, 0, 7) | 2439 __gen_uint(values->B3U, 8, 15) | 2440 __gen_sfixed(values->S0U, 16, 26, 8); 2441 2442 dw[14] = 2443 __gen_sfixed(values->S1U, 0, 10, 8) | 2444 __gen_sfixed(values->S2U, 11, 21, 8); 2445 2446 dw[15] = 2447 __gen_uint(values->TransformEnable, 0, 0) | 2448 __gen_uint(values->YUVChannelSwap, 1, 1) | 2449 __gen_sfixed(values->C0, 3, 15, 10) | 2450 __gen_sfixed(values->C1, 16, 28, 10); 2451 2452 dw[16] = 2453 __gen_sfixed(values->C2, 0, 12, 10) | 2454 __gen_sfixed(values->C3, 13, 25, 10); 2455 2456 dw[17] = 2457 __gen_sfixed(values->C4, 0, 12, 10) | 2458 __gen_sfixed(values->C5, 13, 25, 10); 2459 2460 dw[18] = 2461 __gen_sfixed(values->C6, 0, 12, 10) | 2462 __gen_sfixed(values->C7, 13, 25, 10); 2463 2464 dw[19] = 2465 __gen_sfixed(values->C8, 0, 12, 10); 2466 2467 dw[20] = 2468 __gen_sfixed(values->OffsetIn1, 0, 10, 8) | 2469 __gen_sfixed(values->OffsetOut1, 11, 21, 8); 2470 2471 dw[21] = 2472 __gen_sfixed(values->OffsetIn2, 0, 10, 8) | 2473 __gen_sfixed(values->OffsetOut2, 11, 21, 8); 2474 2475 dw[22] = 2476 __gen_sfixed(values->OffsetIn3, 0, 10, 8) | 2477 __gen_sfixed(values->OffsetOut3, 11, 21, 8); 2478} 2479 2480#define GEN11_SFC_LOCK_BODY_length 1 2481struct GEN11_SFC_LOCK_BODY { 2482 uint32_t VESFCPipeSelect; 2483 bool PreScaledOutputSurfaceOutputEnable; 2484}; 2485 2486static inline void 2487GEN11_SFC_LOCK_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2488 __attribute__((unused)) void * restrict dst, 2489 __attribute__((unused)) const struct GEN11_SFC_LOCK_BODY * restrict values) 2490{ 2491 uint32_t * restrict dw = (uint32_t * restrict) dst; 2492 2493 dw[0] = 2494 __gen_uint(values->VESFCPipeSelect, 0, 0) | 2495 __gen_uint(values->PreScaledOutputSurfaceOutputEnable, 1, 1); 2496} 2497 2498#define GEN11_SF_CLIP_VIEWPORT_length 16 2499struct GEN11_SF_CLIP_VIEWPORT { 2500 float ViewportMatrixElementm00; 2501 float ViewportMatrixElementm11; 2502 float ViewportMatrixElementm22; 2503 float ViewportMatrixElementm30; 2504 float ViewportMatrixElementm31; 2505 float ViewportMatrixElementm32; 2506 float XMinClipGuardband; 2507 float XMaxClipGuardband; 2508 float YMinClipGuardband; 2509 float YMaxClipGuardband; 2510 float XMinViewPort; 2511 float XMaxViewPort; 2512 float YMinViewPort; 2513 float YMaxViewPort; 2514}; 2515 2516static inline void 2517GEN11_SF_CLIP_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 2518 __attribute__((unused)) void * restrict dst, 2519 __attribute__((unused)) const struct GEN11_SF_CLIP_VIEWPORT * restrict values) 2520{ 2521 uint32_t * restrict dw = (uint32_t * restrict) dst; 2522 2523 dw[0] = 2524 __gen_float(values->ViewportMatrixElementm00); 2525 2526 dw[1] = 2527 __gen_float(values->ViewportMatrixElementm11); 2528 2529 dw[2] = 2530 __gen_float(values->ViewportMatrixElementm22); 2531 2532 dw[3] = 2533 __gen_float(values->ViewportMatrixElementm30); 2534 2535 dw[4] = 2536 __gen_float(values->ViewportMatrixElementm31); 2537 2538 dw[5] = 2539 __gen_float(values->ViewportMatrixElementm32); 2540 2541 dw[6] = 0; 2542 2543 dw[7] = 0; 2544 2545 dw[8] = 2546 __gen_float(values->XMinClipGuardband); 2547 2548 dw[9] = 2549 __gen_float(values->XMaxClipGuardband); 2550 2551 dw[10] = 2552 __gen_float(values->YMinClipGuardband); 2553 2554 dw[11] = 2555 __gen_float(values->YMaxClipGuardband); 2556 2557 dw[12] = 2558 __gen_float(values->XMinViewPort); 2559 2560 dw[13] = 2561 __gen_float(values->XMaxViewPort); 2562 2563 dw[14] = 2564 __gen_float(values->YMinViewPort); 2565 2566 dw[15] = 2567 __gen_float(values->YMaxViewPort); 2568} 2569 2570#define GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1 2571struct GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL { 2572 uint32_t SourceAttribute; 2573 uint32_t SwizzleSelect; 2574#define INPUTATTR 0 2575#define INPUTATTR_FACING 1 2576#define INPUTATTR_W 2 2577#define INPUTATTR_FACING_W 3 2578 uint32_t ConstantSource; 2579#define CONST_0000 0 2580#define CONST_0001_FLOAT 1 2581#define CONST_1111_FLOAT 2 2582#define PRIM_ID 3 2583 uint32_t SwizzleControlMode; 2584 bool ComponentOverrideX; 2585 bool ComponentOverrideY; 2586 bool ComponentOverrideZ; 2587 bool ComponentOverrideW; 2588}; 2589 2590static inline void 2591GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__attribute__((unused)) __gen_user_data *data, 2592 __attribute__((unused)) void * restrict dst, 2593 __attribute__((unused)) const struct GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values) 2594{ 2595 uint32_t * restrict dw = (uint32_t * restrict) dst; 2596 2597 dw[0] = 2598 __gen_uint(values->SourceAttribute, 0, 4) | 2599 __gen_uint(values->SwizzleSelect, 6, 7) | 2600 __gen_uint(values->ConstantSource, 9, 10) | 2601 __gen_uint(values->SwizzleControlMode, 11, 11) | 2602 __gen_uint(values->ComponentOverrideX, 12, 12) | 2603 __gen_uint(values->ComponentOverrideY, 13, 13) | 2604 __gen_uint(values->ComponentOverrideZ, 14, 14) | 2605 __gen_uint(values->ComponentOverrideW, 15, 15); 2606} 2607 2608#define GEN11_SO_DECL_length 1 2609struct GEN11_SO_DECL { 2610 uint32_t ComponentMask; 2611 uint32_t RegisterIndex; 2612 uint32_t HoleFlag; 2613 uint32_t OutputBufferSlot; 2614}; 2615 2616static inline void 2617GEN11_SO_DECL_pack(__attribute__((unused)) __gen_user_data *data, 2618 __attribute__((unused)) void * restrict dst, 2619 __attribute__((unused)) const struct GEN11_SO_DECL * restrict values) 2620{ 2621 uint32_t * restrict dw = (uint32_t * restrict) dst; 2622 2623 dw[0] = 2624 __gen_uint(values->ComponentMask, 0, 3) | 2625 __gen_uint(values->RegisterIndex, 4, 9) | 2626 __gen_uint(values->HoleFlag, 11, 11) | 2627 __gen_uint(values->OutputBufferSlot, 12, 13); 2628} 2629 2630#define GEN11_SO_DECL_ENTRY_length 2 2631struct GEN11_SO_DECL_ENTRY { 2632 struct GEN11_SO_DECL Stream0Decl; 2633 struct GEN11_SO_DECL Stream1Decl; 2634 struct GEN11_SO_DECL Stream2Decl; 2635 struct GEN11_SO_DECL Stream3Decl; 2636}; 2637 2638static inline void 2639GEN11_SO_DECL_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 2640 __attribute__((unused)) void * restrict dst, 2641 __attribute__((unused)) const struct GEN11_SO_DECL_ENTRY * restrict values) 2642{ 2643 uint32_t * restrict dw = (uint32_t * restrict) dst; 2644 2645 uint32_t v0_0; 2646 GEN11_SO_DECL_pack(data, &v0_0, &values->Stream0Decl); 2647 2648 uint32_t v0_1; 2649 GEN11_SO_DECL_pack(data, &v0_1, &values->Stream1Decl); 2650 2651 dw[0] = 2652 __gen_uint(v0_0, 0, 15) | 2653 __gen_uint(v0_1, 16, 31); 2654 2655 uint32_t v1_0; 2656 GEN11_SO_DECL_pack(data, &v1_0, &values->Stream2Decl); 2657 2658 uint32_t v1_1; 2659 GEN11_SO_DECL_pack(data, &v1_1, &values->Stream3Decl); 2660 2661 dw[1] = 2662 __gen_uint(v1_0, 0, 15) | 2663 __gen_uint(v1_1, 16, 31); 2664} 2665 2666#define GEN11_VDENC_SURFACE_CONTROL_BITS_length 1 2667struct GEN11_VDENC_SURFACE_CONTROL_BITS { 2668 uint32_t MOCS; 2669 uint32_t ArbitrationPriorityControl; 2670#define Highestpriority 0 2671#define Secondhighestpriority 1 2672#define Thirdhighestpriority 2 2673#define Lowestpriority 3 2674 bool MemoryCompressionEnable; 2675 uint32_t MemoryCompressionMode; 2676 uint32_t CacheSelect; 2677 uint32_t TiledResourceMode; 2678#define TRMODE_NONE 0 2679#define TRMODE_TILEYF 1 2680#define TRMODE_TILEYS 2 2681}; 2682 2683static inline void 2684GEN11_VDENC_SURFACE_CONTROL_BITS_pack(__attribute__((unused)) __gen_user_data *data, 2685 __attribute__((unused)) void * restrict dst, 2686 __attribute__((unused)) const struct GEN11_VDENC_SURFACE_CONTROL_BITS * restrict values) 2687{ 2688 uint32_t * restrict dw = (uint32_t * restrict) dst; 2689 2690 dw[0] = 2691 __gen_uint(values->MOCS, 1, 6) | 2692 __gen_uint(values->ArbitrationPriorityControl, 7, 8) | 2693 __gen_uint(values->MemoryCompressionEnable, 9, 9) | 2694 __gen_uint(values->MemoryCompressionMode, 10, 10) | 2695 __gen_uint(values->CacheSelect, 12, 12) | 2696 __gen_uint(values->TiledResourceMode, 13, 14); 2697} 2698 2699#define GEN11_VDENC_PICTURE_length 3 2700struct GEN11_VDENC_PICTURE { 2701 __gen_address_type Address; 2702 struct GEN11_VDENC_SURFACE_CONTROL_BITS PictureFields; 2703}; 2704 2705static inline void 2706GEN11_VDENC_PICTURE_pack(__attribute__((unused)) __gen_user_data *data, 2707 __attribute__((unused)) void * restrict dst, 2708 __attribute__((unused)) const struct GEN11_VDENC_PICTURE * restrict values) 2709{ 2710 uint32_t * restrict dw = (uint32_t * restrict) dst; 2711 2712 const uint64_t v0_address = 2713 __gen_combine_address(data, &dw[0], values->Address, 0); 2714 dw[0] = v0_address; 2715 dw[1] = v0_address >> 32; 2716 2717 GEN11_VDENC_SURFACE_CONTROL_BITS_pack(data, &dw[2], &values->PictureFields); 2718} 2719 2720#define GEN11_VDENC_SURFACE_STATE_FIELDS_length 4 2721struct GEN11_VDENC_SURFACE_STATE_FIELDS { 2722 float CrVCbUPixelOffsetVDirection; 2723 bool SurfaceFormatByteSwizzle; 2724 uint32_t Colorspaceselection; 2725 uint32_t Width; 2726 uint32_t Height; 2727 uint32_t TileWalk; 2728#define TW_XMAJOR 0 2729#define TW_YMAJOR 1 2730 uint32_t TiledSurface; 2731 bool HalfPitchforChroma; 2732 uint32_t SurfacePitch; 2733 uint32_t ChromaDownsampleFilterControl; 2734 uint32_t Format; 2735 uint32_t SurfaceFormat; 2736#define VDENC_YUV422 0 2737#define VDENC_RGBA4444 1 2738#define VDENC_YUV444 2 2739#define VDENC_Y8_UNORM 3 2740#define VDENC_PLANAR_420_8 4 2741 uint32_t YOffsetforUCb; 2742 uint32_t XOffsetforUCb; 2743 uint32_t YOffsetforVCr; 2744 uint32_t XOffsetforVCr; 2745}; 2746 2747static inline void 2748GEN11_VDENC_SURFACE_STATE_FIELDS_pack(__attribute__((unused)) __gen_user_data *data, 2749 __attribute__((unused)) void * restrict dst, 2750 __attribute__((unused)) const struct GEN11_VDENC_SURFACE_STATE_FIELDS * restrict values) 2751{ 2752 uint32_t * restrict dw = (uint32_t * restrict) dst; 2753 2754 dw[0] = 2755 __gen_ufixed(values->CrVCbUPixelOffsetVDirection, 0, 1, 2) | 2756 __gen_uint(values->SurfaceFormatByteSwizzle, 2, 2) | 2757 __gen_uint(values->Colorspaceselection, 3, 3) | 2758 __gen_uint(values->Width, 4, 17) | 2759 __gen_uint(values->Height, 18, 31); 2760 2761 dw[1] = 2762 __gen_uint(values->TileWalk, 0, 0) | 2763 __gen_uint(values->TiledSurface, 1, 1) | 2764 __gen_uint(values->HalfPitchforChroma, 2, 2) | 2765 __gen_uint(values->SurfacePitch, 3, 19) | 2766 __gen_uint(values->ChromaDownsampleFilterControl, 20, 22) | 2767 __gen_uint(values->Format, 27, 31) | 2768 __gen_uint(values->SurfaceFormat, 28, 31); 2769 2770 dw[2] = 2771 __gen_uint(values->YOffsetforUCb, 0, 14) | 2772 __gen_uint(values->XOffsetforUCb, 16, 30); 2773 2774 dw[3] = 2775 __gen_uint(values->YOffsetforVCr, 0, 15) | 2776 __gen_uint(values->XOffsetforVCr, 16, 28); 2777} 2778 2779#define GEN11_VERTEX_BUFFER_STATE_length 4 2780struct GEN11_VERTEX_BUFFER_STATE { 2781 uint32_t BufferPitch; 2782 bool NullVertexBuffer; 2783 bool AddressModifyEnable; 2784 uint32_t MOCS; 2785 uint32_t VertexBufferIndex; 2786 __gen_address_type BufferStartingAddress; 2787 uint32_t BufferSize; 2788}; 2789 2790static inline void 2791GEN11_VERTEX_BUFFER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 2792 __attribute__((unused)) void * restrict dst, 2793 __attribute__((unused)) const struct GEN11_VERTEX_BUFFER_STATE * restrict values) 2794{ 2795 uint32_t * restrict dw = (uint32_t * restrict) dst; 2796 2797 dw[0] = 2798 __gen_uint(values->BufferPitch, 0, 11) | 2799 __gen_uint(values->NullVertexBuffer, 13, 13) | 2800 __gen_uint(values->AddressModifyEnable, 14, 14) | 2801 __gen_uint(values->MOCS, 16, 22) | 2802 __gen_uint(values->VertexBufferIndex, 26, 31); 2803 2804 const uint64_t v1_address = 2805 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, 0); 2806 dw[1] = v1_address; 2807 dw[2] = v1_address >> 32; 2808 2809 dw[3] = 2810 __gen_uint(values->BufferSize, 0, 31); 2811} 2812 2813#define GEN11_VERTEX_ELEMENT_STATE_length 2 2814struct GEN11_VERTEX_ELEMENT_STATE { 2815 uint32_t SourceElementOffset; 2816 bool EdgeFlagEnable; 2817 uint32_t SourceElementFormat; 2818 bool Valid; 2819 uint32_t VertexBufferIndex; 2820 enum GEN11_3D_Vertex_Component_Control Component3Control; 2821 enum GEN11_3D_Vertex_Component_Control Component2Control; 2822 enum GEN11_3D_Vertex_Component_Control Component1Control; 2823 enum GEN11_3D_Vertex_Component_Control Component0Control; 2824}; 2825 2826static inline void 2827GEN11_VERTEX_ELEMENT_STATE_pack(__attribute__((unused)) __gen_user_data *data, 2828 __attribute__((unused)) void * restrict dst, 2829 __attribute__((unused)) const struct GEN11_VERTEX_ELEMENT_STATE * restrict values) 2830{ 2831 uint32_t * restrict dw = (uint32_t * restrict) dst; 2832 2833 dw[0] = 2834 __gen_uint(values->SourceElementOffset, 0, 11) | 2835 __gen_uint(values->EdgeFlagEnable, 15, 15) | 2836 __gen_uint(values->SourceElementFormat, 16, 24) | 2837 __gen_uint(values->Valid, 25, 25) | 2838 __gen_uint(values->VertexBufferIndex, 26, 31); 2839 2840 dw[1] = 2841 __gen_uint(values->Component3Control, 16, 18) | 2842 __gen_uint(values->Component2Control, 20, 22) | 2843 __gen_uint(values->Component1Control, 24, 26) | 2844 __gen_uint(values->Component0Control, 28, 30); 2845} 2846 2847#define GEN11_3DPRIMITIVE_length 7 2848#define GEN11_3DPRIMITIVE_length_bias 2 2849#define GEN11_3DPRIMITIVE_header \ 2850 .DWordLength = 5, \ 2851 ._3DCommandSubOpcode = 0, \ 2852 ._3DCommandOpcode = 3, \ 2853 .CommandSubType = 3, \ 2854 .CommandType = 3 2855 2856struct GEN11_3DPRIMITIVE { 2857 uint32_t DWordLength; 2858 bool PredicateEnable; 2859 bool UAVCoherencyRequired; 2860 bool IndirectParameterEnable; 2861 uint32_t ExtendedParametersPresent; 2862 uint32_t _3DCommandSubOpcode; 2863 uint32_t _3DCommandOpcode; 2864 uint32_t CommandSubType; 2865 uint32_t CommandType; 2866 enum GEN11_3D_Prim_Topo_Type PrimitiveTopologyType; 2867 uint32_t VertexAccessType; 2868#define SEQUENTIAL 0 2869#define RANDOM 1 2870 bool EndOffsetEnable; 2871 uint32_t VertexCountPerInstance; 2872 uint32_t StartVertexLocation; 2873 uint32_t InstanceCount; 2874 uint32_t StartInstanceLocation; 2875 int32_t BaseVertexLocation; 2876 uint32_t ExtendedParameter0; 2877 uint32_t ExtendedParameter1; 2878 uint32_t ExtendedParameter2; 2879}; 2880 2881static inline void 2882GEN11_3DPRIMITIVE_pack(__attribute__((unused)) __gen_user_data *data, 2883 __attribute__((unused)) void * restrict dst, 2884 __attribute__((unused)) const struct GEN11_3DPRIMITIVE * restrict values) 2885{ 2886 uint32_t * restrict dw = (uint32_t * restrict) dst; 2887 2888 dw[0] = 2889 __gen_uint(values->DWordLength, 0, 7) | 2890 __gen_uint(values->PredicateEnable, 8, 8) | 2891 __gen_uint(values->UAVCoherencyRequired, 9, 9) | 2892 __gen_uint(values->IndirectParameterEnable, 10, 10) | 2893 __gen_uint(values->ExtendedParametersPresent, 11, 11) | 2894 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2895 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2896 __gen_uint(values->CommandSubType, 27, 28) | 2897 __gen_uint(values->CommandType, 29, 31); 2898 2899 dw[1] = 2900 __gen_uint(values->PrimitiveTopologyType, 0, 5) | 2901 __gen_uint(values->VertexAccessType, 8, 8) | 2902 __gen_uint(values->EndOffsetEnable, 9, 9); 2903 2904 dw[2] = 2905 __gen_uint(values->VertexCountPerInstance, 0, 31); 2906 2907 dw[3] = 2908 __gen_uint(values->StartVertexLocation, 0, 31); 2909 2910 dw[4] = 2911 __gen_uint(values->InstanceCount, 0, 31); 2912 2913 dw[5] = 2914 __gen_uint(values->StartInstanceLocation, 0, 31); 2915 2916 dw[6] = 2917 __gen_sint(values->BaseVertexLocation, 0, 31); 2918} 2919 2920#define GEN11_3DSTATE_3D_MODE_length 2 2921#define GEN11_3DSTATE_3D_MODE_length_bias 2 2922#define GEN11_3DSTATE_3D_MODE_header \ 2923 .DWordLength = 0, \ 2924 ._3DCommandSubOpcode = 30, \ 2925 ._3DCommandOpcode = 1, \ 2926 .CommandSubType = 3, \ 2927 .CommandType = 3 2928 2929struct GEN11_3DSTATE_3D_MODE { 2930 uint32_t DWordLength; 2931 uint32_t _3DCommandSubOpcode; 2932 uint32_t _3DCommandOpcode; 2933 uint32_t CommandSubType; 2934 uint32_t CommandType; 2935 uint32_t MaskBits; 2936}; 2937 2938static inline void 2939GEN11_3DSTATE_3D_MODE_pack(__attribute__((unused)) __gen_user_data *data, 2940 __attribute__((unused)) void * restrict dst, 2941 __attribute__((unused)) const struct GEN11_3DSTATE_3D_MODE * restrict values) 2942{ 2943 uint32_t * restrict dw = (uint32_t * restrict) dst; 2944 2945 dw[0] = 2946 __gen_uint(values->DWordLength, 0, 7) | 2947 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2948 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2949 __gen_uint(values->CommandSubType, 27, 28) | 2950 __gen_uint(values->CommandType, 29, 31); 2951 2952 dw[1] = 2953 __gen_uint(values->MaskBits, 16, 31); 2954} 2955 2956#define GEN11_3DSTATE_AA_LINE_PARAMETERS_length 3 2957#define GEN11_3DSTATE_AA_LINE_PARAMETERS_length_bias 2 2958#define GEN11_3DSTATE_AA_LINE_PARAMETERS_header \ 2959 .DWordLength = 1, \ 2960 ._3DCommandSubOpcode = 10, \ 2961 ._3DCommandOpcode = 1, \ 2962 .CommandSubType = 3, \ 2963 .CommandType = 3 2964 2965struct GEN11_3DSTATE_AA_LINE_PARAMETERS { 2966 uint32_t DWordLength; 2967 uint32_t _3DCommandSubOpcode; 2968 uint32_t _3DCommandOpcode; 2969 uint32_t CommandSubType; 2970 uint32_t CommandType; 2971 float AACoverageSlope; 2972 float AAPointCoverageSlope; 2973 float AACoverageBias; 2974 float AAPointCoverageBias; 2975 float AACoverageEndCapSlope; 2976 float AAPointCoverageEndCapSlope; 2977 float AACoverageEndCapBias; 2978 float AAPointCoverageEndCapBias; 2979}; 2980 2981static inline void 2982GEN11_3DSTATE_AA_LINE_PARAMETERS_pack(__attribute__((unused)) __gen_user_data *data, 2983 __attribute__((unused)) void * restrict dst, 2984 __attribute__((unused)) const struct GEN11_3DSTATE_AA_LINE_PARAMETERS * restrict values) 2985{ 2986 uint32_t * restrict dw = (uint32_t * restrict) dst; 2987 2988 dw[0] = 2989 __gen_uint(values->DWordLength, 0, 7) | 2990 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2991 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2992 __gen_uint(values->CommandSubType, 27, 28) | 2993 __gen_uint(values->CommandType, 29, 31); 2994 2995 dw[1] = 2996 __gen_ufixed(values->AACoverageSlope, 0, 7, 8) | 2997 __gen_ufixed(values->AAPointCoverageSlope, 8, 15, 8) | 2998 __gen_ufixed(values->AACoverageBias, 16, 23, 8) | 2999 __gen_ufixed(values->AAPointCoverageBias, 24, 31, 8); 3000 3001 dw[2] = 3002 __gen_ufixed(values->AACoverageEndCapSlope, 0, 7, 8) | 3003 __gen_ufixed(values->AAPointCoverageEndCapSlope, 8, 15, 8) | 3004 __gen_ufixed(values->AACoverageEndCapBias, 16, 23, 8) | 3005 __gen_ufixed(values->AAPointCoverageEndCapBias, 24, 31, 8); 3006} 3007 3008#define GEN11_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 2 3009#define GEN11_3DSTATE_BINDING_TABLE_EDIT_DS_header\ 3010 .DWordLength = 0, \ 3011 ._3DCommandSubOpcode = 70, \ 3012 ._3DCommandOpcode = 0, \ 3013 .CommandSubType = 3, \ 3014 .CommandType = 3 3015 3016struct GEN11_3DSTATE_BINDING_TABLE_EDIT_DS { 3017 uint32_t DWordLength; 3018 uint32_t _3DCommandSubOpcode; 3019 uint32_t _3DCommandOpcode; 3020 uint32_t CommandSubType; 3021 uint32_t CommandType; 3022 uint32_t BindingTableEditTarget; 3023#define AllCores 3 3024#define Core1 2 3025#define Core0 1 3026 uint32_t BindingTableBlockClear; 3027 /* variable length fields follow */ 3028}; 3029 3030static inline void 3031GEN11_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__attribute__((unused)) __gen_user_data *data, 3032 __attribute__((unused)) void * restrict dst, 3033 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values) 3034{ 3035 uint32_t * restrict dw = (uint32_t * restrict) dst; 3036 3037 dw[0] = 3038 __gen_uint(values->DWordLength, 0, 8) | 3039 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3040 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3041 __gen_uint(values->CommandSubType, 27, 28) | 3042 __gen_uint(values->CommandType, 29, 31); 3043 3044 dw[1] = 3045 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3046 __gen_uint(values->BindingTableBlockClear, 16, 31); 3047} 3048 3049#define GEN11_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 2 3050#define GEN11_3DSTATE_BINDING_TABLE_EDIT_GS_header\ 3051 .DWordLength = 0, \ 3052 ._3DCommandSubOpcode = 68, \ 3053 ._3DCommandOpcode = 0, \ 3054 .CommandSubType = 3, \ 3055 .CommandType = 3 3056 3057struct GEN11_3DSTATE_BINDING_TABLE_EDIT_GS { 3058 uint32_t DWordLength; 3059 uint32_t _3DCommandSubOpcode; 3060 uint32_t _3DCommandOpcode; 3061 uint32_t CommandSubType; 3062 uint32_t CommandType; 3063 uint32_t BindingTableEditTarget; 3064#define AllCores 3 3065#define Core1 2 3066#define Core0 1 3067 uint32_t BindingTableBlockClear; 3068 /* variable length fields follow */ 3069}; 3070 3071static inline void 3072GEN11_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__attribute__((unused)) __gen_user_data *data, 3073 __attribute__((unused)) void * restrict dst, 3074 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values) 3075{ 3076 uint32_t * restrict dw = (uint32_t * restrict) dst; 3077 3078 dw[0] = 3079 __gen_uint(values->DWordLength, 0, 8) | 3080 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3081 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3082 __gen_uint(values->CommandSubType, 27, 28) | 3083 __gen_uint(values->CommandType, 29, 31); 3084 3085 dw[1] = 3086 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3087 __gen_uint(values->BindingTableBlockClear, 16, 31); 3088} 3089 3090#define GEN11_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 2 3091#define GEN11_3DSTATE_BINDING_TABLE_EDIT_HS_header\ 3092 .DWordLength = 0, \ 3093 ._3DCommandSubOpcode = 69, \ 3094 ._3DCommandOpcode = 0, \ 3095 .CommandSubType = 3, \ 3096 .CommandType = 3 3097 3098struct GEN11_3DSTATE_BINDING_TABLE_EDIT_HS { 3099 uint32_t DWordLength; 3100 uint32_t _3DCommandSubOpcode; 3101 uint32_t _3DCommandOpcode; 3102 uint32_t CommandSubType; 3103 uint32_t CommandType; 3104 uint32_t BindingTableEditTarget; 3105#define AllCores 3 3106#define Core1 2 3107#define Core0 1 3108 uint32_t BindingTableBlockClear; 3109 /* variable length fields follow */ 3110}; 3111 3112static inline void 3113GEN11_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__attribute__((unused)) __gen_user_data *data, 3114 __attribute__((unused)) void * restrict dst, 3115 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values) 3116{ 3117 uint32_t * restrict dw = (uint32_t * restrict) dst; 3118 3119 dw[0] = 3120 __gen_uint(values->DWordLength, 0, 8) | 3121 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3122 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3123 __gen_uint(values->CommandSubType, 27, 28) | 3124 __gen_uint(values->CommandType, 29, 31); 3125 3126 dw[1] = 3127 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3128 __gen_uint(values->BindingTableBlockClear, 16, 31); 3129} 3130 3131#define GEN11_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 2 3132#define GEN11_3DSTATE_BINDING_TABLE_EDIT_PS_header\ 3133 .DWordLength = 0, \ 3134 ._3DCommandSubOpcode = 71, \ 3135 ._3DCommandOpcode = 0, \ 3136 .CommandSubType = 3, \ 3137 .CommandType = 3 3138 3139struct GEN11_3DSTATE_BINDING_TABLE_EDIT_PS { 3140 uint32_t DWordLength; 3141 uint32_t _3DCommandSubOpcode; 3142 uint32_t _3DCommandOpcode; 3143 uint32_t CommandSubType; 3144 uint32_t CommandType; 3145 uint32_t BindingTableEditTarget; 3146#define AllCores 3 3147#define Core1 2 3148#define Core0 1 3149 uint32_t BindingTableBlockClear; 3150 /* variable length fields follow */ 3151}; 3152 3153static inline void 3154GEN11_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__attribute__((unused)) __gen_user_data *data, 3155 __attribute__((unused)) void * restrict dst, 3156 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values) 3157{ 3158 uint32_t * restrict dw = (uint32_t * restrict) dst; 3159 3160 dw[0] = 3161 __gen_uint(values->DWordLength, 0, 8) | 3162 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3163 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3164 __gen_uint(values->CommandSubType, 27, 28) | 3165 __gen_uint(values->CommandType, 29, 31); 3166 3167 dw[1] = 3168 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3169 __gen_uint(values->BindingTableBlockClear, 16, 31); 3170} 3171 3172#define GEN11_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 2 3173#define GEN11_3DSTATE_BINDING_TABLE_EDIT_VS_header\ 3174 .DWordLength = 0, \ 3175 ._3DCommandSubOpcode = 67, \ 3176 ._3DCommandOpcode = 0, \ 3177 .CommandSubType = 3, \ 3178 .CommandType = 3 3179 3180struct GEN11_3DSTATE_BINDING_TABLE_EDIT_VS { 3181 uint32_t DWordLength; 3182 uint32_t _3DCommandSubOpcode; 3183 uint32_t _3DCommandOpcode; 3184 uint32_t CommandSubType; 3185 uint32_t CommandType; 3186 uint32_t BindingTableEditTarget; 3187#define AllCores 3 3188#define Core1 2 3189#define Core0 1 3190 uint32_t BindingTableBlockClear; 3191 /* variable length fields follow */ 3192}; 3193 3194static inline void 3195GEN11_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__attribute__((unused)) __gen_user_data *data, 3196 __attribute__((unused)) void * restrict dst, 3197 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values) 3198{ 3199 uint32_t * restrict dw = (uint32_t * restrict) dst; 3200 3201 dw[0] = 3202 __gen_uint(values->DWordLength, 0, 8) | 3203 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3204 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3205 __gen_uint(values->CommandSubType, 27, 28) | 3206 __gen_uint(values->CommandType, 29, 31); 3207 3208 dw[1] = 3209 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3210 __gen_uint(values->BindingTableBlockClear, 16, 31); 3211} 3212 3213#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2 3214#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 2 3215#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_DS_header\ 3216 .DWordLength = 0, \ 3217 ._3DCommandSubOpcode = 40, \ 3218 ._3DCommandOpcode = 0, \ 3219 .CommandSubType = 3, \ 3220 .CommandType = 3 3221 3222struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_DS { 3223 uint32_t DWordLength; 3224 uint32_t _3DCommandSubOpcode; 3225 uint32_t _3DCommandOpcode; 3226 uint32_t CommandSubType; 3227 uint32_t CommandType; 3228 uint64_t PointertoDSBindingTable; 3229}; 3230 3231static inline void 3232GEN11_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 3233 __attribute__((unused)) void * restrict dst, 3234 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values) 3235{ 3236 uint32_t * restrict dw = (uint32_t * restrict) dst; 3237 3238 dw[0] = 3239 __gen_uint(values->DWordLength, 0, 7) | 3240 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3241 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3242 __gen_uint(values->CommandSubType, 27, 28) | 3243 __gen_uint(values->CommandType, 29, 31); 3244 3245 dw[1] = 3246 __gen_offset(values->PointertoDSBindingTable, 5, 15); 3247} 3248 3249#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2 3250#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 2 3251#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_GS_header\ 3252 .DWordLength = 0, \ 3253 ._3DCommandSubOpcode = 41, \ 3254 ._3DCommandOpcode = 0, \ 3255 .CommandSubType = 3, \ 3256 .CommandType = 3 3257 3258struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_GS { 3259 uint32_t DWordLength; 3260 uint32_t _3DCommandSubOpcode; 3261 uint32_t _3DCommandOpcode; 3262 uint32_t CommandSubType; 3263 uint32_t CommandType; 3264 uint64_t PointertoGSBindingTable; 3265}; 3266 3267static inline void 3268GEN11_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 3269 __attribute__((unused)) void * restrict dst, 3270 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values) 3271{ 3272 uint32_t * restrict dw = (uint32_t * restrict) dst; 3273 3274 dw[0] = 3275 __gen_uint(values->DWordLength, 0, 7) | 3276 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3277 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3278 __gen_uint(values->CommandSubType, 27, 28) | 3279 __gen_uint(values->CommandType, 29, 31); 3280 3281 dw[1] = 3282 __gen_offset(values->PointertoGSBindingTable, 5, 15); 3283} 3284 3285#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2 3286#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 2 3287#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_HS_header\ 3288 .DWordLength = 0, \ 3289 ._3DCommandSubOpcode = 39, \ 3290 ._3DCommandOpcode = 0, \ 3291 .CommandSubType = 3, \ 3292 .CommandType = 3 3293 3294struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_HS { 3295 uint32_t DWordLength; 3296 uint32_t _3DCommandSubOpcode; 3297 uint32_t _3DCommandOpcode; 3298 uint32_t CommandSubType; 3299 uint32_t CommandType; 3300 uint64_t PointertoHSBindingTable; 3301}; 3302 3303static inline void 3304GEN11_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 3305 __attribute__((unused)) void * restrict dst, 3306 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values) 3307{ 3308 uint32_t * restrict dw = (uint32_t * restrict) dst; 3309 3310 dw[0] = 3311 __gen_uint(values->DWordLength, 0, 7) | 3312 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3313 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3314 __gen_uint(values->CommandSubType, 27, 28) | 3315 __gen_uint(values->CommandType, 29, 31); 3316 3317 dw[1] = 3318 __gen_offset(values->PointertoHSBindingTable, 5, 15); 3319} 3320 3321#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2 3322#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 2 3323#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_PS_header\ 3324 .DWordLength = 0, \ 3325 ._3DCommandSubOpcode = 42, \ 3326 ._3DCommandOpcode = 0, \ 3327 .CommandSubType = 3, \ 3328 .CommandType = 3 3329 3330struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_PS { 3331 uint32_t DWordLength; 3332 uint32_t _3DCommandSubOpcode; 3333 uint32_t _3DCommandOpcode; 3334 uint32_t CommandSubType; 3335 uint32_t CommandType; 3336 uint64_t PointertoPSBindingTable; 3337}; 3338 3339static inline void 3340GEN11_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 3341 __attribute__((unused)) void * restrict dst, 3342 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values) 3343{ 3344 uint32_t * restrict dw = (uint32_t * restrict) dst; 3345 3346 dw[0] = 3347 __gen_uint(values->DWordLength, 0, 7) | 3348 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3349 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3350 __gen_uint(values->CommandSubType, 27, 28) | 3351 __gen_uint(values->CommandType, 29, 31); 3352 3353 dw[1] = 3354 __gen_offset(values->PointertoPSBindingTable, 5, 15); 3355} 3356 3357#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2 3358#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 2 3359#define GEN11_3DSTATE_BINDING_TABLE_POINTERS_VS_header\ 3360 .DWordLength = 0, \ 3361 ._3DCommandSubOpcode = 38, \ 3362 ._3DCommandOpcode = 0, \ 3363 .CommandSubType = 3, \ 3364 .CommandType = 3 3365 3366struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_VS { 3367 uint32_t DWordLength; 3368 uint32_t _3DCommandSubOpcode; 3369 uint32_t _3DCommandOpcode; 3370 uint32_t CommandSubType; 3371 uint32_t CommandType; 3372 uint64_t PointertoVSBindingTable; 3373}; 3374 3375static inline void 3376GEN11_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 3377 __attribute__((unused)) void * restrict dst, 3378 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values) 3379{ 3380 uint32_t * restrict dw = (uint32_t * restrict) dst; 3381 3382 dw[0] = 3383 __gen_uint(values->DWordLength, 0, 7) | 3384 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3385 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3386 __gen_uint(values->CommandSubType, 27, 28) | 3387 __gen_uint(values->CommandType, 29, 31); 3388 3389 dw[1] = 3390 __gen_offset(values->PointertoVSBindingTable, 5, 15); 3391} 3392 3393#define GEN11_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 4 3394#define GEN11_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 2 3395#define GEN11_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\ 3396 .DWordLength = 2, \ 3397 ._3DCommandSubOpcode = 25, \ 3398 ._3DCommandOpcode = 1, \ 3399 .CommandSubType = 3, \ 3400 .CommandType = 3 3401 3402struct GEN11_3DSTATE_BINDING_TABLE_POOL_ALLOC { 3403 uint32_t DWordLength; 3404 uint32_t _3DCommandSubOpcode; 3405 uint32_t _3DCommandOpcode; 3406 uint32_t CommandSubType; 3407 uint32_t CommandType; 3408 uint32_t MOCS; 3409 uint32_t BindingTablePoolEnable; 3410 __gen_address_type BindingTablePoolBaseAddress; 3411 uint32_t BindingTablePoolBufferSize; 3412#define NoValidData 0 3413}; 3414 3415static inline void 3416GEN11_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 3417 __attribute__((unused)) void * restrict dst, 3418 __attribute__((unused)) const struct GEN11_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values) 3419{ 3420 uint32_t * restrict dw = (uint32_t * restrict) dst; 3421 3422 dw[0] = 3423 __gen_uint(values->DWordLength, 0, 7) | 3424 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3425 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3426 __gen_uint(values->CommandSubType, 27, 28) | 3427 __gen_uint(values->CommandType, 29, 31); 3428 3429 const uint64_t v1 = 3430 __gen_uint(values->MOCS, 0, 6) | 3431 __gen_uint(values->BindingTablePoolEnable, 11, 11); 3432 const uint64_t v1_address = 3433 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, v1); 3434 dw[1] = v1_address; 3435 dw[2] = (v1_address >> 32) | (v1 >> 32); 3436 3437 dw[3] = 3438 __gen_uint(values->BindingTablePoolBufferSize, 12, 31); 3439} 3440 3441#define GEN11_3DSTATE_BLEND_STATE_POINTERS_length 2 3442#define GEN11_3DSTATE_BLEND_STATE_POINTERS_length_bias 2 3443#define GEN11_3DSTATE_BLEND_STATE_POINTERS_header\ 3444 .DWordLength = 0, \ 3445 ._3DCommandSubOpcode = 36, \ 3446 ._3DCommandOpcode = 0, \ 3447 .CommandSubType = 3, \ 3448 .CommandType = 3 3449 3450struct GEN11_3DSTATE_BLEND_STATE_POINTERS { 3451 uint32_t DWordLength; 3452 uint32_t _3DCommandSubOpcode; 3453 uint32_t _3DCommandOpcode; 3454 uint32_t CommandSubType; 3455 uint32_t CommandType; 3456 bool BlendStatePointerValid; 3457 uint64_t BlendStatePointer; 3458}; 3459 3460static inline void 3461GEN11_3DSTATE_BLEND_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 3462 __attribute__((unused)) void * restrict dst, 3463 __attribute__((unused)) const struct GEN11_3DSTATE_BLEND_STATE_POINTERS * restrict values) 3464{ 3465 uint32_t * restrict dw = (uint32_t * restrict) dst; 3466 3467 dw[0] = 3468 __gen_uint(values->DWordLength, 0, 7) | 3469 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3470 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3471 __gen_uint(values->CommandSubType, 27, 28) | 3472 __gen_uint(values->CommandType, 29, 31); 3473 3474 dw[1] = 3475 __gen_uint(values->BlendStatePointerValid, 0, 0) | 3476 __gen_offset(values->BlendStatePointer, 6, 31); 3477} 3478 3479#define GEN11_3DSTATE_CC_STATE_POINTERS_length 2 3480#define GEN11_3DSTATE_CC_STATE_POINTERS_length_bias 2 3481#define GEN11_3DSTATE_CC_STATE_POINTERS_header \ 3482 .DWordLength = 0, \ 3483 ._3DCommandSubOpcode = 14, \ 3484 ._3DCommandOpcode = 0, \ 3485 .CommandSubType = 3, \ 3486 .CommandType = 3 3487 3488struct GEN11_3DSTATE_CC_STATE_POINTERS { 3489 uint32_t DWordLength; 3490 uint32_t _3DCommandSubOpcode; 3491 uint32_t _3DCommandOpcode; 3492 uint32_t CommandSubType; 3493 uint32_t CommandType; 3494 bool ColorCalcStatePointerValid; 3495 uint64_t ColorCalcStatePointer; 3496}; 3497 3498static inline void 3499GEN11_3DSTATE_CC_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 3500 __attribute__((unused)) void * restrict dst, 3501 __attribute__((unused)) const struct GEN11_3DSTATE_CC_STATE_POINTERS * restrict values) 3502{ 3503 uint32_t * restrict dw = (uint32_t * restrict) dst; 3504 3505 dw[0] = 3506 __gen_uint(values->DWordLength, 0, 7) | 3507 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3508 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3509 __gen_uint(values->CommandSubType, 27, 28) | 3510 __gen_uint(values->CommandType, 29, 31); 3511 3512 dw[1] = 3513 __gen_uint(values->ColorCalcStatePointerValid, 0, 0) | 3514 __gen_offset(values->ColorCalcStatePointer, 6, 31); 3515} 3516 3517#define GEN11_3DSTATE_CHROMA_KEY_length 4 3518#define GEN11_3DSTATE_CHROMA_KEY_length_bias 2 3519#define GEN11_3DSTATE_CHROMA_KEY_header \ 3520 .DWordLength = 2, \ 3521 ._3DCommandSubOpcode = 4, \ 3522 ._3DCommandOpcode = 1, \ 3523 .CommandSubType = 3, \ 3524 .CommandType = 3 3525 3526struct GEN11_3DSTATE_CHROMA_KEY { 3527 uint32_t DWordLength; 3528 uint32_t _3DCommandSubOpcode; 3529 uint32_t _3DCommandOpcode; 3530 uint32_t CommandSubType; 3531 uint32_t CommandType; 3532 uint32_t ChromaKeyTableIndex; 3533 uint32_t ChromaKeyLowValue; 3534 uint32_t ChromaKeyHighValue; 3535}; 3536 3537static inline void 3538GEN11_3DSTATE_CHROMA_KEY_pack(__attribute__((unused)) __gen_user_data *data, 3539 __attribute__((unused)) void * restrict dst, 3540 __attribute__((unused)) const struct GEN11_3DSTATE_CHROMA_KEY * restrict values) 3541{ 3542 uint32_t * restrict dw = (uint32_t * restrict) dst; 3543 3544 dw[0] = 3545 __gen_uint(values->DWordLength, 0, 7) | 3546 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3547 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3548 __gen_uint(values->CommandSubType, 27, 28) | 3549 __gen_uint(values->CommandType, 29, 31); 3550 3551 dw[1] = 3552 __gen_uint(values->ChromaKeyTableIndex, 30, 31); 3553 3554 dw[2] = 3555 __gen_uint(values->ChromaKeyLowValue, 0, 31); 3556 3557 dw[3] = 3558 __gen_uint(values->ChromaKeyHighValue, 0, 31); 3559} 3560 3561#define GEN11_3DSTATE_CLEAR_PARAMS_length 3 3562#define GEN11_3DSTATE_CLEAR_PARAMS_length_bias 2 3563#define GEN11_3DSTATE_CLEAR_PARAMS_header \ 3564 .DWordLength = 1, \ 3565 ._3DCommandSubOpcode = 4, \ 3566 ._3DCommandOpcode = 0, \ 3567 .CommandSubType = 3, \ 3568 .CommandType = 3 3569 3570struct GEN11_3DSTATE_CLEAR_PARAMS { 3571 uint32_t DWordLength; 3572 uint32_t _3DCommandSubOpcode; 3573 uint32_t _3DCommandOpcode; 3574 uint32_t CommandSubType; 3575 uint32_t CommandType; 3576 float DepthClearValue; 3577 bool DepthClearValueValid; 3578}; 3579 3580static inline void 3581GEN11_3DSTATE_CLEAR_PARAMS_pack(__attribute__((unused)) __gen_user_data *data, 3582 __attribute__((unused)) void * restrict dst, 3583 __attribute__((unused)) const struct GEN11_3DSTATE_CLEAR_PARAMS * restrict values) 3584{ 3585 uint32_t * restrict dw = (uint32_t * restrict) dst; 3586 3587 dw[0] = 3588 __gen_uint(values->DWordLength, 0, 7) | 3589 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3590 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3591 __gen_uint(values->CommandSubType, 27, 28) | 3592 __gen_uint(values->CommandType, 29, 31); 3593 3594 dw[1] = 3595 __gen_float(values->DepthClearValue); 3596 3597 dw[2] = 3598 __gen_uint(values->DepthClearValueValid, 0, 0); 3599} 3600 3601#define GEN11_3DSTATE_CLIP_length 4 3602#define GEN11_3DSTATE_CLIP_length_bias 2 3603#define GEN11_3DSTATE_CLIP_header \ 3604 .DWordLength = 2, \ 3605 ._3DCommandSubOpcode = 18, \ 3606 ._3DCommandOpcode = 0, \ 3607 .CommandSubType = 3, \ 3608 .CommandType = 3 3609 3610struct GEN11_3DSTATE_CLIP { 3611 uint32_t DWordLength; 3612 uint32_t _3DCommandSubOpcode; 3613 uint32_t _3DCommandOpcode; 3614 uint32_t CommandSubType; 3615 uint32_t CommandType; 3616 uint32_t UserClipDistanceCullTestEnableBitmask; 3617 bool StatisticsEnable; 3618 bool ForceClipMode; 3619 bool ForceUserClipDistanceClipTestEnableBitmask; 3620 bool EarlyCullEnable; 3621 uint32_t VertexSubPixelPrecisionSelect; 3622#define _8Bit 0 3623#define _4Bit 1 3624 bool ForceUserClipDistanceCullTestEnableBitmask; 3625 uint32_t TriangleFanProvokingVertexSelect; 3626 uint32_t LineStripListProvokingVertexSelect; 3627 uint32_t TriangleStripListProvokingVertexSelect; 3628 bool NonPerspectiveBarycentricEnable; 3629 bool PerspectiveDivideDisable; 3630 uint32_t ClipMode; 3631#define CLIPMODE_NORMAL 0 3632#define CLIPMODE_REJECT_ALL 3 3633#define CLIPMODE_ACCEPT_ALL 4 3634 uint32_t UserClipDistanceClipTestEnableBitmask; 3635 bool GuardbandClipTestEnable; 3636 bool ViewportXYClipTestEnable; 3637 uint32_t APIMode; 3638#define APIMODE_OGL 0 3639#define APIMODE_D3D 1 3640 bool ClipEnable; 3641 uint32_t MaximumVPIndex; 3642 bool ForceZeroRTAIndexEnable; 3643 float MaximumPointWidth; 3644 float MinimumPointWidth; 3645}; 3646 3647static inline void 3648GEN11_3DSTATE_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 3649 __attribute__((unused)) void * restrict dst, 3650 __attribute__((unused)) const struct GEN11_3DSTATE_CLIP * restrict values) 3651{ 3652 uint32_t * restrict dw = (uint32_t * restrict) dst; 3653 3654 dw[0] = 3655 __gen_uint(values->DWordLength, 0, 7) | 3656 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3657 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3658 __gen_uint(values->CommandSubType, 27, 28) | 3659 __gen_uint(values->CommandType, 29, 31); 3660 3661 dw[1] = 3662 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 3663 __gen_uint(values->StatisticsEnable, 10, 10) | 3664 __gen_uint(values->ForceClipMode, 16, 16) | 3665 __gen_uint(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) | 3666 __gen_uint(values->EarlyCullEnable, 18, 18) | 3667 __gen_uint(values->VertexSubPixelPrecisionSelect, 19, 19) | 3668 __gen_uint(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20); 3669 3670 dw[2] = 3671 __gen_uint(values->TriangleFanProvokingVertexSelect, 0, 1) | 3672 __gen_uint(values->LineStripListProvokingVertexSelect, 2, 3) | 3673 __gen_uint(values->TriangleStripListProvokingVertexSelect, 4, 5) | 3674 __gen_uint(values->NonPerspectiveBarycentricEnable, 8, 8) | 3675 __gen_uint(values->PerspectiveDivideDisable, 9, 9) | 3676 __gen_uint(values->ClipMode, 13, 15) | 3677 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 16, 23) | 3678 __gen_uint(values->GuardbandClipTestEnable, 26, 26) | 3679 __gen_uint(values->ViewportXYClipTestEnable, 28, 28) | 3680 __gen_uint(values->APIMode, 30, 30) | 3681 __gen_uint(values->ClipEnable, 31, 31); 3682 3683 dw[3] = 3684 __gen_uint(values->MaximumVPIndex, 0, 3) | 3685 __gen_uint(values->ForceZeroRTAIndexEnable, 5, 5) | 3686 __gen_ufixed(values->MaximumPointWidth, 6, 16, 3) | 3687 __gen_ufixed(values->MinimumPointWidth, 17, 27, 3); 3688} 3689 3690#define GEN11_3DSTATE_CONSTANT_DS_length 11 3691#define GEN11_3DSTATE_CONSTANT_DS_length_bias 2 3692#define GEN11_3DSTATE_CONSTANT_DS_header \ 3693 .DWordLength = 9, \ 3694 ._3DCommandSubOpcode = 26, \ 3695 ._3DCommandOpcode = 0, \ 3696 .CommandSubType = 3, \ 3697 .CommandType = 3 3698 3699struct GEN11_3DSTATE_CONSTANT_DS { 3700 uint32_t DWordLength; 3701 uint32_t MOCS; 3702 uint32_t _3DCommandSubOpcode; 3703 uint32_t _3DCommandOpcode; 3704 uint32_t CommandSubType; 3705 uint32_t CommandType; 3706 struct GEN11_3DSTATE_CONSTANT_BODY ConstantBody; 3707}; 3708 3709static inline void 3710GEN11_3DSTATE_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 3711 __attribute__((unused)) void * restrict dst, 3712 __attribute__((unused)) const struct GEN11_3DSTATE_CONSTANT_DS * restrict values) 3713{ 3714 uint32_t * restrict dw = (uint32_t * restrict) dst; 3715 3716 dw[0] = 3717 __gen_uint(values->DWordLength, 0, 7) | 3718 __gen_uint(values->MOCS, 8, 14) | 3719 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3720 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3721 __gen_uint(values->CommandSubType, 27, 28) | 3722 __gen_uint(values->CommandType, 29, 31); 3723 3724 GEN11_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3725} 3726 3727#define GEN11_3DSTATE_CONSTANT_GS_length 11 3728#define GEN11_3DSTATE_CONSTANT_GS_length_bias 2 3729#define GEN11_3DSTATE_CONSTANT_GS_header \ 3730 .DWordLength = 9, \ 3731 ._3DCommandSubOpcode = 22, \ 3732 ._3DCommandOpcode = 0, \ 3733 .CommandSubType = 3, \ 3734 .CommandType = 3 3735 3736struct GEN11_3DSTATE_CONSTANT_GS { 3737 uint32_t DWordLength; 3738 uint32_t MOCS; 3739 uint32_t _3DCommandSubOpcode; 3740 uint32_t _3DCommandOpcode; 3741 uint32_t CommandSubType; 3742 uint32_t CommandType; 3743 struct GEN11_3DSTATE_CONSTANT_BODY ConstantBody; 3744}; 3745 3746static inline void 3747GEN11_3DSTATE_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 3748 __attribute__((unused)) void * restrict dst, 3749 __attribute__((unused)) const struct GEN11_3DSTATE_CONSTANT_GS * restrict values) 3750{ 3751 uint32_t * restrict dw = (uint32_t * restrict) dst; 3752 3753 dw[0] = 3754 __gen_uint(values->DWordLength, 0, 7) | 3755 __gen_uint(values->MOCS, 8, 14) | 3756 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3757 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3758 __gen_uint(values->CommandSubType, 27, 28) | 3759 __gen_uint(values->CommandType, 29, 31); 3760 3761 GEN11_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3762} 3763 3764#define GEN11_3DSTATE_CONSTANT_HS_length 11 3765#define GEN11_3DSTATE_CONSTANT_HS_length_bias 2 3766#define GEN11_3DSTATE_CONSTANT_HS_header \ 3767 .DWordLength = 9, \ 3768 ._3DCommandSubOpcode = 25, \ 3769 ._3DCommandOpcode = 0, \ 3770 .CommandSubType = 3, \ 3771 .CommandType = 3 3772 3773struct GEN11_3DSTATE_CONSTANT_HS { 3774 uint32_t DWordLength; 3775 uint32_t MOCS; 3776 uint32_t _3DCommandSubOpcode; 3777 uint32_t _3DCommandOpcode; 3778 uint32_t CommandSubType; 3779 uint32_t CommandType; 3780 struct GEN11_3DSTATE_CONSTANT_BODY ConstantBody; 3781}; 3782 3783static inline void 3784GEN11_3DSTATE_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 3785 __attribute__((unused)) void * restrict dst, 3786 __attribute__((unused)) const struct GEN11_3DSTATE_CONSTANT_HS * restrict values) 3787{ 3788 uint32_t * restrict dw = (uint32_t * restrict) dst; 3789 3790 dw[0] = 3791 __gen_uint(values->DWordLength, 0, 7) | 3792 __gen_uint(values->MOCS, 8, 14) | 3793 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3794 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3795 __gen_uint(values->CommandSubType, 27, 28) | 3796 __gen_uint(values->CommandType, 29, 31); 3797 3798 GEN11_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3799} 3800 3801#define GEN11_3DSTATE_CONSTANT_PS_length 11 3802#define GEN11_3DSTATE_CONSTANT_PS_length_bias 2 3803#define GEN11_3DSTATE_CONSTANT_PS_header \ 3804 .DWordLength = 9, \ 3805 ._3DCommandSubOpcode = 23, \ 3806 ._3DCommandOpcode = 0, \ 3807 .CommandSubType = 3, \ 3808 .CommandType = 3 3809 3810struct GEN11_3DSTATE_CONSTANT_PS { 3811 uint32_t DWordLength; 3812 uint32_t MOCS; 3813 uint32_t DisableGatheratSetShaderHint; 3814 uint32_t _3DCommandSubOpcode; 3815 uint32_t _3DCommandOpcode; 3816 uint32_t CommandSubType; 3817 uint32_t CommandType; 3818 struct GEN11_3DSTATE_CONSTANT_BODY ConstantBody; 3819}; 3820 3821static inline void 3822GEN11_3DSTATE_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 3823 __attribute__((unused)) void * restrict dst, 3824 __attribute__((unused)) const struct GEN11_3DSTATE_CONSTANT_PS * restrict values) 3825{ 3826 uint32_t * restrict dw = (uint32_t * restrict) dst; 3827 3828 dw[0] = 3829 __gen_uint(values->DWordLength, 0, 7) | 3830 __gen_uint(values->MOCS, 8, 14) | 3831 __gen_uint(values->DisableGatheratSetShaderHint, 15, 15) | 3832 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3833 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3834 __gen_uint(values->CommandSubType, 27, 28) | 3835 __gen_uint(values->CommandType, 29, 31); 3836 3837 GEN11_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3838} 3839 3840#define GEN11_3DSTATE_CONSTANT_VS_length 11 3841#define GEN11_3DSTATE_CONSTANT_VS_length_bias 2 3842#define GEN11_3DSTATE_CONSTANT_VS_header \ 3843 .DWordLength = 9, \ 3844 ._3DCommandSubOpcode = 21, \ 3845 ._3DCommandOpcode = 0, \ 3846 .CommandSubType = 3, \ 3847 .CommandType = 3 3848 3849struct GEN11_3DSTATE_CONSTANT_VS { 3850 uint32_t DWordLength; 3851 uint32_t MOCS; 3852 uint32_t _3DCommandSubOpcode; 3853 uint32_t _3DCommandOpcode; 3854 uint32_t CommandSubType; 3855 uint32_t CommandType; 3856 struct GEN11_3DSTATE_CONSTANT_BODY ConstantBody; 3857}; 3858 3859static inline void 3860GEN11_3DSTATE_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 3861 __attribute__((unused)) void * restrict dst, 3862 __attribute__((unused)) const struct GEN11_3DSTATE_CONSTANT_VS * restrict values) 3863{ 3864 uint32_t * restrict dw = (uint32_t * restrict) dst; 3865 3866 dw[0] = 3867 __gen_uint(values->DWordLength, 0, 7) | 3868 __gen_uint(values->MOCS, 8, 14) | 3869 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3870 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3871 __gen_uint(values->CommandSubType, 27, 28) | 3872 __gen_uint(values->CommandType, 29, 31); 3873 3874 GEN11_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3875} 3876 3877#define GEN11_3DSTATE_DEPTH_BUFFER_length 8 3878#define GEN11_3DSTATE_DEPTH_BUFFER_length_bias 2 3879#define GEN11_3DSTATE_DEPTH_BUFFER_header \ 3880 .DWordLength = 6, \ 3881 ._3DCommandSubOpcode = 5, \ 3882 ._3DCommandOpcode = 0, \ 3883 .CommandSubType = 3, \ 3884 .CommandType = 3 3885 3886struct GEN11_3DSTATE_DEPTH_BUFFER { 3887 uint32_t DWordLength; 3888 uint32_t _3DCommandSubOpcode; 3889 uint32_t _3DCommandOpcode; 3890 uint32_t CommandSubType; 3891 uint32_t CommandType; 3892 uint32_t SurfacePitch; 3893 uint32_t SurfaceFormat; 3894#define D32_FLOAT 1 3895#define D24_UNORM_X8_UINT 3 3896#define D16_UNORM 5 3897 bool HierarchicalDepthBufferEnable; 3898 bool StencilWriteEnable; 3899 bool DepthWriteEnable; 3900 uint32_t SurfaceType; 3901#define SURFTYPE_2D 1 3902#define SURFTYPE_CUBE 3 3903#define SURFTYPE_NULL 7 3904 __gen_address_type SurfaceBaseAddress; 3905 uint32_t LOD; 3906 uint32_t Width; 3907 uint32_t Height; 3908 uint32_t MOCS; 3909 uint32_t MinimumArrayElement; 3910 uint32_t Depth; 3911 uint32_t MipTailStartLOD; 3912 uint32_t TiledResourceMode; 3913#define NONE 0 3914#define TILEYF 1 3915#define TILEYS 2 3916 uint32_t SurfaceQPitch; 3917 uint32_t RenderTargetViewExtent; 3918}; 3919 3920static inline void 3921GEN11_3DSTATE_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 3922 __attribute__((unused)) void * restrict dst, 3923 __attribute__((unused)) const struct GEN11_3DSTATE_DEPTH_BUFFER * restrict values) 3924{ 3925 uint32_t * restrict dw = (uint32_t * restrict) dst; 3926 3927 dw[0] = 3928 __gen_uint(values->DWordLength, 0, 7) | 3929 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3930 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3931 __gen_uint(values->CommandSubType, 27, 28) | 3932 __gen_uint(values->CommandType, 29, 31); 3933 3934 dw[1] = 3935 __gen_uint(values->SurfacePitch, 0, 17) | 3936 __gen_uint(values->SurfaceFormat, 18, 20) | 3937 __gen_uint(values->HierarchicalDepthBufferEnable, 22, 22) | 3938 __gen_uint(values->StencilWriteEnable, 27, 27) | 3939 __gen_uint(values->DepthWriteEnable, 28, 28) | 3940 __gen_uint(values->SurfaceType, 29, 31); 3941 3942 const uint64_t v2_address = 3943 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 3944 dw[2] = v2_address; 3945 dw[3] = v2_address >> 32; 3946 3947 dw[4] = 3948 __gen_uint(values->LOD, 0, 3) | 3949 __gen_uint(values->Width, 4, 17) | 3950 __gen_uint(values->Height, 18, 31); 3951 3952 dw[5] = 3953 __gen_uint(values->MOCS, 0, 6) | 3954 __gen_uint(values->MinimumArrayElement, 10, 20) | 3955 __gen_uint(values->Depth, 21, 31); 3956 3957 dw[6] = 3958 __gen_uint(values->MipTailStartLOD, 26, 29) | 3959 __gen_uint(values->TiledResourceMode, 30, 31); 3960 3961 dw[7] = 3962 __gen_uint(values->SurfaceQPitch, 0, 14) | 3963 __gen_uint(values->RenderTargetViewExtent, 21, 31); 3964} 3965 3966#define GEN11_3DSTATE_DRAWING_RECTANGLE_length 4 3967#define GEN11_3DSTATE_DRAWING_RECTANGLE_length_bias 2 3968#define GEN11_3DSTATE_DRAWING_RECTANGLE_header \ 3969 .DWordLength = 2, \ 3970 ._3DCommandSubOpcode = 0, \ 3971 ._3DCommandOpcode = 1, \ 3972 .CommandSubType = 3, \ 3973 .CommandType = 3 3974 3975struct GEN11_3DSTATE_DRAWING_RECTANGLE { 3976 uint32_t DWordLength; 3977 uint32_t CoreModeSelect; 3978#define Legacy 0 3979#define Core0Enabled 1 3980#define Core1Enabled 2 3981 uint32_t _3DCommandSubOpcode; 3982 uint32_t _3DCommandOpcode; 3983 uint32_t CommandSubType; 3984 uint32_t CommandType; 3985 uint32_t ClippedDrawingRectangleXMin; 3986 uint32_t ClippedDrawingRectangleYMin; 3987 uint32_t ClippedDrawingRectangleXMax; 3988 uint32_t ClippedDrawingRectangleYMax; 3989 int32_t DrawingRectangleOriginX; 3990 int32_t DrawingRectangleOriginY; 3991}; 3992 3993static inline void 3994GEN11_3DSTATE_DRAWING_RECTANGLE_pack(__attribute__((unused)) __gen_user_data *data, 3995 __attribute__((unused)) void * restrict dst, 3996 __attribute__((unused)) const struct GEN11_3DSTATE_DRAWING_RECTANGLE * restrict values) 3997{ 3998 uint32_t * restrict dw = (uint32_t * restrict) dst; 3999 4000 dw[0] = 4001 __gen_uint(values->DWordLength, 0, 7) | 4002 __gen_uint(values->CoreModeSelect, 14, 15) | 4003 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4004 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4005 __gen_uint(values->CommandSubType, 27, 28) | 4006 __gen_uint(values->CommandType, 29, 31); 4007 4008 dw[1] = 4009 __gen_uint(values->ClippedDrawingRectangleXMin, 0, 15) | 4010 __gen_uint(values->ClippedDrawingRectangleYMin, 16, 31); 4011 4012 dw[2] = 4013 __gen_uint(values->ClippedDrawingRectangleXMax, 0, 15) | 4014 __gen_uint(values->ClippedDrawingRectangleYMax, 16, 31); 4015 4016 dw[3] = 4017 __gen_sint(values->DrawingRectangleOriginX, 0, 15) | 4018 __gen_sint(values->DrawingRectangleOriginY, 16, 31); 4019} 4020 4021#define GEN11_3DSTATE_DS_length 11 4022#define GEN11_3DSTATE_DS_length_bias 2 4023#define GEN11_3DSTATE_DS_header \ 4024 .DWordLength = 9, \ 4025 ._3DCommandSubOpcode = 29, \ 4026 ._3DCommandOpcode = 0, \ 4027 .CommandSubType = 3, \ 4028 .CommandType = 3 4029 4030struct GEN11_3DSTATE_DS { 4031 uint32_t DWordLength; 4032 uint32_t _3DCommandSubOpcode; 4033 uint32_t _3DCommandOpcode; 4034 uint32_t CommandSubType; 4035 uint32_t CommandType; 4036 uint64_t KernelStartPointer; 4037 bool SoftwareExceptionEnable; 4038 bool IllegalOpcodeExceptionEnable; 4039 bool AccessesUAV; 4040 uint32_t FloatingPointMode; 4041#define IEEE754 0 4042#define Alternate 1 4043 uint32_t ThreadDispatchPriority; 4044#define High 1 4045 uint32_t BindingTableEntryCount; 4046 uint32_t SamplerCount; 4047#define NoSamplers 0 4048#define _14Samplers 1 4049#define _58Samplers 2 4050#define _912Samplers 3 4051#define _1316Samplers 4 4052 bool VectorMaskEnable; 4053 uint32_t PerThreadScratchSpace; 4054 __gen_address_type ScratchSpaceBasePointer; 4055 uint32_t PatchURBEntryReadOffset; 4056 uint32_t PatchURBEntryReadLength; 4057 uint32_t DispatchGRFStartRegisterForURBData; 4058 bool Enable; 4059 bool CacheDisable; 4060 bool ComputeWCoordinateEnable; 4061 uint32_t DispatchMode; 4062#define DISPATCH_MODE_SIMD8_SINGLE_PATCH 1 4063#define DISPATCH_MODE_SIMD8_SINGLE_OR_DUAL_PATCH 2 4064 bool StatisticsEnable; 4065 uint32_t MaximumNumberofThreads; 4066 uint32_t UserClipDistanceCullTestEnableBitmask; 4067 uint32_t UserClipDistanceClipTestEnableBitmask; 4068 uint32_t VertexURBEntryOutputLength; 4069 uint32_t VertexURBEntryOutputReadOffset; 4070 uint64_t DUAL_PATCHKernelStartPointer; 4071}; 4072 4073static inline void 4074GEN11_3DSTATE_DS_pack(__attribute__((unused)) __gen_user_data *data, 4075 __attribute__((unused)) void * restrict dst, 4076 __attribute__((unused)) const struct GEN11_3DSTATE_DS * restrict values) 4077{ 4078 uint32_t * restrict dw = (uint32_t * restrict) dst; 4079 4080 dw[0] = 4081 __gen_uint(values->DWordLength, 0, 7) | 4082 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4083 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4084 __gen_uint(values->CommandSubType, 27, 28) | 4085 __gen_uint(values->CommandType, 29, 31); 4086 4087 const uint64_t v1 = 4088 __gen_offset(values->KernelStartPointer, 6, 63); 4089 dw[1] = v1; 4090 dw[2] = v1 >> 32; 4091 4092 dw[3] = 4093 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 4094 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 4095 __gen_uint(values->AccessesUAV, 14, 14) | 4096 __gen_uint(values->FloatingPointMode, 16, 16) | 4097 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 4098 __gen_uint(values->BindingTableEntryCount, 18, 25) | 4099 __gen_uint(values->SamplerCount, 27, 29) | 4100 __gen_uint(values->VectorMaskEnable, 30, 30); 4101 4102 const uint64_t v4 = 4103 __gen_uint(values->PerThreadScratchSpace, 0, 3); 4104 const uint64_t v4_address = 4105 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 4106 dw[4] = v4_address; 4107 dw[5] = (v4_address >> 32) | (v4 >> 32); 4108 4109 dw[6] = 4110 __gen_uint(values->PatchURBEntryReadOffset, 4, 9) | 4111 __gen_uint(values->PatchURBEntryReadLength, 11, 17) | 4112 __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 4113 4114 dw[7] = 4115 __gen_uint(values->Enable, 0, 0) | 4116 __gen_uint(values->CacheDisable, 1, 1) | 4117 __gen_uint(values->ComputeWCoordinateEnable, 2, 2) | 4118 __gen_uint(values->DispatchMode, 3, 4) | 4119 __gen_uint(values->StatisticsEnable, 10, 10) | 4120 __gen_uint(values->MaximumNumberofThreads, 21, 30); 4121 4122 dw[8] = 4123 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 4124 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 4125 __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 4126 __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 4127 4128 const uint64_t v9 = 4129 __gen_offset(values->DUAL_PATCHKernelStartPointer, 6, 63); 4130 dw[9] = v9; 4131 dw[10] = v9 >> 32; 4132} 4133 4134#define GEN11_3DSTATE_GATHER_CONSTANT_DS_length_bias 2 4135#define GEN11_3DSTATE_GATHER_CONSTANT_DS_header \ 4136 .DWordLength = 1, \ 4137 ._3DCommandSubOpcode = 55, \ 4138 ._3DCommandOpcode = 0, \ 4139 .CommandSubType = 3, \ 4140 .CommandType = 3 4141 4142struct GEN11_3DSTATE_GATHER_CONSTANT_DS { 4143 uint32_t DWordLength; 4144 uint32_t _3DCommandSubOpcode; 4145 uint32_t _3DCommandOpcode; 4146 uint32_t CommandSubType; 4147 uint32_t CommandType; 4148 uint32_t UpdateGatherTableOnly; 4149#define CommitGather 0 4150#define NonCommitGather 1 4151 uint32_t ConstantBufferBindingTableBlock; 4152 uint32_t ConstantBufferValid; 4153 uint32_t OnDieTable; 4154#define Load 0 4155#define Read 1 4156 bool ConstantBufferDx9GenerateStall; 4157 uint64_t GatherBufferOffset; 4158 /* variable length fields follow */ 4159}; 4160 4161static inline void 4162GEN11_3DSTATE_GATHER_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 4163 __attribute__((unused)) void * restrict dst, 4164 __attribute__((unused)) const struct GEN11_3DSTATE_GATHER_CONSTANT_DS * restrict values) 4165{ 4166 uint32_t * restrict dw = (uint32_t * restrict) dst; 4167 4168 dw[0] = 4169 __gen_uint(values->DWordLength, 0, 7) | 4170 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4171 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4172 __gen_uint(values->CommandSubType, 27, 28) | 4173 __gen_uint(values->CommandType, 29, 31); 4174 4175 dw[1] = 4176 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4177 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4178 __gen_uint(values->ConstantBufferValid, 16, 31); 4179 4180 dw[2] = 4181 __gen_uint(values->OnDieTable, 3, 3) | 4182 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4183 __gen_offset(values->GatherBufferOffset, 6, 22); 4184} 4185 4186#define GEN11_3DSTATE_GATHER_CONSTANT_GS_length_bias 2 4187#define GEN11_3DSTATE_GATHER_CONSTANT_GS_header \ 4188 .DWordLength = 1, \ 4189 ._3DCommandSubOpcode = 53, \ 4190 ._3DCommandOpcode = 0, \ 4191 .CommandSubType = 3, \ 4192 .CommandType = 3 4193 4194struct GEN11_3DSTATE_GATHER_CONSTANT_GS { 4195 uint32_t DWordLength; 4196 uint32_t _3DCommandSubOpcode; 4197 uint32_t _3DCommandOpcode; 4198 uint32_t CommandSubType; 4199 uint32_t CommandType; 4200 uint32_t UpdateGatherTableOnly; 4201#define CommitGather 0 4202#define NonCommitGather 1 4203 uint32_t ConstantBufferBindingTableBlock; 4204 uint32_t ConstantBufferValid; 4205 uint32_t OnDieTable; 4206#define Load 0 4207#define Read 1 4208 bool ConstantBufferDx9GenerateStall; 4209 uint64_t GatherBufferOffset; 4210 /* variable length fields follow */ 4211}; 4212 4213static inline void 4214GEN11_3DSTATE_GATHER_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 4215 __attribute__((unused)) void * restrict dst, 4216 __attribute__((unused)) const struct GEN11_3DSTATE_GATHER_CONSTANT_GS * restrict values) 4217{ 4218 uint32_t * restrict dw = (uint32_t * restrict) dst; 4219 4220 dw[0] = 4221 __gen_uint(values->DWordLength, 0, 7) | 4222 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4223 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4224 __gen_uint(values->CommandSubType, 27, 28) | 4225 __gen_uint(values->CommandType, 29, 31); 4226 4227 dw[1] = 4228 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4229 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4230 __gen_uint(values->ConstantBufferValid, 16, 31); 4231 4232 dw[2] = 4233 __gen_uint(values->OnDieTable, 3, 3) | 4234 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4235 __gen_offset(values->GatherBufferOffset, 6, 22); 4236} 4237 4238#define GEN11_3DSTATE_GATHER_CONSTANT_HS_length_bias 2 4239#define GEN11_3DSTATE_GATHER_CONSTANT_HS_header \ 4240 .DWordLength = 1, \ 4241 ._3DCommandSubOpcode = 54, \ 4242 ._3DCommandOpcode = 0, \ 4243 .CommandSubType = 3, \ 4244 .CommandType = 3 4245 4246struct GEN11_3DSTATE_GATHER_CONSTANT_HS { 4247 uint32_t DWordLength; 4248 uint32_t _3DCommandSubOpcode; 4249 uint32_t _3DCommandOpcode; 4250 uint32_t CommandSubType; 4251 uint32_t CommandType; 4252 uint32_t UpdateGatherTableOnly; 4253#define CommitGather 0 4254#define NonCommitGather 1 4255 uint32_t ConstantBufferBindingTableBlock; 4256 uint32_t ConstantBufferValid; 4257 uint32_t OnDieTable; 4258#define Load 0 4259#define Read 1 4260 bool ConstantBufferDx9GenerateStall; 4261 uint64_t GatherBufferOffset; 4262 /* variable length fields follow */ 4263}; 4264 4265static inline void 4266GEN11_3DSTATE_GATHER_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 4267 __attribute__((unused)) void * restrict dst, 4268 __attribute__((unused)) const struct GEN11_3DSTATE_GATHER_CONSTANT_HS * restrict values) 4269{ 4270 uint32_t * restrict dw = (uint32_t * restrict) dst; 4271 4272 dw[0] = 4273 __gen_uint(values->DWordLength, 0, 7) | 4274 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4275 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4276 __gen_uint(values->CommandSubType, 27, 28) | 4277 __gen_uint(values->CommandType, 29, 31); 4278 4279 dw[1] = 4280 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4281 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4282 __gen_uint(values->ConstantBufferValid, 16, 31); 4283 4284 dw[2] = 4285 __gen_uint(values->OnDieTable, 3, 3) | 4286 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4287 __gen_offset(values->GatherBufferOffset, 6, 22); 4288} 4289 4290#define GEN11_3DSTATE_GATHER_CONSTANT_PS_length_bias 2 4291#define GEN11_3DSTATE_GATHER_CONSTANT_PS_header \ 4292 .DWordLength = 1, \ 4293 ._3DCommandSubOpcode = 56, \ 4294 ._3DCommandOpcode = 0, \ 4295 .CommandSubType = 3, \ 4296 .CommandType = 3 4297 4298struct GEN11_3DSTATE_GATHER_CONSTANT_PS { 4299 uint32_t DWordLength; 4300 uint32_t _3DCommandSubOpcode; 4301 uint32_t _3DCommandOpcode; 4302 uint32_t CommandSubType; 4303 uint32_t CommandType; 4304 bool DX9OnDieRegisterReadEnable; 4305 uint32_t UpdateGatherTableOnly; 4306#define CommitGather 0 4307#define NonCommitGather 1 4308 uint32_t ConstantBufferBindingTableBlock; 4309 uint32_t ConstantBufferValid; 4310 uint32_t OnDieTable; 4311#define Load 0 4312#define Read 1 4313 bool ConstantBufferDx9Enable; 4314 bool ConstantBufferDx9GenerateStall; 4315 uint64_t GatherBufferOffset; 4316 /* variable length fields follow */ 4317}; 4318 4319static inline void 4320GEN11_3DSTATE_GATHER_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 4321 __attribute__((unused)) void * restrict dst, 4322 __attribute__((unused)) const struct GEN11_3DSTATE_GATHER_CONSTANT_PS * restrict values) 4323{ 4324 uint32_t * restrict dw = (uint32_t * restrict) dst; 4325 4326 dw[0] = 4327 __gen_uint(values->DWordLength, 0, 7) | 4328 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4329 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4330 __gen_uint(values->CommandSubType, 27, 28) | 4331 __gen_uint(values->CommandType, 29, 31); 4332 4333 dw[1] = 4334 __gen_uint(values->DX9OnDieRegisterReadEnable, 0, 0) | 4335 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4336 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4337 __gen_uint(values->ConstantBufferValid, 16, 31); 4338 4339 dw[2] = 4340 __gen_uint(values->OnDieTable, 3, 3) | 4341 __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 4342 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4343 __gen_offset(values->GatherBufferOffset, 6, 22); 4344} 4345 4346#define GEN11_3DSTATE_GATHER_CONSTANT_VS_length_bias 2 4347#define GEN11_3DSTATE_GATHER_CONSTANT_VS_header \ 4348 .DWordLength = 0, \ 4349 ._3DCommandSubOpcode = 52, \ 4350 ._3DCommandOpcode = 0, \ 4351 .CommandSubType = 3, \ 4352 .CommandType = 3 4353 4354struct GEN11_3DSTATE_GATHER_CONSTANT_VS { 4355 uint32_t DWordLength; 4356 uint32_t _3DCommandSubOpcode; 4357 uint32_t _3DCommandOpcode; 4358 uint32_t CommandSubType; 4359 uint32_t CommandType; 4360 bool DX9OnDieRegisterReadEnable; 4361 uint32_t UpdateGatherTableOnly; 4362#define CommitGather 0 4363#define NonCommitGather 1 4364 uint32_t ConstantBufferBindingTableBlock; 4365 uint32_t ConstantBufferValid; 4366 uint32_t OnDieTable; 4367#define Load 0 4368#define Read 1 4369 bool ConstantBufferDx9Enable; 4370 bool ConstantBufferDx9GenerateStall; 4371 uint64_t GatherBufferOffset; 4372 /* variable length fields follow */ 4373}; 4374 4375static inline void 4376GEN11_3DSTATE_GATHER_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 4377 __attribute__((unused)) void * restrict dst, 4378 __attribute__((unused)) const struct GEN11_3DSTATE_GATHER_CONSTANT_VS * restrict values) 4379{ 4380 uint32_t * restrict dw = (uint32_t * restrict) dst; 4381 4382 dw[0] = 4383 __gen_uint(values->DWordLength, 0, 7) | 4384 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4385 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4386 __gen_uint(values->CommandSubType, 27, 28) | 4387 __gen_uint(values->CommandType, 29, 31); 4388 4389 dw[1] = 4390 __gen_uint(values->DX9OnDieRegisterReadEnable, 0, 0) | 4391 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4392 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4393 __gen_uint(values->ConstantBufferValid, 16, 31); 4394 4395 dw[2] = 4396 __gen_uint(values->OnDieTable, 3, 3) | 4397 __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 4398 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4399 __gen_offset(values->GatherBufferOffset, 6, 22); 4400} 4401 4402#define GEN11_3DSTATE_GATHER_POOL_ALLOC_length 4 4403#define GEN11_3DSTATE_GATHER_POOL_ALLOC_length_bias 2 4404#define GEN11_3DSTATE_GATHER_POOL_ALLOC_header \ 4405 .DWordLength = 2, \ 4406 ._3DCommandSubOpcode = 26, \ 4407 ._3DCommandOpcode = 1, \ 4408 .CommandSubType = 3, \ 4409 .CommandType = 3 4410 4411struct GEN11_3DSTATE_GATHER_POOL_ALLOC { 4412 uint32_t DWordLength; 4413 uint32_t _3DCommandSubOpcode; 4414 uint32_t _3DCommandOpcode; 4415 uint32_t CommandSubType; 4416 uint32_t CommandType; 4417 uint32_t MOCS; 4418 bool GatherPoolEnable; 4419 __gen_address_type GatherPoolBaseAddress; 4420 uint32_t GatherPoolBufferSize; 4421}; 4422 4423static inline void 4424GEN11_3DSTATE_GATHER_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 4425 __attribute__((unused)) void * restrict dst, 4426 __attribute__((unused)) const struct GEN11_3DSTATE_GATHER_POOL_ALLOC * restrict values) 4427{ 4428 uint32_t * restrict dw = (uint32_t * restrict) dst; 4429 4430 dw[0] = 4431 __gen_uint(values->DWordLength, 0, 7) | 4432 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4433 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4434 __gen_uint(values->CommandSubType, 27, 28) | 4435 __gen_uint(values->CommandType, 29, 31); 4436 4437 const uint64_t v1 = 4438 __gen_uint(values->MOCS, 0, 6) | 4439 __gen_uint(values->GatherPoolEnable, 11, 11); 4440 const uint64_t v1_address = 4441 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, v1); 4442 dw[1] = v1_address; 4443 dw[2] = (v1_address >> 32) | (v1 >> 32); 4444 4445 dw[3] = 4446 __gen_uint(values->GatherPoolBufferSize, 12, 31); 4447} 4448 4449#define GEN11_3DSTATE_GS_length 10 4450#define GEN11_3DSTATE_GS_length_bias 2 4451#define GEN11_3DSTATE_GS_header \ 4452 .DWordLength = 8, \ 4453 ._3DCommandSubOpcode = 17, \ 4454 ._3DCommandOpcode = 0, \ 4455 .CommandSubType = 3, \ 4456 .CommandType = 3 4457 4458struct GEN11_3DSTATE_GS { 4459 uint32_t DWordLength; 4460 uint32_t _3DCommandSubOpcode; 4461 uint32_t _3DCommandOpcode; 4462 uint32_t CommandSubType; 4463 uint32_t CommandType; 4464 uint64_t KernelStartPointer; 4465 uint32_t ExpectedVertexCount; 4466 bool SoftwareExceptionEnable; 4467 bool MaskStackExceptionEnable; 4468 bool AccessesUAV; 4469 bool IllegalOpcodeExceptionEnable; 4470 uint32_t FloatingPointMode; 4471#define IEEE754 0 4472#define Alternate 1 4473 uint32_t ThreadDispatchPriority; 4474#define High 1 4475 uint32_t BindingTableEntryCount; 4476 uint32_t SamplerCount; 4477#define NoSamplers 0 4478#define _14Samplers 1 4479#define _58Samplers 2 4480#define _912Samplers 3 4481#define _1316Samplers 4 4482 bool VectorMaskEnable; 4483 bool SingleProgramFlow; 4484 uint32_t PerThreadScratchSpace; 4485 __gen_address_type ScratchSpaceBasePointer; 4486 uint32_t DispatchGRFStartRegisterForURBData; 4487 uint32_t VertexURBEntryReadOffset; 4488 bool IncludeVertexHandles; 4489 uint32_t VertexURBEntryReadLength; 4490 enum GEN11_3D_Prim_Topo_Type OutputTopology; 4491 uint32_t OutputVertexSize; 4492 uint32_t DispatchGRFStartRegisterForURBData54; 4493 bool Enable; 4494 bool DiscardAdjacency; 4495 uint32_t ReorderMode; 4496#define LEADING 0 4497#define TRAILING 1 4498 uint32_t Hint; 4499 bool IncludePrimitiveID; 4500 uint32_t InvocationsIncrementValue; 4501 bool StatisticsEnable; 4502 uint32_t DispatchMode; 4503#define DISPATCH_MODE_SIMD8 3 4504 uint32_t DefaultStreamId; 4505 uint32_t InstanceControl; 4506 uint32_t ControlDataHeaderSize; 4507 uint32_t MaximumNumberofThreads; 4508 uint32_t StaticOutputVertexCount; 4509 bool StaticOutput; 4510 uint32_t ControlDataFormat; 4511#define CUT 0 4512#define SID 1 4513 uint32_t UserClipDistanceCullTestEnableBitmask; 4514 uint32_t UserClipDistanceClipTestEnableBitmask; 4515 uint32_t VertexURBEntryOutputLength; 4516 uint32_t VertexURBEntryOutputReadOffset; 4517}; 4518 4519static inline void 4520GEN11_3DSTATE_GS_pack(__attribute__((unused)) __gen_user_data *data, 4521 __attribute__((unused)) void * restrict dst, 4522 __attribute__((unused)) const struct GEN11_3DSTATE_GS * restrict values) 4523{ 4524 uint32_t * restrict dw = (uint32_t * restrict) dst; 4525 4526 dw[0] = 4527 __gen_uint(values->DWordLength, 0, 7) | 4528 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4529 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4530 __gen_uint(values->CommandSubType, 27, 28) | 4531 __gen_uint(values->CommandType, 29, 31); 4532 4533 const uint64_t v1 = 4534 __gen_offset(values->KernelStartPointer, 6, 63); 4535 dw[1] = v1; 4536 dw[2] = v1 >> 32; 4537 4538 dw[3] = 4539 __gen_uint(values->ExpectedVertexCount, 0, 5) | 4540 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 4541 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 4542 __gen_uint(values->AccessesUAV, 12, 12) | 4543 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 4544 __gen_uint(values->FloatingPointMode, 16, 16) | 4545 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 4546 __gen_uint(values->BindingTableEntryCount, 18, 25) | 4547 __gen_uint(values->SamplerCount, 27, 29) | 4548 __gen_uint(values->VectorMaskEnable, 30, 30) | 4549 __gen_uint(values->SingleProgramFlow, 31, 31); 4550 4551 const uint64_t v4 = 4552 __gen_uint(values->PerThreadScratchSpace, 0, 3); 4553 const uint64_t v4_address = 4554 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 4555 dw[4] = v4_address; 4556 dw[5] = (v4_address >> 32) | (v4 >> 32); 4557 4558 dw[6] = 4559 __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 4560 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 4561 __gen_uint(values->IncludeVertexHandles, 10, 10) | 4562 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 4563 __gen_uint(values->OutputTopology, 17, 22) | 4564 __gen_uint(values->OutputVertexSize, 23, 28) | 4565 __gen_uint(values->DispatchGRFStartRegisterForURBData54, 29, 30); 4566 4567 dw[7] = 4568 __gen_uint(values->Enable, 0, 0) | 4569 __gen_uint(values->DiscardAdjacency, 1, 1) | 4570 __gen_uint(values->ReorderMode, 2, 2) | 4571 __gen_uint(values->Hint, 3, 3) | 4572 __gen_uint(values->IncludePrimitiveID, 4, 4) | 4573 __gen_uint(values->InvocationsIncrementValue, 5, 9) | 4574 __gen_uint(values->StatisticsEnable, 10, 10) | 4575 __gen_uint(values->DispatchMode, 11, 12) | 4576 __gen_uint(values->DefaultStreamId, 13, 14) | 4577 __gen_uint(values->InstanceControl, 15, 19) | 4578 __gen_uint(values->ControlDataHeaderSize, 20, 23); 4579 4580 dw[8] = 4581 __gen_uint(values->MaximumNumberofThreads, 0, 8) | 4582 __gen_uint(values->StaticOutputVertexCount, 16, 26) | 4583 __gen_uint(values->StaticOutput, 30, 30) | 4584 __gen_uint(values->ControlDataFormat, 31, 31); 4585 4586 dw[9] = 4587 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 4588 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 4589 __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 4590 __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 4591} 4592 4593#define GEN11_3DSTATE_HIER_DEPTH_BUFFER_length 5 4594#define GEN11_3DSTATE_HIER_DEPTH_BUFFER_length_bias 2 4595#define GEN11_3DSTATE_HIER_DEPTH_BUFFER_header \ 4596 .DWordLength = 3, \ 4597 ._3DCommandSubOpcode = 7, \ 4598 ._3DCommandOpcode = 0, \ 4599 .CommandSubType = 3, \ 4600 .CommandType = 3 4601 4602struct GEN11_3DSTATE_HIER_DEPTH_BUFFER { 4603 uint32_t DWordLength; 4604 uint32_t _3DCommandSubOpcode; 4605 uint32_t _3DCommandOpcode; 4606 uint32_t CommandSubType; 4607 uint32_t CommandType; 4608 uint32_t SurfacePitch; 4609 uint32_t TiledResourceMode; 4610#define NONE 0 4611#define TILEYF 1 4612#define TILEYS 2 4613 uint32_t MOCS; 4614 __gen_address_type SurfaceBaseAddress; 4615 uint32_t SurfaceQPitch; 4616}; 4617 4618static inline void 4619GEN11_3DSTATE_HIER_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4620 __attribute__((unused)) void * restrict dst, 4621 __attribute__((unused)) const struct GEN11_3DSTATE_HIER_DEPTH_BUFFER * restrict values) 4622{ 4623 uint32_t * restrict dw = (uint32_t * restrict) dst; 4624 4625 dw[0] = 4626 __gen_uint(values->DWordLength, 0, 7) | 4627 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4628 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4629 __gen_uint(values->CommandSubType, 27, 28) | 4630 __gen_uint(values->CommandType, 29, 31); 4631 4632 dw[1] = 4633 __gen_uint(values->SurfacePitch, 0, 16) | 4634 __gen_uint(values->TiledResourceMode, 23, 24) | 4635 __gen_uint(values->MOCS, 25, 31); 4636 4637 const uint64_t v2_address = 4638 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 4639 dw[2] = v2_address; 4640 dw[3] = v2_address >> 32; 4641 4642 dw[4] = 4643 __gen_uint(values->SurfaceQPitch, 0, 14); 4644} 4645 4646#define GEN11_3DSTATE_HS_length 9 4647#define GEN11_3DSTATE_HS_length_bias 2 4648#define GEN11_3DSTATE_HS_header \ 4649 .DWordLength = 7, \ 4650 ._3DCommandSubOpcode = 27, \ 4651 ._3DCommandOpcode = 0, \ 4652 .CommandSubType = 3, \ 4653 .CommandType = 3 4654 4655struct GEN11_3DSTATE_HS { 4656 uint32_t DWordLength; 4657 uint32_t _3DCommandSubOpcode; 4658 uint32_t _3DCommandOpcode; 4659 uint32_t CommandSubType; 4660 uint32_t CommandType; 4661 bool SoftwareExceptionEnable; 4662 bool IllegalOpcodeExceptionEnable; 4663 uint32_t FloatingPointMode; 4664#define IEEE754 0 4665#define alternate 1 4666 uint32_t ThreadDispatchPriority; 4667#define High 1 4668 uint32_t BindingTableEntryCount; 4669 uint32_t SamplerCount; 4670#define NoSamplers 0 4671#define _14Samplers 1 4672#define _58Samplers 2 4673#define _912Samplers 3 4674#define _1316Samplers 4 4675 uint32_t InstanceCount; 4676 uint32_t MaximumNumberofThreads; 4677 bool StatisticsEnable; 4678 bool Enable; 4679 uint64_t KernelStartPointer; 4680 uint32_t PerThreadScratchSpace; 4681 __gen_address_type ScratchSpaceBasePointer; 4682 bool IncludePrimitiveID; 4683 uint32_t VertexURBEntryReadOffset; 4684 uint32_t VertexURBEntryReadLength; 4685 uint32_t DispatchMode; 4686#define DISPATCH_MODE_SINGLE_PATCH 0 4687#define DISPATCH_MODE__8_PATCH 2 4688 uint32_t DispatchGRFStartRegisterForURBData; 4689 bool IncludeVertexHandles; 4690 bool AccessesUAV; 4691 bool VectorMaskEnable; 4692 bool SingleProgramFlow; 4693 uint32_t DispatchGRFStartRegisterForURBData5; 4694}; 4695 4696static inline void 4697GEN11_3DSTATE_HS_pack(__attribute__((unused)) __gen_user_data *data, 4698 __attribute__((unused)) void * restrict dst, 4699 __attribute__((unused)) const struct GEN11_3DSTATE_HS * restrict values) 4700{ 4701 uint32_t * restrict dw = (uint32_t * restrict) dst; 4702 4703 dw[0] = 4704 __gen_uint(values->DWordLength, 0, 7) | 4705 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4706 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4707 __gen_uint(values->CommandSubType, 27, 28) | 4708 __gen_uint(values->CommandType, 29, 31); 4709 4710 dw[1] = 4711 __gen_uint(values->SoftwareExceptionEnable, 12, 12) | 4712 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 4713 __gen_uint(values->FloatingPointMode, 16, 16) | 4714 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 4715 __gen_uint(values->BindingTableEntryCount, 18, 25) | 4716 __gen_uint(values->SamplerCount, 27, 29); 4717 4718 dw[2] = 4719 __gen_uint(values->InstanceCount, 0, 3) | 4720 __gen_uint(values->MaximumNumberofThreads, 8, 16) | 4721 __gen_uint(values->StatisticsEnable, 29, 29) | 4722 __gen_uint(values->Enable, 31, 31); 4723 4724 const uint64_t v3 = 4725 __gen_offset(values->KernelStartPointer, 6, 63); 4726 dw[3] = v3; 4727 dw[4] = v3 >> 32; 4728 4729 const uint64_t v5 = 4730 __gen_uint(values->PerThreadScratchSpace, 0, 3); 4731 const uint64_t v5_address = 4732 __gen_combine_address(data, &dw[5], values->ScratchSpaceBasePointer, v5); 4733 dw[5] = v5_address; 4734 dw[6] = (v5_address >> 32) | (v5 >> 32); 4735 4736 dw[7] = 4737 __gen_uint(values->IncludePrimitiveID, 0, 0) | 4738 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 4739 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 4740 __gen_uint(values->DispatchMode, 17, 18) | 4741 __gen_uint(values->DispatchGRFStartRegisterForURBData, 19, 23) | 4742 __gen_uint(values->IncludeVertexHandles, 24, 24) | 4743 __gen_uint(values->AccessesUAV, 25, 25) | 4744 __gen_uint(values->VectorMaskEnable, 26, 26) | 4745 __gen_uint(values->SingleProgramFlow, 27, 27) | 4746 __gen_uint(values->DispatchGRFStartRegisterForURBData5, 28, 28); 4747 4748 dw[8] = 0; 4749} 4750 4751#define GEN11_3DSTATE_INDEX_BUFFER_length 5 4752#define GEN11_3DSTATE_INDEX_BUFFER_length_bias 2 4753#define GEN11_3DSTATE_INDEX_BUFFER_header \ 4754 .DWordLength = 3, \ 4755 ._3DCommandSubOpcode = 10, \ 4756 ._3DCommandOpcode = 0, \ 4757 .CommandSubType = 3, \ 4758 .CommandType = 3 4759 4760struct GEN11_3DSTATE_INDEX_BUFFER { 4761 uint32_t DWordLength; 4762 uint32_t _3DCommandSubOpcode; 4763 uint32_t _3DCommandOpcode; 4764 uint32_t CommandSubType; 4765 uint32_t CommandType; 4766 uint32_t MOCS; 4767 uint32_t IndexFormat; 4768#define INDEX_BYTE 0 4769#define INDEX_WORD 1 4770#define INDEX_DWORD 2 4771 __gen_address_type BufferStartingAddress; 4772 uint32_t BufferSize; 4773}; 4774 4775static inline void 4776GEN11_3DSTATE_INDEX_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4777 __attribute__((unused)) void * restrict dst, 4778 __attribute__((unused)) const struct GEN11_3DSTATE_INDEX_BUFFER * restrict values) 4779{ 4780 uint32_t * restrict dw = (uint32_t * restrict) dst; 4781 4782 dw[0] = 4783 __gen_uint(values->DWordLength, 0, 7) | 4784 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4785 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4786 __gen_uint(values->CommandSubType, 27, 28) | 4787 __gen_uint(values->CommandType, 29, 31); 4788 4789 dw[1] = 4790 __gen_uint(values->MOCS, 0, 6) | 4791 __gen_uint(values->IndexFormat, 8, 9); 4792 4793 const uint64_t v2_address = 4794 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, 0); 4795 dw[2] = v2_address; 4796 dw[3] = v2_address >> 32; 4797 4798 dw[4] = 4799 __gen_uint(values->BufferSize, 0, 31); 4800} 4801 4802#define GEN11_3DSTATE_LINE_STIPPLE_length 3 4803#define GEN11_3DSTATE_LINE_STIPPLE_length_bias 2 4804#define GEN11_3DSTATE_LINE_STIPPLE_header \ 4805 .DWordLength = 1, \ 4806 ._3DCommandSubOpcode = 8, \ 4807 ._3DCommandOpcode = 1, \ 4808 .CommandSubType = 3, \ 4809 .CommandType = 3 4810 4811struct GEN11_3DSTATE_LINE_STIPPLE { 4812 uint32_t DWordLength; 4813 uint32_t _3DCommandSubOpcode; 4814 uint32_t _3DCommandOpcode; 4815 uint32_t CommandSubType; 4816 uint32_t CommandType; 4817 uint32_t LineStipplePattern; 4818 uint32_t CurrentStippleIndex; 4819 uint32_t CurrentRepeatCounter; 4820 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex; 4821 uint32_t LineStippleRepeatCount; 4822 float LineStippleInverseRepeatCount; 4823}; 4824 4825static inline void 4826GEN11_3DSTATE_LINE_STIPPLE_pack(__attribute__((unused)) __gen_user_data *data, 4827 __attribute__((unused)) void * restrict dst, 4828 __attribute__((unused)) const struct GEN11_3DSTATE_LINE_STIPPLE * restrict values) 4829{ 4830 uint32_t * restrict dw = (uint32_t * restrict) dst; 4831 4832 dw[0] = 4833 __gen_uint(values->DWordLength, 0, 7) | 4834 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4835 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4836 __gen_uint(values->CommandSubType, 27, 28) | 4837 __gen_uint(values->CommandType, 29, 31); 4838 4839 dw[1] = 4840 __gen_uint(values->LineStipplePattern, 0, 15) | 4841 __gen_uint(values->CurrentStippleIndex, 16, 19) | 4842 __gen_uint(values->CurrentRepeatCounter, 21, 29) | 4843 __gen_uint(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31); 4844 4845 dw[2] = 4846 __gen_uint(values->LineStippleRepeatCount, 0, 8) | 4847 __gen_ufixed(values->LineStippleInverseRepeatCount, 15, 31, 16); 4848} 4849 4850#define GEN11_3DSTATE_MONOFILTER_SIZE_length 2 4851#define GEN11_3DSTATE_MONOFILTER_SIZE_length_bias 2 4852#define GEN11_3DSTATE_MONOFILTER_SIZE_header \ 4853 .DWordLength = 0, \ 4854 ._3DCommandSubOpcode = 17, \ 4855 ._3DCommandOpcode = 1, \ 4856 .CommandSubType = 3, \ 4857 .CommandType = 3 4858 4859struct GEN11_3DSTATE_MONOFILTER_SIZE { 4860 uint32_t DWordLength; 4861 uint32_t _3DCommandSubOpcode; 4862 uint32_t _3DCommandOpcode; 4863 uint32_t CommandSubType; 4864 uint32_t CommandType; 4865 uint32_t MonochromeFilterHeight; 4866 uint32_t MonochromeFilterWidth; 4867}; 4868 4869static inline void 4870GEN11_3DSTATE_MONOFILTER_SIZE_pack(__attribute__((unused)) __gen_user_data *data, 4871 __attribute__((unused)) void * restrict dst, 4872 __attribute__((unused)) const struct GEN11_3DSTATE_MONOFILTER_SIZE * restrict values) 4873{ 4874 uint32_t * restrict dw = (uint32_t * restrict) dst; 4875 4876 dw[0] = 4877 __gen_uint(values->DWordLength, 0, 7) | 4878 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4879 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4880 __gen_uint(values->CommandSubType, 27, 28) | 4881 __gen_uint(values->CommandType, 29, 31); 4882 4883 dw[1] = 4884 __gen_uint(values->MonochromeFilterHeight, 0, 2) | 4885 __gen_uint(values->MonochromeFilterWidth, 3, 5); 4886} 4887 4888#define GEN11_3DSTATE_MULTISAMPLE_length 2 4889#define GEN11_3DSTATE_MULTISAMPLE_length_bias 2 4890#define GEN11_3DSTATE_MULTISAMPLE_header \ 4891 .DWordLength = 0, \ 4892 ._3DCommandSubOpcode = 13, \ 4893 ._3DCommandOpcode = 0, \ 4894 .CommandSubType = 3, \ 4895 .CommandType = 3 4896 4897struct GEN11_3DSTATE_MULTISAMPLE { 4898 uint32_t DWordLength; 4899 uint32_t _3DCommandSubOpcode; 4900 uint32_t _3DCommandOpcode; 4901 uint32_t CommandSubType; 4902 uint32_t CommandType; 4903 uint32_t NumberofMultisamples; 4904 uint32_t PixelLocation; 4905#define CENTER 0 4906#define UL_CORNER 1 4907 bool PixelPositionOffsetEnable; 4908}; 4909 4910static inline void 4911GEN11_3DSTATE_MULTISAMPLE_pack(__attribute__((unused)) __gen_user_data *data, 4912 __attribute__((unused)) void * restrict dst, 4913 __attribute__((unused)) const struct GEN11_3DSTATE_MULTISAMPLE * restrict values) 4914{ 4915 uint32_t * restrict dw = (uint32_t * restrict) dst; 4916 4917 dw[0] = 4918 __gen_uint(values->DWordLength, 0, 7) | 4919 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4920 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4921 __gen_uint(values->CommandSubType, 27, 28) | 4922 __gen_uint(values->CommandType, 29, 31); 4923 4924 dw[1] = 4925 __gen_uint(values->NumberofMultisamples, 1, 3) | 4926 __gen_uint(values->PixelLocation, 4, 4) | 4927 __gen_uint(values->PixelPositionOffsetEnable, 5, 5); 4928} 4929 4930#define GEN11_3DSTATE_POLY_STIPPLE_OFFSET_length 2 4931#define GEN11_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 2 4932#define GEN11_3DSTATE_POLY_STIPPLE_OFFSET_header\ 4933 .DWordLength = 0, \ 4934 ._3DCommandSubOpcode = 6, \ 4935 ._3DCommandOpcode = 1, \ 4936 .CommandSubType = 3, \ 4937 .CommandType = 3 4938 4939struct GEN11_3DSTATE_POLY_STIPPLE_OFFSET { 4940 uint32_t DWordLength; 4941 uint32_t _3DCommandSubOpcode; 4942 uint32_t _3DCommandOpcode; 4943 uint32_t CommandSubType; 4944 uint32_t CommandType; 4945 uint32_t PolygonStippleYOffset; 4946 uint32_t PolygonStippleXOffset; 4947}; 4948 4949static inline void 4950GEN11_3DSTATE_POLY_STIPPLE_OFFSET_pack(__attribute__((unused)) __gen_user_data *data, 4951 __attribute__((unused)) void * restrict dst, 4952 __attribute__((unused)) const struct GEN11_3DSTATE_POLY_STIPPLE_OFFSET * restrict values) 4953{ 4954 uint32_t * restrict dw = (uint32_t * restrict) dst; 4955 4956 dw[0] = 4957 __gen_uint(values->DWordLength, 0, 7) | 4958 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4959 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4960 __gen_uint(values->CommandSubType, 27, 28) | 4961 __gen_uint(values->CommandType, 29, 31); 4962 4963 dw[1] = 4964 __gen_uint(values->PolygonStippleYOffset, 0, 4) | 4965 __gen_uint(values->PolygonStippleXOffset, 8, 12); 4966} 4967 4968#define GEN11_3DSTATE_POLY_STIPPLE_PATTERN_length 33 4969#define GEN11_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 2 4970#define GEN11_3DSTATE_POLY_STIPPLE_PATTERN_header\ 4971 .DWordLength = 31, \ 4972 ._3DCommandSubOpcode = 7, \ 4973 ._3DCommandOpcode = 1, \ 4974 .CommandSubType = 3, \ 4975 .CommandType = 3 4976 4977struct GEN11_3DSTATE_POLY_STIPPLE_PATTERN { 4978 uint32_t DWordLength; 4979 uint32_t _3DCommandSubOpcode; 4980 uint32_t _3DCommandOpcode; 4981 uint32_t CommandSubType; 4982 uint32_t CommandType; 4983 uint32_t PatternRow[32]; 4984}; 4985 4986static inline void 4987GEN11_3DSTATE_POLY_STIPPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 4988 __attribute__((unused)) void * restrict dst, 4989 __attribute__((unused)) const struct GEN11_3DSTATE_POLY_STIPPLE_PATTERN * restrict values) 4990{ 4991 uint32_t * restrict dw = (uint32_t * restrict) dst; 4992 4993 dw[0] = 4994 __gen_uint(values->DWordLength, 0, 7) | 4995 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4996 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4997 __gen_uint(values->CommandSubType, 27, 28) | 4998 __gen_uint(values->CommandType, 29, 31); 4999 5000 dw[1] = 5001 __gen_uint(values->PatternRow[0], 0, 31); 5002 5003 dw[2] = 5004 __gen_uint(values->PatternRow[1], 0, 31); 5005 5006 dw[3] = 5007 __gen_uint(values->PatternRow[2], 0, 31); 5008 5009 dw[4] = 5010 __gen_uint(values->PatternRow[3], 0, 31); 5011 5012 dw[5] = 5013 __gen_uint(values->PatternRow[4], 0, 31); 5014 5015 dw[6] = 5016 __gen_uint(values->PatternRow[5], 0, 31); 5017 5018 dw[7] = 5019 __gen_uint(values->PatternRow[6], 0, 31); 5020 5021 dw[8] = 5022 __gen_uint(values->PatternRow[7], 0, 31); 5023 5024 dw[9] = 5025 __gen_uint(values->PatternRow[8], 0, 31); 5026 5027 dw[10] = 5028 __gen_uint(values->PatternRow[9], 0, 31); 5029 5030 dw[11] = 5031 __gen_uint(values->PatternRow[10], 0, 31); 5032 5033 dw[12] = 5034 __gen_uint(values->PatternRow[11], 0, 31); 5035 5036 dw[13] = 5037 __gen_uint(values->PatternRow[12], 0, 31); 5038 5039 dw[14] = 5040 __gen_uint(values->PatternRow[13], 0, 31); 5041 5042 dw[15] = 5043 __gen_uint(values->PatternRow[14], 0, 31); 5044 5045 dw[16] = 5046 __gen_uint(values->PatternRow[15], 0, 31); 5047 5048 dw[17] = 5049 __gen_uint(values->PatternRow[16], 0, 31); 5050 5051 dw[18] = 5052 __gen_uint(values->PatternRow[17], 0, 31); 5053 5054 dw[19] = 5055 __gen_uint(values->PatternRow[18], 0, 31); 5056 5057 dw[20] = 5058 __gen_uint(values->PatternRow[19], 0, 31); 5059 5060 dw[21] = 5061 __gen_uint(values->PatternRow[20], 0, 31); 5062 5063 dw[22] = 5064 __gen_uint(values->PatternRow[21], 0, 31); 5065 5066 dw[23] = 5067 __gen_uint(values->PatternRow[22], 0, 31); 5068 5069 dw[24] = 5070 __gen_uint(values->PatternRow[23], 0, 31); 5071 5072 dw[25] = 5073 __gen_uint(values->PatternRow[24], 0, 31); 5074 5075 dw[26] = 5076 __gen_uint(values->PatternRow[25], 0, 31); 5077 5078 dw[27] = 5079 __gen_uint(values->PatternRow[26], 0, 31); 5080 5081 dw[28] = 5082 __gen_uint(values->PatternRow[27], 0, 31); 5083 5084 dw[29] = 5085 __gen_uint(values->PatternRow[28], 0, 31); 5086 5087 dw[30] = 5088 __gen_uint(values->PatternRow[29], 0, 31); 5089 5090 dw[31] = 5091 __gen_uint(values->PatternRow[30], 0, 31); 5092 5093 dw[32] = 5094 __gen_uint(values->PatternRow[31], 0, 31); 5095} 5096 5097#define GEN11_3DSTATE_PS_length 12 5098#define GEN11_3DSTATE_PS_length_bias 2 5099#define GEN11_3DSTATE_PS_header \ 5100 .DWordLength = 10, \ 5101 ._3DCommandSubOpcode = 32, \ 5102 ._3DCommandOpcode = 0, \ 5103 .CommandSubType = 3, \ 5104 .CommandType = 3 5105 5106struct GEN11_3DSTATE_PS { 5107 uint32_t DWordLength; 5108 uint32_t _3DCommandSubOpcode; 5109 uint32_t _3DCommandOpcode; 5110 uint32_t CommandSubType; 5111 uint32_t CommandType; 5112 uint64_t KernelStartPointer0; 5113 bool SoftwareExceptionEnable; 5114 bool MaskStackExceptionEnable; 5115 bool IllegalOpcodeExceptionEnable; 5116 uint32_t RoundingMode; 5117#define RTNE 0 5118#define RU 1 5119#define RD 2 5120#define RTZ 3 5121 uint32_t FloatingPointMode; 5122#define IEEE754 0 5123#define Alternate 1 5124 uint32_t ThreadDispatchPriority; 5125#define High 1 5126 uint32_t BindingTableEntryCount; 5127 uint32_t SinglePrecisionDenormalMode; 5128#define FlushedtoZero 0 5129#define Retained 1 5130 uint32_t SamplerCount; 5131#define NoSamplers 0 5132#define _14Samplers 1 5133#define _58Samplers 2 5134#define _912Samplers 3 5135#define _1316Samplers 4 5136 bool VectorMaskEnable; 5137 bool SingleProgramFlow; 5138 uint32_t PerThreadScratchSpace; 5139 __gen_address_type ScratchSpaceBasePointer; 5140 bool _8PixelDispatchEnable; 5141 bool _16PixelDispatchEnable; 5142 bool _32PixelDispatchEnable; 5143 uint32_t PositionXYOffsetSelect; 5144#define POSOFFSET_NONE 0 5145#define POSOFFSET_CENTROID 2 5146#define POSOFFSET_SAMPLE 3 5147 uint32_t RenderTargetResolveType; 5148#define RESOLVE_DISABLED 0 5149#define RESOLVE_PARTIAL 1 5150#define FAST_CLEAR_0 2 5151#define RESOLVE_FULL 3 5152 bool RenderTargetFastClearEnable; 5153 bool PushConstantEnable; 5154 uint32_t MaximumNumberofThreadsPerPSD; 5155 uint32_t DispatchGRFStartRegisterForConstantSetupData2; 5156 uint32_t DispatchGRFStartRegisterForConstantSetupData1; 5157 uint32_t DispatchGRFStartRegisterForConstantSetupData0; 5158 uint64_t KernelStartPointer1; 5159 uint64_t KernelStartPointer2; 5160}; 5161 5162static inline void 5163GEN11_3DSTATE_PS_pack(__attribute__((unused)) __gen_user_data *data, 5164 __attribute__((unused)) void * restrict dst, 5165 __attribute__((unused)) const struct GEN11_3DSTATE_PS * restrict values) 5166{ 5167 uint32_t * restrict dw = (uint32_t * restrict) dst; 5168 5169 dw[0] = 5170 __gen_uint(values->DWordLength, 0, 7) | 5171 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5172 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5173 __gen_uint(values->CommandSubType, 27, 28) | 5174 __gen_uint(values->CommandType, 29, 31); 5175 5176 const uint64_t v1 = 5177 __gen_offset(values->KernelStartPointer0, 6, 63); 5178 dw[1] = v1; 5179 dw[2] = v1 >> 32; 5180 5181 dw[3] = 5182 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 5183 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 5184 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 5185 __gen_uint(values->RoundingMode, 14, 15) | 5186 __gen_uint(values->FloatingPointMode, 16, 16) | 5187 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 5188 __gen_uint(values->BindingTableEntryCount, 18, 25) | 5189 __gen_uint(values->SinglePrecisionDenormalMode, 26, 26) | 5190 __gen_uint(values->SamplerCount, 27, 29) | 5191 __gen_uint(values->VectorMaskEnable, 30, 30) | 5192 __gen_uint(values->SingleProgramFlow, 31, 31); 5193 5194 const uint64_t v4 = 5195 __gen_uint(values->PerThreadScratchSpace, 0, 3); 5196 const uint64_t v4_address = 5197 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 5198 dw[4] = v4_address; 5199 dw[5] = (v4_address >> 32) | (v4 >> 32); 5200 5201 dw[6] = 5202 __gen_uint(values->_8PixelDispatchEnable, 0, 0) | 5203 __gen_uint(values->_16PixelDispatchEnable, 1, 1) | 5204 __gen_uint(values->_32PixelDispatchEnable, 2, 2) | 5205 __gen_uint(values->PositionXYOffsetSelect, 3, 4) | 5206 __gen_uint(values->RenderTargetResolveType, 6, 7) | 5207 __gen_uint(values->RenderTargetFastClearEnable, 8, 8) | 5208 __gen_uint(values->PushConstantEnable, 11, 11) | 5209 __gen_uint(values->MaximumNumberofThreadsPerPSD, 23, 31); 5210 5211 dw[7] = 5212 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) | 5213 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) | 5214 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22); 5215 5216 const uint64_t v8 = 5217 __gen_offset(values->KernelStartPointer1, 6, 63); 5218 dw[8] = v8; 5219 dw[9] = v8 >> 32; 5220 5221 const uint64_t v10 = 5222 __gen_offset(values->KernelStartPointer2, 6, 63); 5223 dw[10] = v10; 5224 dw[11] = v10 >> 32; 5225} 5226 5227#define GEN11_3DSTATE_PS_BLEND_length 2 5228#define GEN11_3DSTATE_PS_BLEND_length_bias 2 5229#define GEN11_3DSTATE_PS_BLEND_header \ 5230 .DWordLength = 0, \ 5231 ._3DCommandSubOpcode = 77, \ 5232 ._3DCommandOpcode = 0, \ 5233 .CommandSubType = 3, \ 5234 .CommandType = 3 5235 5236struct GEN11_3DSTATE_PS_BLEND { 5237 uint32_t DWordLength; 5238 uint32_t _3DCommandSubOpcode; 5239 uint32_t _3DCommandOpcode; 5240 uint32_t CommandSubType; 5241 uint32_t CommandType; 5242 bool IndependentAlphaBlendEnable; 5243 bool AlphaTestEnable; 5244 enum GEN11_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 5245 enum GEN11_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 5246 enum GEN11_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 5247 enum GEN11_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 5248 bool ColorBufferBlendEnable; 5249 bool HasWriteableRT; 5250 bool AlphaToCoverageEnable; 5251}; 5252 5253static inline void 5254GEN11_3DSTATE_PS_BLEND_pack(__attribute__((unused)) __gen_user_data *data, 5255 __attribute__((unused)) void * restrict dst, 5256 __attribute__((unused)) const struct GEN11_3DSTATE_PS_BLEND * restrict values) 5257{ 5258 uint32_t * restrict dw = (uint32_t * restrict) dst; 5259 5260 dw[0] = 5261 __gen_uint(values->DWordLength, 0, 7) | 5262 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5263 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5264 __gen_uint(values->CommandSubType, 27, 28) | 5265 __gen_uint(values->CommandType, 29, 31); 5266 5267 dw[1] = 5268 __gen_uint(values->IndependentAlphaBlendEnable, 7, 7) | 5269 __gen_uint(values->AlphaTestEnable, 8, 8) | 5270 __gen_uint(values->DestinationBlendFactor, 9, 13) | 5271 __gen_uint(values->SourceBlendFactor, 14, 18) | 5272 __gen_uint(values->DestinationAlphaBlendFactor, 19, 23) | 5273 __gen_uint(values->SourceAlphaBlendFactor, 24, 28) | 5274 __gen_uint(values->ColorBufferBlendEnable, 29, 29) | 5275 __gen_uint(values->HasWriteableRT, 30, 30) | 5276 __gen_uint(values->AlphaToCoverageEnable, 31, 31); 5277} 5278 5279#define GEN11_3DSTATE_PS_EXTRA_length 2 5280#define GEN11_3DSTATE_PS_EXTRA_length_bias 2 5281#define GEN11_3DSTATE_PS_EXTRA_header \ 5282 .DWordLength = 0, \ 5283 ._3DCommandSubOpcode = 79, \ 5284 ._3DCommandOpcode = 0, \ 5285 .CommandSubType = 3, \ 5286 .CommandType = 3 5287 5288struct GEN11_3DSTATE_PS_EXTRA { 5289 uint32_t DWordLength; 5290 uint32_t _3DCommandSubOpcode; 5291 uint32_t _3DCommandOpcode; 5292 uint32_t CommandSubType; 5293 uint32_t CommandType; 5294 uint32_t InputCoverageMaskState; 5295#define ICMS_NONE 0 5296#define ICMS_NORMAL 1 5297#define ICMS_INNER_CONSERVATIVE 2 5298#define ICMS_DEPTH_COVERAGE 3 5299 bool PixelShaderHasUAV; 5300 bool PixelShaderPullsBary; 5301 bool PixelShaderComputesStencil; 5302 bool PixelShaderIsPerSample; 5303 bool PixelShaderDisablesAlphaToCoverage; 5304 bool AttributeEnable; 5305 bool SimplePSHint; 5306 bool PixelShaderRequiresSubpixelSampleOffsets; 5307 bool PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients; 5308 bool PixelShaderRequiresPerspectiveBaryPlaneCoefficients; 5309 bool PixelShaderRequiresSourceDepthandorWPlaneCoefficients; 5310 bool PixelShaderUsesSourceW; 5311 bool PixelShaderUsesSourceDepth; 5312 bool ForceComputedDepth; 5313 uint32_t PixelShaderComputedDepthMode; 5314#define PSCDEPTH_OFF 0 5315#define PSCDEPTH_ON 1 5316#define PSCDEPTH_ON_GE 2 5317#define PSCDEPTH_ON_LE 3 5318 bool PixelShaderKillsPixel; 5319 bool oMaskPresenttoRenderTarget; 5320 bool PixelShaderDoesnotwritetoRT; 5321 bool PixelShaderValid; 5322}; 5323 5324static inline void 5325GEN11_3DSTATE_PS_EXTRA_pack(__attribute__((unused)) __gen_user_data *data, 5326 __attribute__((unused)) void * restrict dst, 5327 __attribute__((unused)) const struct GEN11_3DSTATE_PS_EXTRA * restrict values) 5328{ 5329 uint32_t * restrict dw = (uint32_t * restrict) dst; 5330 5331 dw[0] = 5332 __gen_uint(values->DWordLength, 0, 7) | 5333 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5334 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5335 __gen_uint(values->CommandSubType, 27, 28) | 5336 __gen_uint(values->CommandType, 29, 31); 5337 5338 dw[1] = 5339 __gen_uint(values->InputCoverageMaskState, 0, 1) | 5340 __gen_uint(values->PixelShaderHasUAV, 2, 2) | 5341 __gen_uint(values->PixelShaderPullsBary, 3, 3) | 5342 __gen_uint(values->PixelShaderComputesStencil, 5, 5) | 5343 __gen_uint(values->PixelShaderIsPerSample, 6, 6) | 5344 __gen_uint(values->PixelShaderDisablesAlphaToCoverage, 7, 7) | 5345 __gen_uint(values->AttributeEnable, 8, 8) | 5346 __gen_uint(values->SimplePSHint, 9, 9) | 5347 __gen_uint(values->PixelShaderRequiresSubpixelSampleOffsets, 18, 18) | 5348 __gen_uint(values->PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients, 19, 19) | 5349 __gen_uint(values->PixelShaderRequiresPerspectiveBaryPlaneCoefficients, 20, 20) | 5350 __gen_uint(values->PixelShaderRequiresSourceDepthandorWPlaneCoefficients, 21, 21) | 5351 __gen_uint(values->PixelShaderUsesSourceW, 23, 23) | 5352 __gen_uint(values->PixelShaderUsesSourceDepth, 24, 24) | 5353 __gen_uint(values->ForceComputedDepth, 25, 25) | 5354 __gen_uint(values->PixelShaderComputedDepthMode, 26, 27) | 5355 __gen_uint(values->PixelShaderKillsPixel, 28, 28) | 5356 __gen_uint(values->oMaskPresenttoRenderTarget, 29, 29) | 5357 __gen_uint(values->PixelShaderDoesnotwritetoRT, 30, 30) | 5358 __gen_uint(values->PixelShaderValid, 31, 31); 5359} 5360 5361#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2 5362#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 2 5363#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\ 5364 .DWordLength = 0, \ 5365 ._3DCommandSubOpcode = 20, \ 5366 ._3DCommandOpcode = 1, \ 5367 .CommandSubType = 3, \ 5368 .CommandType = 3 5369 5370struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_DS { 5371 uint32_t DWordLength; 5372 uint32_t _3DCommandSubOpcode; 5373 uint32_t _3DCommandOpcode; 5374 uint32_t CommandSubType; 5375 uint32_t CommandType; 5376 uint32_t ConstantBufferSize; 5377 uint32_t ConstantBufferOffset; 5378}; 5379 5380static inline void 5381GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__attribute__((unused)) __gen_user_data *data, 5382 __attribute__((unused)) void * restrict dst, 5383 __attribute__((unused)) const struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values) 5384{ 5385 uint32_t * restrict dw = (uint32_t * restrict) dst; 5386 5387 dw[0] = 5388 __gen_uint(values->DWordLength, 0, 7) | 5389 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5390 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5391 __gen_uint(values->CommandSubType, 27, 28) | 5392 __gen_uint(values->CommandType, 29, 31); 5393 5394 dw[1] = 5395 __gen_uint(values->ConstantBufferSize, 0, 5) | 5396 __gen_uint(values->ConstantBufferOffset, 16, 20); 5397} 5398 5399#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2 5400#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 2 5401#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\ 5402 .DWordLength = 0, \ 5403 ._3DCommandSubOpcode = 21, \ 5404 ._3DCommandOpcode = 1, \ 5405 .CommandSubType = 3, \ 5406 .CommandType = 3 5407 5408struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_GS { 5409 uint32_t DWordLength; 5410 uint32_t _3DCommandSubOpcode; 5411 uint32_t _3DCommandOpcode; 5412 uint32_t CommandSubType; 5413 uint32_t CommandType; 5414 uint32_t ConstantBufferSize; 5415 uint32_t ConstantBufferOffset; 5416}; 5417 5418static inline void 5419GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__attribute__((unused)) __gen_user_data *data, 5420 __attribute__((unused)) void * restrict dst, 5421 __attribute__((unused)) const struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values) 5422{ 5423 uint32_t * restrict dw = (uint32_t * restrict) dst; 5424 5425 dw[0] = 5426 __gen_uint(values->DWordLength, 0, 7) | 5427 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5428 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5429 __gen_uint(values->CommandSubType, 27, 28) | 5430 __gen_uint(values->CommandType, 29, 31); 5431 5432 dw[1] = 5433 __gen_uint(values->ConstantBufferSize, 0, 5) | 5434 __gen_uint(values->ConstantBufferOffset, 16, 20); 5435} 5436 5437#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2 5438#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 2 5439#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\ 5440 .DWordLength = 0, \ 5441 ._3DCommandSubOpcode = 19, \ 5442 ._3DCommandOpcode = 1, \ 5443 .CommandSubType = 3, \ 5444 .CommandType = 3 5445 5446struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_HS { 5447 uint32_t DWordLength; 5448 uint32_t _3DCommandSubOpcode; 5449 uint32_t _3DCommandOpcode; 5450 uint32_t CommandSubType; 5451 uint32_t CommandType; 5452 uint32_t ConstantBufferSize; 5453 uint32_t ConstantBufferOffset; 5454}; 5455 5456static inline void 5457GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__attribute__((unused)) __gen_user_data *data, 5458 __attribute__((unused)) void * restrict dst, 5459 __attribute__((unused)) const struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values) 5460{ 5461 uint32_t * restrict dw = (uint32_t * restrict) dst; 5462 5463 dw[0] = 5464 __gen_uint(values->DWordLength, 0, 7) | 5465 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5466 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5467 __gen_uint(values->CommandSubType, 27, 28) | 5468 __gen_uint(values->CommandType, 29, 31); 5469 5470 dw[1] = 5471 __gen_uint(values->ConstantBufferSize, 0, 5) | 5472 __gen_uint(values->ConstantBufferOffset, 16, 20); 5473} 5474 5475#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2 5476#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 2 5477#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\ 5478 .DWordLength = 0, \ 5479 ._3DCommandSubOpcode = 22, \ 5480 ._3DCommandOpcode = 1, \ 5481 .CommandSubType = 3, \ 5482 .CommandType = 3 5483 5484struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_PS { 5485 uint32_t DWordLength; 5486 uint32_t _3DCommandSubOpcode; 5487 uint32_t _3DCommandOpcode; 5488 uint32_t CommandSubType; 5489 uint32_t CommandType; 5490 uint32_t ConstantBufferSize; 5491 uint32_t ConstantBufferOffset; 5492}; 5493 5494static inline void 5495GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__attribute__((unused)) __gen_user_data *data, 5496 __attribute__((unused)) void * restrict dst, 5497 __attribute__((unused)) const struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values) 5498{ 5499 uint32_t * restrict dw = (uint32_t * restrict) dst; 5500 5501 dw[0] = 5502 __gen_uint(values->DWordLength, 0, 7) | 5503 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5504 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5505 __gen_uint(values->CommandSubType, 27, 28) | 5506 __gen_uint(values->CommandType, 29, 31); 5507 5508 dw[1] = 5509 __gen_uint(values->ConstantBufferSize, 0, 5) | 5510 __gen_uint(values->ConstantBufferOffset, 16, 20); 5511} 5512 5513#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2 5514#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 2 5515#define GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\ 5516 .DWordLength = 0, \ 5517 ._3DCommandSubOpcode = 18, \ 5518 ._3DCommandOpcode = 1, \ 5519 .CommandSubType = 3, \ 5520 .CommandType = 3 5521 5522struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_VS { 5523 uint32_t DWordLength; 5524 uint32_t _3DCommandSubOpcode; 5525 uint32_t _3DCommandOpcode; 5526 uint32_t CommandSubType; 5527 uint32_t CommandType; 5528 uint32_t ConstantBufferSize; 5529 uint32_t ConstantBufferOffset; 5530}; 5531 5532static inline void 5533GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__attribute__((unused)) __gen_user_data *data, 5534 __attribute__((unused)) void * restrict dst, 5535 __attribute__((unused)) const struct GEN11_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values) 5536{ 5537 uint32_t * restrict dw = (uint32_t * restrict) dst; 5538 5539 dw[0] = 5540 __gen_uint(values->DWordLength, 0, 7) | 5541 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5542 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5543 __gen_uint(values->CommandSubType, 27, 28) | 5544 __gen_uint(values->CommandType, 29, 31); 5545 5546 dw[1] = 5547 __gen_uint(values->ConstantBufferSize, 0, 5) | 5548 __gen_uint(values->ConstantBufferOffset, 16, 20); 5549} 5550 5551#define GEN11_3DSTATE_RASTER_length 5 5552#define GEN11_3DSTATE_RASTER_length_bias 2 5553#define GEN11_3DSTATE_RASTER_header \ 5554 .DWordLength = 3, \ 5555 ._3DCommandSubOpcode = 80, \ 5556 ._3DCommandOpcode = 0, \ 5557 .CommandSubType = 3, \ 5558 .CommandType = 3 5559 5560struct GEN11_3DSTATE_RASTER { 5561 uint32_t DWordLength; 5562 uint32_t _3DCommandSubOpcode; 5563 uint32_t _3DCommandOpcode; 5564 uint32_t CommandSubType; 5565 uint32_t CommandType; 5566 bool ViewportZNearClipTestEnable; 5567 bool ScissorRectangleEnable; 5568 bool AntialiasingEnable; 5569 uint32_t BackFaceFillMode; 5570#define FILL_MODE_SOLID 0 5571#define FILL_MODE_WIREFRAME 1 5572#define FILL_MODE_POINT 2 5573 uint32_t FrontFaceFillMode; 5574#define FILL_MODE_SOLID 0 5575#define FILL_MODE_WIREFRAME 1 5576#define FILL_MODE_POINT 2 5577 bool GlobalDepthOffsetEnablePoint; 5578 bool GlobalDepthOffsetEnableWireframe; 5579 bool GlobalDepthOffsetEnableSolid; 5580 uint32_t DXMultisampleRasterizationMode; 5581#define MSRASTMODE_OFF_PIXEL 0 5582#define MSRASTMODE_OFF_PATTERN 1 5583#define MSRASTMODE_ON_PIXEL 2 5584#define MSRASTMODE_ON_PATTERN 3 5585 bool DXMultisampleRasterizationEnable; 5586 bool SmoothPointEnable; 5587 uint32_t ForceMultisampling; 5588 uint32_t CullMode; 5589#define CULLMODE_BOTH 0 5590#define CULLMODE_NONE 1 5591#define CULLMODE_FRONT 2 5592#define CULLMODE_BACK 3 5593 uint32_t ForcedSampleCount; 5594#define FSC_NUMRASTSAMPLES_0 0 5595#define FSC_NUMRASTSAMPLES_1 1 5596#define FSC_NUMRASTSAMPLES_2 2 5597#define FSC_NUMRASTSAMPLES_4 3 5598#define FSC_NUMRASTSAMPLES_8 4 5599#define FSC_NUMRASTSAMPLES_16 5 5600 uint32_t FrontWinding; 5601#define Clockwise 0 5602#define CounterClockwise 1 5603 uint32_t APIMode; 5604#define DX9OGL 0 5605#define DX100 1 5606#define DX101 2 5607 bool ConservativeRasterizationEnable; 5608 bool ViewportZFarClipTestEnable; 5609 float GlobalDepthOffsetConstant; 5610 float GlobalDepthOffsetScale; 5611 float GlobalDepthOffsetClamp; 5612}; 5613 5614static inline void 5615GEN11_3DSTATE_RASTER_pack(__attribute__((unused)) __gen_user_data *data, 5616 __attribute__((unused)) void * restrict dst, 5617 __attribute__((unused)) const struct GEN11_3DSTATE_RASTER * restrict values) 5618{ 5619 uint32_t * restrict dw = (uint32_t * restrict) dst; 5620 5621 dw[0] = 5622 __gen_uint(values->DWordLength, 0, 7) | 5623 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5624 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5625 __gen_uint(values->CommandSubType, 27, 28) | 5626 __gen_uint(values->CommandType, 29, 31); 5627 5628 dw[1] = 5629 __gen_uint(values->ViewportZNearClipTestEnable, 0, 0) | 5630 __gen_uint(values->ScissorRectangleEnable, 1, 1) | 5631 __gen_uint(values->AntialiasingEnable, 2, 2) | 5632 __gen_uint(values->BackFaceFillMode, 3, 4) | 5633 __gen_uint(values->FrontFaceFillMode, 5, 6) | 5634 __gen_uint(values->GlobalDepthOffsetEnablePoint, 7, 7) | 5635 __gen_uint(values->GlobalDepthOffsetEnableWireframe, 8, 8) | 5636 __gen_uint(values->GlobalDepthOffsetEnableSolid, 9, 9) | 5637 __gen_uint(values->DXMultisampleRasterizationMode, 10, 11) | 5638 __gen_uint(values->DXMultisampleRasterizationEnable, 12, 12) | 5639 __gen_uint(values->SmoothPointEnable, 13, 13) | 5640 __gen_uint(values->ForceMultisampling, 14, 14) | 5641 __gen_uint(values->CullMode, 16, 17) | 5642 __gen_uint(values->ForcedSampleCount, 18, 20) | 5643 __gen_uint(values->FrontWinding, 21, 21) | 5644 __gen_uint(values->APIMode, 22, 23) | 5645 __gen_uint(values->ConservativeRasterizationEnable, 24, 24) | 5646 __gen_uint(values->ViewportZFarClipTestEnable, 26, 26); 5647 5648 dw[2] = 5649 __gen_float(values->GlobalDepthOffsetConstant); 5650 5651 dw[3] = 5652 __gen_float(values->GlobalDepthOffsetScale); 5653 5654 dw[4] = 5655 __gen_float(values->GlobalDepthOffsetClamp); 5656} 5657 5658#define GEN11_3DSTATE_RS_CONSTANT_POINTER_length 4 5659#define GEN11_3DSTATE_RS_CONSTANT_POINTER_length_bias 2 5660#define GEN11_3DSTATE_RS_CONSTANT_POINTER_header\ 5661 .DWordLength = 2, \ 5662 ._3DCommandSubOpcode = 84, \ 5663 ._3DCommandOpcode = 0, \ 5664 .CommandSubType = 3, \ 5665 .CommandType = 3 5666 5667struct GEN11_3DSTATE_RS_CONSTANT_POINTER { 5668 uint32_t DWordLength; 5669 uint32_t _3DCommandSubOpcode; 5670 uint32_t _3DCommandOpcode; 5671 uint32_t CommandSubType; 5672 uint32_t CommandType; 5673 uint32_t OperationLoadorStore; 5674#define RS_Store 0 5675#define RS_Load 1 5676 uint32_t ShaderSelect; 5677#define VS 0 5678#define PS 4 5679 __gen_address_type GlobalConstantBufferAddress; 5680 __gen_address_type GlobalConstantBufferAddressHigh; 5681}; 5682 5683static inline void 5684GEN11_3DSTATE_RS_CONSTANT_POINTER_pack(__attribute__((unused)) __gen_user_data *data, 5685 __attribute__((unused)) void * restrict dst, 5686 __attribute__((unused)) const struct GEN11_3DSTATE_RS_CONSTANT_POINTER * restrict values) 5687{ 5688 uint32_t * restrict dw = (uint32_t * restrict) dst; 5689 5690 dw[0] = 5691 __gen_uint(values->DWordLength, 0, 7) | 5692 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5693 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5694 __gen_uint(values->CommandSubType, 27, 28) | 5695 __gen_uint(values->CommandType, 29, 31); 5696 5697 dw[1] = 5698 __gen_uint(values->OperationLoadorStore, 12, 12) | 5699 __gen_uint(values->ShaderSelect, 28, 30); 5700 5701 dw[2] = __gen_combine_address(data, &dw[2], values->GlobalConstantBufferAddress, 0); 5702 5703 dw[3] = __gen_combine_address(data, &dw[3], values->GlobalConstantBufferAddressHigh, 0); 5704} 5705 5706#define GEN11_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 2 5707#define GEN11_3DSTATE_SAMPLER_PALETTE_LOAD0_header\ 5708 ._3DCommandSubOpcode = 2, \ 5709 ._3DCommandOpcode = 1, \ 5710 .CommandSubType = 3, \ 5711 .CommandType = 3 5712 5713struct GEN11_3DSTATE_SAMPLER_PALETTE_LOAD0 { 5714 uint32_t DWordLength; 5715 uint32_t _3DCommandSubOpcode; 5716 uint32_t _3DCommandOpcode; 5717 uint32_t CommandSubType; 5718 uint32_t CommandType; 5719 /* variable length fields follow */ 5720}; 5721 5722static inline void 5723GEN11_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__attribute__((unused)) __gen_user_data *data, 5724 __attribute__((unused)) void * restrict dst, 5725 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values) 5726{ 5727 uint32_t * restrict dw = (uint32_t * restrict) dst; 5728 5729 dw[0] = 5730 __gen_uint(values->DWordLength, 0, 7) | 5731 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5732 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5733 __gen_uint(values->CommandSubType, 27, 28) | 5734 __gen_uint(values->CommandType, 29, 31); 5735} 5736 5737#define GEN11_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 2 5738#define GEN11_3DSTATE_SAMPLER_PALETTE_LOAD1_header\ 5739 .DWordLength = 0, \ 5740 ._3DCommandSubOpcode = 12, \ 5741 ._3DCommandOpcode = 1, \ 5742 .CommandSubType = 3, \ 5743 .CommandType = 3 5744 5745struct GEN11_3DSTATE_SAMPLER_PALETTE_LOAD1 { 5746 uint32_t DWordLength; 5747 uint32_t _3DCommandSubOpcode; 5748 uint32_t _3DCommandOpcode; 5749 uint32_t CommandSubType; 5750 uint32_t CommandType; 5751 /* variable length fields follow */ 5752}; 5753 5754static inline void 5755GEN11_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__attribute__((unused)) __gen_user_data *data, 5756 __attribute__((unused)) void * restrict dst, 5757 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values) 5758{ 5759 uint32_t * restrict dw = (uint32_t * restrict) dst; 5760 5761 dw[0] = 5762 __gen_uint(values->DWordLength, 0, 7) | 5763 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5764 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5765 __gen_uint(values->CommandSubType, 27, 28) | 5766 __gen_uint(values->CommandType, 29, 31); 5767} 5768 5769#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2 5770#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 2 5771#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\ 5772 .DWordLength = 0, \ 5773 ._3DCommandSubOpcode = 45, \ 5774 ._3DCommandOpcode = 0, \ 5775 .CommandSubType = 3, \ 5776 .CommandType = 3 5777 5778struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_DS { 5779 uint32_t DWordLength; 5780 uint32_t _3DCommandSubOpcode; 5781 uint32_t _3DCommandOpcode; 5782 uint32_t CommandSubType; 5783 uint32_t CommandType; 5784 uint64_t PointertoDSSamplerState; 5785}; 5786 5787static inline void 5788GEN11_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 5789 __attribute__((unused)) void * restrict dst, 5790 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values) 5791{ 5792 uint32_t * restrict dw = (uint32_t * restrict) dst; 5793 5794 dw[0] = 5795 __gen_uint(values->DWordLength, 0, 7) | 5796 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5797 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5798 __gen_uint(values->CommandSubType, 27, 28) | 5799 __gen_uint(values->CommandType, 29, 31); 5800 5801 dw[1] = 5802 __gen_offset(values->PointertoDSSamplerState, 5, 31); 5803} 5804 5805#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2 5806#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 2 5807#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\ 5808 .DWordLength = 0, \ 5809 ._3DCommandSubOpcode = 46, \ 5810 ._3DCommandOpcode = 0, \ 5811 .CommandSubType = 3, \ 5812 .CommandType = 3 5813 5814struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_GS { 5815 uint32_t DWordLength; 5816 uint32_t _3DCommandSubOpcode; 5817 uint32_t _3DCommandOpcode; 5818 uint32_t CommandSubType; 5819 uint32_t CommandType; 5820 uint64_t PointertoGSSamplerState; 5821}; 5822 5823static inline void 5824GEN11_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 5825 __attribute__((unused)) void * restrict dst, 5826 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values) 5827{ 5828 uint32_t * restrict dw = (uint32_t * restrict) dst; 5829 5830 dw[0] = 5831 __gen_uint(values->DWordLength, 0, 7) | 5832 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5833 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5834 __gen_uint(values->CommandSubType, 27, 28) | 5835 __gen_uint(values->CommandType, 29, 31); 5836 5837 dw[1] = 5838 __gen_offset(values->PointertoGSSamplerState, 5, 31); 5839} 5840 5841#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2 5842#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 2 5843#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\ 5844 .DWordLength = 0, \ 5845 ._3DCommandSubOpcode = 44, \ 5846 ._3DCommandOpcode = 0, \ 5847 .CommandSubType = 3, \ 5848 .CommandType = 3 5849 5850struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_HS { 5851 uint32_t DWordLength; 5852 uint32_t _3DCommandSubOpcode; 5853 uint32_t _3DCommandOpcode; 5854 uint32_t CommandSubType; 5855 uint32_t CommandType; 5856 uint64_t PointertoHSSamplerState; 5857}; 5858 5859static inline void 5860GEN11_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 5861 __attribute__((unused)) void * restrict dst, 5862 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values) 5863{ 5864 uint32_t * restrict dw = (uint32_t * restrict) dst; 5865 5866 dw[0] = 5867 __gen_uint(values->DWordLength, 0, 7) | 5868 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5869 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5870 __gen_uint(values->CommandSubType, 27, 28) | 5871 __gen_uint(values->CommandType, 29, 31); 5872 5873 dw[1] = 5874 __gen_offset(values->PointertoHSSamplerState, 5, 31); 5875} 5876 5877#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2 5878#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 2 5879#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\ 5880 .DWordLength = 0, \ 5881 ._3DCommandSubOpcode = 47, \ 5882 ._3DCommandOpcode = 0, \ 5883 .CommandSubType = 3, \ 5884 .CommandType = 3 5885 5886struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_PS { 5887 uint32_t DWordLength; 5888 uint32_t _3DCommandSubOpcode; 5889 uint32_t _3DCommandOpcode; 5890 uint32_t CommandSubType; 5891 uint32_t CommandType; 5892 uint64_t PointertoPSSamplerState; 5893}; 5894 5895static inline void 5896GEN11_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 5897 __attribute__((unused)) void * restrict dst, 5898 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values) 5899{ 5900 uint32_t * restrict dw = (uint32_t * restrict) dst; 5901 5902 dw[0] = 5903 __gen_uint(values->DWordLength, 0, 7) | 5904 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5905 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5906 __gen_uint(values->CommandSubType, 27, 28) | 5907 __gen_uint(values->CommandType, 29, 31); 5908 5909 dw[1] = 5910 __gen_offset(values->PointertoPSSamplerState, 5, 31); 5911} 5912 5913#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2 5914#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 2 5915#define GEN11_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\ 5916 .DWordLength = 0, \ 5917 ._3DCommandSubOpcode = 43, \ 5918 ._3DCommandOpcode = 0, \ 5919 .CommandSubType = 3, \ 5920 .CommandType = 3 5921 5922struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_VS { 5923 uint32_t DWordLength; 5924 uint32_t _3DCommandSubOpcode; 5925 uint32_t _3DCommandOpcode; 5926 uint32_t CommandSubType; 5927 uint32_t CommandType; 5928 uint64_t PointertoVSSamplerState; 5929}; 5930 5931static inline void 5932GEN11_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 5933 __attribute__((unused)) void * restrict dst, 5934 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values) 5935{ 5936 uint32_t * restrict dw = (uint32_t * restrict) dst; 5937 5938 dw[0] = 5939 __gen_uint(values->DWordLength, 0, 7) | 5940 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5941 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5942 __gen_uint(values->CommandSubType, 27, 28) | 5943 __gen_uint(values->CommandType, 29, 31); 5944 5945 dw[1] = 5946 __gen_offset(values->PointertoVSSamplerState, 5, 31); 5947} 5948 5949#define GEN11_3DSTATE_SAMPLE_MASK_length 2 5950#define GEN11_3DSTATE_SAMPLE_MASK_length_bias 2 5951#define GEN11_3DSTATE_SAMPLE_MASK_header \ 5952 .DWordLength = 0, \ 5953 ._3DCommandSubOpcode = 24, \ 5954 ._3DCommandOpcode = 0, \ 5955 .CommandSubType = 3, \ 5956 .CommandType = 3 5957 5958struct GEN11_3DSTATE_SAMPLE_MASK { 5959 uint32_t DWordLength; 5960 uint32_t _3DCommandSubOpcode; 5961 uint32_t _3DCommandOpcode; 5962 uint32_t CommandSubType; 5963 uint32_t CommandType; 5964 uint32_t SampleMask; 5965}; 5966 5967static inline void 5968GEN11_3DSTATE_SAMPLE_MASK_pack(__attribute__((unused)) __gen_user_data *data, 5969 __attribute__((unused)) void * restrict dst, 5970 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLE_MASK * restrict values) 5971{ 5972 uint32_t * restrict dw = (uint32_t * restrict) dst; 5973 5974 dw[0] = 5975 __gen_uint(values->DWordLength, 0, 7) | 5976 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5977 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5978 __gen_uint(values->CommandSubType, 27, 28) | 5979 __gen_uint(values->CommandType, 29, 31); 5980 5981 dw[1] = 5982 __gen_uint(values->SampleMask, 0, 15); 5983} 5984 5985#define GEN11_3DSTATE_SAMPLE_PATTERN_length 9 5986#define GEN11_3DSTATE_SAMPLE_PATTERN_length_bias 2 5987#define GEN11_3DSTATE_SAMPLE_PATTERN_header \ 5988 .DWordLength = 7, \ 5989 ._3DCommandSubOpcode = 28, \ 5990 ._3DCommandOpcode = 1, \ 5991 .CommandSubType = 3, \ 5992 .CommandType = 3 5993 5994struct GEN11_3DSTATE_SAMPLE_PATTERN { 5995 uint32_t DWordLength; 5996 uint32_t _3DCommandSubOpcode; 5997 uint32_t _3DCommandOpcode; 5998 uint32_t CommandSubType; 5999 uint32_t CommandType; 6000 float _16xSample0YOffset; 6001 float _16xSample0XOffset; 6002 float _16xSample1YOffset; 6003 float _16xSample1XOffset; 6004 float _16xSample2YOffset; 6005 float _16xSample2XOffset; 6006 float _16xSample3YOffset; 6007 float _16xSample3XOffset; 6008 float _16xSample4YOffset; 6009 float _16xSample4XOffset; 6010 float _16xSample5YOffset; 6011 float _16xSample5XOffset; 6012 float _16xSample6YOffset; 6013 float _16xSample6XOffset; 6014 float _16xSample7YOffset; 6015 float _16xSample7XOffset; 6016 float _16xSample8YOffset; 6017 float _16xSample8XOffset; 6018 float _16xSample9YOffset; 6019 float _16xSample9XOffset; 6020 float _16xSample10YOffset; 6021 float _16xSample10XOffset; 6022 float _16xSample11YOffset; 6023 float _16xSample11XOffset; 6024 float _16xSample12YOffset; 6025 float _16xSample12XOffset; 6026 float _16xSample13YOffset; 6027 float _16xSample13XOffset; 6028 float _16xSample14YOffset; 6029 float _16xSample14XOffset; 6030 float _16xSample15YOffset; 6031 float _16xSample15XOffset; 6032 float _8xSample4YOffset; 6033 float _8xSample4XOffset; 6034 float _8xSample5YOffset; 6035 float _8xSample5XOffset; 6036 float _8xSample6YOffset; 6037 float _8xSample6XOffset; 6038 float _8xSample7YOffset; 6039 float _8xSample7XOffset; 6040 float _8xSample0YOffset; 6041 float _8xSample0XOffset; 6042 float _8xSample1YOffset; 6043 float _8xSample1XOffset; 6044 float _8xSample2YOffset; 6045 float _8xSample2XOffset; 6046 float _8xSample3YOffset; 6047 float _8xSample3XOffset; 6048 float _4xSample0YOffset; 6049 float _4xSample0XOffset; 6050 float _4xSample1YOffset; 6051 float _4xSample1XOffset; 6052 float _4xSample2YOffset; 6053 float _4xSample2XOffset; 6054 float _4xSample3YOffset; 6055 float _4xSample3XOffset; 6056 float _2xSample0YOffset; 6057 float _2xSample0XOffset; 6058 float _2xSample1YOffset; 6059 float _2xSample1XOffset; 6060 float _1xSample0YOffset; 6061 float _1xSample0XOffset; 6062}; 6063 6064static inline void 6065GEN11_3DSTATE_SAMPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 6066 __attribute__((unused)) void * restrict dst, 6067 __attribute__((unused)) const struct GEN11_3DSTATE_SAMPLE_PATTERN * restrict values) 6068{ 6069 uint32_t * restrict dw = (uint32_t * restrict) dst; 6070 6071 dw[0] = 6072 __gen_uint(values->DWordLength, 0, 7) | 6073 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6074 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6075 __gen_uint(values->CommandSubType, 27, 28) | 6076 __gen_uint(values->CommandType, 29, 31); 6077 6078 dw[1] = 6079 __gen_ufixed(values->_16xSample0YOffset, 0, 3, 4) | 6080 __gen_ufixed(values->_16xSample0XOffset, 4, 7, 4) | 6081 __gen_ufixed(values->_16xSample1YOffset, 8, 11, 4) | 6082 __gen_ufixed(values->_16xSample1XOffset, 12, 15, 4) | 6083 __gen_ufixed(values->_16xSample2YOffset, 16, 19, 4) | 6084 __gen_ufixed(values->_16xSample2XOffset, 20, 23, 4) | 6085 __gen_ufixed(values->_16xSample3YOffset, 24, 27, 4) | 6086 __gen_ufixed(values->_16xSample3XOffset, 28, 31, 4); 6087 6088 dw[2] = 6089 __gen_ufixed(values->_16xSample4YOffset, 0, 3, 4) | 6090 __gen_ufixed(values->_16xSample4XOffset, 4, 7, 4) | 6091 __gen_ufixed(values->_16xSample5YOffset, 8, 11, 4) | 6092 __gen_ufixed(values->_16xSample5XOffset, 12, 15, 4) | 6093 __gen_ufixed(values->_16xSample6YOffset, 16, 19, 4) | 6094 __gen_ufixed(values->_16xSample6XOffset, 20, 23, 4) | 6095 __gen_ufixed(values->_16xSample7YOffset, 24, 27, 4) | 6096 __gen_ufixed(values->_16xSample7XOffset, 28, 31, 4); 6097 6098 dw[3] = 6099 __gen_ufixed(values->_16xSample8YOffset, 0, 3, 4) | 6100 __gen_ufixed(values->_16xSample8XOffset, 4, 7, 4) | 6101 __gen_ufixed(values->_16xSample9YOffset, 8, 11, 4) | 6102 __gen_ufixed(values->_16xSample9XOffset, 12, 15, 4) | 6103 __gen_ufixed(values->_16xSample10YOffset, 16, 19, 4) | 6104 __gen_ufixed(values->_16xSample10XOffset, 20, 23, 4) | 6105 __gen_ufixed(values->_16xSample11YOffset, 24, 27, 4) | 6106 __gen_ufixed(values->_16xSample11XOffset, 28, 31, 4); 6107 6108 dw[4] = 6109 __gen_ufixed(values->_16xSample12YOffset, 0, 3, 4) | 6110 __gen_ufixed(values->_16xSample12XOffset, 4, 7, 4) | 6111 __gen_ufixed(values->_16xSample13YOffset, 8, 11, 4) | 6112 __gen_ufixed(values->_16xSample13XOffset, 12, 15, 4) | 6113 __gen_ufixed(values->_16xSample14YOffset, 16, 19, 4) | 6114 __gen_ufixed(values->_16xSample14XOffset, 20, 23, 4) | 6115 __gen_ufixed(values->_16xSample15YOffset, 24, 27, 4) | 6116 __gen_ufixed(values->_16xSample15XOffset, 28, 31, 4); 6117 6118 dw[5] = 6119 __gen_ufixed(values->_8xSample4YOffset, 0, 3, 4) | 6120 __gen_ufixed(values->_8xSample4XOffset, 4, 7, 4) | 6121 __gen_ufixed(values->_8xSample5YOffset, 8, 11, 4) | 6122 __gen_ufixed(values->_8xSample5XOffset, 12, 15, 4) | 6123 __gen_ufixed(values->_8xSample6YOffset, 16, 19, 4) | 6124 __gen_ufixed(values->_8xSample6XOffset, 20, 23, 4) | 6125 __gen_ufixed(values->_8xSample7YOffset, 24, 27, 4) | 6126 __gen_ufixed(values->_8xSample7XOffset, 28, 31, 4); 6127 6128 dw[6] = 6129 __gen_ufixed(values->_8xSample0YOffset, 0, 3, 4) | 6130 __gen_ufixed(values->_8xSample0XOffset, 4, 7, 4) | 6131 __gen_ufixed(values->_8xSample1YOffset, 8, 11, 4) | 6132 __gen_ufixed(values->_8xSample1XOffset, 12, 15, 4) | 6133 __gen_ufixed(values->_8xSample2YOffset, 16, 19, 4) | 6134 __gen_ufixed(values->_8xSample2XOffset, 20, 23, 4) | 6135 __gen_ufixed(values->_8xSample3YOffset, 24, 27, 4) | 6136 __gen_ufixed(values->_8xSample3XOffset, 28, 31, 4); 6137 6138 dw[7] = 6139 __gen_ufixed(values->_4xSample0YOffset, 0, 3, 4) | 6140 __gen_ufixed(values->_4xSample0XOffset, 4, 7, 4) | 6141 __gen_ufixed(values->_4xSample1YOffset, 8, 11, 4) | 6142 __gen_ufixed(values->_4xSample1XOffset, 12, 15, 4) | 6143 __gen_ufixed(values->_4xSample2YOffset, 16, 19, 4) | 6144 __gen_ufixed(values->_4xSample2XOffset, 20, 23, 4) | 6145 __gen_ufixed(values->_4xSample3YOffset, 24, 27, 4) | 6146 __gen_ufixed(values->_4xSample3XOffset, 28, 31, 4); 6147 6148 dw[8] = 6149 __gen_ufixed(values->_2xSample0YOffset, 0, 3, 4) | 6150 __gen_ufixed(values->_2xSample0XOffset, 4, 7, 4) | 6151 __gen_ufixed(values->_2xSample1YOffset, 8, 11, 4) | 6152 __gen_ufixed(values->_2xSample1XOffset, 12, 15, 4) | 6153 __gen_ufixed(values->_1xSample0YOffset, 16, 19, 4) | 6154 __gen_ufixed(values->_1xSample0XOffset, 20, 23, 4); 6155} 6156 6157#define GEN11_3DSTATE_SBE_length 6 6158#define GEN11_3DSTATE_SBE_length_bias 2 6159#define GEN11_3DSTATE_SBE_header \ 6160 .DWordLength = 4, \ 6161 ._3DCommandSubOpcode = 31, \ 6162 ._3DCommandOpcode = 0, \ 6163 .CommandSubType = 3, \ 6164 .CommandType = 3 6165 6166struct GEN11_3DSTATE_SBE { 6167 uint32_t DWordLength; 6168 uint32_t _3DCommandSubOpcode; 6169 uint32_t _3DCommandOpcode; 6170 uint32_t CommandSubType; 6171 uint32_t CommandType; 6172 uint32_t PrimitiveIDOverrideAttributeSelect; 6173 uint32_t VertexURBEntryReadOffset; 6174 uint32_t VertexURBEntryReadLength; 6175 bool PrimitiveIDOverrideComponentX; 6176 bool PrimitiveIDOverrideComponentY; 6177 bool PrimitiveIDOverrideComponentZ; 6178 bool PrimitiveIDOverrideComponentW; 6179 uint32_t PointSpriteTextureCoordinateOrigin; 6180#define UPPERLEFT 0 6181#define LOWERLEFT 1 6182 bool AttributeSwizzleEnable; 6183 uint32_t NumberofSFOutputAttributes; 6184 bool ForceVertexURBEntryReadOffset; 6185 bool ForceVertexURBEntryReadLength; 6186 uint32_t PointSpriteTextureCoordinateEnable; 6187 uint32_t ConstantInterpolationEnable; 6188 uint32_t AttributeActiveComponentFormat[32]; 6189#define ACTIVE_COMPONENT_DISABLED 0 6190#define ACTIVE_COMPONENT_XY 1 6191#define ACTIVE_COMPONENT_XYZ 2 6192#define ACTIVE_COMPONENT_XYZW 3 6193}; 6194 6195static inline void 6196GEN11_3DSTATE_SBE_pack(__attribute__((unused)) __gen_user_data *data, 6197 __attribute__((unused)) void * restrict dst, 6198 __attribute__((unused)) const struct GEN11_3DSTATE_SBE * restrict values) 6199{ 6200 uint32_t * restrict dw = (uint32_t * restrict) dst; 6201 6202 dw[0] = 6203 __gen_uint(values->DWordLength, 0, 7) | 6204 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6205 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6206 __gen_uint(values->CommandSubType, 27, 28) | 6207 __gen_uint(values->CommandType, 29, 31); 6208 6209 dw[1] = 6210 __gen_uint(values->PrimitiveIDOverrideAttributeSelect, 0, 4) | 6211 __gen_uint(values->VertexURBEntryReadOffset, 5, 10) | 6212 __gen_uint(values->VertexURBEntryReadLength, 11, 15) | 6213 __gen_uint(values->PrimitiveIDOverrideComponentX, 16, 16) | 6214 __gen_uint(values->PrimitiveIDOverrideComponentY, 17, 17) | 6215 __gen_uint(values->PrimitiveIDOverrideComponentZ, 18, 18) | 6216 __gen_uint(values->PrimitiveIDOverrideComponentW, 19, 19) | 6217 __gen_uint(values->PointSpriteTextureCoordinateOrigin, 20, 20) | 6218 __gen_uint(values->AttributeSwizzleEnable, 21, 21) | 6219 __gen_uint(values->NumberofSFOutputAttributes, 22, 27) | 6220 __gen_uint(values->ForceVertexURBEntryReadOffset, 28, 28) | 6221 __gen_uint(values->ForceVertexURBEntryReadLength, 29, 29); 6222 6223 dw[2] = 6224 __gen_uint(values->PointSpriteTextureCoordinateEnable, 0, 31); 6225 6226 dw[3] = 6227 __gen_uint(values->ConstantInterpolationEnable, 0, 31); 6228 6229 dw[4] = 6230 __gen_uint(values->AttributeActiveComponentFormat[0], 0, 1) | 6231 __gen_uint(values->AttributeActiveComponentFormat[1], 2, 3) | 6232 __gen_uint(values->AttributeActiveComponentFormat[2], 4, 5) | 6233 __gen_uint(values->AttributeActiveComponentFormat[3], 6, 7) | 6234 __gen_uint(values->AttributeActiveComponentFormat[4], 8, 9) | 6235 __gen_uint(values->AttributeActiveComponentFormat[5], 10, 11) | 6236 __gen_uint(values->AttributeActiveComponentFormat[6], 12, 13) | 6237 __gen_uint(values->AttributeActiveComponentFormat[7], 14, 15) | 6238 __gen_uint(values->AttributeActiveComponentFormat[8], 16, 17) | 6239 __gen_uint(values->AttributeActiveComponentFormat[9], 18, 19) | 6240 __gen_uint(values->AttributeActiveComponentFormat[10], 20, 21) | 6241 __gen_uint(values->AttributeActiveComponentFormat[11], 22, 23) | 6242 __gen_uint(values->AttributeActiveComponentFormat[12], 24, 25) | 6243 __gen_uint(values->AttributeActiveComponentFormat[13], 26, 27) | 6244 __gen_uint(values->AttributeActiveComponentFormat[14], 28, 29) | 6245 __gen_uint(values->AttributeActiveComponentFormat[15], 30, 31); 6246 6247 dw[5] = 6248 __gen_uint(values->AttributeActiveComponentFormat[16], 0, 1) | 6249 __gen_uint(values->AttributeActiveComponentFormat[17], 2, 3) | 6250 __gen_uint(values->AttributeActiveComponentFormat[18], 4, 5) | 6251 __gen_uint(values->AttributeActiveComponentFormat[19], 6, 7) | 6252 __gen_uint(values->AttributeActiveComponentFormat[20], 8, 9) | 6253 __gen_uint(values->AttributeActiveComponentFormat[21], 10, 11) | 6254 __gen_uint(values->AttributeActiveComponentFormat[22], 12, 13) | 6255 __gen_uint(values->AttributeActiveComponentFormat[23], 14, 15) | 6256 __gen_uint(values->AttributeActiveComponentFormat[24], 16, 17) | 6257 __gen_uint(values->AttributeActiveComponentFormat[25], 18, 19) | 6258 __gen_uint(values->AttributeActiveComponentFormat[26], 20, 21) | 6259 __gen_uint(values->AttributeActiveComponentFormat[27], 22, 23) | 6260 __gen_uint(values->AttributeActiveComponentFormat[28], 24, 25) | 6261 __gen_uint(values->AttributeActiveComponentFormat[29], 26, 27) | 6262 __gen_uint(values->AttributeActiveComponentFormat[30], 28, 29) | 6263 __gen_uint(values->AttributeActiveComponentFormat[31], 30, 31); 6264} 6265 6266#define GEN11_3DSTATE_SBE_SWIZ_length 11 6267#define GEN11_3DSTATE_SBE_SWIZ_length_bias 2 6268#define GEN11_3DSTATE_SBE_SWIZ_header \ 6269 .DWordLength = 9, \ 6270 ._3DCommandSubOpcode = 81, \ 6271 ._3DCommandOpcode = 0, \ 6272 .CommandSubType = 3, \ 6273 .CommandType = 3 6274 6275struct GEN11_3DSTATE_SBE_SWIZ { 6276 uint32_t DWordLength; 6277 uint32_t _3DCommandSubOpcode; 6278 uint32_t _3DCommandOpcode; 6279 uint32_t CommandSubType; 6280 uint32_t CommandType; 6281 struct GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16]; 6282 uint32_t AttributeWrapShortestEnables[16]; 6283}; 6284 6285static inline void 6286GEN11_3DSTATE_SBE_SWIZ_pack(__attribute__((unused)) __gen_user_data *data, 6287 __attribute__((unused)) void * restrict dst, 6288 __attribute__((unused)) const struct GEN11_3DSTATE_SBE_SWIZ * restrict values) 6289{ 6290 uint32_t * restrict dw = (uint32_t * restrict) dst; 6291 6292 dw[0] = 6293 __gen_uint(values->DWordLength, 0, 7) | 6294 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6295 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6296 __gen_uint(values->CommandSubType, 27, 28) | 6297 __gen_uint(values->CommandType, 29, 31); 6298 6299 uint32_t v1_0; 6300 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v1_0, &values->Attribute[0]); 6301 6302 uint32_t v1_1; 6303 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v1_1, &values->Attribute[1]); 6304 6305 dw[1] = 6306 __gen_uint(v1_0, 0, 15) | 6307 __gen_uint(v1_1, 16, 31); 6308 6309 uint32_t v2_0; 6310 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_0, &values->Attribute[2]); 6311 6312 uint32_t v2_1; 6313 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_1, &values->Attribute[3]); 6314 6315 dw[2] = 6316 __gen_uint(v2_0, 0, 15) | 6317 __gen_uint(v2_1, 16, 31); 6318 6319 uint32_t v3_0; 6320 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_0, &values->Attribute[4]); 6321 6322 uint32_t v3_1; 6323 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_1, &values->Attribute[5]); 6324 6325 dw[3] = 6326 __gen_uint(v3_0, 0, 15) | 6327 __gen_uint(v3_1, 16, 31); 6328 6329 uint32_t v4_0; 6330 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_0, &values->Attribute[6]); 6331 6332 uint32_t v4_1; 6333 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_1, &values->Attribute[7]); 6334 6335 dw[4] = 6336 __gen_uint(v4_0, 0, 15) | 6337 __gen_uint(v4_1, 16, 31); 6338 6339 uint32_t v5_0; 6340 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_0, &values->Attribute[8]); 6341 6342 uint32_t v5_1; 6343 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_1, &values->Attribute[9]); 6344 6345 dw[5] = 6346 __gen_uint(v5_0, 0, 15) | 6347 __gen_uint(v5_1, 16, 31); 6348 6349 uint32_t v6_0; 6350 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_0, &values->Attribute[10]); 6351 6352 uint32_t v6_1; 6353 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_1, &values->Attribute[11]); 6354 6355 dw[6] = 6356 __gen_uint(v6_0, 0, 15) | 6357 __gen_uint(v6_1, 16, 31); 6358 6359 uint32_t v7_0; 6360 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_0, &values->Attribute[12]); 6361 6362 uint32_t v7_1; 6363 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_1, &values->Attribute[13]); 6364 6365 dw[7] = 6366 __gen_uint(v7_0, 0, 15) | 6367 __gen_uint(v7_1, 16, 31); 6368 6369 uint32_t v8_0; 6370 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_0, &values->Attribute[14]); 6371 6372 uint32_t v8_1; 6373 GEN11_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_1, &values->Attribute[15]); 6374 6375 dw[8] = 6376 __gen_uint(v8_0, 0, 15) | 6377 __gen_uint(v8_1, 16, 31); 6378 6379 dw[9] = 6380 __gen_uint(values->AttributeWrapShortestEnables[0], 0, 3) | 6381 __gen_uint(values->AttributeWrapShortestEnables[1], 4, 7) | 6382 __gen_uint(values->AttributeWrapShortestEnables[2], 8, 11) | 6383 __gen_uint(values->AttributeWrapShortestEnables[3], 12, 15) | 6384 __gen_uint(values->AttributeWrapShortestEnables[4], 16, 19) | 6385 __gen_uint(values->AttributeWrapShortestEnables[5], 20, 23) | 6386 __gen_uint(values->AttributeWrapShortestEnables[6], 24, 27) | 6387 __gen_uint(values->AttributeWrapShortestEnables[7], 28, 31); 6388 6389 dw[10] = 6390 __gen_uint(values->AttributeWrapShortestEnables[8], 0, 3) | 6391 __gen_uint(values->AttributeWrapShortestEnables[9], 4, 7) | 6392 __gen_uint(values->AttributeWrapShortestEnables[10], 8, 11) | 6393 __gen_uint(values->AttributeWrapShortestEnables[11], 12, 15) | 6394 __gen_uint(values->AttributeWrapShortestEnables[12], 16, 19) | 6395 __gen_uint(values->AttributeWrapShortestEnables[13], 20, 23) | 6396 __gen_uint(values->AttributeWrapShortestEnables[14], 24, 27) | 6397 __gen_uint(values->AttributeWrapShortestEnables[15], 28, 31); 6398} 6399 6400#define GEN11_3DSTATE_SCISSOR_STATE_POINTERS_length 2 6401#define GEN11_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 2 6402#define GEN11_3DSTATE_SCISSOR_STATE_POINTERS_header\ 6403 .DWordLength = 0, \ 6404 ._3DCommandSubOpcode = 15, \ 6405 ._3DCommandOpcode = 0, \ 6406 .CommandSubType = 3, \ 6407 .CommandType = 3 6408 6409struct GEN11_3DSTATE_SCISSOR_STATE_POINTERS { 6410 uint32_t DWordLength; 6411 uint32_t _3DCommandSubOpcode; 6412 uint32_t _3DCommandOpcode; 6413 uint32_t CommandSubType; 6414 uint32_t CommandType; 6415 uint64_t ScissorRectPointer; 6416}; 6417 6418static inline void 6419GEN11_3DSTATE_SCISSOR_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 6420 __attribute__((unused)) void * restrict dst, 6421 __attribute__((unused)) const struct GEN11_3DSTATE_SCISSOR_STATE_POINTERS * restrict values) 6422{ 6423 uint32_t * restrict dw = (uint32_t * restrict) dst; 6424 6425 dw[0] = 6426 __gen_uint(values->DWordLength, 0, 7) | 6427 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6428 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6429 __gen_uint(values->CommandSubType, 27, 28) | 6430 __gen_uint(values->CommandType, 29, 31); 6431 6432 dw[1] = 6433 __gen_offset(values->ScissorRectPointer, 5, 31); 6434} 6435 6436#define GEN11_3DSTATE_SF_length 4 6437#define GEN11_3DSTATE_SF_length_bias 2 6438#define GEN11_3DSTATE_SF_header \ 6439 .DWordLength = 2, \ 6440 ._3DCommandSubOpcode = 19, \ 6441 ._3DCommandOpcode = 0, \ 6442 .CommandSubType = 3, \ 6443 .CommandType = 3 6444 6445struct GEN11_3DSTATE_SF { 6446 uint32_t DWordLength; 6447 uint32_t _3DCommandSubOpcode; 6448 uint32_t _3DCommandOpcode; 6449 uint32_t CommandSubType; 6450 uint32_t CommandType; 6451 bool ViewportTransformEnable; 6452 bool StatisticsEnable; 6453 bool LegacyGlobalDepthBiasEnable; 6454 float LineWidth; 6455 uint32_t LineEndCapAntialiasingRegionWidth; 6456#define _05pixels 0 6457#define _10pixels 1 6458#define _20pixels 2 6459#define _40pixels 3 6460 float PointWidth; 6461 uint32_t PointWidthSource; 6462#define Vertex 0 6463#define State 1 6464 uint32_t VertexSubPixelPrecisionSelect; 6465#define _8Bit 0 6466#define _4Bit 1 6467 bool SmoothPointEnable; 6468 uint32_t AALineDistanceMode; 6469#define AALINEDISTANCE_TRUE 1 6470 uint32_t TriangleFanProvokingVertexSelect; 6471 uint32_t LineStripListProvokingVertexSelect; 6472 uint32_t TriangleStripListProvokingVertexSelect; 6473 bool LastPixelEnable; 6474}; 6475 6476static inline void 6477GEN11_3DSTATE_SF_pack(__attribute__((unused)) __gen_user_data *data, 6478 __attribute__((unused)) void * restrict dst, 6479 __attribute__((unused)) const struct GEN11_3DSTATE_SF * restrict values) 6480{ 6481 uint32_t * restrict dw = (uint32_t * restrict) dst; 6482 6483 dw[0] = 6484 __gen_uint(values->DWordLength, 0, 7) | 6485 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6486 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6487 __gen_uint(values->CommandSubType, 27, 28) | 6488 __gen_uint(values->CommandType, 29, 31); 6489 6490 dw[1] = 6491 __gen_uint(values->ViewportTransformEnable, 1, 1) | 6492 __gen_uint(values->StatisticsEnable, 10, 10) | 6493 __gen_uint(values->LegacyGlobalDepthBiasEnable, 11, 11) | 6494 __gen_ufixed(values->LineWidth, 12, 29, 7); 6495 6496 dw[2] = 6497 __gen_uint(values->LineEndCapAntialiasingRegionWidth, 16, 17); 6498 6499 dw[3] = 6500 __gen_ufixed(values->PointWidth, 0, 10, 3) | 6501 __gen_uint(values->PointWidthSource, 11, 11) | 6502 __gen_uint(values->VertexSubPixelPrecisionSelect, 12, 12) | 6503 __gen_uint(values->SmoothPointEnable, 13, 13) | 6504 __gen_uint(values->AALineDistanceMode, 14, 14) | 6505 __gen_uint(values->TriangleFanProvokingVertexSelect, 25, 26) | 6506 __gen_uint(values->LineStripListProvokingVertexSelect, 27, 28) | 6507 __gen_uint(values->TriangleStripListProvokingVertexSelect, 29, 30) | 6508 __gen_uint(values->LastPixelEnable, 31, 31); 6509} 6510 6511#define GEN11_3DSTATE_SO_BUFFER_length 8 6512#define GEN11_3DSTATE_SO_BUFFER_length_bias 2 6513#define GEN11_3DSTATE_SO_BUFFER_header \ 6514 .DWordLength = 6, \ 6515 ._3DCommandSubOpcode = 24, \ 6516 ._3DCommandOpcode = 1, \ 6517 .CommandSubType = 3, \ 6518 .CommandType = 3 6519 6520struct GEN11_3DSTATE_SO_BUFFER { 6521 uint32_t DWordLength; 6522 uint32_t _3DCommandSubOpcode; 6523 uint32_t _3DCommandOpcode; 6524 uint32_t CommandSubType; 6525 uint32_t CommandType; 6526 bool StreamOutputBufferOffsetAddressEnable; 6527 bool StreamOffsetWriteEnable; 6528 uint32_t MOCS; 6529 uint32_t SOBufferIndex; 6530 bool SOBufferEnable; 6531 __gen_address_type SurfaceBaseAddress; 6532 uint32_t SurfaceSize; 6533 __gen_address_type StreamOutputBufferOffsetAddress; 6534 uint32_t StreamOffset; 6535}; 6536 6537static inline void 6538GEN11_3DSTATE_SO_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 6539 __attribute__((unused)) void * restrict dst, 6540 __attribute__((unused)) const struct GEN11_3DSTATE_SO_BUFFER * restrict values) 6541{ 6542 uint32_t * restrict dw = (uint32_t * restrict) dst; 6543 6544 dw[0] = 6545 __gen_uint(values->DWordLength, 0, 7) | 6546 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6547 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6548 __gen_uint(values->CommandSubType, 27, 28) | 6549 __gen_uint(values->CommandType, 29, 31); 6550 6551 dw[1] = 6552 __gen_uint(values->StreamOutputBufferOffsetAddressEnable, 20, 20) | 6553 __gen_uint(values->StreamOffsetWriteEnable, 21, 21) | 6554 __gen_uint(values->MOCS, 22, 28) | 6555 __gen_uint(values->SOBufferIndex, 29, 30) | 6556 __gen_uint(values->SOBufferEnable, 31, 31); 6557 6558 const uint64_t v2_address = 6559 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 6560 dw[2] = v2_address; 6561 dw[3] = v2_address >> 32; 6562 6563 dw[4] = 6564 __gen_uint(values->SurfaceSize, 0, 29); 6565 6566 const uint64_t v5_address = 6567 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, 0); 6568 dw[5] = v5_address; 6569 dw[6] = v5_address >> 32; 6570 6571 dw[7] = 6572 __gen_uint(values->StreamOffset, 0, 31); 6573} 6574 6575#define GEN11_3DSTATE_SO_DECL_LIST_length_bias 2 6576#define GEN11_3DSTATE_SO_DECL_LIST_header \ 6577 ._3DCommandSubOpcode = 23, \ 6578 ._3DCommandOpcode = 1, \ 6579 .CommandSubType = 3, \ 6580 .CommandType = 3 6581 6582struct GEN11_3DSTATE_SO_DECL_LIST { 6583 uint32_t DWordLength; 6584 uint32_t _3DCommandSubOpcode; 6585 uint32_t _3DCommandOpcode; 6586 uint32_t CommandSubType; 6587 uint32_t CommandType; 6588 uint32_t StreamtoBufferSelects0; 6589 uint32_t StreamtoBufferSelects1; 6590 uint32_t StreamtoBufferSelects2; 6591 uint32_t StreamtoBufferSelects3; 6592 uint32_t NumEntries0; 6593 uint32_t NumEntries1; 6594 uint32_t NumEntries2; 6595 uint32_t NumEntries3; 6596 /* variable length fields follow */ 6597}; 6598 6599static inline void 6600GEN11_3DSTATE_SO_DECL_LIST_pack(__attribute__((unused)) __gen_user_data *data, 6601 __attribute__((unused)) void * restrict dst, 6602 __attribute__((unused)) const struct GEN11_3DSTATE_SO_DECL_LIST * restrict values) 6603{ 6604 uint32_t * restrict dw = (uint32_t * restrict) dst; 6605 6606 dw[0] = 6607 __gen_uint(values->DWordLength, 0, 8) | 6608 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6609 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6610 __gen_uint(values->CommandSubType, 27, 28) | 6611 __gen_uint(values->CommandType, 29, 31); 6612 6613 dw[1] = 6614 __gen_uint(values->StreamtoBufferSelects0, 0, 3) | 6615 __gen_uint(values->StreamtoBufferSelects1, 4, 7) | 6616 __gen_uint(values->StreamtoBufferSelects2, 8, 11) | 6617 __gen_uint(values->StreamtoBufferSelects3, 12, 15); 6618 6619 dw[2] = 6620 __gen_uint(values->NumEntries0, 0, 7) | 6621 __gen_uint(values->NumEntries1, 8, 15) | 6622 __gen_uint(values->NumEntries2, 16, 23) | 6623 __gen_uint(values->NumEntries3, 24, 31); 6624} 6625 6626#define GEN11_3DSTATE_STENCIL_BUFFER_length 5 6627#define GEN11_3DSTATE_STENCIL_BUFFER_length_bias 2 6628#define GEN11_3DSTATE_STENCIL_BUFFER_header \ 6629 .DWordLength = 3, \ 6630 ._3DCommandSubOpcode = 6, \ 6631 ._3DCommandOpcode = 0, \ 6632 .CommandSubType = 3, \ 6633 .CommandType = 3 6634 6635struct GEN11_3DSTATE_STENCIL_BUFFER { 6636 uint32_t DWordLength; 6637 uint32_t _3DCommandSubOpcode; 6638 uint32_t _3DCommandOpcode; 6639 uint32_t CommandSubType; 6640 uint32_t CommandType; 6641 uint32_t SurfacePitch; 6642 uint32_t MOCS; 6643 bool StencilBufferEnable; 6644 __gen_address_type SurfaceBaseAddress; 6645 uint32_t SurfaceQPitch; 6646}; 6647 6648static inline void 6649GEN11_3DSTATE_STENCIL_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 6650 __attribute__((unused)) void * restrict dst, 6651 __attribute__((unused)) const struct GEN11_3DSTATE_STENCIL_BUFFER * restrict values) 6652{ 6653 uint32_t * restrict dw = (uint32_t * restrict) dst; 6654 6655 dw[0] = 6656 __gen_uint(values->DWordLength, 0, 7) | 6657 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6658 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6659 __gen_uint(values->CommandSubType, 27, 28) | 6660 __gen_uint(values->CommandType, 29, 31); 6661 6662 dw[1] = 6663 __gen_uint(values->SurfacePitch, 0, 16) | 6664 __gen_uint(values->MOCS, 22, 28) | 6665 __gen_uint(values->StencilBufferEnable, 31, 31); 6666 6667 const uint64_t v2_address = 6668 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 6669 dw[2] = v2_address; 6670 dw[3] = v2_address >> 32; 6671 6672 dw[4] = 6673 __gen_uint(values->SurfaceQPitch, 0, 14); 6674} 6675 6676#define GEN11_3DSTATE_STREAMOUT_length 5 6677#define GEN11_3DSTATE_STREAMOUT_length_bias 2 6678#define GEN11_3DSTATE_STREAMOUT_header \ 6679 .DWordLength = 3, \ 6680 ._3DCommandSubOpcode = 30, \ 6681 ._3DCommandOpcode = 0, \ 6682 .CommandSubType = 3, \ 6683 .CommandType = 3 6684 6685struct GEN11_3DSTATE_STREAMOUT { 6686 uint32_t DWordLength; 6687 uint32_t _3DCommandSubOpcode; 6688 uint32_t _3DCommandOpcode; 6689 uint32_t CommandSubType; 6690 uint32_t CommandType; 6691 uint32_t ForceRendering; 6692#define Resreved 1 6693#define Force_Off 2 6694#define Force_on 3 6695 bool SOStatisticsEnable; 6696 uint32_t ReorderMode; 6697#define LEADING 0 6698#define TRAILING 1 6699 uint32_t RenderStreamSelect; 6700 bool RenderingDisable; 6701 bool SOFunctionEnable; 6702 uint32_t Stream0VertexReadLength; 6703 uint32_t Stream0VertexReadOffset; 6704 uint32_t Stream1VertexReadLength; 6705 uint32_t Stream1VertexReadOffset; 6706 uint32_t Stream2VertexReadLength; 6707 uint32_t Stream2VertexReadOffset; 6708 uint32_t Stream3VertexReadLength; 6709 uint32_t Stream3VertexReadOffset; 6710 uint32_t Buffer0SurfacePitch; 6711 uint32_t Buffer1SurfacePitch; 6712 uint32_t Buffer2SurfacePitch; 6713 uint32_t Buffer3SurfacePitch; 6714}; 6715 6716static inline void 6717GEN11_3DSTATE_STREAMOUT_pack(__attribute__((unused)) __gen_user_data *data, 6718 __attribute__((unused)) void * restrict dst, 6719 __attribute__((unused)) const struct GEN11_3DSTATE_STREAMOUT * restrict values) 6720{ 6721 uint32_t * restrict dw = (uint32_t * restrict) dst; 6722 6723 dw[0] = 6724 __gen_uint(values->DWordLength, 0, 7) | 6725 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6726 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6727 __gen_uint(values->CommandSubType, 27, 28) | 6728 __gen_uint(values->CommandType, 29, 31); 6729 6730 dw[1] = 6731 __gen_uint(values->ForceRendering, 23, 24) | 6732 __gen_uint(values->SOStatisticsEnable, 25, 25) | 6733 __gen_uint(values->ReorderMode, 26, 26) | 6734 __gen_uint(values->RenderStreamSelect, 27, 28) | 6735 __gen_uint(values->RenderingDisable, 30, 30) | 6736 __gen_uint(values->SOFunctionEnable, 31, 31); 6737 6738 dw[2] = 6739 __gen_uint(values->Stream0VertexReadLength, 0, 4) | 6740 __gen_uint(values->Stream0VertexReadOffset, 5, 5) | 6741 __gen_uint(values->Stream1VertexReadLength, 8, 12) | 6742 __gen_uint(values->Stream1VertexReadOffset, 13, 13) | 6743 __gen_uint(values->Stream2VertexReadLength, 16, 20) | 6744 __gen_uint(values->Stream2VertexReadOffset, 21, 21) | 6745 __gen_uint(values->Stream3VertexReadLength, 24, 28) | 6746 __gen_uint(values->Stream3VertexReadOffset, 29, 29); 6747 6748 dw[3] = 6749 __gen_uint(values->Buffer0SurfacePitch, 0, 11) | 6750 __gen_uint(values->Buffer1SurfacePitch, 16, 27); 6751 6752 dw[4] = 6753 __gen_uint(values->Buffer2SurfacePitch, 0, 11) | 6754 __gen_uint(values->Buffer3SurfacePitch, 16, 27); 6755} 6756 6757#define GEN11_3DSTATE_TE_length 4 6758#define GEN11_3DSTATE_TE_length_bias 2 6759#define GEN11_3DSTATE_TE_header \ 6760 .DWordLength = 2, \ 6761 ._3DCommandSubOpcode = 28, \ 6762 ._3DCommandOpcode = 0, \ 6763 .CommandSubType = 3, \ 6764 .CommandType = 3 6765 6766struct GEN11_3DSTATE_TE { 6767 uint32_t DWordLength; 6768 uint32_t _3DCommandSubOpcode; 6769 uint32_t _3DCommandOpcode; 6770 uint32_t CommandSubType; 6771 uint32_t CommandType; 6772 bool TEEnable; 6773 uint32_t TEMode; 6774#define HW_TESS 0 6775 uint32_t TEDomain; 6776#define QUAD 0 6777#define TRI 1 6778#define ISOLINE 2 6779 uint32_t OutputTopology; 6780#define OUTPUT_POINT 0 6781#define OUTPUT_LINE 1 6782#define OUTPUT_TRI_CW 2 6783#define OUTPUT_TRI_CCW 3 6784 uint32_t Partitioning; 6785#define INTEGER 0 6786#define ODD_FRACTIONAL 1 6787#define EVEN_FRACTIONAL 2 6788 float MaximumTessellationFactorOdd; 6789 float MaximumTessellationFactorNotOdd; 6790}; 6791 6792static inline void 6793GEN11_3DSTATE_TE_pack(__attribute__((unused)) __gen_user_data *data, 6794 __attribute__((unused)) void * restrict dst, 6795 __attribute__((unused)) const struct GEN11_3DSTATE_TE * restrict values) 6796{ 6797 uint32_t * restrict dw = (uint32_t * restrict) dst; 6798 6799 dw[0] = 6800 __gen_uint(values->DWordLength, 0, 7) | 6801 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6802 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6803 __gen_uint(values->CommandSubType, 27, 28) | 6804 __gen_uint(values->CommandType, 29, 31); 6805 6806 dw[1] = 6807 __gen_uint(values->TEEnable, 0, 0) | 6808 __gen_uint(values->TEMode, 1, 2) | 6809 __gen_uint(values->TEDomain, 4, 5) | 6810 __gen_uint(values->OutputTopology, 8, 9) | 6811 __gen_uint(values->Partitioning, 12, 13); 6812 6813 dw[2] = 6814 __gen_float(values->MaximumTessellationFactorOdd); 6815 6816 dw[3] = 6817 __gen_float(values->MaximumTessellationFactorNotOdd); 6818} 6819 6820#define GEN11_3DSTATE_URB_CLEAR_length 2 6821#define GEN11_3DSTATE_URB_CLEAR_length_bias 2 6822#define GEN11_3DSTATE_URB_CLEAR_header \ 6823 .DWordLength = 0, \ 6824 ._3DCommandSubOpcode = 29, \ 6825 ._3DCommandOpcode = 1, \ 6826 .CommandSubType = 3, \ 6827 .CommandType = 3 6828 6829struct GEN11_3DSTATE_URB_CLEAR { 6830 uint32_t DWordLength; 6831 uint32_t _3DCommandSubOpcode; 6832 uint32_t _3DCommandOpcode; 6833 uint32_t CommandSubType; 6834 uint32_t CommandType; 6835 uint64_t URBAddress; 6836 uint32_t URBClearLength; 6837}; 6838 6839static inline void 6840GEN11_3DSTATE_URB_CLEAR_pack(__attribute__((unused)) __gen_user_data *data, 6841 __attribute__((unused)) void * restrict dst, 6842 __attribute__((unused)) const struct GEN11_3DSTATE_URB_CLEAR * restrict values) 6843{ 6844 uint32_t * restrict dw = (uint32_t * restrict) dst; 6845 6846 dw[0] = 6847 __gen_uint(values->DWordLength, 0, 7) | 6848 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6849 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6850 __gen_uint(values->CommandSubType, 27, 28) | 6851 __gen_uint(values->CommandType, 29, 31); 6852 6853 dw[1] = 6854 __gen_offset(values->URBAddress, 0, 14) | 6855 __gen_uint(values->URBClearLength, 16, 29); 6856} 6857 6858#define GEN11_3DSTATE_URB_DS_length 2 6859#define GEN11_3DSTATE_URB_DS_length_bias 2 6860#define GEN11_3DSTATE_URB_DS_header \ 6861 .DWordLength = 0, \ 6862 ._3DCommandSubOpcode = 50, \ 6863 ._3DCommandOpcode = 0, \ 6864 .CommandSubType = 3, \ 6865 .CommandType = 3 6866 6867struct GEN11_3DSTATE_URB_DS { 6868 uint32_t DWordLength; 6869 uint32_t _3DCommandSubOpcode; 6870 uint32_t _3DCommandOpcode; 6871 uint32_t CommandSubType; 6872 uint32_t CommandType; 6873 uint32_t DSNumberofURBEntries; 6874 uint32_t DSURBEntryAllocationSize; 6875 uint32_t DSURBStartingAddress; 6876}; 6877 6878static inline void 6879GEN11_3DSTATE_URB_DS_pack(__attribute__((unused)) __gen_user_data *data, 6880 __attribute__((unused)) void * restrict dst, 6881 __attribute__((unused)) const struct GEN11_3DSTATE_URB_DS * restrict values) 6882{ 6883 uint32_t * restrict dw = (uint32_t * restrict) dst; 6884 6885 dw[0] = 6886 __gen_uint(values->DWordLength, 0, 7) | 6887 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6888 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6889 __gen_uint(values->CommandSubType, 27, 28) | 6890 __gen_uint(values->CommandType, 29, 31); 6891 6892 dw[1] = 6893 __gen_uint(values->DSNumberofURBEntries, 0, 15) | 6894 __gen_uint(values->DSURBEntryAllocationSize, 16, 24) | 6895 __gen_uint(values->DSURBStartingAddress, 25, 31); 6896} 6897 6898#define GEN11_3DSTATE_URB_GS_length 2 6899#define GEN11_3DSTATE_URB_GS_length_bias 2 6900#define GEN11_3DSTATE_URB_GS_header \ 6901 .DWordLength = 0, \ 6902 ._3DCommandSubOpcode = 51, \ 6903 ._3DCommandOpcode = 0, \ 6904 .CommandSubType = 3, \ 6905 .CommandType = 3 6906 6907struct GEN11_3DSTATE_URB_GS { 6908 uint32_t DWordLength; 6909 uint32_t _3DCommandSubOpcode; 6910 uint32_t _3DCommandOpcode; 6911 uint32_t CommandSubType; 6912 uint32_t CommandType; 6913 uint32_t GSNumberofURBEntries; 6914 uint32_t GSURBEntryAllocationSize; 6915 uint32_t GSURBStartingAddress; 6916}; 6917 6918static inline void 6919GEN11_3DSTATE_URB_GS_pack(__attribute__((unused)) __gen_user_data *data, 6920 __attribute__((unused)) void * restrict dst, 6921 __attribute__((unused)) const struct GEN11_3DSTATE_URB_GS * restrict values) 6922{ 6923 uint32_t * restrict dw = (uint32_t * restrict) dst; 6924 6925 dw[0] = 6926 __gen_uint(values->DWordLength, 0, 7) | 6927 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6928 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6929 __gen_uint(values->CommandSubType, 27, 28) | 6930 __gen_uint(values->CommandType, 29, 31); 6931 6932 dw[1] = 6933 __gen_uint(values->GSNumberofURBEntries, 0, 15) | 6934 __gen_uint(values->GSURBEntryAllocationSize, 16, 24) | 6935 __gen_uint(values->GSURBStartingAddress, 25, 31); 6936} 6937 6938#define GEN11_3DSTATE_URB_HS_length 2 6939#define GEN11_3DSTATE_URB_HS_length_bias 2 6940#define GEN11_3DSTATE_URB_HS_header \ 6941 .DWordLength = 0, \ 6942 ._3DCommandSubOpcode = 49, \ 6943 ._3DCommandOpcode = 0, \ 6944 .CommandSubType = 3, \ 6945 .CommandType = 3 6946 6947struct GEN11_3DSTATE_URB_HS { 6948 uint32_t DWordLength; 6949 uint32_t _3DCommandSubOpcode; 6950 uint32_t _3DCommandOpcode; 6951 uint32_t CommandSubType; 6952 uint32_t CommandType; 6953 uint32_t HSNumberofURBEntries; 6954 uint32_t HSURBEntryAllocationSize; 6955 uint32_t HSURBStartingAddress; 6956}; 6957 6958static inline void 6959GEN11_3DSTATE_URB_HS_pack(__attribute__((unused)) __gen_user_data *data, 6960 __attribute__((unused)) void * restrict dst, 6961 __attribute__((unused)) const struct GEN11_3DSTATE_URB_HS * restrict values) 6962{ 6963 uint32_t * restrict dw = (uint32_t * restrict) dst; 6964 6965 dw[0] = 6966 __gen_uint(values->DWordLength, 0, 7) | 6967 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6968 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6969 __gen_uint(values->CommandSubType, 27, 28) | 6970 __gen_uint(values->CommandType, 29, 31); 6971 6972 dw[1] = 6973 __gen_uint(values->HSNumberofURBEntries, 0, 15) | 6974 __gen_uint(values->HSURBEntryAllocationSize, 16, 24) | 6975 __gen_uint(values->HSURBStartingAddress, 25, 31); 6976} 6977 6978#define GEN11_3DSTATE_URB_VS_length 2 6979#define GEN11_3DSTATE_URB_VS_length_bias 2 6980#define GEN11_3DSTATE_URB_VS_header \ 6981 .DWordLength = 0, \ 6982 ._3DCommandSubOpcode = 48, \ 6983 ._3DCommandOpcode = 0, \ 6984 .CommandSubType = 3, \ 6985 .CommandType = 3 6986 6987struct GEN11_3DSTATE_URB_VS { 6988 uint32_t DWordLength; 6989 uint32_t _3DCommandSubOpcode; 6990 uint32_t _3DCommandOpcode; 6991 uint32_t CommandSubType; 6992 uint32_t CommandType; 6993 uint32_t VSNumberofURBEntries; 6994 uint32_t VSURBEntryAllocationSize; 6995 uint32_t VSURBStartingAddress; 6996}; 6997 6998static inline void 6999GEN11_3DSTATE_URB_VS_pack(__attribute__((unused)) __gen_user_data *data, 7000 __attribute__((unused)) void * restrict dst, 7001 __attribute__((unused)) const struct GEN11_3DSTATE_URB_VS * restrict values) 7002{ 7003 uint32_t * restrict dw = (uint32_t * restrict) dst; 7004 7005 dw[0] = 7006 __gen_uint(values->DWordLength, 0, 7) | 7007 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7008 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7009 __gen_uint(values->CommandSubType, 27, 28) | 7010 __gen_uint(values->CommandType, 29, 31); 7011 7012 dw[1] = 7013 __gen_uint(values->VSNumberofURBEntries, 0, 15) | 7014 __gen_uint(values->VSURBEntryAllocationSize, 16, 24) | 7015 __gen_uint(values->VSURBStartingAddress, 25, 31); 7016} 7017 7018#define GEN11_3DSTATE_VERTEX_BUFFERS_length_bias 2 7019#define GEN11_3DSTATE_VERTEX_BUFFERS_header \ 7020 .DWordLength = 3, \ 7021 ._3DCommandSubOpcode = 8, \ 7022 ._3DCommandOpcode = 0, \ 7023 .CommandSubType = 3, \ 7024 .CommandType = 3 7025 7026struct GEN11_3DSTATE_VERTEX_BUFFERS { 7027 uint32_t DWordLength; 7028 uint32_t _3DCommandSubOpcode; 7029 uint32_t _3DCommandOpcode; 7030 uint32_t CommandSubType; 7031 uint32_t CommandType; 7032 /* variable length fields follow */ 7033}; 7034 7035static inline void 7036GEN11_3DSTATE_VERTEX_BUFFERS_pack(__attribute__((unused)) __gen_user_data *data, 7037 __attribute__((unused)) void * restrict dst, 7038 __attribute__((unused)) const struct GEN11_3DSTATE_VERTEX_BUFFERS * restrict values) 7039{ 7040 uint32_t * restrict dw = (uint32_t * restrict) dst; 7041 7042 dw[0] = 7043 __gen_uint(values->DWordLength, 0, 7) | 7044 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7045 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7046 __gen_uint(values->CommandSubType, 27, 28) | 7047 __gen_uint(values->CommandType, 29, 31); 7048} 7049 7050#define GEN11_3DSTATE_VERTEX_ELEMENTS_length_bias 2 7051#define GEN11_3DSTATE_VERTEX_ELEMENTS_header \ 7052 .DWordLength = 1, \ 7053 ._3DCommandSubOpcode = 9, \ 7054 ._3DCommandOpcode = 0, \ 7055 .CommandSubType = 3, \ 7056 .CommandType = 3 7057 7058struct GEN11_3DSTATE_VERTEX_ELEMENTS { 7059 uint32_t DWordLength; 7060 uint32_t _3DCommandSubOpcode; 7061 uint32_t _3DCommandOpcode; 7062 uint32_t CommandSubType; 7063 uint32_t CommandType; 7064 /* variable length fields follow */ 7065}; 7066 7067static inline void 7068GEN11_3DSTATE_VERTEX_ELEMENTS_pack(__attribute__((unused)) __gen_user_data *data, 7069 __attribute__((unused)) void * restrict dst, 7070 __attribute__((unused)) const struct GEN11_3DSTATE_VERTEX_ELEMENTS * restrict values) 7071{ 7072 uint32_t * restrict dw = (uint32_t * restrict) dst; 7073 7074 dw[0] = 7075 __gen_uint(values->DWordLength, 0, 7) | 7076 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7077 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7078 __gen_uint(values->CommandSubType, 27, 28) | 7079 __gen_uint(values->CommandType, 29, 31); 7080} 7081 7082#define GEN11_3DSTATE_VF_length 2 7083#define GEN11_3DSTATE_VF_length_bias 2 7084#define GEN11_3DSTATE_VF_header \ 7085 .DWordLength = 0, \ 7086 ._3DCommandSubOpcode = 12, \ 7087 ._3DCommandOpcode = 0, \ 7088 .CommandSubType = 3, \ 7089 .CommandType = 3 7090 7091struct GEN11_3DSTATE_VF { 7092 uint32_t DWordLength; 7093 bool IndexedDrawCutIndexEnable; 7094 bool ComponentPackingEnable; 7095 bool SequentialDrawCutIndexEnable; 7096 bool VertexIDOffsetEnable; 7097 uint32_t _3DCommandSubOpcode; 7098 uint32_t _3DCommandOpcode; 7099 uint32_t CommandSubType; 7100 uint32_t CommandType; 7101 uint32_t CutIndex; 7102}; 7103 7104static inline void 7105GEN11_3DSTATE_VF_pack(__attribute__((unused)) __gen_user_data *data, 7106 __attribute__((unused)) void * restrict dst, 7107 __attribute__((unused)) const struct GEN11_3DSTATE_VF * restrict values) 7108{ 7109 uint32_t * restrict dw = (uint32_t * restrict) dst; 7110 7111 dw[0] = 7112 __gen_uint(values->DWordLength, 0, 7) | 7113 __gen_uint(values->IndexedDrawCutIndexEnable, 8, 8) | 7114 __gen_uint(values->ComponentPackingEnable, 9, 9) | 7115 __gen_uint(values->SequentialDrawCutIndexEnable, 10, 10) | 7116 __gen_uint(values->VertexIDOffsetEnable, 11, 11) | 7117 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7118 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7119 __gen_uint(values->CommandSubType, 27, 28) | 7120 __gen_uint(values->CommandType, 29, 31); 7121 7122 dw[1] = 7123 __gen_uint(values->CutIndex, 0, 31); 7124} 7125 7126#define GEN11_3DSTATE_VF_COMPONENT_PACKING_length 5 7127#define GEN11_3DSTATE_VF_COMPONENT_PACKING_length_bias 2 7128#define GEN11_3DSTATE_VF_COMPONENT_PACKING_header\ 7129 .DWordLength = 3, \ 7130 ._3DCommandSubOpcode = 85, \ 7131 ._3DCommandOpcode = 0, \ 7132 .CommandSubType = 3, \ 7133 .CommandType = 3 7134 7135struct GEN11_3DSTATE_VF_COMPONENT_PACKING { 7136 uint32_t DWordLength; 7137 uint32_t _3DCommandSubOpcode; 7138 uint32_t _3DCommandOpcode; 7139 uint32_t CommandSubType; 7140 uint32_t CommandType; 7141 uint32_t VertexElement00Enables; 7142 uint32_t VertexElement01Enables; 7143 uint32_t VertexElement02Enables; 7144 uint32_t VertexElement03Enables; 7145 uint32_t VertexElement04Enables; 7146 uint32_t VertexElement05Enables; 7147 uint32_t VertexElement06Enables; 7148 uint32_t VertexElement07Enables; 7149 uint32_t VertexElement08Enables; 7150 uint32_t VertexElement09Enables; 7151 uint32_t VertexElement10Enables; 7152 uint32_t VertexElement11Enables; 7153 uint32_t VertexElement12Enables; 7154 uint32_t VertexElement13Enables; 7155 uint32_t VertexElement14Enables; 7156 uint32_t VertexElement15Enables; 7157 uint32_t VertexElement16Enables; 7158 uint32_t VertexElement17Enables; 7159 uint32_t VertexElement18Enables; 7160 uint32_t VertexElement19Enables; 7161 uint32_t VertexElement20Enables; 7162 uint32_t VertexElement21Enables; 7163 uint32_t VertexElement22Enables; 7164 uint32_t VertexElement23Enables; 7165 uint32_t VertexElement24Enables; 7166 uint32_t VertexElement25Enables; 7167 uint32_t VertexElement26Enables; 7168 uint32_t VertexElement27Enables; 7169 uint32_t VertexElement28Enables; 7170 uint32_t VertexElement29Enables; 7171 uint32_t VertexElement30Enables; 7172 uint32_t VertexElement31Enables; 7173}; 7174 7175static inline void 7176GEN11_3DSTATE_VF_COMPONENT_PACKING_pack(__attribute__((unused)) __gen_user_data *data, 7177 __attribute__((unused)) void * restrict dst, 7178 __attribute__((unused)) const struct GEN11_3DSTATE_VF_COMPONENT_PACKING * restrict values) 7179{ 7180 uint32_t * restrict dw = (uint32_t * restrict) dst; 7181 7182 dw[0] = 7183 __gen_uint(values->DWordLength, 0, 7) | 7184 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7185 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7186 __gen_uint(values->CommandSubType, 27, 28) | 7187 __gen_uint(values->CommandType, 29, 31); 7188 7189 dw[1] = 7190 __gen_uint(values->VertexElement00Enables, 0, 3) | 7191 __gen_uint(values->VertexElement01Enables, 4, 7) | 7192 __gen_uint(values->VertexElement02Enables, 8, 11) | 7193 __gen_uint(values->VertexElement03Enables, 12, 15) | 7194 __gen_uint(values->VertexElement04Enables, 16, 19) | 7195 __gen_uint(values->VertexElement05Enables, 20, 23) | 7196 __gen_uint(values->VertexElement06Enables, 24, 27) | 7197 __gen_uint(values->VertexElement07Enables, 28, 31); 7198 7199 dw[2] = 7200 __gen_uint(values->VertexElement08Enables, 0, 3) | 7201 __gen_uint(values->VertexElement09Enables, 4, 7) | 7202 __gen_uint(values->VertexElement10Enables, 8, 11) | 7203 __gen_uint(values->VertexElement11Enables, 12, 15) | 7204 __gen_uint(values->VertexElement12Enables, 16, 19) | 7205 __gen_uint(values->VertexElement13Enables, 20, 23) | 7206 __gen_uint(values->VertexElement14Enables, 24, 27) | 7207 __gen_uint(values->VertexElement15Enables, 28, 31); 7208 7209 dw[3] = 7210 __gen_uint(values->VertexElement16Enables, 0, 3) | 7211 __gen_uint(values->VertexElement17Enables, 4, 7) | 7212 __gen_uint(values->VertexElement18Enables, 8, 11) | 7213 __gen_uint(values->VertexElement19Enables, 12, 15) | 7214 __gen_uint(values->VertexElement20Enables, 16, 19) | 7215 __gen_uint(values->VertexElement21Enables, 20, 23) | 7216 __gen_uint(values->VertexElement22Enables, 24, 27) | 7217 __gen_uint(values->VertexElement23Enables, 28, 31); 7218 7219 dw[4] = 7220 __gen_uint(values->VertexElement24Enables, 0, 3) | 7221 __gen_uint(values->VertexElement25Enables, 4, 7) | 7222 __gen_uint(values->VertexElement26Enables, 8, 11) | 7223 __gen_uint(values->VertexElement27Enables, 12, 15) | 7224 __gen_uint(values->VertexElement28Enables, 16, 19) | 7225 __gen_uint(values->VertexElement29Enables, 20, 23) | 7226 __gen_uint(values->VertexElement30Enables, 24, 27) | 7227 __gen_uint(values->VertexElement31Enables, 28, 31); 7228} 7229 7230#define GEN11_3DSTATE_VF_INSTANCING_length 3 7231#define GEN11_3DSTATE_VF_INSTANCING_length_bias 2 7232#define GEN11_3DSTATE_VF_INSTANCING_header \ 7233 .DWordLength = 1, \ 7234 ._3DCommandSubOpcode = 73, \ 7235 ._3DCommandOpcode = 0, \ 7236 .CommandSubType = 3, \ 7237 .CommandType = 3 7238 7239struct GEN11_3DSTATE_VF_INSTANCING { 7240 uint32_t DWordLength; 7241 uint32_t _3DCommandSubOpcode; 7242 uint32_t _3DCommandOpcode; 7243 uint32_t CommandSubType; 7244 uint32_t CommandType; 7245 uint32_t VertexElementIndex; 7246 bool InstancingEnable; 7247 uint32_t InstanceDataStepRate; 7248}; 7249 7250static inline void 7251GEN11_3DSTATE_VF_INSTANCING_pack(__attribute__((unused)) __gen_user_data *data, 7252 __attribute__((unused)) void * restrict dst, 7253 __attribute__((unused)) const struct GEN11_3DSTATE_VF_INSTANCING * restrict values) 7254{ 7255 uint32_t * restrict dw = (uint32_t * restrict) dst; 7256 7257 dw[0] = 7258 __gen_uint(values->DWordLength, 0, 7) | 7259 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7260 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7261 __gen_uint(values->CommandSubType, 27, 28) | 7262 __gen_uint(values->CommandType, 29, 31); 7263 7264 dw[1] = 7265 __gen_uint(values->VertexElementIndex, 0, 5) | 7266 __gen_uint(values->InstancingEnable, 8, 8); 7267 7268 dw[2] = 7269 __gen_uint(values->InstanceDataStepRate, 0, 31); 7270} 7271 7272#define GEN11_3DSTATE_VF_SGVS_length 2 7273#define GEN11_3DSTATE_VF_SGVS_length_bias 2 7274#define GEN11_3DSTATE_VF_SGVS_header \ 7275 .DWordLength = 0, \ 7276 ._3DCommandSubOpcode = 74, \ 7277 ._3DCommandOpcode = 0, \ 7278 .CommandSubType = 3, \ 7279 .CommandType = 3 7280 7281struct GEN11_3DSTATE_VF_SGVS { 7282 uint32_t DWordLength; 7283 uint32_t _3DCommandSubOpcode; 7284 uint32_t _3DCommandOpcode; 7285 uint32_t CommandSubType; 7286 uint32_t CommandType; 7287 uint32_t VertexIDElementOffset; 7288 uint32_t VertexIDComponentNumber; 7289#define COMP_0 0 7290#define COMP_1 1 7291#define COMP_2 2 7292#define COMP_3 3 7293 bool VertexIDEnable; 7294 uint32_t InstanceIDElementOffset; 7295 uint32_t InstanceIDComponentNumber; 7296#define COMP_0 0 7297#define COMP_1 1 7298#define COMP_2 2 7299#define COMP_3 3 7300 bool InstanceIDEnable; 7301}; 7302 7303static inline void 7304GEN11_3DSTATE_VF_SGVS_pack(__attribute__((unused)) __gen_user_data *data, 7305 __attribute__((unused)) void * restrict dst, 7306 __attribute__((unused)) const struct GEN11_3DSTATE_VF_SGVS * restrict values) 7307{ 7308 uint32_t * restrict dw = (uint32_t * restrict) dst; 7309 7310 dw[0] = 7311 __gen_uint(values->DWordLength, 0, 7) | 7312 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7313 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7314 __gen_uint(values->CommandSubType, 27, 28) | 7315 __gen_uint(values->CommandType, 29, 31); 7316 7317 dw[1] = 7318 __gen_uint(values->VertexIDElementOffset, 0, 5) | 7319 __gen_uint(values->VertexIDComponentNumber, 13, 14) | 7320 __gen_uint(values->VertexIDEnable, 15, 15) | 7321 __gen_uint(values->InstanceIDElementOffset, 16, 21) | 7322 __gen_uint(values->InstanceIDComponentNumber, 29, 30) | 7323 __gen_uint(values->InstanceIDEnable, 31, 31); 7324} 7325 7326#define GEN11_3DSTATE_VF_SGVS_2_length 3 7327#define GEN11_3DSTATE_VF_SGVS_2_length_bias 2 7328#define GEN11_3DSTATE_VF_SGVS_2_header \ 7329 .DWordLength = 1, \ 7330 ._3DCommandSubOpcode = 86, \ 7331 ._3DCommandOpcode = 0, \ 7332 .CommandSubType = 3, \ 7333 .CommandType = 3 7334 7335struct GEN11_3DSTATE_VF_SGVS_2 { 7336 uint32_t DWordLength; 7337 uint32_t _3DCommandSubOpcode; 7338 uint32_t _3DCommandOpcode; 7339 uint32_t CommandSubType; 7340 uint32_t CommandType; 7341 uint32_t XP0ElementOffset; 7342 uint32_t XP0SourceSelect; 7343#define VERTEX_LOCATION 1 7344#define XP0_PARAMETER 0 7345 uint32_t XP0ComponentNumber; 7346#define COMP_0 0 7347#define COMP_1 1 7348#define COMP_2 2 7349#define COMP_3 3 7350 uint32_t XP0Enable; 7351 uint32_t XP1ElementOffset; 7352 uint32_t XP1SourceSelect; 7353#define StartingInstanceLocation 1 7354#define XP1_PARAMETER 0 7355 uint32_t XP1ComponentNumber; 7356#define COMP_0 0 7357#define COMP_1 1 7358#define COMP_2 2 7359#define COMP_3 3 7360 uint32_t XP1Enable; 7361 uint32_t XP2ElementOffset; 7362 uint32_t XP2ComponentNumber; 7363#define COMP_0 0 7364#define COMP_1 1 7365#define COMP_2 2 7366#define COMP_3 3 7367 uint32_t XP2Enable; 7368}; 7369 7370static inline void 7371GEN11_3DSTATE_VF_SGVS_2_pack(__attribute__((unused)) __gen_user_data *data, 7372 __attribute__((unused)) void * restrict dst, 7373 __attribute__((unused)) const struct GEN11_3DSTATE_VF_SGVS_2 * restrict values) 7374{ 7375 uint32_t * restrict dw = (uint32_t * restrict) dst; 7376 7377 dw[0] = 7378 __gen_uint(values->DWordLength, 0, 7) | 7379 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7380 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7381 __gen_uint(values->CommandSubType, 27, 28) | 7382 __gen_uint(values->CommandType, 29, 31); 7383 7384 dw[1] = 7385 __gen_uint(values->XP0ElementOffset, 0, 5) | 7386 __gen_uint(values->XP0SourceSelect, 12, 12) | 7387 __gen_uint(values->XP0ComponentNumber, 13, 14) | 7388 __gen_uint(values->XP0Enable, 15, 15) | 7389 __gen_uint(values->XP1ElementOffset, 16, 21) | 7390 __gen_uint(values->XP1SourceSelect, 28, 28) | 7391 __gen_uint(values->XP1ComponentNumber, 29, 30) | 7392 __gen_uint(values->XP1Enable, 31, 31); 7393 7394 dw[2] = 7395 __gen_uint(values->XP2ElementOffset, 0, 5) | 7396 __gen_uint(values->XP2ComponentNumber, 13, 14) | 7397 __gen_uint(values->XP2Enable, 15, 15); 7398} 7399 7400#define GEN11_3DSTATE_VF_STATISTICS_length 1 7401#define GEN11_3DSTATE_VF_STATISTICS_length_bias 1 7402#define GEN11_3DSTATE_VF_STATISTICS_header \ 7403 ._3DCommandSubOpcode = 11, \ 7404 ._3DCommandOpcode = 0, \ 7405 .CommandSubType = 1, \ 7406 .CommandType = 3 7407 7408struct GEN11_3DSTATE_VF_STATISTICS { 7409 bool StatisticsEnable; 7410 uint32_t _3DCommandSubOpcode; 7411 uint32_t _3DCommandOpcode; 7412 uint32_t CommandSubType; 7413 uint32_t CommandType; 7414}; 7415 7416static inline void 7417GEN11_3DSTATE_VF_STATISTICS_pack(__attribute__((unused)) __gen_user_data *data, 7418 __attribute__((unused)) void * restrict dst, 7419 __attribute__((unused)) const struct GEN11_3DSTATE_VF_STATISTICS * restrict values) 7420{ 7421 uint32_t * restrict dw = (uint32_t * restrict) dst; 7422 7423 dw[0] = 7424 __gen_uint(values->StatisticsEnable, 0, 0) | 7425 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7426 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7427 __gen_uint(values->CommandSubType, 27, 28) | 7428 __gen_uint(values->CommandType, 29, 31); 7429} 7430 7431#define GEN11_3DSTATE_VF_TOPOLOGY_length 2 7432#define GEN11_3DSTATE_VF_TOPOLOGY_length_bias 2 7433#define GEN11_3DSTATE_VF_TOPOLOGY_header \ 7434 .DWordLength = 0, \ 7435 ._3DCommandSubOpcode = 75, \ 7436 ._3DCommandOpcode = 0, \ 7437 .CommandSubType = 3, \ 7438 .CommandType = 3 7439 7440struct GEN11_3DSTATE_VF_TOPOLOGY { 7441 uint32_t DWordLength; 7442 uint32_t _3DCommandSubOpcode; 7443 uint32_t _3DCommandOpcode; 7444 uint32_t CommandSubType; 7445 uint32_t CommandType; 7446 enum GEN11_3D_Prim_Topo_Type PrimitiveTopologyType; 7447}; 7448 7449static inline void 7450GEN11_3DSTATE_VF_TOPOLOGY_pack(__attribute__((unused)) __gen_user_data *data, 7451 __attribute__((unused)) void * restrict dst, 7452 __attribute__((unused)) const struct GEN11_3DSTATE_VF_TOPOLOGY * restrict values) 7453{ 7454 uint32_t * restrict dw = (uint32_t * restrict) dst; 7455 7456 dw[0] = 7457 __gen_uint(values->DWordLength, 0, 7) | 7458 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7459 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7460 __gen_uint(values->CommandSubType, 27, 28) | 7461 __gen_uint(values->CommandType, 29, 31); 7462 7463 dw[1] = 7464 __gen_uint(values->PrimitiveTopologyType, 0, 5); 7465} 7466 7467#define GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2 7468#define GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 2 7469#define GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\ 7470 .DWordLength = 0, \ 7471 ._3DCommandSubOpcode = 35, \ 7472 ._3DCommandOpcode = 0, \ 7473 .CommandSubType = 3, \ 7474 .CommandType = 3 7475 7476struct GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_CC { 7477 uint32_t DWordLength; 7478 uint32_t _3DCommandSubOpcode; 7479 uint32_t _3DCommandOpcode; 7480 uint32_t CommandSubType; 7481 uint32_t CommandType; 7482 uint64_t CCViewportPointer; 7483}; 7484 7485static inline void 7486GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__attribute__((unused)) __gen_user_data *data, 7487 __attribute__((unused)) void * restrict dst, 7488 __attribute__((unused)) const struct GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values) 7489{ 7490 uint32_t * restrict dw = (uint32_t * restrict) dst; 7491 7492 dw[0] = 7493 __gen_uint(values->DWordLength, 0, 7) | 7494 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7495 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7496 __gen_uint(values->CommandSubType, 27, 28) | 7497 __gen_uint(values->CommandType, 29, 31); 7498 7499 dw[1] = 7500 __gen_offset(values->CCViewportPointer, 5, 31); 7501} 7502 7503#define GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2 7504#define GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 2 7505#define GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\ 7506 .DWordLength = 0, \ 7507 ._3DCommandSubOpcode = 33, \ 7508 ._3DCommandOpcode = 0, \ 7509 .CommandSubType = 3, \ 7510 .CommandType = 3 7511 7512struct GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP { 7513 uint32_t DWordLength; 7514 uint32_t _3DCommandSubOpcode; 7515 uint32_t _3DCommandOpcode; 7516 uint32_t CommandSubType; 7517 uint32_t CommandType; 7518 uint64_t SFClipViewportPointer; 7519}; 7520 7521static inline void 7522GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 7523 __attribute__((unused)) void * restrict dst, 7524 __attribute__((unused)) const struct GEN11_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values) 7525{ 7526 uint32_t * restrict dw = (uint32_t * restrict) dst; 7527 7528 dw[0] = 7529 __gen_uint(values->DWordLength, 0, 7) | 7530 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7531 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7532 __gen_uint(values->CommandSubType, 27, 28) | 7533 __gen_uint(values->CommandType, 29, 31); 7534 7535 dw[1] = 7536 __gen_offset(values->SFClipViewportPointer, 6, 31); 7537} 7538 7539#define GEN11_3DSTATE_VS_length 9 7540#define GEN11_3DSTATE_VS_length_bias 2 7541#define GEN11_3DSTATE_VS_header \ 7542 .DWordLength = 7, \ 7543 ._3DCommandSubOpcode = 16, \ 7544 ._3DCommandOpcode = 0, \ 7545 .CommandSubType = 3, \ 7546 .CommandType = 3 7547 7548struct GEN11_3DSTATE_VS { 7549 uint32_t DWordLength; 7550 uint32_t _3DCommandSubOpcode; 7551 uint32_t _3DCommandOpcode; 7552 uint32_t CommandSubType; 7553 uint32_t CommandType; 7554 uint64_t KernelStartPointer; 7555 bool SoftwareExceptionEnable; 7556 bool AccessesUAV; 7557 bool IllegalOpcodeExceptionEnable; 7558 uint32_t FloatingPointMode; 7559#define IEEE754 0 7560#define Alternate 1 7561 uint32_t ThreadDispatchPriority; 7562#define High 1 7563 uint32_t BindingTableEntryCount; 7564 uint32_t SamplerCount; 7565#define NoSamplers 0 7566#define _14Samplers 1 7567#define _58Samplers 2 7568#define _912Samplers 3 7569#define _1316Samplers 4 7570 bool VectorMaskEnable; 7571 uint32_t PerThreadScratchSpace; 7572 __gen_address_type ScratchSpaceBasePointer; 7573 uint32_t VertexURBEntryReadOffset; 7574 uint32_t VertexURBEntryReadLength; 7575 uint32_t DispatchGRFStartRegisterForURBData; 7576 bool Enable; 7577 bool VertexCacheDisable; 7578 bool SIMD8DispatchEnable; 7579 bool SIMD8SingleInstanceDispatchEnable; 7580 bool StatisticsEnable; 7581 uint32_t MaximumNumberofThreads; 7582 uint32_t UserClipDistanceCullTestEnableBitmask; 7583 uint32_t UserClipDistanceClipTestEnableBitmask; 7584 uint32_t VertexURBEntryOutputLength; 7585 uint32_t VertexURBEntryOutputReadOffset; 7586}; 7587 7588static inline void 7589GEN11_3DSTATE_VS_pack(__attribute__((unused)) __gen_user_data *data, 7590 __attribute__((unused)) void * restrict dst, 7591 __attribute__((unused)) const struct GEN11_3DSTATE_VS * restrict values) 7592{ 7593 uint32_t * restrict dw = (uint32_t * restrict) dst; 7594 7595 dw[0] = 7596 __gen_uint(values->DWordLength, 0, 7) | 7597 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7598 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7599 __gen_uint(values->CommandSubType, 27, 28) | 7600 __gen_uint(values->CommandType, 29, 31); 7601 7602 const uint64_t v1 = 7603 __gen_offset(values->KernelStartPointer, 6, 63); 7604 dw[1] = v1; 7605 dw[2] = v1 >> 32; 7606 7607 dw[3] = 7608 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 7609 __gen_uint(values->AccessesUAV, 12, 12) | 7610 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 7611 __gen_uint(values->FloatingPointMode, 16, 16) | 7612 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 7613 __gen_uint(values->BindingTableEntryCount, 18, 25) | 7614 __gen_uint(values->SamplerCount, 27, 29) | 7615 __gen_uint(values->VectorMaskEnable, 30, 30); 7616 7617 const uint64_t v4 = 7618 __gen_uint(values->PerThreadScratchSpace, 0, 3); 7619 const uint64_t v4_address = 7620 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 7621 dw[4] = v4_address; 7622 dw[5] = (v4_address >> 32) | (v4 >> 32); 7623 7624 dw[6] = 7625 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 7626 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 7627 __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 7628 7629 dw[7] = 7630 __gen_uint(values->Enable, 0, 0) | 7631 __gen_uint(values->VertexCacheDisable, 1, 1) | 7632 __gen_uint(values->SIMD8DispatchEnable, 2, 2) | 7633 __gen_uint(values->SIMD8SingleInstanceDispatchEnable, 9, 9) | 7634 __gen_uint(values->StatisticsEnable, 10, 10) | 7635 __gen_uint(values->MaximumNumberofThreads, 22, 31); 7636 7637 dw[8] = 7638 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 7639 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 7640 __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 7641 __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 7642} 7643 7644#define GEN11_3DSTATE_WM_length 2 7645#define GEN11_3DSTATE_WM_length_bias 2 7646#define GEN11_3DSTATE_WM_header \ 7647 .DWordLength = 0, \ 7648 ._3DCommandSubOpcode = 20, \ 7649 ._3DCommandOpcode = 0, \ 7650 .CommandSubType = 3, \ 7651 .CommandType = 3 7652 7653struct GEN11_3DSTATE_WM { 7654 uint32_t DWordLength; 7655 uint32_t _3DCommandSubOpcode; 7656 uint32_t _3DCommandOpcode; 7657 uint32_t CommandSubType; 7658 uint32_t CommandType; 7659 uint32_t ForceKillPixelEnable; 7660#define ForceOff 1 7661#define ForceON 2 7662 uint32_t PointRasterizationRule; 7663#define RASTRULE_UPPER_LEFT 0 7664#define RASTRULE_UPPER_RIGHT 1 7665 bool LineStippleEnable; 7666 bool PolygonStippleEnable; 7667 uint32_t LineAntialiasingRegionWidth; 7668#define _05pixels 0 7669#define _10pixels 1 7670#define _20pixels 2 7671#define _40pixels 3 7672 uint32_t LineEndCapAntialiasingRegionWidth; 7673#define _05pixels 0 7674#define _10pixels 1 7675#define _20pixels 2 7676#define _40pixels 3 7677 uint32_t BarycentricInterpolationMode; 7678#define BIM_PERSPECTIVE_PIXEL 1 7679#define BIM_PERSPECTIVE_CENTROID 2 7680#define BIM_PERSPECTIVE_SAMPLE 4 7681#define BIM_LINEAR_PIXEL 8 7682#define BIM_LINEAR_CENTROID 16 7683#define BIM_LINEAR_SAMPLE 32 7684 uint32_t PositionZWInterpolationMode; 7685#define INTERP_PIXEL 0 7686#define INTERP_CENTROID 2 7687#define INTERP_SAMPLE 3 7688 uint32_t ForceThreadDispatchEnable; 7689#define ForceOff 1 7690#define ForceON 2 7691 uint32_t EarlyDepthStencilControl; 7692#define EDSC_NORMAL 0 7693#define EDSC_PSEXEC 1 7694#define EDSC_PREPS 2 7695 bool LegacyDiamondLineRasterization; 7696 bool LegacyHierarchicalDepthBufferResolveEnable; 7697 bool LegacyDepthBufferResolveEnable; 7698 bool LegacyDepthBufferClearEnable; 7699 bool StatisticsEnable; 7700}; 7701 7702static inline void 7703GEN11_3DSTATE_WM_pack(__attribute__((unused)) __gen_user_data *data, 7704 __attribute__((unused)) void * restrict dst, 7705 __attribute__((unused)) const struct GEN11_3DSTATE_WM * restrict values) 7706{ 7707 uint32_t * restrict dw = (uint32_t * restrict) dst; 7708 7709 dw[0] = 7710 __gen_uint(values->DWordLength, 0, 7) | 7711 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7712 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7713 __gen_uint(values->CommandSubType, 27, 28) | 7714 __gen_uint(values->CommandType, 29, 31); 7715 7716 dw[1] = 7717 __gen_uint(values->ForceKillPixelEnable, 0, 1) | 7718 __gen_uint(values->PointRasterizationRule, 2, 2) | 7719 __gen_uint(values->LineStippleEnable, 3, 3) | 7720 __gen_uint(values->PolygonStippleEnable, 4, 4) | 7721 __gen_uint(values->LineAntialiasingRegionWidth, 6, 7) | 7722 __gen_uint(values->LineEndCapAntialiasingRegionWidth, 8, 9) | 7723 __gen_uint(values->BarycentricInterpolationMode, 11, 16) | 7724 __gen_uint(values->PositionZWInterpolationMode, 17, 18) | 7725 __gen_uint(values->ForceThreadDispatchEnable, 19, 20) | 7726 __gen_uint(values->EarlyDepthStencilControl, 21, 22) | 7727 __gen_uint(values->LegacyDiamondLineRasterization, 26, 26) | 7728 __gen_uint(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) | 7729 __gen_uint(values->LegacyDepthBufferResolveEnable, 28, 28) | 7730 __gen_uint(values->LegacyDepthBufferClearEnable, 30, 30) | 7731 __gen_uint(values->StatisticsEnable, 31, 31); 7732} 7733 7734#define GEN11_3DSTATE_WM_CHROMAKEY_length 2 7735#define GEN11_3DSTATE_WM_CHROMAKEY_length_bias 2 7736#define GEN11_3DSTATE_WM_CHROMAKEY_header \ 7737 .DWordLength = 0, \ 7738 ._3DCommandSubOpcode = 76, \ 7739 ._3DCommandOpcode = 0, \ 7740 .CommandSubType = 3, \ 7741 .CommandType = 3 7742 7743struct GEN11_3DSTATE_WM_CHROMAKEY { 7744 uint32_t DWordLength; 7745 uint32_t _3DCommandSubOpcode; 7746 uint32_t _3DCommandOpcode; 7747 uint32_t CommandSubType; 7748 uint32_t CommandType; 7749 bool ChromaKeyKillEnable; 7750}; 7751 7752static inline void 7753GEN11_3DSTATE_WM_CHROMAKEY_pack(__attribute__((unused)) __gen_user_data *data, 7754 __attribute__((unused)) void * restrict dst, 7755 __attribute__((unused)) const struct GEN11_3DSTATE_WM_CHROMAKEY * restrict values) 7756{ 7757 uint32_t * restrict dw = (uint32_t * restrict) dst; 7758 7759 dw[0] = 7760 __gen_uint(values->DWordLength, 0, 7) | 7761 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7762 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7763 __gen_uint(values->CommandSubType, 27, 28) | 7764 __gen_uint(values->CommandType, 29, 31); 7765 7766 dw[1] = 7767 __gen_uint(values->ChromaKeyKillEnable, 31, 31); 7768} 7769 7770#define GEN11_3DSTATE_WM_DEPTH_STENCIL_length 4 7771#define GEN11_3DSTATE_WM_DEPTH_STENCIL_length_bias 2 7772#define GEN11_3DSTATE_WM_DEPTH_STENCIL_header \ 7773 .DWordLength = 2, \ 7774 ._3DCommandSubOpcode = 78, \ 7775 ._3DCommandOpcode = 0, \ 7776 .CommandSubType = 3, \ 7777 .CommandType = 3 7778 7779struct GEN11_3DSTATE_WM_DEPTH_STENCIL { 7780 uint32_t DWordLength; 7781 uint32_t _3DCommandSubOpcode; 7782 uint32_t _3DCommandOpcode; 7783 uint32_t CommandSubType; 7784 uint32_t CommandType; 7785 bool DepthBufferWriteEnable; 7786 bool DepthTestEnable; 7787 bool StencilBufferWriteEnable; 7788 bool StencilTestEnable; 7789 bool DoubleSidedStencilEnable; 7790 enum GEN11_3D_Compare_Function DepthTestFunction; 7791 enum GEN11_3D_Compare_Function StencilTestFunction; 7792 enum GEN11_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; 7793 enum GEN11_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; 7794 enum GEN11_3D_Stencil_Operation BackfaceStencilFailOp; 7795 enum GEN11_3D_Compare_Function BackfaceStencilTestFunction; 7796 enum GEN11_3D_Stencil_Operation StencilPassDepthPassOp; 7797 enum GEN11_3D_Stencil_Operation StencilPassDepthFailOp; 7798 enum GEN11_3D_Stencil_Operation StencilFailOp; 7799 uint32_t BackfaceStencilWriteMask; 7800 uint32_t BackfaceStencilTestMask; 7801 uint32_t StencilWriteMask; 7802 uint32_t StencilTestMask; 7803 uint32_t BackfaceStencilReferenceValue; 7804 uint32_t StencilReferenceValue; 7805}; 7806 7807static inline void 7808GEN11_3DSTATE_WM_DEPTH_STENCIL_pack(__attribute__((unused)) __gen_user_data *data, 7809 __attribute__((unused)) void * restrict dst, 7810 __attribute__((unused)) const struct GEN11_3DSTATE_WM_DEPTH_STENCIL * restrict values) 7811{ 7812 uint32_t * restrict dw = (uint32_t * restrict) dst; 7813 7814 dw[0] = 7815 __gen_uint(values->DWordLength, 0, 7) | 7816 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7817 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7818 __gen_uint(values->CommandSubType, 27, 28) | 7819 __gen_uint(values->CommandType, 29, 31); 7820 7821 dw[1] = 7822 __gen_uint(values->DepthBufferWriteEnable, 0, 0) | 7823 __gen_uint(values->DepthTestEnable, 1, 1) | 7824 __gen_uint(values->StencilBufferWriteEnable, 2, 2) | 7825 __gen_uint(values->StencilTestEnable, 3, 3) | 7826 __gen_uint(values->DoubleSidedStencilEnable, 4, 4) | 7827 __gen_uint(values->DepthTestFunction, 5, 7) | 7828 __gen_uint(values->StencilTestFunction, 8, 10) | 7829 __gen_uint(values->BackfaceStencilPassDepthPassOp, 11, 13) | 7830 __gen_uint(values->BackfaceStencilPassDepthFailOp, 14, 16) | 7831 __gen_uint(values->BackfaceStencilFailOp, 17, 19) | 7832 __gen_uint(values->BackfaceStencilTestFunction, 20, 22) | 7833 __gen_uint(values->StencilPassDepthPassOp, 23, 25) | 7834 __gen_uint(values->StencilPassDepthFailOp, 26, 28) | 7835 __gen_uint(values->StencilFailOp, 29, 31); 7836 7837 dw[2] = 7838 __gen_uint(values->BackfaceStencilWriteMask, 0, 7) | 7839 __gen_uint(values->BackfaceStencilTestMask, 8, 15) | 7840 __gen_uint(values->StencilWriteMask, 16, 23) | 7841 __gen_uint(values->StencilTestMask, 24, 31); 7842 7843 dw[3] = 7844 __gen_uint(values->BackfaceStencilReferenceValue, 0, 7) | 7845 __gen_uint(values->StencilReferenceValue, 8, 15); 7846} 7847 7848#define GEN11_3DSTATE_WM_HZ_OP_length 5 7849#define GEN11_3DSTATE_WM_HZ_OP_length_bias 2 7850#define GEN11_3DSTATE_WM_HZ_OP_header \ 7851 .DWordLength = 3, \ 7852 ._3DCommandSubOpcode = 82, \ 7853 ._3DCommandOpcode = 0, \ 7854 .CommandSubType = 3, \ 7855 .CommandType = 3 7856 7857struct GEN11_3DSTATE_WM_HZ_OP { 7858 uint32_t DWordLength; 7859 uint32_t _3DCommandSubOpcode; 7860 uint32_t _3DCommandOpcode; 7861 uint32_t CommandSubType; 7862 uint32_t CommandType; 7863 uint32_t NumberofMultisamples; 7864 uint32_t StencilClearValue; 7865 bool FullSurfaceDepthandStencilClear; 7866 bool PixelPositionOffsetEnable; 7867 bool HierarchicalDepthBufferResolveEnable; 7868 bool DepthBufferResolveEnable; 7869 bool ScissorRectangleEnable; 7870 bool DepthBufferClearEnable; 7871 bool StencilBufferClearEnable; 7872 uint32_t ClearRectangleXMin; 7873 uint32_t ClearRectangleYMin; 7874 uint32_t ClearRectangleXMax; 7875 uint32_t ClearRectangleYMax; 7876 uint32_t SampleMask; 7877}; 7878 7879static inline void 7880GEN11_3DSTATE_WM_HZ_OP_pack(__attribute__((unused)) __gen_user_data *data, 7881 __attribute__((unused)) void * restrict dst, 7882 __attribute__((unused)) const struct GEN11_3DSTATE_WM_HZ_OP * restrict values) 7883{ 7884 uint32_t * restrict dw = (uint32_t * restrict) dst; 7885 7886 dw[0] = 7887 __gen_uint(values->DWordLength, 0, 7) | 7888 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7889 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7890 __gen_uint(values->CommandSubType, 27, 28) | 7891 __gen_uint(values->CommandType, 29, 31); 7892 7893 dw[1] = 7894 __gen_uint(values->NumberofMultisamples, 13, 15) | 7895 __gen_uint(values->StencilClearValue, 16, 23) | 7896 __gen_uint(values->FullSurfaceDepthandStencilClear, 25, 25) | 7897 __gen_uint(values->PixelPositionOffsetEnable, 26, 26) | 7898 __gen_uint(values->HierarchicalDepthBufferResolveEnable, 27, 27) | 7899 __gen_uint(values->DepthBufferResolveEnable, 28, 28) | 7900 __gen_uint(values->ScissorRectangleEnable, 29, 29) | 7901 __gen_uint(values->DepthBufferClearEnable, 30, 30) | 7902 __gen_uint(values->StencilBufferClearEnable, 31, 31); 7903 7904 dw[2] = 7905 __gen_uint(values->ClearRectangleXMin, 0, 15) | 7906 __gen_uint(values->ClearRectangleYMin, 16, 31); 7907 7908 dw[3] = 7909 __gen_uint(values->ClearRectangleXMax, 0, 15) | 7910 __gen_uint(values->ClearRectangleYMax, 16, 31); 7911 7912 dw[4] = 7913 __gen_uint(values->SampleMask, 0, 15); 7914} 7915 7916#define GEN11_GPGPU_WALKER_length 15 7917#define GEN11_GPGPU_WALKER_length_bias 2 7918#define GEN11_GPGPU_WALKER_header \ 7919 .DWordLength = 13, \ 7920 .SubOpcode = 5, \ 7921 .MediaCommandOpcode = 1, \ 7922 .Pipeline = 2, \ 7923 .CommandType = 3 7924 7925struct GEN11_GPGPU_WALKER { 7926 uint32_t DWordLength; 7927 bool PredicateEnable; 7928 bool IndirectParameterEnable; 7929 uint32_t SubOpcode; 7930 uint32_t MediaCommandOpcode; 7931 uint32_t Pipeline; 7932 uint32_t CommandType; 7933 uint32_t InterfaceDescriptorOffset; 7934 uint32_t IndirectDataLength; 7935 uint64_t IndirectDataStartAddress; 7936 uint32_t ThreadWidthCounterMaximum; 7937 uint32_t ThreadHeightCounterMaximum; 7938 uint32_t ThreadDepthCounterMaximum; 7939 uint32_t SIMDSize; 7940#define SIMD8 0 7941#define SIMD16 1 7942#define SIMD32 2 7943 uint32_t ThreadGroupIDStartingX; 7944 uint32_t ThreadGroupIDXDimension; 7945 uint32_t ThreadGroupIDStartingY; 7946 uint32_t ThreadGroupIDYDimension; 7947 uint32_t ThreadGroupIDStartingResumeZ; 7948 uint32_t ThreadGroupIDZDimension; 7949 uint32_t RightExecutionMask; 7950 uint32_t BottomExecutionMask; 7951}; 7952 7953static inline void 7954GEN11_GPGPU_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 7955 __attribute__((unused)) void * restrict dst, 7956 __attribute__((unused)) const struct GEN11_GPGPU_WALKER * restrict values) 7957{ 7958 uint32_t * restrict dw = (uint32_t * restrict) dst; 7959 7960 dw[0] = 7961 __gen_uint(values->DWordLength, 0, 7) | 7962 __gen_uint(values->PredicateEnable, 8, 8) | 7963 __gen_uint(values->IndirectParameterEnable, 10, 10) | 7964 __gen_uint(values->SubOpcode, 16, 23) | 7965 __gen_uint(values->MediaCommandOpcode, 24, 26) | 7966 __gen_uint(values->Pipeline, 27, 28) | 7967 __gen_uint(values->CommandType, 29, 31); 7968 7969 dw[1] = 7970 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 7971 7972 dw[2] = 7973 __gen_uint(values->IndirectDataLength, 0, 16); 7974 7975 dw[3] = 7976 __gen_offset(values->IndirectDataStartAddress, 6, 31); 7977 7978 dw[4] = 7979 __gen_uint(values->ThreadWidthCounterMaximum, 0, 5) | 7980 __gen_uint(values->ThreadHeightCounterMaximum, 8, 13) | 7981 __gen_uint(values->ThreadDepthCounterMaximum, 16, 21) | 7982 __gen_uint(values->SIMDSize, 30, 31); 7983 7984 dw[5] = 7985 __gen_uint(values->ThreadGroupIDStartingX, 0, 31); 7986 7987 dw[6] = 0; 7988 7989 dw[7] = 7990 __gen_uint(values->ThreadGroupIDXDimension, 0, 31); 7991 7992 dw[8] = 7993 __gen_uint(values->ThreadGroupIDStartingY, 0, 31); 7994 7995 dw[9] = 0; 7996 7997 dw[10] = 7998 __gen_uint(values->ThreadGroupIDYDimension, 0, 31); 7999 8000 dw[11] = 8001 __gen_uint(values->ThreadGroupIDStartingResumeZ, 0, 31); 8002 8003 dw[12] = 8004 __gen_uint(values->ThreadGroupIDZDimension, 0, 31); 8005 8006 dw[13] = 8007 __gen_uint(values->RightExecutionMask, 0, 31); 8008 8009 dw[14] = 8010 __gen_uint(values->BottomExecutionMask, 0, 31); 8011} 8012 8013#define GEN11_MEDIA_CURBE_LOAD_length 4 8014#define GEN11_MEDIA_CURBE_LOAD_length_bias 2 8015#define GEN11_MEDIA_CURBE_LOAD_header \ 8016 .DWordLength = 2, \ 8017 .SubOpcode = 1, \ 8018 .MediaCommandOpcode = 0, \ 8019 .Pipeline = 2, \ 8020 .CommandType = 3 8021 8022struct GEN11_MEDIA_CURBE_LOAD { 8023 uint32_t DWordLength; 8024 uint32_t SubOpcode; 8025 uint32_t MediaCommandOpcode; 8026 uint32_t Pipeline; 8027 uint32_t CommandType; 8028 uint32_t CURBETotalDataLength; 8029 uint32_t CURBEDataStartAddress; 8030}; 8031 8032static inline void 8033GEN11_MEDIA_CURBE_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 8034 __attribute__((unused)) void * restrict dst, 8035 __attribute__((unused)) const struct GEN11_MEDIA_CURBE_LOAD * restrict values) 8036{ 8037 uint32_t * restrict dw = (uint32_t * restrict) dst; 8038 8039 dw[0] = 8040 __gen_uint(values->DWordLength, 0, 15) | 8041 __gen_uint(values->SubOpcode, 16, 23) | 8042 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8043 __gen_uint(values->Pipeline, 27, 28) | 8044 __gen_uint(values->CommandType, 29, 31); 8045 8046 dw[1] = 0; 8047 8048 dw[2] = 8049 __gen_uint(values->CURBETotalDataLength, 0, 16); 8050 8051 dw[3] = 8052 __gen_uint(values->CURBEDataStartAddress, 0, 31); 8053} 8054 8055#define GEN11_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4 8056#define GEN11_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 2 8057#define GEN11_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\ 8058 .DWordLength = 2, \ 8059 .SubOpcode = 2, \ 8060 .MediaCommandOpcode = 0, \ 8061 .Pipeline = 2, \ 8062 .CommandType = 3 8063 8064struct GEN11_MEDIA_INTERFACE_DESCRIPTOR_LOAD { 8065 uint32_t DWordLength; 8066 uint32_t SubOpcode; 8067 uint32_t MediaCommandOpcode; 8068 uint32_t Pipeline; 8069 uint32_t CommandType; 8070 uint32_t InterfaceDescriptorTotalLength; 8071 uint64_t InterfaceDescriptorDataStartAddress; 8072}; 8073 8074static inline void 8075GEN11_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 8076 __attribute__((unused)) void * restrict dst, 8077 __attribute__((unused)) const struct GEN11_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values) 8078{ 8079 uint32_t * restrict dw = (uint32_t * restrict) dst; 8080 8081 dw[0] = 8082 __gen_uint(values->DWordLength, 0, 15) | 8083 __gen_uint(values->SubOpcode, 16, 23) | 8084 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8085 __gen_uint(values->Pipeline, 27, 28) | 8086 __gen_uint(values->CommandType, 29, 31); 8087 8088 dw[1] = 0; 8089 8090 dw[2] = 8091 __gen_uint(values->InterfaceDescriptorTotalLength, 0, 16); 8092 8093 dw[3] = 8094 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31); 8095} 8096 8097#define GEN11_MEDIA_OBJECT_length_bias 2 8098#define GEN11_MEDIA_OBJECT_header \ 8099 .DWordLength = 4, \ 8100 .MediaCommandSubOpcode = 0, \ 8101 .MediaCommandOpcode = 1, \ 8102 .MediaCommandPipeline = 2, \ 8103 .CommandType = 3 8104 8105struct GEN11_MEDIA_OBJECT { 8106 uint32_t DWordLength; 8107 uint32_t MediaCommandSubOpcode; 8108 uint32_t MediaCommandOpcode; 8109 uint32_t MediaCommandPipeline; 8110 uint32_t CommandType; 8111 uint32_t InterfaceDescriptorOffset; 8112 uint32_t IndirectDataLength; 8113 uint32_t SubSliceDestinationSelect; 8114#define Subslice3 3 8115#define SubSlice2 2 8116#define SubSlice1 1 8117#define SubSlice0 0 8118 uint32_t SliceDestinationSelect; 8119#define Slice0 0 8120#define Slice1 1 8121#define Slice2 2 8122 uint32_t ForceDestination; 8123 uint32_t ThreadSynchronization; 8124#define Nothreadsynchronization 0 8125#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 8126 uint32_t SliceDestinationSelectMSBs; 8127 bool ChildrenPresent; 8128 __gen_address_type IndirectDataStartAddress; 8129 uint32_t XPosition; 8130 uint32_t YPosition; 8131 uint32_t BlockColor; 8132 /* variable length fields follow */ 8133}; 8134 8135static inline void 8136GEN11_MEDIA_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 8137 __attribute__((unused)) void * restrict dst, 8138 __attribute__((unused)) const struct GEN11_MEDIA_OBJECT * restrict values) 8139{ 8140 uint32_t * restrict dw = (uint32_t * restrict) dst; 8141 8142 dw[0] = 8143 __gen_uint(values->DWordLength, 0, 14) | 8144 __gen_uint(values->MediaCommandSubOpcode, 16, 23) | 8145 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8146 __gen_uint(values->MediaCommandPipeline, 27, 28) | 8147 __gen_uint(values->CommandType, 29, 31); 8148 8149 dw[1] = 8150 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8151 8152 dw[2] = 8153 __gen_uint(values->IndirectDataLength, 0, 16) | 8154 __gen_uint(values->SubSliceDestinationSelect, 17, 18) | 8155 __gen_uint(values->SliceDestinationSelect, 19, 20) | 8156 __gen_uint(values->ForceDestination, 22, 22) | 8157 __gen_uint(values->ThreadSynchronization, 24, 24) | 8158 __gen_uint(values->SliceDestinationSelectMSBs, 25, 26) | 8159 __gen_uint(values->ChildrenPresent, 31, 31); 8160 8161 dw[3] = __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, 0); 8162 8163 dw[4] = 8164 __gen_uint(values->XPosition, 0, 8) | 8165 __gen_uint(values->YPosition, 16, 24); 8166 8167 dw[5] = 8168 __gen_uint(values->BlockColor, 16, 23); 8169} 8170 8171#define GEN11_MEDIA_OBJECT_GRPID_length_bias 2 8172#define GEN11_MEDIA_OBJECT_GRPID_header \ 8173 .DWordLength = 5, \ 8174 .MediaCommandSubOpcode = 6, \ 8175 .MediaCommandOpcode = 1, \ 8176 .MediaCommandPipeline = 2, \ 8177 .CommandType = 3 8178 8179struct GEN11_MEDIA_OBJECT_GRPID { 8180 uint32_t DWordLength; 8181 uint32_t MediaCommandSubOpcode; 8182 uint32_t MediaCommandOpcode; 8183 uint32_t MediaCommandPipeline; 8184 uint32_t CommandType; 8185 uint32_t InterfaceDescriptorOffset; 8186 uint32_t IndirectDataLength; 8187 uint32_t EndofThreadGroup; 8188 __gen_address_type IndirectDataStartAddress; 8189 uint32_t XPosition; 8190 uint32_t YPosition; 8191 uint32_t BlockColor; 8192 uint32_t GroupID; 8193 /* variable length fields follow */ 8194}; 8195 8196static inline void 8197GEN11_MEDIA_OBJECT_GRPID_pack(__attribute__((unused)) __gen_user_data *data, 8198 __attribute__((unused)) void * restrict dst, 8199 __attribute__((unused)) const struct GEN11_MEDIA_OBJECT_GRPID * restrict values) 8200{ 8201 uint32_t * restrict dw = (uint32_t * restrict) dst; 8202 8203 dw[0] = 8204 __gen_uint(values->DWordLength, 0, 15) | 8205 __gen_uint(values->MediaCommandSubOpcode, 16, 23) | 8206 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8207 __gen_uint(values->MediaCommandPipeline, 27, 28) | 8208 __gen_uint(values->CommandType, 29, 31); 8209 8210 dw[1] = 8211 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8212 8213 dw[2] = 8214 __gen_uint(values->IndirectDataLength, 0, 16) | 8215 __gen_uint(values->EndofThreadGroup, 23, 23); 8216 8217 dw[3] = __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, 0); 8218 8219 dw[4] = 8220 __gen_uint(values->XPosition, 0, 8) | 8221 __gen_uint(values->YPosition, 16, 24); 8222 8223 dw[5] = 8224 __gen_uint(values->BlockColor, 16, 23); 8225 8226 dw[6] = 8227 __gen_uint(values->GroupID, 0, 31); 8228} 8229 8230#define GEN11_MEDIA_OBJECT_PRT_length 16 8231#define GEN11_MEDIA_OBJECT_PRT_length_bias 2 8232#define GEN11_MEDIA_OBJECT_PRT_header \ 8233 .DWordLength = 14, \ 8234 .SubOpcode = 2, \ 8235 .MediaCommandOpcode = 1, \ 8236 .Pipeline = 2, \ 8237 .CommandType = 3 8238 8239struct GEN11_MEDIA_OBJECT_PRT { 8240 uint32_t DWordLength; 8241 uint32_t SubOpcode; 8242 uint32_t MediaCommandOpcode; 8243 uint32_t Pipeline; 8244 uint32_t CommandType; 8245 uint32_t InterfaceDescriptorOffset; 8246 uint32_t PRT_FenceType; 8247#define Rootthreadqueue 0 8248#define VFEstateflush 1 8249 bool PRT_FenceNeeded; 8250 bool ChildrenPresent; 8251 uint32_t InlineData[12]; 8252}; 8253 8254static inline void 8255GEN11_MEDIA_OBJECT_PRT_pack(__attribute__((unused)) __gen_user_data *data, 8256 __attribute__((unused)) void * restrict dst, 8257 __attribute__((unused)) const struct GEN11_MEDIA_OBJECT_PRT * restrict values) 8258{ 8259 uint32_t * restrict dw = (uint32_t * restrict) dst; 8260 8261 dw[0] = 8262 __gen_uint(values->DWordLength, 0, 14) | 8263 __gen_uint(values->SubOpcode, 16, 23) | 8264 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8265 __gen_uint(values->Pipeline, 27, 28) | 8266 __gen_uint(values->CommandType, 29, 31); 8267 8268 dw[1] = 8269 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8270 8271 dw[2] = 8272 __gen_uint(values->PRT_FenceType, 22, 22) | 8273 __gen_uint(values->PRT_FenceNeeded, 23, 23) | 8274 __gen_uint(values->ChildrenPresent, 31, 31); 8275 8276 dw[3] = 0; 8277 8278 dw[4] = 8279 __gen_uint(values->InlineData[0], 0, 31); 8280 8281 dw[5] = 8282 __gen_uint(values->InlineData[1], 0, 31); 8283 8284 dw[6] = 8285 __gen_uint(values->InlineData[2], 0, 31); 8286 8287 dw[7] = 8288 __gen_uint(values->InlineData[3], 0, 31); 8289 8290 dw[8] = 8291 __gen_uint(values->InlineData[4], 0, 31); 8292 8293 dw[9] = 8294 __gen_uint(values->InlineData[5], 0, 31); 8295 8296 dw[10] = 8297 __gen_uint(values->InlineData[6], 0, 31); 8298 8299 dw[11] = 8300 __gen_uint(values->InlineData[7], 0, 31); 8301 8302 dw[12] = 8303 __gen_uint(values->InlineData[8], 0, 31); 8304 8305 dw[13] = 8306 __gen_uint(values->InlineData[9], 0, 31); 8307 8308 dw[14] = 8309 __gen_uint(values->InlineData[10], 0, 31); 8310 8311 dw[15] = 8312 __gen_uint(values->InlineData[11], 0, 31); 8313} 8314 8315#define GEN11_MEDIA_OBJECT_WALKER_length_bias 2 8316#define GEN11_MEDIA_OBJECT_WALKER_header \ 8317 .DWordLength = 15, \ 8318 .SubOpcode = 3, \ 8319 .MediaCommandOpcode = 1, \ 8320 .Pipeline = 2, \ 8321 .CommandType = 3 8322 8323struct GEN11_MEDIA_OBJECT_WALKER { 8324 uint32_t DWordLength; 8325 uint32_t SubOpcode; 8326 uint32_t MediaCommandOpcode; 8327 uint32_t Pipeline; 8328 uint32_t CommandType; 8329 uint32_t InterfaceDescriptorOffset; 8330 uint32_t IndirectDataLength; 8331 uint32_t MaskedDispatch; 8332 uint32_t ThreadSynchronization; 8333#define Nothreadsynchronization 0 8334#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 8335 uint32_t IndirectDataStartAddress; 8336 uint32_t GroupIDLoopSelect; 8337#define No_Groups 0 8338#define Color_Groups 1 8339#define InnerLocal_Groups 2 8340#define MidLocal_Groups 3 8341#define OuterLocal_Groups 4 8342#define InnerGlobal_Groups 5 8343 int32_t MidLoopUnitX; 8344 int32_t LocalMidLoopUnitY; 8345 uint32_t MiddleLoopExtraSteps; 8346 uint32_t ColorCountMinusOne; 8347 uint32_t LocalLoopExecCount; 8348 uint32_t GlobalLoopExecCount; 8349 uint32_t BlockResolutionX; 8350 uint32_t BlockResolutionY; 8351 uint32_t LocalStartX; 8352 uint32_t LocalStartY; 8353 int32_t LocalOuterLoopStrideX; 8354 int32_t LocalOuterLoopStrideY; 8355 int32_t LocalInnerLoopUnitX; 8356 int32_t LocalInnerLoopUnitY; 8357 uint32_t GlobalResolutionX; 8358 uint32_t GlobalResolutionY; 8359 int32_t GlobalStartX; 8360 int32_t GlobalStartY; 8361 int32_t GlobalOuterLoopStrideX; 8362 int32_t GlobalOuterLoopStrideY; 8363 int32_t GlobalInnerLoopUnitX; 8364 int32_t GlobalInnerLoopUnitY; 8365 /* variable length fields follow */ 8366}; 8367 8368static inline void 8369GEN11_MEDIA_OBJECT_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 8370 __attribute__((unused)) void * restrict dst, 8371 __attribute__((unused)) const struct GEN11_MEDIA_OBJECT_WALKER * restrict values) 8372{ 8373 uint32_t * restrict dw = (uint32_t * restrict) dst; 8374 8375 dw[0] = 8376 __gen_uint(values->DWordLength, 0, 14) | 8377 __gen_uint(values->SubOpcode, 16, 23) | 8378 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8379 __gen_uint(values->Pipeline, 27, 28) | 8380 __gen_uint(values->CommandType, 29, 31); 8381 8382 dw[1] = 8383 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8384 8385 dw[2] = 8386 __gen_uint(values->IndirectDataLength, 0, 16) | 8387 __gen_uint(values->MaskedDispatch, 22, 23) | 8388 __gen_uint(values->ThreadSynchronization, 24, 24); 8389 8390 dw[3] = 8391 __gen_uint(values->IndirectDataStartAddress, 0, 31); 8392 8393 dw[4] = 0; 8394 8395 dw[5] = 8396 __gen_uint(values->GroupIDLoopSelect, 8, 31); 8397 8398 dw[6] = 8399 __gen_sint(values->MidLoopUnitX, 8, 9) | 8400 __gen_sint(values->LocalMidLoopUnitY, 12, 13) | 8401 __gen_uint(values->MiddleLoopExtraSteps, 16, 20) | 8402 __gen_uint(values->ColorCountMinusOne, 24, 31); 8403 8404 dw[7] = 8405 __gen_uint(values->LocalLoopExecCount, 0, 11) | 8406 __gen_uint(values->GlobalLoopExecCount, 16, 27); 8407 8408 dw[8] = 8409 __gen_uint(values->BlockResolutionX, 0, 10) | 8410 __gen_uint(values->BlockResolutionY, 16, 26); 8411 8412 dw[9] = 8413 __gen_uint(values->LocalStartX, 0, 10) | 8414 __gen_uint(values->LocalStartY, 16, 26); 8415 8416 dw[10] = 0; 8417 8418 dw[11] = 8419 __gen_sint(values->LocalOuterLoopStrideX, 0, 11) | 8420 __gen_sint(values->LocalOuterLoopStrideY, 16, 27); 8421 8422 dw[12] = 8423 __gen_sint(values->LocalInnerLoopUnitX, 0, 11) | 8424 __gen_sint(values->LocalInnerLoopUnitY, 16, 27); 8425 8426 dw[13] = 8427 __gen_uint(values->GlobalResolutionX, 0, 10) | 8428 __gen_uint(values->GlobalResolutionY, 16, 26); 8429 8430 dw[14] = 8431 __gen_sint(values->GlobalStartX, 0, 11) | 8432 __gen_sint(values->GlobalStartY, 16, 27); 8433 8434 dw[15] = 8435 __gen_sint(values->GlobalOuterLoopStrideX, 0, 11) | 8436 __gen_sint(values->GlobalOuterLoopStrideY, 16, 27); 8437 8438 dw[16] = 8439 __gen_sint(values->GlobalInnerLoopUnitX, 0, 11) | 8440 __gen_sint(values->GlobalInnerLoopUnitY, 16, 27); 8441} 8442 8443#define GEN11_MEDIA_STATE_FLUSH_length 2 8444#define GEN11_MEDIA_STATE_FLUSH_length_bias 2 8445#define GEN11_MEDIA_STATE_FLUSH_header \ 8446 .DWordLength = 0, \ 8447 .SubOpcode = 4, \ 8448 .MediaCommandOpcode = 0, \ 8449 .Pipeline = 2, \ 8450 .CommandType = 3 8451 8452struct GEN11_MEDIA_STATE_FLUSH { 8453 uint32_t DWordLength; 8454 uint32_t SubOpcode; 8455 uint32_t MediaCommandOpcode; 8456 uint32_t Pipeline; 8457 uint32_t CommandType; 8458 uint32_t InterfaceDescriptorOffset; 8459 bool FlushtoGO; 8460}; 8461 8462static inline void 8463GEN11_MEDIA_STATE_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 8464 __attribute__((unused)) void * restrict dst, 8465 __attribute__((unused)) const struct GEN11_MEDIA_STATE_FLUSH * restrict values) 8466{ 8467 uint32_t * restrict dw = (uint32_t * restrict) dst; 8468 8469 dw[0] = 8470 __gen_uint(values->DWordLength, 0, 15) | 8471 __gen_uint(values->SubOpcode, 16, 23) | 8472 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8473 __gen_uint(values->Pipeline, 27, 28) | 8474 __gen_uint(values->CommandType, 29, 31); 8475 8476 dw[1] = 8477 __gen_uint(values->InterfaceDescriptorOffset, 0, 5) | 8478 __gen_uint(values->FlushtoGO, 7, 7); 8479} 8480 8481#define GEN11_MEDIA_VFE_STATE_length 9 8482#define GEN11_MEDIA_VFE_STATE_length_bias 2 8483#define GEN11_MEDIA_VFE_STATE_header \ 8484 .DWordLength = 7, \ 8485 .SubOpcode = 0, \ 8486 .MediaCommandOpcode = 0, \ 8487 .Pipeline = 2, \ 8488 .CommandType = 3 8489 8490struct GEN11_MEDIA_VFE_STATE { 8491 uint32_t DWordLength; 8492 uint32_t SubOpcode; 8493 uint32_t MediaCommandOpcode; 8494 uint32_t Pipeline; 8495 uint32_t CommandType; 8496 uint32_t PerThreadScratchSpace; 8497 uint32_t StackSize; 8498 __gen_address_type ScratchSpaceBasePointer; 8499 uint32_t DispatchLoadBalance; 8500#define ColorLSB 1 8501#define LeastLoaded 0 8502 uint32_t NumberofURBEntries; 8503 uint32_t MaximumNumberofThreads; 8504 uint32_t MaximumNumberofDualSubslices; 8505 uint32_t CURBEAllocationSize; 8506 uint32_t URBEntryAllocationSize; 8507}; 8508 8509static inline void 8510GEN11_MEDIA_VFE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 8511 __attribute__((unused)) void * restrict dst, 8512 __attribute__((unused)) const struct GEN11_MEDIA_VFE_STATE * restrict values) 8513{ 8514 uint32_t * restrict dw = (uint32_t * restrict) dst; 8515 8516 dw[0] = 8517 __gen_uint(values->DWordLength, 0, 15) | 8518 __gen_uint(values->SubOpcode, 16, 23) | 8519 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8520 __gen_uint(values->Pipeline, 27, 28) | 8521 __gen_uint(values->CommandType, 29, 31); 8522 8523 const uint64_t v1 = 8524 __gen_uint(values->PerThreadScratchSpace, 0, 3) | 8525 __gen_uint(values->StackSize, 4, 7); 8526 const uint64_t v1_address = 8527 __gen_combine_address(data, &dw[1], values->ScratchSpaceBasePointer, v1); 8528 dw[1] = v1_address; 8529 dw[2] = (v1_address >> 32) | (v1 >> 32); 8530 8531 dw[3] = 8532 __gen_uint(values->DispatchLoadBalance, 2, 2) | 8533 __gen_uint(values->NumberofURBEntries, 8, 15) | 8534 __gen_uint(values->MaximumNumberofThreads, 16, 31); 8535 8536 dw[4] = 8537 __gen_uint(values->MaximumNumberofDualSubslices, 0, 7); 8538 8539 dw[5] = 8540 __gen_uint(values->CURBEAllocationSize, 0, 15) | 8541 __gen_uint(values->URBEntryAllocationSize, 16, 31); 8542 8543 dw[6] = 0; 8544 8545 dw[7] = 0; 8546 8547 dw[8] = 0; 8548} 8549 8550#define GEN11_MI_ARB_CHECK_length 1 8551#define GEN11_MI_ARB_CHECK_length_bias 1 8552#define GEN11_MI_ARB_CHECK_header \ 8553 .MICommandOpcode = 5, \ 8554 .CommandType = 0 8555 8556struct GEN11_MI_ARB_CHECK { 8557 uint32_t MICommandOpcode; 8558 uint32_t CommandType; 8559}; 8560 8561static inline void 8562GEN11_MI_ARB_CHECK_pack(__attribute__((unused)) __gen_user_data *data, 8563 __attribute__((unused)) void * restrict dst, 8564 __attribute__((unused)) const struct GEN11_MI_ARB_CHECK * restrict values) 8565{ 8566 uint32_t * restrict dw = (uint32_t * restrict) dst; 8567 8568 dw[0] = 8569 __gen_uint(values->MICommandOpcode, 23, 28) | 8570 __gen_uint(values->CommandType, 29, 31); 8571} 8572 8573#define GEN11_MI_ARB_ON_OFF_length 1 8574#define GEN11_MI_ARB_ON_OFF_length_bias 1 8575#define GEN11_MI_ARB_ON_OFF_header \ 8576 .ArbitrationEnable = 1, \ 8577 .MICommandOpcode = 8, \ 8578 .CommandType = 0 8579 8580struct GEN11_MI_ARB_ON_OFF { 8581 bool ArbitrationEnable; 8582 bool AllowLiteRestore; 8583 uint32_t MICommandOpcode; 8584 uint32_t CommandType; 8585}; 8586 8587static inline void 8588GEN11_MI_ARB_ON_OFF_pack(__attribute__((unused)) __gen_user_data *data, 8589 __attribute__((unused)) void * restrict dst, 8590 __attribute__((unused)) const struct GEN11_MI_ARB_ON_OFF * restrict values) 8591{ 8592 uint32_t * restrict dw = (uint32_t * restrict) dst; 8593 8594 dw[0] = 8595 __gen_uint(values->ArbitrationEnable, 0, 0) | 8596 __gen_uint(values->AllowLiteRestore, 1, 1) | 8597 __gen_uint(values->MICommandOpcode, 23, 28) | 8598 __gen_uint(values->CommandType, 29, 31); 8599} 8600 8601#define GEN11_MI_ATOMIC_length 3 8602#define GEN11_MI_ATOMIC_length_bias 2 8603#define GEN11_MI_ATOMIC_header \ 8604 .DWordLength = 1, \ 8605 .MICommandOpcode = 47, \ 8606 .CommandType = 0 8607 8608struct GEN11_MI_ATOMIC { 8609 uint32_t DWordLength; 8610 enum GEN11_Atomic_OPCODE ATOMICOPCODE; 8611 bool ReturnDataControl; 8612 bool CSSTALL; 8613 bool InlineData; 8614 uint32_t DataSize; 8615#define MI_ATOMIC_DWORD 0 8616#define MI_ATOMIC_QWORD 1 8617#define MI_ATOMIC_OCTWORD 2 8618#define MI_ATOMIC_RESERVED 3 8619 bool PostSyncOperation; 8620 uint32_t MemoryType; 8621#define PerProcessGraphicsAddress 0 8622#define GlobalGraphicsAddress 1 8623 uint32_t MICommandOpcode; 8624 uint32_t CommandType; 8625 __gen_address_type MemoryAddress; 8626 uint32_t Operand1DataDword0; 8627 uint32_t Operand2DataDword0; 8628 uint32_t Operand1DataDword1; 8629 uint32_t Operand2DataDword1; 8630 uint32_t Operand1DataDword2; 8631 uint32_t Operand2DataDword2; 8632 uint32_t Operand1DataDword3; 8633 uint32_t Operand2DataDword3; 8634}; 8635 8636static inline void 8637GEN11_MI_ATOMIC_pack(__attribute__((unused)) __gen_user_data *data, 8638 __attribute__((unused)) void * restrict dst, 8639 __attribute__((unused)) const struct GEN11_MI_ATOMIC * restrict values) 8640{ 8641 uint32_t * restrict dw = (uint32_t * restrict) dst; 8642 8643 dw[0] = 8644 __gen_uint(values->DWordLength, 0, 7) | 8645 __gen_uint(values->ATOMICOPCODE, 8, 15) | 8646 __gen_uint(values->ReturnDataControl, 16, 16) | 8647 __gen_uint(values->CSSTALL, 17, 17) | 8648 __gen_uint(values->InlineData, 18, 18) | 8649 __gen_uint(values->DataSize, 19, 20) | 8650 __gen_uint(values->PostSyncOperation, 21, 21) | 8651 __gen_uint(values->MemoryType, 22, 22) | 8652 __gen_uint(values->MICommandOpcode, 23, 28) | 8653 __gen_uint(values->CommandType, 29, 31); 8654 8655 const uint64_t v1_address = 8656 __gen_combine_address(data, &dw[1], values->MemoryAddress, 0); 8657 dw[1] = v1_address; 8658 dw[2] = v1_address >> 32; 8659} 8660 8661#define GEN11_MI_BATCH_BUFFER_END_length 1 8662#define GEN11_MI_BATCH_BUFFER_END_length_bias 1 8663#define GEN11_MI_BATCH_BUFFER_END_header \ 8664 .MICommandOpcode = 10, \ 8665 .CommandType = 0 8666 8667struct GEN11_MI_BATCH_BUFFER_END { 8668 bool EndContext; 8669 uint32_t MICommandOpcode; 8670 uint32_t CommandType; 8671}; 8672 8673static inline void 8674GEN11_MI_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 8675 __attribute__((unused)) void * restrict dst, 8676 __attribute__((unused)) const struct GEN11_MI_BATCH_BUFFER_END * restrict values) 8677{ 8678 uint32_t * restrict dw = (uint32_t * restrict) dst; 8679 8680 dw[0] = 8681 __gen_uint(values->EndContext, 0, 0) | 8682 __gen_uint(values->MICommandOpcode, 23, 28) | 8683 __gen_uint(values->CommandType, 29, 31); 8684} 8685 8686#define GEN11_MI_BATCH_BUFFER_START_length 3 8687#define GEN11_MI_BATCH_BUFFER_START_length_bias 2 8688#define GEN11_MI_BATCH_BUFFER_START_header \ 8689 .DWordLength = 1, \ 8690 .MICommandOpcode = 49, \ 8691 .CommandType = 0 8692 8693struct GEN11_MI_BATCH_BUFFER_START { 8694 uint32_t DWordLength; 8695 uint32_t AddressSpaceIndicator; 8696#define ASI_GGTT 0 8697#define ASI_PPGTT 1 8698 bool ResourceStreamerEnable; 8699 bool PredicationEnable; 8700 uint32_t SecondLevelBatchBuffer; 8701#define Firstlevelbatch 0 8702#define Secondlevelbatch 1 8703 uint32_t MICommandOpcode; 8704 uint32_t CommandType; 8705 __gen_address_type BatchBufferStartAddress; 8706}; 8707 8708static inline void 8709GEN11_MI_BATCH_BUFFER_START_pack(__attribute__((unused)) __gen_user_data *data, 8710 __attribute__((unused)) void * restrict dst, 8711 __attribute__((unused)) const struct GEN11_MI_BATCH_BUFFER_START * restrict values) 8712{ 8713 uint32_t * restrict dw = (uint32_t * restrict) dst; 8714 8715 dw[0] = 8716 __gen_uint(values->DWordLength, 0, 7) | 8717 __gen_uint(values->AddressSpaceIndicator, 8, 8) | 8718 __gen_uint(values->ResourceStreamerEnable, 10, 10) | 8719 __gen_uint(values->PredicationEnable, 15, 15) | 8720 __gen_uint(values->SecondLevelBatchBuffer, 22, 22) | 8721 __gen_uint(values->MICommandOpcode, 23, 28) | 8722 __gen_uint(values->CommandType, 29, 31); 8723 8724 const uint64_t v1_address = 8725 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, 0); 8726 dw[1] = v1_address; 8727 dw[2] = v1_address >> 32; 8728} 8729 8730#define GEN11_MI_CLFLUSH_length_bias 2 8731#define GEN11_MI_CLFLUSH_header \ 8732 .DWordLength = 1, \ 8733 .MICommandOpcode = 39, \ 8734 .CommandType = 0 8735 8736struct GEN11_MI_CLFLUSH { 8737 uint32_t DWordLength; 8738 bool UseGlobalGTT; 8739 uint32_t MICommandOpcode; 8740 uint32_t CommandType; 8741 uint32_t StartingCachelineOffset; 8742 __gen_address_type PageBaseAddress; 8743 /* variable length fields follow */ 8744}; 8745 8746static inline void 8747GEN11_MI_CLFLUSH_pack(__attribute__((unused)) __gen_user_data *data, 8748 __attribute__((unused)) void * restrict dst, 8749 __attribute__((unused)) const struct GEN11_MI_CLFLUSH * restrict values) 8750{ 8751 uint32_t * restrict dw = (uint32_t * restrict) dst; 8752 8753 dw[0] = 8754 __gen_uint(values->DWordLength, 0, 9) | 8755 __gen_uint(values->UseGlobalGTT, 22, 22) | 8756 __gen_uint(values->MICommandOpcode, 23, 28) | 8757 __gen_uint(values->CommandType, 29, 31); 8758 8759 const uint64_t v1 = 8760 __gen_uint(values->StartingCachelineOffset, 6, 11); 8761 const uint64_t v1_address = 8762 __gen_combine_address(data, &dw[1], values->PageBaseAddress, v1); 8763 dw[1] = v1_address; 8764 dw[2] = (v1_address >> 32) | (v1 >> 32); 8765} 8766 8767#define GEN11_MI_CONDITIONAL_BATCH_BUFFER_END_length 4 8768#define GEN11_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 2 8769#define GEN11_MI_CONDITIONAL_BATCH_BUFFER_END_header\ 8770 .DWordLength = 2, \ 8771 .CompareSemaphore = 0, \ 8772 .MICommandOpcode = 54, \ 8773 .CommandType = 0 8774 8775struct GEN11_MI_CONDITIONAL_BATCH_BUFFER_END { 8776 uint32_t DWordLength; 8777 uint32_t CompareMaskMode; 8778#define CompareMaskModeDisabled 0 8779#define CompareMaskModeEnabled 1 8780 uint32_t CompareSemaphore; 8781 bool UseGlobalGTT; 8782 uint32_t MICommandOpcode; 8783 uint32_t CommandType; 8784 uint32_t CompareDataDword; 8785 __gen_address_type CompareAddress; 8786}; 8787 8788static inline void 8789GEN11_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 8790 __attribute__((unused)) void * restrict dst, 8791 __attribute__((unused)) const struct GEN11_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values) 8792{ 8793 uint32_t * restrict dw = (uint32_t * restrict) dst; 8794 8795 dw[0] = 8796 __gen_uint(values->DWordLength, 0, 7) | 8797 __gen_uint(values->CompareMaskMode, 19, 19) | 8798 __gen_uint(values->CompareSemaphore, 21, 21) | 8799 __gen_uint(values->UseGlobalGTT, 22, 22) | 8800 __gen_uint(values->MICommandOpcode, 23, 28) | 8801 __gen_uint(values->CommandType, 29, 31); 8802 8803 dw[1] = 8804 __gen_uint(values->CompareDataDword, 0, 31); 8805 8806 const uint64_t v2_address = 8807 __gen_combine_address(data, &dw[2], values->CompareAddress, 0); 8808 dw[2] = v2_address; 8809 dw[3] = v2_address >> 32; 8810} 8811 8812#define GEN11_MI_COPY_MEM_MEM_length 5 8813#define GEN11_MI_COPY_MEM_MEM_length_bias 2 8814#define GEN11_MI_COPY_MEM_MEM_header \ 8815 .DWordLength = 3, \ 8816 .MICommandOpcode = 46, \ 8817 .CommandType = 0 8818 8819struct GEN11_MI_COPY_MEM_MEM { 8820 uint32_t DWordLength; 8821 bool UseGlobalGTTDestination; 8822 bool UseGlobalGTTSource; 8823 uint32_t MICommandOpcode; 8824 uint32_t CommandType; 8825 __gen_address_type DestinationMemoryAddress; 8826 __gen_address_type SourceMemoryAddress; 8827}; 8828 8829static inline void 8830GEN11_MI_COPY_MEM_MEM_pack(__attribute__((unused)) __gen_user_data *data, 8831 __attribute__((unused)) void * restrict dst, 8832 __attribute__((unused)) const struct GEN11_MI_COPY_MEM_MEM * restrict values) 8833{ 8834 uint32_t * restrict dw = (uint32_t * restrict) dst; 8835 8836 dw[0] = 8837 __gen_uint(values->DWordLength, 0, 7) | 8838 __gen_uint(values->UseGlobalGTTDestination, 21, 21) | 8839 __gen_uint(values->UseGlobalGTTSource, 22, 22) | 8840 __gen_uint(values->MICommandOpcode, 23, 28) | 8841 __gen_uint(values->CommandType, 29, 31); 8842 8843 const uint64_t v1_address = 8844 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, 0); 8845 dw[1] = v1_address; 8846 dw[2] = v1_address >> 32; 8847 8848 const uint64_t v3_address = 8849 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, 0); 8850 dw[3] = v3_address; 8851 dw[4] = v3_address >> 32; 8852} 8853 8854#define GEN11_MI_DISPLAY_FLIP_length 3 8855#define GEN11_MI_DISPLAY_FLIP_length_bias 2 8856#define GEN11_MI_DISPLAY_FLIP_header \ 8857 .DWordLength = 1, \ 8858 .MICommandOpcode = 20, \ 8859 .CommandType = 0 8860 8861struct GEN11_MI_DISPLAY_FLIP { 8862 uint32_t DWordLength; 8863 uint32_t DisplayPlaneSelect; 8864#define DisplayPlane1 0 8865#define DisplayPlane2 1 8866#define DisplayPlane3 2 8867#define DisplayPlane4 4 8868#define DisplayPlane5 5 8869#define DisplayPlane6 6 8870#define DisplayPlane7 7 8871#define DisplayPlane8 8 8872#define DisplayPlane9 9 8873#define DisplayPlane10 10 8874#define DisplayPlane11 11 8875#define DisplayPlane12 12 8876#define DisplayPlane13 13 8877#define DisplayPlane14 14 8878#define DisplayPlane15 15 8879#define DisplayPlane16 16 8880#define DisplayPlane17 17 8881#define DisplayPlane18 18 8882#define DisplayPlane19 19 8883#define DisplayPlane20 20 8884#define DisplayPlane21 21 8885#define DisplayPlane22 22 8886#define DisplayPlane23 23 8887#define DisplayPlane24 24 8888#define DisplayPlane25 25 8889#define DisplayPlane26 26 8890#define DisplayPlane27 27 8891#define DisplayPlane28 28 8892#define DisplayPlane29 29 8893#define DisplayPlane30 30 8894#define DisplayPlane31 31 8895#define DisplayPlane32 32 8896 bool AsyncFlipIndicator; 8897 uint32_t MICommandOpcode; 8898 uint32_t CommandType; 8899 uint32_t TileParameter; 8900 uint32_t DisplayBufferPitch; 8901 bool Stereoscopic3DMode; 8902 uint32_t FlipType; 8903#define SyncFlip 0 8904#define AsyncFlip 1 8905#define Stereo3DFlip 2 8906 uint32_t VRRMasterFlip; 8907 __gen_address_type DisplayBufferBaseAddress; 8908 __gen_address_type LeftEyeDisplayBufferBaseAddress; 8909}; 8910 8911static inline void 8912GEN11_MI_DISPLAY_FLIP_pack(__attribute__((unused)) __gen_user_data *data, 8913 __attribute__((unused)) void * restrict dst, 8914 __attribute__((unused)) const struct GEN11_MI_DISPLAY_FLIP * restrict values) 8915{ 8916 uint32_t * restrict dw = (uint32_t * restrict) dst; 8917 8918 dw[0] = 8919 __gen_uint(values->DWordLength, 0, 7) | 8920 __gen_uint(values->DisplayPlaneSelect, 8, 13) | 8921 __gen_uint(values->AsyncFlipIndicator, 22, 22) | 8922 __gen_uint(values->MICommandOpcode, 23, 28) | 8923 __gen_uint(values->CommandType, 29, 31); 8924 8925 dw[1] = 8926 __gen_uint(values->TileParameter, 0, 2) | 8927 __gen_uint(values->DisplayBufferPitch, 6, 15) | 8928 __gen_uint(values->Stereoscopic3DMode, 31, 31); 8929 8930 const uint32_t v2 = 8931 __gen_uint(values->FlipType, 0, 1) | 8932 __gen_uint(values->VRRMasterFlip, 11, 11); 8933 dw[2] = __gen_combine_address(data, &dw[2], values->DisplayBufferBaseAddress, v2); 8934} 8935 8936#define GEN11_MI_FORCE_WAKEUP_length 2 8937#define GEN11_MI_FORCE_WAKEUP_length_bias 2 8938#define GEN11_MI_FORCE_WAKEUP_header \ 8939 .DWordLength = 0, \ 8940 .MICommandOpcode = 29, \ 8941 .CommandType = 0 8942 8943struct GEN11_MI_FORCE_WAKEUP { 8944 uint32_t DWordLength; 8945 uint32_t MICommandOpcode; 8946 uint32_t CommandType; 8947 uint32_t ForceMediaSlice0Awake; 8948 uint32_t ForceRenderAwake; 8949 uint32_t ForceMediaSlice1Awake; 8950 uint32_t ForceMediaSlice2Awake; 8951 uint32_t ForceMediaSlice3Awake; 8952 uint32_t MaskBits; 8953}; 8954 8955static inline void 8956GEN11_MI_FORCE_WAKEUP_pack(__attribute__((unused)) __gen_user_data *data, 8957 __attribute__((unused)) void * restrict dst, 8958 __attribute__((unused)) const struct GEN11_MI_FORCE_WAKEUP * restrict values) 8959{ 8960 uint32_t * restrict dw = (uint32_t * restrict) dst; 8961 8962 dw[0] = 8963 __gen_uint(values->DWordLength, 0, 7) | 8964 __gen_uint(values->MICommandOpcode, 23, 28) | 8965 __gen_uint(values->CommandType, 29, 31); 8966 8967 dw[1] = 8968 __gen_uint(values->ForceMediaSlice0Awake, 0, 0) | 8969 __gen_uint(values->ForceRenderAwake, 1, 1) | 8970 __gen_uint(values->ForceMediaSlice1Awake, 2, 2) | 8971 __gen_uint(values->ForceMediaSlice2Awake, 3, 3) | 8972 __gen_uint(values->ForceMediaSlice3Awake, 4, 4) | 8973 __gen_uint(values->MaskBits, 16, 31); 8974} 8975 8976#define GEN11_MI_LOAD_REGISTER_IMM_length 3 8977#define GEN11_MI_LOAD_REGISTER_IMM_length_bias 2 8978#define GEN11_MI_LOAD_REGISTER_IMM_header \ 8979 .DWordLength = 1, \ 8980 .MICommandOpcode = 34, \ 8981 .CommandType = 0 8982 8983struct GEN11_MI_LOAD_REGISTER_IMM { 8984 uint32_t DWordLength; 8985 uint32_t ByteWriteDisables; 8986 uint32_t AddCSMMIOStartOffset; 8987 uint32_t MICommandOpcode; 8988 uint32_t CommandType; 8989 uint64_t RegisterOffset; 8990 uint32_t DataDWord; 8991 /* variable length fields follow */ 8992}; 8993 8994static inline void 8995GEN11_MI_LOAD_REGISTER_IMM_pack(__attribute__((unused)) __gen_user_data *data, 8996 __attribute__((unused)) void * restrict dst, 8997 __attribute__((unused)) const struct GEN11_MI_LOAD_REGISTER_IMM * restrict values) 8998{ 8999 uint32_t * restrict dw = (uint32_t * restrict) dst; 9000 9001 dw[0] = 9002 __gen_uint(values->DWordLength, 0, 7) | 9003 __gen_uint(values->ByteWriteDisables, 8, 11) | 9004 __gen_uint(values->AddCSMMIOStartOffset, 19, 19) | 9005 __gen_uint(values->MICommandOpcode, 23, 28) | 9006 __gen_uint(values->CommandType, 29, 31); 9007 9008 dw[1] = 9009 __gen_offset(values->RegisterOffset, 2, 22); 9010 9011 dw[2] = 9012 __gen_uint(values->DataDWord, 0, 31); 9013} 9014 9015#define GEN11_MI_LOAD_REGISTER_MEM_length 4 9016#define GEN11_MI_LOAD_REGISTER_MEM_length_bias 2 9017#define GEN11_MI_LOAD_REGISTER_MEM_header \ 9018 .DWordLength = 2, \ 9019 .MICommandOpcode = 41, \ 9020 .CommandType = 0 9021 9022struct GEN11_MI_LOAD_REGISTER_MEM { 9023 uint32_t DWordLength; 9024 uint32_t AddCSMMIOStartOffset; 9025 uint32_t AddLoopVariable; 9026 bool AsyncModeEnable; 9027 bool UseGlobalGTT; 9028 uint32_t MICommandOpcode; 9029 uint32_t CommandType; 9030 uint64_t RegisterAddress; 9031 __gen_address_type MemoryAddress; 9032}; 9033 9034static inline void 9035GEN11_MI_LOAD_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 9036 __attribute__((unused)) void * restrict dst, 9037 __attribute__((unused)) const struct GEN11_MI_LOAD_REGISTER_MEM * restrict values) 9038{ 9039 uint32_t * restrict dw = (uint32_t * restrict) dst; 9040 9041 dw[0] = 9042 __gen_uint(values->DWordLength, 0, 7) | 9043 __gen_uint(values->AddCSMMIOStartOffset, 19, 19) | 9044 __gen_uint(values->AddLoopVariable, 20, 20) | 9045 __gen_uint(values->AsyncModeEnable, 21, 21) | 9046 __gen_uint(values->UseGlobalGTT, 22, 22) | 9047 __gen_uint(values->MICommandOpcode, 23, 28) | 9048 __gen_uint(values->CommandType, 29, 31); 9049 9050 dw[1] = 9051 __gen_offset(values->RegisterAddress, 2, 22); 9052 9053 const uint64_t v2_address = 9054 __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 9055 dw[2] = v2_address; 9056 dw[3] = v2_address >> 32; 9057} 9058 9059#define GEN11_MI_LOAD_REGISTER_REG_length 3 9060#define GEN11_MI_LOAD_REGISTER_REG_length_bias 2 9061#define GEN11_MI_LOAD_REGISTER_REG_header \ 9062 .DWordLength = 1, \ 9063 .MICommandOpcode = 42, \ 9064 .CommandType = 0 9065 9066struct GEN11_MI_LOAD_REGISTER_REG { 9067 uint32_t DWordLength; 9068 uint32_t AddCSMMIOStartOffsetSource; 9069 uint32_t AddCSMMIOStartOffsetDestination; 9070 uint32_t MICommandOpcode; 9071 uint32_t CommandType; 9072 uint64_t SourceRegisterAddress; 9073 uint64_t DestinationRegisterAddress; 9074}; 9075 9076static inline void 9077GEN11_MI_LOAD_REGISTER_REG_pack(__attribute__((unused)) __gen_user_data *data, 9078 __attribute__((unused)) void * restrict dst, 9079 __attribute__((unused)) const struct GEN11_MI_LOAD_REGISTER_REG * restrict values) 9080{ 9081 uint32_t * restrict dw = (uint32_t * restrict) dst; 9082 9083 dw[0] = 9084 __gen_uint(values->DWordLength, 0, 7) | 9085 __gen_uint(values->AddCSMMIOStartOffsetSource, 18, 18) | 9086 __gen_uint(values->AddCSMMIOStartOffsetDestination, 19, 19) | 9087 __gen_uint(values->MICommandOpcode, 23, 28) | 9088 __gen_uint(values->CommandType, 29, 31); 9089 9090 dw[1] = 9091 __gen_offset(values->SourceRegisterAddress, 2, 22); 9092 9093 dw[2] = 9094 __gen_offset(values->DestinationRegisterAddress, 2, 22); 9095} 9096 9097#define GEN11_MI_LOAD_SCAN_LINES_EXCL_length 2 9098#define GEN11_MI_LOAD_SCAN_LINES_EXCL_length_bias 2 9099#define GEN11_MI_LOAD_SCAN_LINES_EXCL_header \ 9100 .DWordLength = 0, \ 9101 .MICommandOpcode = 19, \ 9102 .CommandType = 0 9103 9104struct GEN11_MI_LOAD_SCAN_LINES_EXCL { 9105 uint32_t DWordLength; 9106 uint32_t DisplayPlaneSelect; 9107#define DisplayPlaneA 0 9108#define DisplayPlaneB 1 9109#define DisplayPlaneC 4 9110#define DisplayPlaneD 5 9111 uint32_t MICommandOpcode; 9112 uint32_t CommandType; 9113 uint32_t EndScanLineNumber; 9114 uint32_t StartScanLineNumber; 9115}; 9116 9117static inline void 9118GEN11_MI_LOAD_SCAN_LINES_EXCL_pack(__attribute__((unused)) __gen_user_data *data, 9119 __attribute__((unused)) void * restrict dst, 9120 __attribute__((unused)) const struct GEN11_MI_LOAD_SCAN_LINES_EXCL * restrict values) 9121{ 9122 uint32_t * restrict dw = (uint32_t * restrict) dst; 9123 9124 dw[0] = 9125 __gen_uint(values->DWordLength, 0, 5) | 9126 __gen_uint(values->DisplayPlaneSelect, 19, 21) | 9127 __gen_uint(values->MICommandOpcode, 23, 28) | 9128 __gen_uint(values->CommandType, 29, 31); 9129 9130 dw[1] = 9131 __gen_uint(values->EndScanLineNumber, 0, 12) | 9132 __gen_uint(values->StartScanLineNumber, 16, 28); 9133} 9134 9135#define GEN11_MI_LOAD_SCAN_LINES_INCL_length 2 9136#define GEN11_MI_LOAD_SCAN_LINES_INCL_length_bias 2 9137#define GEN11_MI_LOAD_SCAN_LINES_INCL_header \ 9138 .DWordLength = 0, \ 9139 .MICommandOpcode = 18, \ 9140 .CommandType = 0 9141 9142struct GEN11_MI_LOAD_SCAN_LINES_INCL { 9143 uint32_t DWordLength; 9144 uint32_t ScanLineEventDoneForward; 9145 uint32_t DisplayPlaneSelect; 9146#define DisplayPlane1A 0 9147#define DisplayPlane1B 1 9148#define DisplayPlane1C 4 9149#define DisplayPlane1D 5 9150 uint32_t MICommandOpcode; 9151 uint32_t CommandType; 9152 uint32_t EndScanLineNumber; 9153 uint32_t StartScanLineNumber; 9154}; 9155 9156static inline void 9157GEN11_MI_LOAD_SCAN_LINES_INCL_pack(__attribute__((unused)) __gen_user_data *data, 9158 __attribute__((unused)) void * restrict dst, 9159 __attribute__((unused)) const struct GEN11_MI_LOAD_SCAN_LINES_INCL * restrict values) 9160{ 9161 uint32_t * restrict dw = (uint32_t * restrict) dst; 9162 9163 dw[0] = 9164 __gen_uint(values->DWordLength, 0, 5) | 9165 __gen_uint(values->ScanLineEventDoneForward, 17, 18) | 9166 __gen_uint(values->DisplayPlaneSelect, 19, 21) | 9167 __gen_uint(values->MICommandOpcode, 23, 28) | 9168 __gen_uint(values->CommandType, 29, 31); 9169 9170 dw[1] = 9171 __gen_uint(values->EndScanLineNumber, 0, 12) | 9172 __gen_uint(values->StartScanLineNumber, 16, 28); 9173} 9174 9175#define GEN11_MI_MATH_length_bias 2 9176#define GEN11_MI_MATH_header \ 9177 .DWordLength = 0, \ 9178 .MICommandOpcode = 26, \ 9179 .CommandType = 0 9180 9181struct GEN11_MI_MATH { 9182 uint32_t DWordLength; 9183 uint32_t MICommandOpcode; 9184 uint32_t CommandType; 9185 /* variable length fields follow */ 9186}; 9187 9188static inline void 9189GEN11_MI_MATH_pack(__attribute__((unused)) __gen_user_data *data, 9190 __attribute__((unused)) void * restrict dst, 9191 __attribute__((unused)) const struct GEN11_MI_MATH * restrict values) 9192{ 9193 uint32_t * restrict dw = (uint32_t * restrict) dst; 9194 9195 dw[0] = 9196 __gen_uint(values->DWordLength, 0, 7) | 9197 __gen_uint(values->MICommandOpcode, 23, 28) | 9198 __gen_uint(values->CommandType, 29, 31); 9199} 9200 9201#define GEN11_MI_NOOP_length 1 9202#define GEN11_MI_NOOP_length_bias 1 9203#define GEN11_MI_NOOP_header \ 9204 .MICommandOpcode = 0, \ 9205 .CommandType = 0 9206 9207struct GEN11_MI_NOOP { 9208 uint32_t IdentificationNumber; 9209 bool IdentificationNumberRegisterWriteEnable; 9210 uint32_t MICommandOpcode; 9211 uint32_t CommandType; 9212}; 9213 9214static inline void 9215GEN11_MI_NOOP_pack(__attribute__((unused)) __gen_user_data *data, 9216 __attribute__((unused)) void * restrict dst, 9217 __attribute__((unused)) const struct GEN11_MI_NOOP * restrict values) 9218{ 9219 uint32_t * restrict dw = (uint32_t * restrict) dst; 9220 9221 dw[0] = 9222 __gen_uint(values->IdentificationNumber, 0, 21) | 9223 __gen_uint(values->IdentificationNumberRegisterWriteEnable, 22, 22) | 9224 __gen_uint(values->MICommandOpcode, 23, 28) | 9225 __gen_uint(values->CommandType, 29, 31); 9226} 9227 9228#define GEN11_MI_PREDICATE_length 1 9229#define GEN11_MI_PREDICATE_length_bias 1 9230#define GEN11_MI_PREDICATE_header \ 9231 .MICommandOpcode = 12, \ 9232 .CommandType = 0 9233 9234struct GEN11_MI_PREDICATE { 9235 uint32_t CompareOperation; 9236#define COMPARE_TRUE 0 9237#define COMPARE_FALSE 1 9238#define COMPARE_SRCS_EQUAL 2 9239#define COMPARE_DELTAS_EQUAL 3 9240 uint32_t CombineOperation; 9241#define COMBINE_SET 0 9242#define COMBINE_AND 1 9243#define COMBINE_OR 2 9244#define COMBINE_XOR 3 9245 uint32_t LoadOperation; 9246#define LOAD_KEEP 0 9247#define LOAD_LOAD 2 9248#define LOAD_LOADINV 3 9249 uint32_t MICommandOpcode; 9250 uint32_t CommandType; 9251}; 9252 9253static inline void 9254GEN11_MI_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 9255 __attribute__((unused)) void * restrict dst, 9256 __attribute__((unused)) const struct GEN11_MI_PREDICATE * restrict values) 9257{ 9258 uint32_t * restrict dw = (uint32_t * restrict) dst; 9259 9260 dw[0] = 9261 __gen_uint(values->CompareOperation, 0, 1) | 9262 __gen_uint(values->CombineOperation, 3, 4) | 9263 __gen_uint(values->LoadOperation, 6, 7) | 9264 __gen_uint(values->MICommandOpcode, 23, 28) | 9265 __gen_uint(values->CommandType, 29, 31); 9266} 9267 9268#define GEN11_MI_REPORT_HEAD_length 1 9269#define GEN11_MI_REPORT_HEAD_length_bias 1 9270#define GEN11_MI_REPORT_HEAD_header \ 9271 .MICommandOpcode = 7, \ 9272 .CommandType = 0 9273 9274struct GEN11_MI_REPORT_HEAD { 9275 uint32_t MICommandOpcode; 9276 uint32_t CommandType; 9277}; 9278 9279static inline void 9280GEN11_MI_REPORT_HEAD_pack(__attribute__((unused)) __gen_user_data *data, 9281 __attribute__((unused)) void * restrict dst, 9282 __attribute__((unused)) const struct GEN11_MI_REPORT_HEAD * restrict values) 9283{ 9284 uint32_t * restrict dw = (uint32_t * restrict) dst; 9285 9286 dw[0] = 9287 __gen_uint(values->MICommandOpcode, 23, 28) | 9288 __gen_uint(values->CommandType, 29, 31); 9289} 9290 9291#define GEN11_MI_REPORT_PERF_COUNT_length 4 9292#define GEN11_MI_REPORT_PERF_COUNT_length_bias 2 9293#define GEN11_MI_REPORT_PERF_COUNT_header \ 9294 .DWordLength = 2, \ 9295 .MICommandOpcode = 40, \ 9296 .CommandType = 0 9297 9298struct GEN11_MI_REPORT_PERF_COUNT { 9299 uint32_t DWordLength; 9300 uint32_t MICommandOpcode; 9301 uint32_t CommandType; 9302 bool UseGlobalGTT; 9303 uint32_t CoreModeEnable; 9304 __gen_address_type MemoryAddress; 9305 uint32_t ReportID; 9306}; 9307 9308static inline void 9309GEN11_MI_REPORT_PERF_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 9310 __attribute__((unused)) void * restrict dst, 9311 __attribute__((unused)) const struct GEN11_MI_REPORT_PERF_COUNT * restrict values) 9312{ 9313 uint32_t * restrict dw = (uint32_t * restrict) dst; 9314 9315 dw[0] = 9316 __gen_uint(values->DWordLength, 0, 5) | 9317 __gen_uint(values->MICommandOpcode, 23, 28) | 9318 __gen_uint(values->CommandType, 29, 31); 9319 9320 const uint64_t v1 = 9321 __gen_uint(values->UseGlobalGTT, 0, 0) | 9322 __gen_uint(values->CoreModeEnable, 4, 4); 9323 const uint64_t v1_address = 9324 __gen_combine_address(data, &dw[1], values->MemoryAddress, v1); 9325 dw[1] = v1_address; 9326 dw[2] = (v1_address >> 32) | (v1 >> 32); 9327 9328 dw[3] = 9329 __gen_uint(values->ReportID, 0, 31); 9330} 9331 9332#define GEN11_MI_RS_CONTEXT_length 1 9333#define GEN11_MI_RS_CONTEXT_length_bias 1 9334#define GEN11_MI_RS_CONTEXT_header \ 9335 .MICommandOpcode = 15, \ 9336 .CommandType = 0 9337 9338struct GEN11_MI_RS_CONTEXT { 9339 uint32_t ResourceStreamerSave; 9340#define RS_Restore 0 9341#define RS_Save 1 9342 uint32_t MICommandOpcode; 9343 uint32_t CommandType; 9344}; 9345 9346static inline void 9347GEN11_MI_RS_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 9348 __attribute__((unused)) void * restrict dst, 9349 __attribute__((unused)) const struct GEN11_MI_RS_CONTEXT * restrict values) 9350{ 9351 uint32_t * restrict dw = (uint32_t * restrict) dst; 9352 9353 dw[0] = 9354 __gen_uint(values->ResourceStreamerSave, 0, 0) | 9355 __gen_uint(values->MICommandOpcode, 23, 28) | 9356 __gen_uint(values->CommandType, 29, 31); 9357} 9358 9359#define GEN11_MI_RS_CONTROL_length 1 9360#define GEN11_MI_RS_CONTROL_length_bias 1 9361#define GEN11_MI_RS_CONTROL_header \ 9362 .MICommandOpcode = 6, \ 9363 .CommandType = 0 9364 9365struct GEN11_MI_RS_CONTROL { 9366 uint32_t ResourceStreamerControl; 9367#define RS_Stop 0 9368#define RS_Start 1 9369 uint32_t MICommandOpcode; 9370 uint32_t CommandType; 9371}; 9372 9373static inline void 9374GEN11_MI_RS_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 9375 __attribute__((unused)) void * restrict dst, 9376 __attribute__((unused)) const struct GEN11_MI_RS_CONTROL * restrict values) 9377{ 9378 uint32_t * restrict dw = (uint32_t * restrict) dst; 9379 9380 dw[0] = 9381 __gen_uint(values->ResourceStreamerControl, 0, 0) | 9382 __gen_uint(values->MICommandOpcode, 23, 28) | 9383 __gen_uint(values->CommandType, 29, 31); 9384} 9385 9386#define GEN11_MI_RS_STORE_DATA_IMM_length 4 9387#define GEN11_MI_RS_STORE_DATA_IMM_length_bias 2 9388#define GEN11_MI_RS_STORE_DATA_IMM_header \ 9389 .DWordLength = 2, \ 9390 .MICommandOpcode = 43, \ 9391 .CommandType = 0 9392 9393struct GEN11_MI_RS_STORE_DATA_IMM { 9394 uint32_t DWordLength; 9395 uint32_t MICommandOpcode; 9396 uint32_t CommandType; 9397 uint32_t CoreModeEnable; 9398 __gen_address_type DestinationAddress; 9399 uint32_t DataDWord0; 9400}; 9401 9402static inline void 9403GEN11_MI_RS_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 9404 __attribute__((unused)) void * restrict dst, 9405 __attribute__((unused)) const struct GEN11_MI_RS_STORE_DATA_IMM * restrict values) 9406{ 9407 uint32_t * restrict dw = (uint32_t * restrict) dst; 9408 9409 dw[0] = 9410 __gen_uint(values->DWordLength, 0, 7) | 9411 __gen_uint(values->MICommandOpcode, 23, 28) | 9412 __gen_uint(values->CommandType, 29, 31); 9413 9414 const uint64_t v1 = 9415 __gen_uint(values->CoreModeEnable, 0, 0); 9416 const uint64_t v1_address = 9417 __gen_combine_address(data, &dw[1], values->DestinationAddress, v1); 9418 dw[1] = v1_address; 9419 dw[2] = (v1_address >> 32) | (v1 >> 32); 9420 9421 dw[3] = 9422 __gen_uint(values->DataDWord0, 0, 31); 9423} 9424 9425#define GEN11_MI_SEMAPHORE_SIGNAL_length 2 9426#define GEN11_MI_SEMAPHORE_SIGNAL_length_bias 2 9427#define GEN11_MI_SEMAPHORE_SIGNAL_header \ 9428 .DWordLength = 0, \ 9429 .MICommandOpcode = 27, \ 9430 .CommandType = 0 9431 9432struct GEN11_MI_SEMAPHORE_SIGNAL { 9433 uint32_t DWordLength; 9434 uint32_t TargetEngineSelect; 9435#define RCS 0 9436#define VCS0 1 9437#define BCS 2 9438#define VECS 3 9439#define VCS1 4 9440#define VCS2 6 9441#define VCS3 7 9442#define VCS4 8 9443#define VCS5 9 9444#define VCS6 10 9445#define VCS7 11 9446#define VECS1 12 9447#define VECS2 13 9448#define VECS3 14 9449 bool PostSyncOperation; 9450 uint32_t MICommandOpcode; 9451 uint32_t CommandType; 9452 uint32_t TargetContextID; 9453}; 9454 9455static inline void 9456GEN11_MI_SEMAPHORE_SIGNAL_pack(__attribute__((unused)) __gen_user_data *data, 9457 __attribute__((unused)) void * restrict dst, 9458 __attribute__((unused)) const struct GEN11_MI_SEMAPHORE_SIGNAL * restrict values) 9459{ 9460 uint32_t * restrict dw = (uint32_t * restrict) dst; 9461 9462 dw[0] = 9463 __gen_uint(values->DWordLength, 0, 7) | 9464 __gen_uint(values->TargetEngineSelect, 15, 18) | 9465 __gen_uint(values->PostSyncOperation, 21, 21) | 9466 __gen_uint(values->MICommandOpcode, 23, 28) | 9467 __gen_uint(values->CommandType, 29, 31); 9468 9469 dw[1] = 9470 __gen_uint(values->TargetContextID, 0, 31); 9471} 9472 9473#define GEN11_MI_SEMAPHORE_WAIT_length 4 9474#define GEN11_MI_SEMAPHORE_WAIT_length_bias 2 9475#define GEN11_MI_SEMAPHORE_WAIT_header \ 9476 .DWordLength = 2, \ 9477 .MICommandOpcode = 28, \ 9478 .CommandType = 0 9479 9480struct GEN11_MI_SEMAPHORE_WAIT { 9481 uint32_t DWordLength; 9482 uint32_t CompareOperation; 9483#define COMPARE_SAD_GREATER_THAN_SDD 0 9484#define COMPARE_SAD_GREATER_THAN_OR_EQUAL_SDD 1 9485#define COMPARE_SAD_LESS_THAN_SDD 2 9486#define COMPARE_SAD_LESS_THAN_OR_EQUAL_SDD 3 9487#define COMPARE_SAD_EQUAL_SDD 4 9488#define COMPARE_SAD_NOT_EQUAL_SDD 5 9489 uint32_t WaitMode; 9490#define PollingMode 1 9491#define SignalMode 0 9492 bool RegisterPollMode; 9493 uint32_t MemoryType; 9494#define PerProcessGraphicsAddress 0 9495#define GlobalGraphicsAddress 1 9496 uint32_t MICommandOpcode; 9497 uint32_t CommandType; 9498 uint32_t SemaphoreDataDword; 9499 __gen_address_type SemaphoreAddress; 9500}; 9501 9502static inline void 9503GEN11_MI_SEMAPHORE_WAIT_pack(__attribute__((unused)) __gen_user_data *data, 9504 __attribute__((unused)) void * restrict dst, 9505 __attribute__((unused)) const struct GEN11_MI_SEMAPHORE_WAIT * restrict values) 9506{ 9507 uint32_t * restrict dw = (uint32_t * restrict) dst; 9508 9509 dw[0] = 9510 __gen_uint(values->DWordLength, 0, 7) | 9511 __gen_uint(values->CompareOperation, 12, 14) | 9512 __gen_uint(values->WaitMode, 15, 15) | 9513 __gen_uint(values->RegisterPollMode, 16, 16) | 9514 __gen_uint(values->MemoryType, 22, 22) | 9515 __gen_uint(values->MICommandOpcode, 23, 28) | 9516 __gen_uint(values->CommandType, 29, 31); 9517 9518 dw[1] = 9519 __gen_uint(values->SemaphoreDataDword, 0, 31); 9520 9521 const uint64_t v2_address = 9522 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, 0); 9523 dw[2] = v2_address; 9524 dw[3] = v2_address >> 32; 9525} 9526 9527#define GEN11_MI_SET_CONTEXT_length 2 9528#define GEN11_MI_SET_CONTEXT_length_bias 2 9529#define GEN11_MI_SET_CONTEXT_header \ 9530 .DWordLength = 0, \ 9531 .MICommandOpcode = 24, \ 9532 .CommandType = 0 9533 9534struct GEN11_MI_SET_CONTEXT { 9535 uint32_t DWordLength; 9536 uint32_t MICommandOpcode; 9537 uint32_t CommandType; 9538 uint32_t RestoreInhibit; 9539 uint32_t ForceRestore; 9540 bool ResourceStreamerStateRestoreEnable; 9541 bool ResourceStreamerStateSaveEnable; 9542 bool CoreModeEnable; 9543 uint32_t ReservedMustbe1; 9544 __gen_address_type LogicalContextAddress; 9545}; 9546 9547static inline void 9548GEN11_MI_SET_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 9549 __attribute__((unused)) void * restrict dst, 9550 __attribute__((unused)) const struct GEN11_MI_SET_CONTEXT * restrict values) 9551{ 9552 uint32_t * restrict dw = (uint32_t * restrict) dst; 9553 9554 dw[0] = 9555 __gen_uint(values->DWordLength, 0, 7) | 9556 __gen_uint(values->MICommandOpcode, 23, 28) | 9557 __gen_uint(values->CommandType, 29, 31); 9558 9559 const uint32_t v1 = 9560 __gen_uint(values->RestoreInhibit, 0, 0) | 9561 __gen_uint(values->ForceRestore, 1, 1) | 9562 __gen_uint(values->ResourceStreamerStateRestoreEnable, 2, 2) | 9563 __gen_uint(values->ResourceStreamerStateSaveEnable, 3, 3) | 9564 __gen_uint(values->CoreModeEnable, 4, 4) | 9565 __gen_uint(values->ReservedMustbe1, 8, 8); 9566 dw[1] = __gen_combine_address(data, &dw[1], values->LogicalContextAddress, v1); 9567} 9568 9569#define GEN11_MI_SET_PREDICATE_length 1 9570#define GEN11_MI_SET_PREDICATE_length_bias 1 9571#define GEN11_MI_SET_PREDICATE_header \ 9572 .MICommandOpcode = 1, \ 9573 .CommandType = 0 9574 9575struct GEN11_MI_SET_PREDICATE { 9576 uint32_t PREDICATEENABLE; 9577#define NOOPNever 0 9578#define NOOPonResult2clear 1 9579#define NOOPonResult2set 2 9580#define NOOPonResultclear 3 9581#define NOOPonResultset 4 9582#define NOOPAlways 15 9583 uint32_t MICommandOpcode; 9584 uint32_t CommandType; 9585}; 9586 9587static inline void 9588GEN11_MI_SET_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 9589 __attribute__((unused)) void * restrict dst, 9590 __attribute__((unused)) const struct GEN11_MI_SET_PREDICATE * restrict values) 9591{ 9592 uint32_t * restrict dw = (uint32_t * restrict) dst; 9593 9594 dw[0] = 9595 __gen_uint(values->PREDICATEENABLE, 0, 3) | 9596 __gen_uint(values->MICommandOpcode, 23, 28) | 9597 __gen_uint(values->CommandType, 29, 31); 9598} 9599 9600#define GEN11_MI_STORE_DATA_IMM_length 4 9601#define GEN11_MI_STORE_DATA_IMM_length_bias 2 9602#define GEN11_MI_STORE_DATA_IMM_header \ 9603 .DWordLength = 2, \ 9604 .MICommandOpcode = 32, \ 9605 .CommandType = 0 9606 9607struct GEN11_MI_STORE_DATA_IMM { 9608 uint32_t DWordLength; 9609 uint32_t StoreQword; 9610 bool UseGlobalGTT; 9611 uint32_t MICommandOpcode; 9612 uint32_t CommandType; 9613 uint32_t CoreModeEnable; 9614 __gen_address_type Address; 9615 uint64_t ImmediateData; 9616}; 9617 9618static inline void 9619GEN11_MI_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 9620 __attribute__((unused)) void * restrict dst, 9621 __attribute__((unused)) const struct GEN11_MI_STORE_DATA_IMM * restrict values) 9622{ 9623 uint32_t * restrict dw = (uint32_t * restrict) dst; 9624 9625 dw[0] = 9626 __gen_uint(values->DWordLength, 0, 9) | 9627 __gen_uint(values->StoreQword, 21, 21) | 9628 __gen_uint(values->UseGlobalGTT, 22, 22) | 9629 __gen_uint(values->MICommandOpcode, 23, 28) | 9630 __gen_uint(values->CommandType, 29, 31); 9631 9632 const uint64_t v1 = 9633 __gen_uint(values->CoreModeEnable, 0, 0); 9634 const uint64_t v1_address = 9635 __gen_combine_address(data, &dw[1], values->Address, v1); 9636 dw[1] = v1_address; 9637 dw[2] = (v1_address >> 32) | (v1 >> 32); 9638 9639 const uint64_t v3 = 9640 __gen_uint(values->ImmediateData, 0, 63); 9641 dw[3] = v3; 9642 dw[4] = v3 >> 32; 9643} 9644 9645#define GEN11_MI_STORE_DATA_INDEX_length 3 9646#define GEN11_MI_STORE_DATA_INDEX_length_bias 2 9647#define GEN11_MI_STORE_DATA_INDEX_header \ 9648 .DWordLength = 1, \ 9649 .MICommandOpcode = 33, \ 9650 .CommandType = 0 9651 9652struct GEN11_MI_STORE_DATA_INDEX { 9653 uint32_t DWordLength; 9654 uint32_t UsePerProcessHardwareStatusPage; 9655 uint32_t MICommandOpcode; 9656 uint32_t CommandType; 9657 uint32_t Offset; 9658 uint32_t DataDWord0; 9659 uint32_t DataDWord1; 9660}; 9661 9662static inline void 9663GEN11_MI_STORE_DATA_INDEX_pack(__attribute__((unused)) __gen_user_data *data, 9664 __attribute__((unused)) void * restrict dst, 9665 __attribute__((unused)) const struct GEN11_MI_STORE_DATA_INDEX * restrict values) 9666{ 9667 uint32_t * restrict dw = (uint32_t * restrict) dst; 9668 9669 dw[0] = 9670 __gen_uint(values->DWordLength, 0, 7) | 9671 __gen_uint(values->UsePerProcessHardwareStatusPage, 21, 21) | 9672 __gen_uint(values->MICommandOpcode, 23, 28) | 9673 __gen_uint(values->CommandType, 29, 31); 9674 9675 dw[1] = 9676 __gen_uint(values->Offset, 2, 11); 9677 9678 dw[2] = 9679 __gen_uint(values->DataDWord0, 0, 31); 9680} 9681 9682#define GEN11_MI_STORE_REGISTER_MEM_length 4 9683#define GEN11_MI_STORE_REGISTER_MEM_length_bias 2 9684#define GEN11_MI_STORE_REGISTER_MEM_header \ 9685 .DWordLength = 2, \ 9686 .MICommandOpcode = 36, \ 9687 .CommandType = 0 9688 9689struct GEN11_MI_STORE_REGISTER_MEM { 9690 uint32_t DWordLength; 9691 uint32_t AddCSMMIOStartOffset; 9692 bool PredicateEnable; 9693 bool UseGlobalGTT; 9694 uint32_t MICommandOpcode; 9695 uint32_t CommandType; 9696 uint64_t RegisterAddress; 9697 __gen_address_type MemoryAddress; 9698}; 9699 9700static inline void 9701GEN11_MI_STORE_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 9702 __attribute__((unused)) void * restrict dst, 9703 __attribute__((unused)) const struct GEN11_MI_STORE_REGISTER_MEM * restrict values) 9704{ 9705 uint32_t * restrict dw = (uint32_t * restrict) dst; 9706 9707 dw[0] = 9708 __gen_uint(values->DWordLength, 0, 7) | 9709 __gen_uint(values->AddCSMMIOStartOffset, 19, 19) | 9710 __gen_uint(values->PredicateEnable, 21, 21) | 9711 __gen_uint(values->UseGlobalGTT, 22, 22) | 9712 __gen_uint(values->MICommandOpcode, 23, 28) | 9713 __gen_uint(values->CommandType, 29, 31); 9714 9715 dw[1] = 9716 __gen_offset(values->RegisterAddress, 2, 22); 9717 9718 const uint64_t v2_address = 9719 __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 9720 dw[2] = v2_address; 9721 dw[3] = v2_address >> 32; 9722} 9723 9724#define GEN11_MI_SUSPEND_FLUSH_length 1 9725#define GEN11_MI_SUSPEND_FLUSH_length_bias 1 9726#define GEN11_MI_SUSPEND_FLUSH_header \ 9727 .MICommandOpcode = 11, \ 9728 .CommandType = 0 9729 9730struct GEN11_MI_SUSPEND_FLUSH { 9731 bool SuspendFlush; 9732 uint32_t MICommandOpcode; 9733 uint32_t CommandType; 9734}; 9735 9736static inline void 9737GEN11_MI_SUSPEND_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 9738 __attribute__((unused)) void * restrict dst, 9739 __attribute__((unused)) const struct GEN11_MI_SUSPEND_FLUSH * restrict values) 9740{ 9741 uint32_t * restrict dw = (uint32_t * restrict) dst; 9742 9743 dw[0] = 9744 __gen_uint(values->SuspendFlush, 0, 0) | 9745 __gen_uint(values->MICommandOpcode, 23, 28) | 9746 __gen_uint(values->CommandType, 29, 31); 9747} 9748 9749#define GEN11_MI_TOPOLOGY_FILTER_length 1 9750#define GEN11_MI_TOPOLOGY_FILTER_length_bias 1 9751#define GEN11_MI_TOPOLOGY_FILTER_header \ 9752 .MICommandOpcode = 13, \ 9753 .CommandType = 0 9754 9755struct GEN11_MI_TOPOLOGY_FILTER { 9756 enum GEN11_3D_Prim_Topo_Type TopologyFilterValue; 9757 uint32_t MICommandOpcode; 9758 uint32_t CommandType; 9759}; 9760 9761static inline void 9762GEN11_MI_TOPOLOGY_FILTER_pack(__attribute__((unused)) __gen_user_data *data, 9763 __attribute__((unused)) void * restrict dst, 9764 __attribute__((unused)) const struct GEN11_MI_TOPOLOGY_FILTER * restrict values) 9765{ 9766 uint32_t * restrict dw = (uint32_t * restrict) dst; 9767 9768 dw[0] = 9769 __gen_uint(values->TopologyFilterValue, 0, 5) | 9770 __gen_uint(values->MICommandOpcode, 23, 28) | 9771 __gen_uint(values->CommandType, 29, 31); 9772} 9773 9774#define GEN11_MI_USER_INTERRUPT_length 1 9775#define GEN11_MI_USER_INTERRUPT_length_bias 1 9776#define GEN11_MI_USER_INTERRUPT_header \ 9777 .MICommandOpcode = 2, \ 9778 .CommandType = 0 9779 9780struct GEN11_MI_USER_INTERRUPT { 9781 uint32_t MICommandOpcode; 9782 uint32_t CommandType; 9783}; 9784 9785static inline void 9786GEN11_MI_USER_INTERRUPT_pack(__attribute__((unused)) __gen_user_data *data, 9787 __attribute__((unused)) void * restrict dst, 9788 __attribute__((unused)) const struct GEN11_MI_USER_INTERRUPT * restrict values) 9789{ 9790 uint32_t * restrict dw = (uint32_t * restrict) dst; 9791 9792 dw[0] = 9793 __gen_uint(values->MICommandOpcode, 23, 28) | 9794 __gen_uint(values->CommandType, 29, 31); 9795} 9796 9797#define GEN11_MI_WAIT_FOR_EVENT_length 1 9798#define GEN11_MI_WAIT_FOR_EVENT_length_bias 1 9799#define GEN11_MI_WAIT_FOR_EVENT_header \ 9800 .MICommandOpcode = 3, \ 9801 .CommandType = 0 9802 9803struct GEN11_MI_WAIT_FOR_EVENT { 9804 bool DisplayPlnae1AScanLineWaitEnable; 9805 bool DisplayPlane1FlipPendingWaitEnable; 9806 bool DisplayPlane4FlipPendingWaitEnable; 9807 bool DisplayPlane1AVerticalBlankWaitEnable; 9808 bool DisplayPlane7FlipPendingWaitEnable; 9809 bool DisplayPlane8FlipPendingWaitEnable; 9810 bool DisplayPlane1BScanLineWaitEnable; 9811 bool DisplayPlane2FlipPendingWaitEnable; 9812 bool DisplayPlane5FlipPendingWaitEnable; 9813 bool DisplayPlane1BVerticalBlankWaitEnable; 9814 bool DisplayPlane1CScanLineWaitEnable; 9815 bool DisplayPlane3FlipPendingWaitEnable; 9816 bool DisplayPlane9FlipPendingWaitEnable; 9817 bool DisplayPlane10FlipPendingWaitEnable; 9818 bool DisplayPlane11FlipPendingWaitEnable; 9819 bool DisplayPlane12FlipPendingWaitEnable; 9820 bool DisplayPlane6FlipPendingWaitEnable; 9821 bool DisplayPlane1CVerticalBlankWaitEnable; 9822 uint32_t MICommandOpcode; 9823 uint32_t CommandType; 9824}; 9825 9826static inline void 9827GEN11_MI_WAIT_FOR_EVENT_pack(__attribute__((unused)) __gen_user_data *data, 9828 __attribute__((unused)) void * restrict dst, 9829 __attribute__((unused)) const struct GEN11_MI_WAIT_FOR_EVENT * restrict values) 9830{ 9831 uint32_t * restrict dw = (uint32_t * restrict) dst; 9832 9833 dw[0] = 9834 __gen_uint(values->DisplayPlnae1AScanLineWaitEnable, 0, 0) | 9835 __gen_uint(values->DisplayPlane1FlipPendingWaitEnable, 1, 1) | 9836 __gen_uint(values->DisplayPlane4FlipPendingWaitEnable, 2, 2) | 9837 __gen_uint(values->DisplayPlane1AVerticalBlankWaitEnable, 3, 3) | 9838 __gen_uint(values->DisplayPlane7FlipPendingWaitEnable, 6, 6) | 9839 __gen_uint(values->DisplayPlane8FlipPendingWaitEnable, 7, 7) | 9840 __gen_uint(values->DisplayPlane1BScanLineWaitEnable, 8, 8) | 9841 __gen_uint(values->DisplayPlane2FlipPendingWaitEnable, 9, 9) | 9842 __gen_uint(values->DisplayPlane5FlipPendingWaitEnable, 10, 10) | 9843 __gen_uint(values->DisplayPlane1BVerticalBlankWaitEnable, 11, 11) | 9844 __gen_uint(values->DisplayPlane1CScanLineWaitEnable, 14, 14) | 9845 __gen_uint(values->DisplayPlane3FlipPendingWaitEnable, 15, 15) | 9846 __gen_uint(values->DisplayPlane9FlipPendingWaitEnable, 16, 16) | 9847 __gen_uint(values->DisplayPlane10FlipPendingWaitEnable, 17, 17) | 9848 __gen_uint(values->DisplayPlane11FlipPendingWaitEnable, 18, 18) | 9849 __gen_uint(values->DisplayPlane12FlipPendingWaitEnable, 19, 19) | 9850 __gen_uint(values->DisplayPlane6FlipPendingWaitEnable, 20, 20) | 9851 __gen_uint(values->DisplayPlane1CVerticalBlankWaitEnable, 21, 21) | 9852 __gen_uint(values->MICommandOpcode, 23, 28) | 9853 __gen_uint(values->CommandType, 29, 31); 9854} 9855 9856#define GEN11_MI_WAIT_FOR_EVENT_2_length 1 9857#define GEN11_MI_WAIT_FOR_EVENT_2_length_bias 1 9858#define GEN11_MI_WAIT_FOR_EVENT_2_header \ 9859 .MICommandOpcode = 4, \ 9860 .CommandType = 0 9861 9862struct GEN11_MI_WAIT_FOR_EVENT_2 { 9863 uint32_t DisplayPlaneFlipPendingWaitEnable; 9864 uint32_t DisplayPipeVerticalBlankWaitEnable; 9865 uint32_t DisplayPipeScanLineWaitEnable; 9866 uint32_t MICommandOpcode; 9867 uint32_t CommandType; 9868}; 9869 9870static inline void 9871GEN11_MI_WAIT_FOR_EVENT_2_pack(__attribute__((unused)) __gen_user_data *data, 9872 __attribute__((unused)) void * restrict dst, 9873 __attribute__((unused)) const struct GEN11_MI_WAIT_FOR_EVENT_2 * restrict values) 9874{ 9875 uint32_t * restrict dw = (uint32_t * restrict) dst; 9876 9877 dw[0] = 9878 __gen_uint(values->DisplayPlaneFlipPendingWaitEnable, 0, 5) | 9879 __gen_uint(values->DisplayPipeVerticalBlankWaitEnable, 8, 10) | 9880 __gen_uint(values->DisplayPipeScanLineWaitEnable, 12, 14) | 9881 __gen_uint(values->MICommandOpcode, 23, 28) | 9882 __gen_uint(values->CommandType, 29, 31); 9883} 9884 9885#define GEN11_PIPELINE_SELECT_length 1 9886#define GEN11_PIPELINE_SELECT_length_bias 1 9887#define GEN11_PIPELINE_SELECT_header \ 9888 ._3DCommandSubOpcode = 4, \ 9889 ._3DCommandOpcode = 1, \ 9890 .CommandSubType = 1, \ 9891 .CommandType = 3 9892 9893struct GEN11_PIPELINE_SELECT { 9894 uint32_t PipelineSelection; 9895#define _3D 0 9896#define Media 1 9897#define GPGPU 2 9898 bool MediaSamplerDOPClockGateEnable; 9899 bool ForceMediaAwake; 9900 uint32_t MaskBits; 9901 uint32_t _3DCommandSubOpcode; 9902 uint32_t _3DCommandOpcode; 9903 uint32_t CommandSubType; 9904 uint32_t CommandType; 9905}; 9906 9907static inline void 9908GEN11_PIPELINE_SELECT_pack(__attribute__((unused)) __gen_user_data *data, 9909 __attribute__((unused)) void * restrict dst, 9910 __attribute__((unused)) const struct GEN11_PIPELINE_SELECT * restrict values) 9911{ 9912 uint32_t * restrict dw = (uint32_t * restrict) dst; 9913 9914 dw[0] = 9915 __gen_uint(values->PipelineSelection, 0, 1) | 9916 __gen_uint(values->MediaSamplerDOPClockGateEnable, 4, 4) | 9917 __gen_uint(values->ForceMediaAwake, 5, 5) | 9918 __gen_uint(values->MaskBits, 8, 15) | 9919 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9920 __gen_uint(values->_3DCommandOpcode, 24, 26) | 9921 __gen_uint(values->CommandSubType, 27, 28) | 9922 __gen_uint(values->CommandType, 29, 31); 9923} 9924 9925#define GEN11_PIPE_CONTROL_length 6 9926#define GEN11_PIPE_CONTROL_length_bias 2 9927#define GEN11_PIPE_CONTROL_header \ 9928 .DWordLength = 4, \ 9929 ._3DCommandSubOpcode = 0, \ 9930 ._3DCommandOpcode = 2, \ 9931 .CommandSubType = 3, \ 9932 .CommandType = 3 9933 9934struct GEN11_PIPE_CONTROL { 9935 uint32_t DWordLength; 9936 uint32_t _3DCommandSubOpcode; 9937 uint32_t _3DCommandOpcode; 9938 uint32_t CommandSubType; 9939 uint32_t CommandType; 9940 bool DepthCacheFlushEnable; 9941 bool StallAtPixelScoreboard; 9942 bool StateCacheInvalidationEnable; 9943 bool ConstantCacheInvalidationEnable; 9944 bool VFCacheInvalidationEnable; 9945 bool DCFlushEnable; 9946 bool PipeControlFlushEnable; 9947 bool NotifyEnable; 9948 bool IndirectStatePointersDisable; 9949 bool TextureCacheInvalidationEnable; 9950 bool InstructionCacheInvalidateEnable; 9951 bool RenderTargetCacheFlushEnable; 9952 bool DepthStallEnable; 9953 uint32_t PostSyncOperation; 9954#define NoWrite 0 9955#define WriteImmediateData 1 9956#define WritePSDepthCount 2 9957#define WriteTimestamp 3 9958 bool GenericMediaStateClear; 9959 bool PSDSyncEnable; 9960 bool TLBInvalidate; 9961 bool GlobalSnapshotCountReset; 9962 bool CommandStreamerStallEnable; 9963 uint32_t StoreDataIndex; 9964 uint32_t LRIPostSyncOperation; 9965#define NoLRIOperation 0 9966#define MMIOWriteImmediateData 1 9967 uint32_t DestinationAddressType; 9968#define DAT_PPGTT 0 9969#define DAT_GGTT 1 9970 bool FlushLLC; 9971 __gen_address_type Address; 9972 uint64_t ImmediateData; 9973}; 9974 9975static inline void 9976GEN11_PIPE_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 9977 __attribute__((unused)) void * restrict dst, 9978 __attribute__((unused)) const struct GEN11_PIPE_CONTROL * restrict values) 9979{ 9980 uint32_t * restrict dw = (uint32_t * restrict) dst; 9981 9982 dw[0] = 9983 __gen_uint(values->DWordLength, 0, 7) | 9984 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9985 __gen_uint(values->_3DCommandOpcode, 24, 26) | 9986 __gen_uint(values->CommandSubType, 27, 28) | 9987 __gen_uint(values->CommandType, 29, 31); 9988 9989 dw[1] = 9990 __gen_uint(values->DepthCacheFlushEnable, 0, 0) | 9991 __gen_uint(values->StallAtPixelScoreboard, 1, 1) | 9992 __gen_uint(values->StateCacheInvalidationEnable, 2, 2) | 9993 __gen_uint(values->ConstantCacheInvalidationEnable, 3, 3) | 9994 __gen_uint(values->VFCacheInvalidationEnable, 4, 4) | 9995 __gen_uint(values->DCFlushEnable, 5, 5) | 9996 __gen_uint(values->PipeControlFlushEnable, 7, 7) | 9997 __gen_uint(values->NotifyEnable, 8, 8) | 9998 __gen_uint(values->IndirectStatePointersDisable, 9, 9) | 9999 __gen_uint(values->TextureCacheInvalidationEnable, 10, 10) | 10000 __gen_uint(values->InstructionCacheInvalidateEnable, 11, 11) | 10001 __gen_uint(values->RenderTargetCacheFlushEnable, 12, 12) | 10002 __gen_uint(values->DepthStallEnable, 13, 13) | 10003 __gen_uint(values->PostSyncOperation, 14, 15) | 10004 __gen_uint(values->GenericMediaStateClear, 16, 16) | 10005 __gen_uint(values->PSDSyncEnable, 17, 17) | 10006 __gen_uint(values->TLBInvalidate, 18, 18) | 10007 __gen_uint(values->GlobalSnapshotCountReset, 19, 19) | 10008 __gen_uint(values->CommandStreamerStallEnable, 20, 20) | 10009 __gen_uint(values->StoreDataIndex, 21, 21) | 10010 __gen_uint(values->LRIPostSyncOperation, 23, 23) | 10011 __gen_uint(values->DestinationAddressType, 24, 24) | 10012 __gen_uint(values->FlushLLC, 26, 26); 10013 10014 const uint64_t v2_address = 10015 __gen_combine_address(data, &dw[2], values->Address, 0); 10016 dw[2] = v2_address; 10017 dw[3] = v2_address >> 32; 10018 10019 const uint64_t v4 = 10020 __gen_uint(values->ImmediateData, 0, 63); 10021 dw[4] = v4; 10022 dw[5] = v4 >> 32; 10023} 10024 10025#define GEN11_STATE_BASE_ADDRESS_length 22 10026#define GEN11_STATE_BASE_ADDRESS_length_bias 2 10027#define GEN11_STATE_BASE_ADDRESS_header \ 10028 .DWordLength = 20, \ 10029 ._3DCommandSubOpcode = 1, \ 10030 ._3DCommandOpcode = 1, \ 10031 .CommandSubType = 0, \ 10032 .CommandType = 3 10033 10034struct GEN11_STATE_BASE_ADDRESS { 10035 uint32_t DWordLength; 10036 uint32_t _3DCommandSubOpcode; 10037 uint32_t _3DCommandOpcode; 10038 uint32_t CommandSubType; 10039 uint32_t CommandType; 10040 bool GeneralStateBaseAddressModifyEnable; 10041 uint32_t GeneralStateMOCS; 10042 __gen_address_type GeneralStateBaseAddress; 10043 uint32_t StatelessDataPortAccessMOCS; 10044 bool SurfaceStateBaseAddressModifyEnable; 10045 uint32_t SurfaceStateMOCS; 10046 __gen_address_type SurfaceStateBaseAddress; 10047 bool DynamicStateBaseAddressModifyEnable; 10048 uint32_t DynamicStateMOCS; 10049 __gen_address_type DynamicStateBaseAddress; 10050 bool IndirectObjectBaseAddressModifyEnable; 10051 uint32_t IndirectObjectMOCS; 10052 __gen_address_type IndirectObjectBaseAddress; 10053 bool InstructionBaseAddressModifyEnable; 10054 uint32_t InstructionMOCS; 10055 __gen_address_type InstructionBaseAddress; 10056 bool GeneralStateBufferSizeModifyEnable; 10057 uint32_t GeneralStateBufferSize; 10058 bool DynamicStateBufferSizeModifyEnable; 10059 uint32_t DynamicStateBufferSize; 10060 bool IndirectObjectBufferSizeModifyEnable; 10061 uint32_t IndirectObjectBufferSize; 10062 bool InstructionBuffersizeModifyEnable; 10063 uint32_t InstructionBufferSize; 10064 bool BindlessSurfaceStateBaseAddressModifyEnable; 10065 uint32_t BindlessSurfaceStateMOCS; 10066 __gen_address_type BindlessSurfaceStateBaseAddress; 10067 uint32_t BindlessSurfaceStateSize; 10068 bool BindlessSamplerStateBaseAddressModifyEnable; 10069 uint32_t BindlessSamplerStateMOCS; 10070 __gen_address_type BindlessSamplerStateBaseAddress; 10071 uint32_t BindlessSamplerStateBufferSize; 10072}; 10073 10074static inline void 10075GEN11_STATE_BASE_ADDRESS_pack(__attribute__((unused)) __gen_user_data *data, 10076 __attribute__((unused)) void * restrict dst, 10077 __attribute__((unused)) const struct GEN11_STATE_BASE_ADDRESS * restrict values) 10078{ 10079 uint32_t * restrict dw = (uint32_t * restrict) dst; 10080 10081 dw[0] = 10082 __gen_uint(values->DWordLength, 0, 7) | 10083 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 10084 __gen_uint(values->_3DCommandOpcode, 24, 26) | 10085 __gen_uint(values->CommandSubType, 27, 28) | 10086 __gen_uint(values->CommandType, 29, 31); 10087 10088 const uint64_t v1 = 10089 __gen_uint(values->GeneralStateBaseAddressModifyEnable, 0, 0) | 10090 __gen_uint(values->GeneralStateMOCS, 4, 10); 10091 const uint64_t v1_address = 10092 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, v1); 10093 dw[1] = v1_address; 10094 dw[2] = (v1_address >> 32) | (v1 >> 32); 10095 10096 dw[3] = 10097 __gen_uint(values->StatelessDataPortAccessMOCS, 16, 22); 10098 10099 const uint64_t v4 = 10100 __gen_uint(values->SurfaceStateBaseAddressModifyEnable, 0, 0) | 10101 __gen_uint(values->SurfaceStateMOCS, 4, 10); 10102 const uint64_t v4_address = 10103 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, v4); 10104 dw[4] = v4_address; 10105 dw[5] = (v4_address >> 32) | (v4 >> 32); 10106 10107 const uint64_t v6 = 10108 __gen_uint(values->DynamicStateBaseAddressModifyEnable, 0, 0) | 10109 __gen_uint(values->DynamicStateMOCS, 4, 10); 10110 const uint64_t v6_address = 10111 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, v6); 10112 dw[6] = v6_address; 10113 dw[7] = (v6_address >> 32) | (v6 >> 32); 10114 10115 const uint64_t v8 = 10116 __gen_uint(values->IndirectObjectBaseAddressModifyEnable, 0, 0) | 10117 __gen_uint(values->IndirectObjectMOCS, 4, 10); 10118 const uint64_t v8_address = 10119 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, v8); 10120 dw[8] = v8_address; 10121 dw[9] = (v8_address >> 32) | (v8 >> 32); 10122 10123 const uint64_t v10 = 10124 __gen_uint(values->InstructionBaseAddressModifyEnable, 0, 0) | 10125 __gen_uint(values->InstructionMOCS, 4, 10); 10126 const uint64_t v10_address = 10127 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, v10); 10128 dw[10] = v10_address; 10129 dw[11] = (v10_address >> 32) | (v10 >> 32); 10130 10131 dw[12] = 10132 __gen_uint(values->GeneralStateBufferSizeModifyEnable, 0, 0) | 10133 __gen_uint(values->GeneralStateBufferSize, 12, 31); 10134 10135 dw[13] = 10136 __gen_uint(values->DynamicStateBufferSizeModifyEnable, 0, 0) | 10137 __gen_uint(values->DynamicStateBufferSize, 12, 31); 10138 10139 dw[14] = 10140 __gen_uint(values->IndirectObjectBufferSizeModifyEnable, 0, 0) | 10141 __gen_uint(values->IndirectObjectBufferSize, 12, 31); 10142 10143 dw[15] = 10144 __gen_uint(values->InstructionBuffersizeModifyEnable, 0, 0) | 10145 __gen_uint(values->InstructionBufferSize, 12, 31); 10146 10147 const uint64_t v16 = 10148 __gen_uint(values->BindlessSurfaceStateBaseAddressModifyEnable, 0, 0) | 10149 __gen_uint(values->BindlessSurfaceStateMOCS, 4, 10); 10150 const uint64_t v16_address = 10151 __gen_combine_address(data, &dw[16], values->BindlessSurfaceStateBaseAddress, v16); 10152 dw[16] = v16_address; 10153 dw[17] = (v16_address >> 32) | (v16 >> 32); 10154 10155 dw[18] = 10156 __gen_uint(values->BindlessSurfaceStateSize, 12, 31); 10157 10158 const uint64_t v19 = 10159 __gen_uint(values->BindlessSamplerStateBaseAddressModifyEnable, 0, 0) | 10160 __gen_uint(values->BindlessSamplerStateMOCS, 4, 10); 10161 const uint64_t v19_address = 10162 __gen_combine_address(data, &dw[19], values->BindlessSamplerStateBaseAddress, v19); 10163 dw[19] = v19_address; 10164 dw[20] = (v19_address >> 32) | (v19 >> 32); 10165 10166 dw[21] = 10167 __gen_uint(values->BindlessSamplerStateBufferSize, 12, 31); 10168} 10169 10170#define GEN11_STATE_SIP_length 3 10171#define GEN11_STATE_SIP_length_bias 2 10172#define GEN11_STATE_SIP_header \ 10173 .DWordLength = 1, \ 10174 ._3DCommandSubOpcode = 2, \ 10175 ._3DCommandOpcode = 1, \ 10176 .CommandSubType = 0, \ 10177 .CommandType = 3 10178 10179struct GEN11_STATE_SIP { 10180 uint32_t DWordLength; 10181 uint32_t _3DCommandSubOpcode; 10182 uint32_t _3DCommandOpcode; 10183 uint32_t CommandSubType; 10184 uint32_t CommandType; 10185 uint64_t SystemInstructionPointer; 10186}; 10187 10188static inline void 10189GEN11_STATE_SIP_pack(__attribute__((unused)) __gen_user_data *data, 10190 __attribute__((unused)) void * restrict dst, 10191 __attribute__((unused)) const struct GEN11_STATE_SIP * restrict values) 10192{ 10193 uint32_t * restrict dw = (uint32_t * restrict) dst; 10194 10195 dw[0] = 10196 __gen_uint(values->DWordLength, 0, 7) | 10197 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 10198 __gen_uint(values->_3DCommandOpcode, 24, 26) | 10199 __gen_uint(values->CommandSubType, 27, 28) | 10200 __gen_uint(values->CommandType, 29, 31); 10201 10202 const uint64_t v1 = 10203 __gen_offset(values->SystemInstructionPointer, 4, 63); 10204 dw[1] = v1; 10205 dw[2] = v1 >> 32; 10206} 10207 10208#define GEN11_BCS_INSTDONE_num 0x2206c 10209#define GEN11_BCS_INSTDONE_length 1 10210struct GEN11_BCS_INSTDONE { 10211 bool RingEnable; 10212 bool BlitterIDLE; 10213 bool GABIDLE; 10214 bool BCSDone; 10215}; 10216 10217static inline void 10218GEN11_BCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10219 __attribute__((unused)) void * restrict dst, 10220 __attribute__((unused)) const struct GEN11_BCS_INSTDONE * restrict values) 10221{ 10222 uint32_t * restrict dw = (uint32_t * restrict) dst; 10223 10224 dw[0] = 10225 __gen_uint(values->RingEnable, 0, 0) | 10226 __gen_uint(values->BlitterIDLE, 1, 1) | 10227 __gen_uint(values->GABIDLE, 2, 2) | 10228 __gen_uint(values->BCSDone, 3, 3); 10229} 10230 10231#define GEN11_CACHE_MODE_0_num 0x7000 10232#define GEN11_CACHE_MODE_0_length 1 10233struct GEN11_CACHE_MODE_0 { 10234 bool Nulltilefixdisable; 10235 bool Disableclockgatinginthepixelbackend; 10236 bool HierarchicalZRAWStallOptimizationDisable; 10237 bool RCCEvictionPolicy; 10238 bool STCPMAOptimizationEnable; 10239 uint32_t SamplerL2RequestArbitration; 10240#define RoundRobin 0 10241#define FetchareHighestPriority 1 10242#define ConstantsareHighestPriority 2 10243 bool SamplerL2TLBPrefetchEnable; 10244 bool SamplerSetRemappingfor3DDisable; 10245 uint32_t MSAACompressionPlaneNumberThresholdforeLLC; 10246 bool SamplerL2Disable; 10247 bool NulltilefixdisableMask; 10248 bool DisableclockgatinginthepixelbackendMask; 10249 bool HierarchicalZRAWStallOptimizationDisableMask; 10250 bool RCCEvictionPolicyMask; 10251 bool STCPMAOptimizationEnableMask; 10252 uint32_t SamplerL2RequestArbitrationMask; 10253 bool SamplerL2TLBPrefetchEnableMask; 10254 bool SamplerSetRemappingfor3DDisableMask; 10255 uint32_t MSAACompressionPlaneNumberThresholdforeLLCMask; 10256 bool SamplerL2DisableMask; 10257}; 10258 10259static inline void 10260GEN11_CACHE_MODE_0_pack(__attribute__((unused)) __gen_user_data *data, 10261 __attribute__((unused)) void * restrict dst, 10262 __attribute__((unused)) const struct GEN11_CACHE_MODE_0 * restrict values) 10263{ 10264 uint32_t * restrict dw = (uint32_t * restrict) dst; 10265 10266 dw[0] = 10267 __gen_uint(values->Nulltilefixdisable, 0, 0) | 10268 __gen_uint(values->Disableclockgatinginthepixelbackend, 1, 1) | 10269 __gen_uint(values->HierarchicalZRAWStallOptimizationDisable, 2, 2) | 10270 __gen_uint(values->RCCEvictionPolicy, 4, 4) | 10271 __gen_uint(values->STCPMAOptimizationEnable, 5, 5) | 10272 __gen_uint(values->SamplerL2RequestArbitration, 6, 7) | 10273 __gen_uint(values->SamplerL2TLBPrefetchEnable, 9, 9) | 10274 __gen_uint(values->SamplerSetRemappingfor3DDisable, 11, 11) | 10275 __gen_uint(values->MSAACompressionPlaneNumberThresholdforeLLC, 12, 14) | 10276 __gen_uint(values->SamplerL2Disable, 15, 15) | 10277 __gen_uint(values->NulltilefixdisableMask, 16, 16) | 10278 __gen_uint(values->DisableclockgatinginthepixelbackendMask, 17, 17) | 10279 __gen_uint(values->HierarchicalZRAWStallOptimizationDisableMask, 18, 18) | 10280 __gen_uint(values->RCCEvictionPolicyMask, 20, 20) | 10281 __gen_uint(values->STCPMAOptimizationEnableMask, 21, 21) | 10282 __gen_uint(values->SamplerL2RequestArbitrationMask, 22, 23) | 10283 __gen_uint(values->SamplerL2TLBPrefetchEnableMask, 25, 25) | 10284 __gen_uint(values->SamplerSetRemappingfor3DDisableMask, 27, 27) | 10285 __gen_uint(values->MSAACompressionPlaneNumberThresholdforeLLCMask, 28, 30) | 10286 __gen_uint(values->SamplerL2DisableMask, 31, 31); 10287} 10288 10289#define GEN11_CACHE_MODE_1_num 0x7004 10290#define GEN11_CACHE_MODE_1_length 1 10291struct GEN11_CACHE_MODE_1 { 10292 bool PartialResolveDisableInVC; 10293 bool RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable; 10294 bool MCSCacheDisable; 10295 bool MSCRAWHazardAvoidanceBit; 10296 uint32_t NPEarlyZFailsDisable; 10297 bool BlendOptimizationFixDisable; 10298 bool ColorCompressionDisable; 10299 bool PartialResolveDisableInVCMask; 10300 bool RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask; 10301 bool MCSCacheDisableMask; 10302 bool MSCRAWHazardAvoidanceBitMask; 10303 bool NPEarlyZFailsDisableMask; 10304 bool BlendOptimizationFixDisableMask; 10305 bool ColorCompressionDisableMask; 10306}; 10307 10308static inline void 10309GEN11_CACHE_MODE_1_pack(__attribute__((unused)) __gen_user_data *data, 10310 __attribute__((unused)) void * restrict dst, 10311 __attribute__((unused)) const struct GEN11_CACHE_MODE_1 * restrict values) 10312{ 10313 uint32_t * restrict dw = (uint32_t * restrict) dst; 10314 10315 dw[0] = 10316 __gen_uint(values->PartialResolveDisableInVC, 1, 1) | 10317 __gen_uint(values->RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable, 3, 3) | 10318 __gen_uint(values->MCSCacheDisable, 5, 5) | 10319 __gen_uint(values->MSCRAWHazardAvoidanceBit, 9, 9) | 10320 __gen_uint(values->NPEarlyZFailsDisable, 13, 13) | 10321 __gen_uint(values->BlendOptimizationFixDisable, 14, 14) | 10322 __gen_uint(values->ColorCompressionDisable, 15, 15) | 10323 __gen_uint(values->PartialResolveDisableInVCMask, 17, 17) | 10324 __gen_uint(values->RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask, 19, 19) | 10325 __gen_uint(values->MCSCacheDisableMask, 21, 21) | 10326 __gen_uint(values->MSCRAWHazardAvoidanceBitMask, 25, 25) | 10327 __gen_uint(values->NPEarlyZFailsDisableMask, 29, 29) | 10328 __gen_uint(values->BlendOptimizationFixDisableMask, 30, 30) | 10329 __gen_uint(values->ColorCompressionDisableMask, 31, 31); 10330} 10331 10332#define GEN11_CACHE_MODE_SS_num 0xe420 10333#define GEN11_CACHE_MODE_SS_length 1 10334struct GEN11_CACHE_MODE_SS { 10335 bool InstructionLevel1CacheDisable; 10336 bool InstructionLevel1CacheandInFlightQueueDisable; 10337 bool FloatBlendOptimizationEnable; 10338 bool PerSampleBlendOptDisable; 10339 bool InstructionLevel1CacheDisableMask; 10340 bool InstructionLevel1CacheandInFlightQueueDisableMask; 10341 bool FloatBlendOptimizationEnableMask; 10342 bool PerSampleBlendOptDisableMask; 10343}; 10344 10345static inline void 10346GEN11_CACHE_MODE_SS_pack(__attribute__((unused)) __gen_user_data *data, 10347 __attribute__((unused)) void * restrict dst, 10348 __attribute__((unused)) const struct GEN11_CACHE_MODE_SS * restrict values) 10349{ 10350 uint32_t * restrict dw = (uint32_t * restrict) dst; 10351 10352 dw[0] = 10353 __gen_uint(values->InstructionLevel1CacheDisable, 0, 0) | 10354 __gen_uint(values->InstructionLevel1CacheandInFlightQueueDisable, 1, 1) | 10355 __gen_uint(values->FloatBlendOptimizationEnable, 4, 4) | 10356 __gen_uint(values->PerSampleBlendOptDisable, 11, 11) | 10357 __gen_uint(values->InstructionLevel1CacheDisableMask, 16, 16) | 10358 __gen_uint(values->InstructionLevel1CacheandInFlightQueueDisableMask, 17, 17) | 10359 __gen_uint(values->FloatBlendOptimizationEnableMask, 20, 20) | 10360 __gen_uint(values->PerSampleBlendOptDisableMask, 27, 27); 10361} 10362 10363#define GEN11_CL_INVOCATION_COUNT_num 0x2338 10364#define GEN11_CL_INVOCATION_COUNT_length 2 10365struct GEN11_CL_INVOCATION_COUNT { 10366 uint64_t CLInvocationCountReport; 10367}; 10368 10369static inline void 10370GEN11_CL_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10371 __attribute__((unused)) void * restrict dst, 10372 __attribute__((unused)) const struct GEN11_CL_INVOCATION_COUNT * restrict values) 10373{ 10374 uint32_t * restrict dw = (uint32_t * restrict) dst; 10375 10376 const uint64_t v0 = 10377 __gen_uint(values->CLInvocationCountReport, 0, 63); 10378 dw[0] = v0; 10379 dw[1] = v0 >> 32; 10380} 10381 10382#define GEN11_CL_PRIMITIVES_COUNT_num 0x2340 10383#define GEN11_CL_PRIMITIVES_COUNT_length 2 10384struct GEN11_CL_PRIMITIVES_COUNT { 10385 uint64_t CLPrimitivesCountReport; 10386}; 10387 10388static inline void 10389GEN11_CL_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10390 __attribute__((unused)) void * restrict dst, 10391 __attribute__((unused)) const struct GEN11_CL_PRIMITIVES_COUNT * restrict values) 10392{ 10393 uint32_t * restrict dw = (uint32_t * restrict) dst; 10394 10395 const uint64_t v0 = 10396 __gen_uint(values->CLPrimitivesCountReport, 0, 63); 10397 dw[0] = v0; 10398 dw[1] = v0 >> 32; 10399} 10400 10401#define GEN11_COMMON_SLICE_CHICKEN3_num 0x7304 10402#define GEN11_COMMON_SLICE_CHICKEN3_length 1 10403struct GEN11_COMMON_SLICE_CHICKEN3 { 10404 uint32_t PSThreadPanicDispatch; 10405 uint32_t PSThreadPanicDispatchMask; 10406}; 10407 10408static inline void 10409GEN11_COMMON_SLICE_CHICKEN3_pack(__attribute__((unused)) __gen_user_data *data, 10410 __attribute__((unused)) void * restrict dst, 10411 __attribute__((unused)) const struct GEN11_COMMON_SLICE_CHICKEN3 * restrict values) 10412{ 10413 uint32_t * restrict dw = (uint32_t * restrict) dst; 10414 10415 dw[0] = 10416 __gen_uint(values->PSThreadPanicDispatch, 6, 7) | 10417 __gen_uint(values->PSThreadPanicDispatchMask, 22, 23); 10418} 10419 10420#define GEN11_CS_CHICKEN1_num 0x2580 10421#define GEN11_CS_CHICKEN1_length 1 10422struct GEN11_CS_CHICKEN1 { 10423 uint32_t ReplayMode; 10424#define MidcmdbufferPreemption 0 10425#define ObjectLevelPreemption 1 10426 bool ReplayModeMask; 10427}; 10428 10429static inline void 10430GEN11_CS_CHICKEN1_pack(__attribute__((unused)) __gen_user_data *data, 10431 __attribute__((unused)) void * restrict dst, 10432 __attribute__((unused)) const struct GEN11_CS_CHICKEN1 * restrict values) 10433{ 10434 uint32_t * restrict dw = (uint32_t * restrict) dst; 10435 10436 dw[0] = 10437 __gen_uint(values->ReplayMode, 0, 0) | 10438 __gen_uint(values->ReplayModeMask, 16, 16); 10439} 10440 10441#define GEN11_CS_DEBUG_MODE2_num 0x20d8 10442#define GEN11_CS_DEBUG_MODE2_length 1 10443struct GEN11_CS_DEBUG_MODE2 { 10444 bool _3DRenderingInstructionDisable; 10445 bool MediaInstructionDisable; 10446 bool CONSTANT_BUFFERAddressOffsetDisable; 10447 bool _3DRenderingInstructionDisableMask; 10448 bool MediaInstructionDisableMask; 10449 bool CONSTANT_BUFFERAddressOffsetDisableMask; 10450}; 10451 10452static inline void 10453GEN11_CS_DEBUG_MODE2_pack(__attribute__((unused)) __gen_user_data *data, 10454 __attribute__((unused)) void * restrict dst, 10455 __attribute__((unused)) const struct GEN11_CS_DEBUG_MODE2 * restrict values) 10456{ 10457 uint32_t * restrict dw = (uint32_t * restrict) dst; 10458 10459 dw[0] = 10460 __gen_uint(values->_3DRenderingInstructionDisable, 0, 0) | 10461 __gen_uint(values->MediaInstructionDisable, 1, 1) | 10462 __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisable, 4, 4) | 10463 __gen_uint(values->_3DRenderingInstructionDisableMask, 16, 16) | 10464 __gen_uint(values->MediaInstructionDisableMask, 17, 17) | 10465 __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisableMask, 20, 20); 10466} 10467 10468#define GEN11_CS_INVOCATION_COUNT_num 0x2290 10469#define GEN11_CS_INVOCATION_COUNT_length 2 10470struct GEN11_CS_INVOCATION_COUNT { 10471 uint64_t CSInvocationCountReport; 10472}; 10473 10474static inline void 10475GEN11_CS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10476 __attribute__((unused)) void * restrict dst, 10477 __attribute__((unused)) const struct GEN11_CS_INVOCATION_COUNT * restrict values) 10478{ 10479 uint32_t * restrict dw = (uint32_t * restrict) dst; 10480 10481 const uint64_t v0 = 10482 __gen_uint(values->CSInvocationCountReport, 0, 63); 10483 dw[0] = v0; 10484 dw[1] = v0 >> 32; 10485} 10486 10487#define GEN11_DS_INVOCATION_COUNT_num 0x2308 10488#define GEN11_DS_INVOCATION_COUNT_length 2 10489struct GEN11_DS_INVOCATION_COUNT { 10490 uint64_t DSInvocationCountReport; 10491}; 10492 10493static inline void 10494GEN11_DS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10495 __attribute__((unused)) void * restrict dst, 10496 __attribute__((unused)) const struct GEN11_DS_INVOCATION_COUNT * restrict values) 10497{ 10498 uint32_t * restrict dw = (uint32_t * restrict) dst; 10499 10500 const uint64_t v0 = 10501 __gen_uint(values->DSInvocationCountReport, 0, 63); 10502 dw[0] = v0; 10503 dw[1] = v0 >> 32; 10504} 10505 10506#define GEN11_GS_INVOCATION_COUNT_num 0x2328 10507#define GEN11_GS_INVOCATION_COUNT_length 2 10508struct GEN11_GS_INVOCATION_COUNT { 10509 uint64_t GSInvocationCountReport; 10510}; 10511 10512static inline void 10513GEN11_GS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10514 __attribute__((unused)) void * restrict dst, 10515 __attribute__((unused)) const struct GEN11_GS_INVOCATION_COUNT * restrict values) 10516{ 10517 uint32_t * restrict dw = (uint32_t * restrict) dst; 10518 10519 const uint64_t v0 = 10520 __gen_uint(values->GSInvocationCountReport, 0, 63); 10521 dw[0] = v0; 10522 dw[1] = v0 >> 32; 10523} 10524 10525#define GEN11_GS_PRIMITIVES_COUNT_num 0x2330 10526#define GEN11_GS_PRIMITIVES_COUNT_length 2 10527struct GEN11_GS_PRIMITIVES_COUNT { 10528 uint64_t GSPrimitivesCountReport; 10529}; 10530 10531static inline void 10532GEN11_GS_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10533 __attribute__((unused)) void * restrict dst, 10534 __attribute__((unused)) const struct GEN11_GS_PRIMITIVES_COUNT * restrict values) 10535{ 10536 uint32_t * restrict dw = (uint32_t * restrict) dst; 10537 10538 const uint64_t v0 = 10539 __gen_uint(values->GSPrimitivesCountReport, 0, 63); 10540 dw[0] = v0; 10541 dw[1] = v0 >> 32; 10542} 10543 10544#define GEN11_HALF_SLICE_CHICKEN7_num 0xe194 10545#define GEN11_HALF_SLICE_CHICKEN7_length 1 10546struct GEN11_HALF_SLICE_CHICKEN7 { 10547 bool EnabledTexelOffsetPrecisionFix; 10548 bool EnabledTexelOffsetPrecisionFixMask; 10549}; 10550 10551static inline void 10552GEN11_HALF_SLICE_CHICKEN7_pack(__attribute__((unused)) __gen_user_data *data, 10553 __attribute__((unused)) void * restrict dst, 10554 __attribute__((unused)) const struct GEN11_HALF_SLICE_CHICKEN7 * restrict values) 10555{ 10556 uint32_t * restrict dw = (uint32_t * restrict) dst; 10557 10558 dw[0] = 10559 __gen_uint(values->EnabledTexelOffsetPrecisionFix, 1, 1) | 10560 __gen_uint(values->EnabledTexelOffsetPrecisionFixMask, 17, 17); 10561} 10562 10563#define GEN11_HS_INVOCATION_COUNT_num 0x2300 10564#define GEN11_HS_INVOCATION_COUNT_length 2 10565struct GEN11_HS_INVOCATION_COUNT { 10566 uint64_t HSInvocationCountReport; 10567}; 10568 10569static inline void 10570GEN11_HS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10571 __attribute__((unused)) void * restrict dst, 10572 __attribute__((unused)) const struct GEN11_HS_INVOCATION_COUNT * restrict values) 10573{ 10574 uint32_t * restrict dw = (uint32_t * restrict) dst; 10575 10576 const uint64_t v0 = 10577 __gen_uint(values->HSInvocationCountReport, 0, 63); 10578 dw[0] = v0; 10579 dw[1] = v0 >> 32; 10580} 10581 10582#define GEN11_IA_PRIMITIVES_COUNT_num 0x2318 10583#define GEN11_IA_PRIMITIVES_COUNT_length 2 10584struct GEN11_IA_PRIMITIVES_COUNT { 10585 uint64_t IAPrimitivesCountReport; 10586}; 10587 10588static inline void 10589GEN11_IA_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10590 __attribute__((unused)) void * restrict dst, 10591 __attribute__((unused)) const struct GEN11_IA_PRIMITIVES_COUNT * restrict values) 10592{ 10593 uint32_t * restrict dw = (uint32_t * restrict) dst; 10594 10595 const uint64_t v0 = 10596 __gen_uint(values->IAPrimitivesCountReport, 0, 63); 10597 dw[0] = v0; 10598 dw[1] = v0 >> 32; 10599} 10600 10601#define GEN11_IA_VERTICES_COUNT_num 0x2310 10602#define GEN11_IA_VERTICES_COUNT_length 2 10603struct GEN11_IA_VERTICES_COUNT { 10604 uint64_t IAVerticesCountReport; 10605}; 10606 10607static inline void 10608GEN11_IA_VERTICES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10609 __attribute__((unused)) void * restrict dst, 10610 __attribute__((unused)) const struct GEN11_IA_VERTICES_COUNT * restrict values) 10611{ 10612 uint32_t * restrict dw = (uint32_t * restrict) dst; 10613 10614 const uint64_t v0 = 10615 __gen_uint(values->IAVerticesCountReport, 0, 63); 10616 dw[0] = v0; 10617 dw[1] = v0 >> 32; 10618} 10619 10620#define GEN11_INSTDONE_1_num 0x206c 10621#define GEN11_INSTDONE_1_length 1 10622struct GEN11_INSTDONE_1 { 10623 bool PRB0RingEnable; 10624 bool VFGDone; 10625 bool VSDone; 10626 bool HSDone; 10627 bool TEDone; 10628 bool DSDone; 10629 bool GSDone; 10630 bool SOLDone; 10631 bool CLDone; 10632 bool SFDone; 10633 bool TDG1Done; 10634 bool TDG0Done; 10635 bool URBMDone; 10636 bool SVGDone; 10637 bool GAFSDone; 10638 bool VFEDone; 10639 bool TSG0Done; 10640 bool GAFMDone; 10641 bool GAMDone; 10642 bool RSDone; 10643 bool CSDone; 10644 bool SDEDone; 10645 bool RCCFBCCSDone; 10646 bool TSG1Done; 10647}; 10648 10649static inline void 10650GEN11_INSTDONE_1_pack(__attribute__((unused)) __gen_user_data *data, 10651 __attribute__((unused)) void * restrict dst, 10652 __attribute__((unused)) const struct GEN11_INSTDONE_1 * restrict values) 10653{ 10654 uint32_t * restrict dw = (uint32_t * restrict) dst; 10655 10656 dw[0] = 10657 __gen_uint(values->PRB0RingEnable, 0, 0) | 10658 __gen_uint(values->VFGDone, 1, 1) | 10659 __gen_uint(values->VSDone, 2, 2) | 10660 __gen_uint(values->HSDone, 3, 3) | 10661 __gen_uint(values->TEDone, 4, 4) | 10662 __gen_uint(values->DSDone, 5, 5) | 10663 __gen_uint(values->GSDone, 6, 6) | 10664 __gen_uint(values->SOLDone, 7, 7) | 10665 __gen_uint(values->CLDone, 8, 8) | 10666 __gen_uint(values->SFDone, 9, 9) | 10667 __gen_uint(values->TDG1Done, 11, 11) | 10668 __gen_uint(values->TDG0Done, 12, 12) | 10669 __gen_uint(values->URBMDone, 13, 13) | 10670 __gen_uint(values->SVGDone, 14, 14) | 10671 __gen_uint(values->GAFSDone, 15, 15) | 10672 __gen_uint(values->VFEDone, 16, 16) | 10673 __gen_uint(values->TSG0Done, 17, 17) | 10674 __gen_uint(values->GAFMDone, 18, 18) | 10675 __gen_uint(values->GAMDone, 19, 19) | 10676 __gen_uint(values->RSDone, 20, 20) | 10677 __gen_uint(values->CSDone, 21, 21) | 10678 __gen_uint(values->SDEDone, 22, 22) | 10679 __gen_uint(values->RCCFBCCSDone, 23, 23) | 10680 __gen_uint(values->TSG1Done, 24, 24); 10681} 10682 10683#define GEN11_L3CNTLREG_num 0x7034 10684#define GEN11_L3CNTLREG_length 1 10685struct GEN11_L3CNTLREG { 10686 uint32_t SLMEnable; 10687 uint32_t URBAllocation; 10688 bool ErrorDetectionBehaviorControl; 10689 bool UseFullWays; 10690 uint32_t ROAllocation; 10691 uint32_t DCAllocation; 10692 uint32_t AllAllocation; 10693}; 10694 10695static inline void 10696GEN11_L3CNTLREG_pack(__attribute__((unused)) __gen_user_data *data, 10697 __attribute__((unused)) void * restrict dst, 10698 __attribute__((unused)) const struct GEN11_L3CNTLREG * restrict values) 10699{ 10700 uint32_t * restrict dw = (uint32_t * restrict) dst; 10701 10702 dw[0] = 10703 __gen_uint(values->SLMEnable, 0, 0) | 10704 __gen_uint(values->URBAllocation, 1, 7) | 10705 __gen_uint(values->ErrorDetectionBehaviorControl, 9, 9) | 10706 __gen_uint(values->UseFullWays, 10, 10) | 10707 __gen_uint(values->ROAllocation, 11, 17) | 10708 __gen_uint(values->DCAllocation, 18, 24) | 10709 __gen_uint(values->AllAllocation, 25, 31); 10710} 10711 10712#define GEN11_PS_INVOCATION_COUNT_num 0x2348 10713#define GEN11_PS_INVOCATION_COUNT_length 2 10714struct GEN11_PS_INVOCATION_COUNT { 10715 uint64_t PSInvocationCountReport; 10716}; 10717 10718static inline void 10719GEN11_PS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10720 __attribute__((unused)) void * restrict dst, 10721 __attribute__((unused)) const struct GEN11_PS_INVOCATION_COUNT * restrict values) 10722{ 10723 uint32_t * restrict dw = (uint32_t * restrict) dst; 10724 10725 const uint64_t v0 = 10726 __gen_uint(values->PSInvocationCountReport, 0, 63); 10727 dw[0] = v0; 10728 dw[1] = v0 >> 32; 10729} 10730 10731#define GEN11_ROW_INSTDONE_num 0xe164 10732#define GEN11_ROW_INSTDONE_length 1 10733struct GEN11_ROW_INSTDONE { 10734 bool BCDone; 10735 bool PSDDone; 10736 bool DAPRDone; 10737 bool TDLDone; 10738 bool ICDone; 10739 bool MA0Done; 10740 bool EU00DoneSS0; 10741 bool EU01DoneSS0; 10742 bool EU02DoneSS0; 10743 bool EU03DoneSS0; 10744 bool EU10DoneSS0; 10745 bool EU11DoneSS0; 10746 bool EU12DoneSS0; 10747 bool EU13DoneSS0; 10748 bool MA1DoneSS0; 10749}; 10750 10751static inline void 10752GEN11_ROW_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10753 __attribute__((unused)) void * restrict dst, 10754 __attribute__((unused)) const struct GEN11_ROW_INSTDONE * restrict values) 10755{ 10756 uint32_t * restrict dw = (uint32_t * restrict) dst; 10757 10758 dw[0] = 10759 __gen_uint(values->BCDone, 0, 0) | 10760 __gen_uint(values->PSDDone, 1, 1) | 10761 __gen_uint(values->DAPRDone, 3, 3) | 10762 __gen_uint(values->TDLDone, 6, 6) | 10763 __gen_uint(values->ICDone, 12, 12) | 10764 __gen_uint(values->MA0Done, 15, 15) | 10765 __gen_uint(values->EU00DoneSS0, 16, 16) | 10766 __gen_uint(values->EU01DoneSS0, 17, 17) | 10767 __gen_uint(values->EU02DoneSS0, 18, 18) | 10768 __gen_uint(values->EU03DoneSS0, 19, 19) | 10769 __gen_uint(values->EU10DoneSS0, 21, 21) | 10770 __gen_uint(values->EU11DoneSS0, 22, 22) | 10771 __gen_uint(values->EU12DoneSS0, 23, 23) | 10772 __gen_uint(values->EU13DoneSS0, 24, 24) | 10773 __gen_uint(values->MA1DoneSS0, 26, 26); 10774} 10775 10776#define GEN11_SAMPLER_INSTDONE_num 0xe160 10777#define GEN11_SAMPLER_INSTDONE_length 1 10778struct GEN11_SAMPLER_INSTDONE { 10779 bool IMEDone; 10780 bool PL0Done; 10781 bool SO0Done; 10782 bool DG0Done; 10783 bool FT0Done; 10784 bool DM0Done; 10785 bool SCDone; 10786 bool FL0Done; 10787 bool QCDone; 10788 bool SVSMDone; 10789 bool SI0Done; 10790 bool MT0Done; 10791 bool AVSDone; 10792 bool IEFDone; 10793 bool CREDone; 10794 bool SVSM_ARB_SIFM; 10795 bool SVSMARB2; 10796 bool SVSMARB1; 10797 bool SVSMAdapter; 10798 bool BDMDone; 10799}; 10800 10801static inline void 10802GEN11_SAMPLER_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10803 __attribute__((unused)) void * restrict dst, 10804 __attribute__((unused)) const struct GEN11_SAMPLER_INSTDONE * restrict values) 10805{ 10806 uint32_t * restrict dw = (uint32_t * restrict) dst; 10807 10808 dw[0] = 10809 __gen_uint(values->IMEDone, 0, 0) | 10810 __gen_uint(values->PL0Done, 1, 1) | 10811 __gen_uint(values->SO0Done, 2, 2) | 10812 __gen_uint(values->DG0Done, 3, 3) | 10813 __gen_uint(values->FT0Done, 4, 4) | 10814 __gen_uint(values->DM0Done, 5, 5) | 10815 __gen_uint(values->SCDone, 6, 6) | 10816 __gen_uint(values->FL0Done, 7, 7) | 10817 __gen_uint(values->QCDone, 8, 8) | 10818 __gen_uint(values->SVSMDone, 9, 9) | 10819 __gen_uint(values->SI0Done, 10, 10) | 10820 __gen_uint(values->MT0Done, 11, 11) | 10821 __gen_uint(values->AVSDone, 12, 12) | 10822 __gen_uint(values->IEFDone, 13, 13) | 10823 __gen_uint(values->CREDone, 14, 14) | 10824 __gen_uint(values->SVSM_ARB_SIFM, 15, 15) | 10825 __gen_uint(values->SVSMARB2, 16, 16) | 10826 __gen_uint(values->SVSMARB1, 17, 17) | 10827 __gen_uint(values->SVSMAdapter, 18, 18) | 10828 __gen_uint(values->BDMDone, 19, 19); 10829} 10830 10831#define GEN11_SAMPLER_MODE_num 0xe18c 10832#define GEN11_SAMPLER_MODE_length 1 10833struct GEN11_SAMPLER_MODE { 10834 bool HeaderlessMessageforPreemptableContexts; 10835 bool HeaderlessMessageforPreemptableContextsMask; 10836}; 10837 10838static inline void 10839GEN11_SAMPLER_MODE_pack(__attribute__((unused)) __gen_user_data *data, 10840 __attribute__((unused)) void * restrict dst, 10841 __attribute__((unused)) const struct GEN11_SAMPLER_MODE * restrict values) 10842{ 10843 uint32_t * restrict dw = (uint32_t * restrict) dst; 10844 10845 dw[0] = 10846 __gen_uint(values->HeaderlessMessageforPreemptableContexts, 5, 5) | 10847 __gen_uint(values->HeaderlessMessageforPreemptableContextsMask, 21, 21); 10848} 10849 10850#define GEN11_SC_INSTDONE_num 0x7100 10851#define GEN11_SC_INSTDONE_length 1 10852struct GEN11_SC_INSTDONE { 10853 bool SVLDone; 10854 bool WMFEDone; 10855 bool WMBEDone; 10856 bool HIZDone; 10857 bool STCDone; 10858 bool IZDone; 10859 bool SBEDone; 10860 bool RCZDone; 10861 bool RCCDone; 10862 bool RCPBEDone; 10863 bool RCPFEDone; 10864 bool DAPBDone; 10865 bool DAPRBEDone; 10866 bool SARBDone; 10867 bool DC0Done; 10868 bool DC1Done; 10869 bool DC2Done; 10870 bool DC3Done; 10871 bool GW0Done; 10872 bool GW1Done; 10873 bool GW2Done; 10874 bool GW3Done; 10875 bool TDCDone; 10876 bool SFBEDone; 10877}; 10878 10879static inline void 10880GEN11_SC_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10881 __attribute__((unused)) void * restrict dst, 10882 __attribute__((unused)) const struct GEN11_SC_INSTDONE * restrict values) 10883{ 10884 uint32_t * restrict dw = (uint32_t * restrict) dst; 10885 10886 dw[0] = 10887 __gen_uint(values->SVLDone, 0, 0) | 10888 __gen_uint(values->WMFEDone, 1, 1) | 10889 __gen_uint(values->WMBEDone, 2, 2) | 10890 __gen_uint(values->HIZDone, 3, 3) | 10891 __gen_uint(values->STCDone, 4, 4) | 10892 __gen_uint(values->IZDone, 5, 5) | 10893 __gen_uint(values->SBEDone, 6, 6) | 10894 __gen_uint(values->RCZDone, 8, 8) | 10895 __gen_uint(values->RCCDone, 9, 9) | 10896 __gen_uint(values->RCPBEDone, 10, 10) | 10897 __gen_uint(values->RCPFEDone, 11, 11) | 10898 __gen_uint(values->DAPBDone, 12, 12) | 10899 __gen_uint(values->DAPRBEDone, 13, 13) | 10900 __gen_uint(values->SARBDone, 15, 15) | 10901 __gen_uint(values->DC0Done, 16, 16) | 10902 __gen_uint(values->DC1Done, 17, 17) | 10903 __gen_uint(values->DC2Done, 18, 18) | 10904 __gen_uint(values->DC3Done, 19, 19) | 10905 __gen_uint(values->GW0Done, 20, 20) | 10906 __gen_uint(values->GW1Done, 21, 21) | 10907 __gen_uint(values->GW2Done, 22, 22) | 10908 __gen_uint(values->GW3Done, 23, 23) | 10909 __gen_uint(values->TDCDone, 24, 24) | 10910 __gen_uint(values->SFBEDone, 25, 25); 10911} 10912 10913#define GEN11_SLICE_COMMON_ECO_CHICKEN1_num 0x731c 10914#define GEN11_SLICE_COMMON_ECO_CHICKEN1_length 1 10915struct GEN11_SLICE_COMMON_ECO_CHICKEN1 { 10916 bool StateCacheRedirectToCSSectionEnable; 10917 bool StateCacheRedirectToCSSectionEnableMask; 10918}; 10919 10920static inline void 10921GEN11_SLICE_COMMON_ECO_CHICKEN1_pack(__attribute__((unused)) __gen_user_data *data, 10922 __attribute__((unused)) void * restrict dst, 10923 __attribute__((unused)) const struct GEN11_SLICE_COMMON_ECO_CHICKEN1 * restrict values) 10924{ 10925 uint32_t * restrict dw = (uint32_t * restrict) dst; 10926 10927 dw[0] = 10928 __gen_uint(values->StateCacheRedirectToCSSectionEnable, 11, 11) | 10929 __gen_uint(values->StateCacheRedirectToCSSectionEnableMask, 27, 27); 10930} 10931 10932#define GEN11_SO_NUM_PRIMS_WRITTEN0_num 0x5200 10933#define GEN11_SO_NUM_PRIMS_WRITTEN0_length 2 10934struct GEN11_SO_NUM_PRIMS_WRITTEN0 { 10935 uint64_t NumPrimsWrittenCount; 10936}; 10937 10938static inline void 10939GEN11_SO_NUM_PRIMS_WRITTEN0_pack(__attribute__((unused)) __gen_user_data *data, 10940 __attribute__((unused)) void * restrict dst, 10941 __attribute__((unused)) const struct GEN11_SO_NUM_PRIMS_WRITTEN0 * restrict values) 10942{ 10943 uint32_t * restrict dw = (uint32_t * restrict) dst; 10944 10945 const uint64_t v0 = 10946 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10947 dw[0] = v0; 10948 dw[1] = v0 >> 32; 10949} 10950 10951#define GEN11_SO_NUM_PRIMS_WRITTEN1_num 0x5208 10952#define GEN11_SO_NUM_PRIMS_WRITTEN1_length 2 10953struct GEN11_SO_NUM_PRIMS_WRITTEN1 { 10954 uint64_t NumPrimsWrittenCount; 10955}; 10956 10957static inline void 10958GEN11_SO_NUM_PRIMS_WRITTEN1_pack(__attribute__((unused)) __gen_user_data *data, 10959 __attribute__((unused)) void * restrict dst, 10960 __attribute__((unused)) const struct GEN11_SO_NUM_PRIMS_WRITTEN1 * restrict values) 10961{ 10962 uint32_t * restrict dw = (uint32_t * restrict) dst; 10963 10964 const uint64_t v0 = 10965 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10966 dw[0] = v0; 10967 dw[1] = v0 >> 32; 10968} 10969 10970#define GEN11_SO_NUM_PRIMS_WRITTEN2_num 0x5210 10971#define GEN11_SO_NUM_PRIMS_WRITTEN2_length 2 10972struct GEN11_SO_NUM_PRIMS_WRITTEN2 { 10973 uint64_t NumPrimsWrittenCount; 10974}; 10975 10976static inline void 10977GEN11_SO_NUM_PRIMS_WRITTEN2_pack(__attribute__((unused)) __gen_user_data *data, 10978 __attribute__((unused)) void * restrict dst, 10979 __attribute__((unused)) const struct GEN11_SO_NUM_PRIMS_WRITTEN2 * restrict values) 10980{ 10981 uint32_t * restrict dw = (uint32_t * restrict) dst; 10982 10983 const uint64_t v0 = 10984 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10985 dw[0] = v0; 10986 dw[1] = v0 >> 32; 10987} 10988 10989#define GEN11_SO_NUM_PRIMS_WRITTEN3_num 0x5218 10990#define GEN11_SO_NUM_PRIMS_WRITTEN3_length 2 10991struct GEN11_SO_NUM_PRIMS_WRITTEN3 { 10992 uint64_t NumPrimsWrittenCount; 10993}; 10994 10995static inline void 10996GEN11_SO_NUM_PRIMS_WRITTEN3_pack(__attribute__((unused)) __gen_user_data *data, 10997 __attribute__((unused)) void * restrict dst, 10998 __attribute__((unused)) const struct GEN11_SO_NUM_PRIMS_WRITTEN3 * restrict values) 10999{ 11000 uint32_t * restrict dw = (uint32_t * restrict) dst; 11001 11002 const uint64_t v0 = 11003 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 11004 dw[0] = v0; 11005 dw[1] = v0 >> 32; 11006} 11007 11008#define GEN11_SO_PRIM_STORAGE_NEEDED0_num 0x5240 11009#define GEN11_SO_PRIM_STORAGE_NEEDED0_length 2 11010struct GEN11_SO_PRIM_STORAGE_NEEDED0 { 11011 uint64_t PrimStorageNeededCount; 11012}; 11013 11014static inline void 11015GEN11_SO_PRIM_STORAGE_NEEDED0_pack(__attribute__((unused)) __gen_user_data *data, 11016 __attribute__((unused)) void * restrict dst, 11017 __attribute__((unused)) const struct GEN11_SO_PRIM_STORAGE_NEEDED0 * restrict values) 11018{ 11019 uint32_t * restrict dw = (uint32_t * restrict) dst; 11020 11021 const uint64_t v0 = 11022 __gen_uint(values->PrimStorageNeededCount, 0, 63); 11023 dw[0] = v0; 11024 dw[1] = v0 >> 32; 11025} 11026 11027#define GEN11_SO_PRIM_STORAGE_NEEDED1_num 0x5248 11028#define GEN11_SO_PRIM_STORAGE_NEEDED1_length 2 11029struct GEN11_SO_PRIM_STORAGE_NEEDED1 { 11030 uint64_t PrimStorageNeededCount; 11031}; 11032 11033static inline void 11034GEN11_SO_PRIM_STORAGE_NEEDED1_pack(__attribute__((unused)) __gen_user_data *data, 11035 __attribute__((unused)) void * restrict dst, 11036 __attribute__((unused)) const struct GEN11_SO_PRIM_STORAGE_NEEDED1 * restrict values) 11037{ 11038 uint32_t * restrict dw = (uint32_t * restrict) dst; 11039 11040 const uint64_t v0 = 11041 __gen_uint(values->PrimStorageNeededCount, 0, 63); 11042 dw[0] = v0; 11043 dw[1] = v0 >> 32; 11044} 11045 11046#define GEN11_SO_PRIM_STORAGE_NEEDED2_num 0x5250 11047#define GEN11_SO_PRIM_STORAGE_NEEDED2_length 2 11048struct GEN11_SO_PRIM_STORAGE_NEEDED2 { 11049 uint64_t PrimStorageNeededCount; 11050}; 11051 11052static inline void 11053GEN11_SO_PRIM_STORAGE_NEEDED2_pack(__attribute__((unused)) __gen_user_data *data, 11054 __attribute__((unused)) void * restrict dst, 11055 __attribute__((unused)) const struct GEN11_SO_PRIM_STORAGE_NEEDED2 * restrict values) 11056{ 11057 uint32_t * restrict dw = (uint32_t * restrict) dst; 11058 11059 const uint64_t v0 = 11060 __gen_uint(values->PrimStorageNeededCount, 0, 63); 11061 dw[0] = v0; 11062 dw[1] = v0 >> 32; 11063} 11064 11065#define GEN11_SO_PRIM_STORAGE_NEEDED3_num 0x5258 11066#define GEN11_SO_PRIM_STORAGE_NEEDED3_length 2 11067struct GEN11_SO_PRIM_STORAGE_NEEDED3 { 11068 uint64_t PrimStorageNeededCount; 11069}; 11070 11071static inline void 11072GEN11_SO_PRIM_STORAGE_NEEDED3_pack(__attribute__((unused)) __gen_user_data *data, 11073 __attribute__((unused)) void * restrict dst, 11074 __attribute__((unused)) const struct GEN11_SO_PRIM_STORAGE_NEEDED3 * restrict values) 11075{ 11076 uint32_t * restrict dw = (uint32_t * restrict) dst; 11077 11078 const uint64_t v0 = 11079 __gen_uint(values->PrimStorageNeededCount, 0, 63); 11080 dw[0] = v0; 11081 dw[1] = v0 >> 32; 11082} 11083 11084#define GEN11_SO_WRITE_OFFSET0_num 0x5280 11085#define GEN11_SO_WRITE_OFFSET0_length 1 11086struct GEN11_SO_WRITE_OFFSET0 { 11087 uint64_t WriteOffset; 11088}; 11089 11090static inline void 11091GEN11_SO_WRITE_OFFSET0_pack(__attribute__((unused)) __gen_user_data *data, 11092 __attribute__((unused)) void * restrict dst, 11093 __attribute__((unused)) const struct GEN11_SO_WRITE_OFFSET0 * restrict values) 11094{ 11095 uint32_t * restrict dw = (uint32_t * restrict) dst; 11096 11097 dw[0] = 11098 __gen_offset(values->WriteOffset, 2, 31); 11099} 11100 11101#define GEN11_SO_WRITE_OFFSET1_num 0x5284 11102#define GEN11_SO_WRITE_OFFSET1_length 1 11103struct GEN11_SO_WRITE_OFFSET1 { 11104 uint64_t WriteOffset; 11105}; 11106 11107static inline void 11108GEN11_SO_WRITE_OFFSET1_pack(__attribute__((unused)) __gen_user_data *data, 11109 __attribute__((unused)) void * restrict dst, 11110 __attribute__((unused)) const struct GEN11_SO_WRITE_OFFSET1 * restrict values) 11111{ 11112 uint32_t * restrict dw = (uint32_t * restrict) dst; 11113 11114 dw[0] = 11115 __gen_offset(values->WriteOffset, 2, 31); 11116} 11117 11118#define GEN11_SO_WRITE_OFFSET2_num 0x5288 11119#define GEN11_SO_WRITE_OFFSET2_length 1 11120struct GEN11_SO_WRITE_OFFSET2 { 11121 uint64_t WriteOffset; 11122}; 11123 11124static inline void 11125GEN11_SO_WRITE_OFFSET2_pack(__attribute__((unused)) __gen_user_data *data, 11126 __attribute__((unused)) void * restrict dst, 11127 __attribute__((unused)) const struct GEN11_SO_WRITE_OFFSET2 * restrict values) 11128{ 11129 uint32_t * restrict dw = (uint32_t * restrict) dst; 11130 11131 dw[0] = 11132 __gen_offset(values->WriteOffset, 2, 31); 11133} 11134 11135#define GEN11_SO_WRITE_OFFSET3_num 0x528c 11136#define GEN11_SO_WRITE_OFFSET3_length 1 11137struct GEN11_SO_WRITE_OFFSET3 { 11138 uint64_t WriteOffset; 11139}; 11140 11141static inline void 11142GEN11_SO_WRITE_OFFSET3_pack(__attribute__((unused)) __gen_user_data *data, 11143 __attribute__((unused)) void * restrict dst, 11144 __attribute__((unused)) const struct GEN11_SO_WRITE_OFFSET3 * restrict values) 11145{ 11146 uint32_t * restrict dw = (uint32_t * restrict) dst; 11147 11148 dw[0] = 11149 __gen_offset(values->WriteOffset, 2, 31); 11150} 11151 11152#define GEN11_VCS_INSTDONE_num 0x1206c 11153#define GEN11_VCS_INSTDONE_length 1 11154struct GEN11_VCS_INSTDONE { 11155 bool RingEnable; 11156 bool USBDone; 11157 bool QRCDone; 11158 bool SECDone; 11159 bool MPCDone; 11160 bool VFTDone; 11161 bool BSPDone; 11162 bool VLFDone; 11163 bool VOPDone; 11164 bool VMCDone; 11165 bool VIPDone; 11166 bool VITDone; 11167 bool VDSDone; 11168 bool VMXDone; 11169 bool VCPDone; 11170 bool VCDDone; 11171 bool VADDone; 11172 bool VMDDone; 11173 bool VISDone; 11174 bool VACDone; 11175 bool VAMDone; 11176 bool JPGDone; 11177 bool VBPDone; 11178 bool VHRDone; 11179 bool VCIDone; 11180 bool VINDone; 11181 bool VPRDone; 11182 bool VTQDone; 11183 bool Reserved; 11184 bool VCSDone; 11185 bool GACDone; 11186}; 11187 11188static inline void 11189GEN11_VCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 11190 __attribute__((unused)) void * restrict dst, 11191 __attribute__((unused)) const struct GEN11_VCS_INSTDONE * restrict values) 11192{ 11193 uint32_t * restrict dw = (uint32_t * restrict) dst; 11194 11195 dw[0] = 11196 __gen_uint(values->RingEnable, 0, 0) | 11197 __gen_uint(values->USBDone, 1, 1) | 11198 __gen_uint(values->QRCDone, 2, 2) | 11199 __gen_uint(values->SECDone, 3, 3) | 11200 __gen_uint(values->MPCDone, 4, 4) | 11201 __gen_uint(values->VFTDone, 5, 5) | 11202 __gen_uint(values->BSPDone, 6, 6) | 11203 __gen_uint(values->VLFDone, 7, 7) | 11204 __gen_uint(values->VOPDone, 8, 8) | 11205 __gen_uint(values->VMCDone, 9, 9) | 11206 __gen_uint(values->VIPDone, 10, 10) | 11207 __gen_uint(values->VITDone, 11, 11) | 11208 __gen_uint(values->VDSDone, 12, 12) | 11209 __gen_uint(values->VMXDone, 13, 13) | 11210 __gen_uint(values->VCPDone, 14, 14) | 11211 __gen_uint(values->VCDDone, 15, 15) | 11212 __gen_uint(values->VADDone, 16, 16) | 11213 __gen_uint(values->VMDDone, 17, 17) | 11214 __gen_uint(values->VISDone, 18, 18) | 11215 __gen_uint(values->VACDone, 19, 19) | 11216 __gen_uint(values->VAMDone, 20, 20) | 11217 __gen_uint(values->JPGDone, 21, 21) | 11218 __gen_uint(values->VBPDone, 22, 22) | 11219 __gen_uint(values->VHRDone, 23, 23) | 11220 __gen_uint(values->VCIDone, 24, 24) | 11221 __gen_uint(values->VINDone, 26, 26) | 11222 __gen_uint(values->VPRDone, 27, 27) | 11223 __gen_uint(values->VTQDone, 28, 28) | 11224 __gen_uint(values->Reserved, 29, 29) | 11225 __gen_uint(values->VCSDone, 30, 30) | 11226 __gen_uint(values->GACDone, 31, 31); 11227} 11228 11229#define GEN11_VS_INVOCATION_COUNT_num 0x2320 11230#define GEN11_VS_INVOCATION_COUNT_length 2 11231struct GEN11_VS_INVOCATION_COUNT { 11232 uint64_t VSInvocationCountReport; 11233}; 11234 11235static inline void 11236GEN11_VS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 11237 __attribute__((unused)) void * restrict dst, 11238 __attribute__((unused)) const struct GEN11_VS_INVOCATION_COUNT * restrict values) 11239{ 11240 uint32_t * restrict dw = (uint32_t * restrict) dst; 11241 11242 const uint64_t v0 = 11243 __gen_uint(values->VSInvocationCountReport, 0, 63); 11244 dw[0] = v0; 11245 dw[1] = v0 >> 32; 11246} 11247 11248#endif /* GEN11_PACK_H */ 11249