1b8e80941Smrg/* 2b8e80941Smrg * Copyright (C) 2016 Intel Corporation 3b8e80941Smrg * 4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5b8e80941Smrg * copy of this software and associated documentation files (the "Software"), 6b8e80941Smrg * to deal in the Software without restriction, including without limitation 7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the 9b8e80941Smrg * Software is furnished to do so, subject to the following conditions: 10b8e80941Smrg * 11b8e80941Smrg * The above copyright notice and this permission notice (including the next 12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the 13b8e80941Smrg * Software. 14b8e80941Smrg * 15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21b8e80941Smrg * IN THE SOFTWARE. 22b8e80941Smrg */ 23b8e80941Smrg 24b8e80941Smrg 25b8e80941Smrg/* Instructions, enums and structures for ILK. 26b8e80941Smrg * 27b8e80941Smrg * This file has been generated, do not hand edit. 28b8e80941Smrg */ 29b8e80941Smrg 30b8e80941Smrg#ifndef GEN5_PACK_H 31b8e80941Smrg#define GEN5_PACK_H 32b8e80941Smrg 33b8e80941Smrg#include <stdio.h> 34b8e80941Smrg#include <stdint.h> 35b8e80941Smrg#include <stdbool.h> 36b8e80941Smrg#include <assert.h> 37b8e80941Smrg#include <math.h> 38b8e80941Smrg 39b8e80941Smrg#ifndef __gen_validate_value 40b8e80941Smrg#define __gen_validate_value(x) 41b8e80941Smrg#endif 42b8e80941Smrg 43b8e80941Smrg#ifndef __gen_field_functions 44b8e80941Smrg#define __gen_field_functions 45b8e80941Smrg 46b8e80941Smrg#ifdef NDEBUG 47b8e80941Smrg#define NDEBUG_UNUSED __attribute__((unused)) 48b8e80941Smrg#else 49b8e80941Smrg#define NDEBUG_UNUSED 50b8e80941Smrg#endif 51b8e80941Smrg 52b8e80941Smrgunion __gen_value { 53b8e80941Smrg float f; 54b8e80941Smrg uint32_t dw; 55b8e80941Smrg}; 56b8e80941Smrg 57b8e80941Smrgstatic inline uint64_t 58b8e80941Smrg__gen_mbo(uint32_t start, uint32_t end) 59b8e80941Smrg{ 60b8e80941Smrg return (~0ull >> (64 - (end - start + 1))) << start; 61b8e80941Smrg} 62b8e80941Smrg 63b8e80941Smrgstatic inline uint64_t 64b8e80941Smrg__gen_uint(uint64_t v, uint32_t start, NDEBUG_UNUSED uint32_t end) 65b8e80941Smrg{ 66b8e80941Smrg __gen_validate_value(v); 67b8e80941Smrg 68b8e80941Smrg#ifndef NDEBUG 69b8e80941Smrg const int width = end - start + 1; 70b8e80941Smrg if (width < 64) { 71b8e80941Smrg const uint64_t max = (1ull << width) - 1; 72b8e80941Smrg assert(v <= max); 73b8e80941Smrg } 74b8e80941Smrg#endif 75b8e80941Smrg 76b8e80941Smrg return v << start; 77b8e80941Smrg} 78b8e80941Smrg 79b8e80941Smrgstatic inline uint64_t 80b8e80941Smrg__gen_sint(int64_t v, uint32_t start, uint32_t end) 81b8e80941Smrg{ 82b8e80941Smrg const int width = end - start + 1; 83b8e80941Smrg 84b8e80941Smrg __gen_validate_value(v); 85b8e80941Smrg 86b8e80941Smrg#ifndef NDEBUG 87b8e80941Smrg if (width < 64) { 88b8e80941Smrg const int64_t max = (1ll << (width - 1)) - 1; 89b8e80941Smrg const int64_t min = -(1ll << (width - 1)); 90b8e80941Smrg assert(min <= v && v <= max); 91b8e80941Smrg } 92b8e80941Smrg#endif 93b8e80941Smrg 94b8e80941Smrg const uint64_t mask = ~0ull >> (64 - width); 95b8e80941Smrg 96b8e80941Smrg return (v & mask) << start; 97b8e80941Smrg} 98b8e80941Smrg 99b8e80941Smrgstatic inline uint64_t 100b8e80941Smrg__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) 101b8e80941Smrg{ 102b8e80941Smrg __gen_validate_value(v); 103b8e80941Smrg#ifndef NDEBUG 104b8e80941Smrg uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; 105b8e80941Smrg 106b8e80941Smrg assert((v & ~mask) == 0); 107b8e80941Smrg#endif 108b8e80941Smrg 109b8e80941Smrg return v; 110b8e80941Smrg} 111b8e80941Smrg 112b8e80941Smrgstatic inline uint32_t 113b8e80941Smrg__gen_float(float v) 114b8e80941Smrg{ 115b8e80941Smrg __gen_validate_value(v); 116b8e80941Smrg return ((union __gen_value) { .f = (v) }).dw; 117b8e80941Smrg} 118b8e80941Smrg 119b8e80941Smrgstatic inline uint64_t 120b8e80941Smrg__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) 121b8e80941Smrg{ 122b8e80941Smrg __gen_validate_value(v); 123b8e80941Smrg 124b8e80941Smrg const float factor = (1 << fract_bits); 125b8e80941Smrg 126b8e80941Smrg#ifndef NDEBUG 127b8e80941Smrg const float max = ((1 << (end - start)) - 1) / factor; 128b8e80941Smrg const float min = -(1 << (end - start)) / factor; 129b8e80941Smrg assert(min <= v && v <= max); 130b8e80941Smrg#endif 131b8e80941Smrg 132b8e80941Smrg const int64_t int_val = llroundf(v * factor); 133b8e80941Smrg const uint64_t mask = ~0ull >> (64 - (end - start + 1)); 134b8e80941Smrg 135b8e80941Smrg return (int_val & mask) << start; 136b8e80941Smrg} 137b8e80941Smrg 138b8e80941Smrgstatic inline uint64_t 139b8e80941Smrg__gen_ufixed(float v, uint32_t start, NDEBUG_UNUSED uint32_t end, uint32_t fract_bits) 140b8e80941Smrg{ 141b8e80941Smrg __gen_validate_value(v); 142b8e80941Smrg 143b8e80941Smrg const float factor = (1 << fract_bits); 144b8e80941Smrg 145b8e80941Smrg#ifndef NDEBUG 146b8e80941Smrg const float max = ((1 << (end - start + 1)) - 1) / factor; 147b8e80941Smrg const float min = 0.0f; 148b8e80941Smrg assert(min <= v && v <= max); 149b8e80941Smrg#endif 150b8e80941Smrg 151b8e80941Smrg const uint64_t uint_val = llroundf(v * factor); 152b8e80941Smrg 153b8e80941Smrg return uint_val << start; 154b8e80941Smrg} 155b8e80941Smrg 156b8e80941Smrg#ifndef __gen_address_type 157b8e80941Smrg#error #define __gen_address_type before including this file 158b8e80941Smrg#endif 159b8e80941Smrg 160b8e80941Smrg#ifndef __gen_user_data 161b8e80941Smrg#error #define __gen_combine_address before including this file 162b8e80941Smrg#endif 163b8e80941Smrg 164b8e80941Smrg#undef NDEBUG_UNUSED 165b8e80941Smrg 166b8e80941Smrg#endif 167b8e80941Smrg 168b8e80941Smrg 169b8e80941Smrgenum GEN5_3D_Color_Buffer_Blend_Factor { 170b8e80941Smrg BLENDFACTOR_ONE = 1, 171b8e80941Smrg BLENDFACTOR_SRC_COLOR = 2, 172b8e80941Smrg BLENDFACTOR_SRC_ALPHA = 3, 173b8e80941Smrg BLENDFACTOR_DST_ALPHA = 4, 174b8e80941Smrg BLENDFACTOR_DST_COLOR = 5, 175b8e80941Smrg BLENDFACTOR_SRC_ALPHA_SATURATE = 6, 176b8e80941Smrg BLENDFACTOR_CONST_COLOR = 7, 177b8e80941Smrg BLENDFACTOR_CONST_ALPHA = 8, 178b8e80941Smrg BLENDFACTOR_SRC1_COLOR = 9, 179b8e80941Smrg BLENDFACTOR_SRC1_ALPHA = 10, 180b8e80941Smrg BLENDFACTOR_ZERO = 17, 181b8e80941Smrg BLENDFACTOR_INV_SRC_COLOR = 18, 182b8e80941Smrg BLENDFACTOR_INV_SRC_ALPHA = 19, 183b8e80941Smrg BLENDFACTOR_INV_DST_ALPHA = 20, 184b8e80941Smrg BLENDFACTOR_INV_DST_COLOR = 21, 185b8e80941Smrg BLENDFACTOR_INV_CONST_COLOR = 23, 186b8e80941Smrg BLENDFACTOR_INV_CONST_ALPHA = 24, 187b8e80941Smrg BLENDFACTOR_INV_SRC1_COLOR = 25, 188b8e80941Smrg BLENDFACTOR_INV_SRC1_ALPHA = 26, 189b8e80941Smrg}; 190b8e80941Smrg 191b8e80941Smrgenum GEN5_3D_Color_Buffer_Blend_Function { 192b8e80941Smrg BLENDFUNCTION_ADD = 0, 193b8e80941Smrg BLENDFUNCTION_SUBTRACT = 1, 194b8e80941Smrg BLENDFUNCTION_REVERSE_SUBTRACT = 2, 195b8e80941Smrg BLENDFUNCTION_MIN = 3, 196b8e80941Smrg BLENDFUNCTION_MAX = 4, 197b8e80941Smrg}; 198b8e80941Smrg 199b8e80941Smrgenum GEN5_3D_Compare_Function { 200b8e80941Smrg COMPAREFUNCTION_ALWAYS = 0, 201b8e80941Smrg COMPAREFUNCTION_NEVER = 1, 202b8e80941Smrg COMPAREFUNCTION_LESS = 2, 203b8e80941Smrg COMPAREFUNCTION_EQUAL = 3, 204b8e80941Smrg COMPAREFUNCTION_LEQUAL = 4, 205b8e80941Smrg COMPAREFUNCTION_GREATER = 5, 206b8e80941Smrg COMPAREFUNCTION_NOTEQUAL = 6, 207b8e80941Smrg COMPAREFUNCTION_GEQUAL = 7, 208b8e80941Smrg}; 209b8e80941Smrg 210b8e80941Smrgenum GEN5_3D_Logic_Op_Function { 211b8e80941Smrg LOGICOP_CLEAR = 0, 212b8e80941Smrg LOGICOP_NOR = 1, 213b8e80941Smrg LOGICOP_AND_INVERTED = 2, 214b8e80941Smrg LOGICOP_COPY_INVERTED = 3, 215b8e80941Smrg LOGICOP_AND_REVERSE = 4, 216b8e80941Smrg LOGICOP_INVERT = 5, 217b8e80941Smrg LOGICOP_XOR = 6, 218b8e80941Smrg LOGICOP_NAND = 7, 219b8e80941Smrg LOGICOP_AND = 8, 220b8e80941Smrg LOGICOP_EQUIV = 9, 221b8e80941Smrg LOGICOP_NOOP = 10, 222b8e80941Smrg LOGICOP_OR_INVERTED = 11, 223b8e80941Smrg LOGICOP_COPY = 12, 224b8e80941Smrg LOGICOP_OR_REVERSE = 13, 225b8e80941Smrg LOGICOP_OR = 14, 226b8e80941Smrg LOGICOP_SET = 15, 227b8e80941Smrg}; 228b8e80941Smrg 229b8e80941Smrgenum GEN5_3D_Prim_Topo_Type { 230b8e80941Smrg _3DPRIM_POINTLIST = 1, 231b8e80941Smrg _3DPRIM_LINELIST = 2, 232b8e80941Smrg _3DPRIM_LINESTRIP = 3, 233b8e80941Smrg _3DPRIM_TRILIST = 4, 234b8e80941Smrg _3DPRIM_TRISTRIP = 5, 235b8e80941Smrg _3DPRIM_TRIFAN = 6, 236b8e80941Smrg _3DPRIM_QUADLIST = 7, 237b8e80941Smrg _3DPRIM_QUADSTRIP = 8, 238b8e80941Smrg _3DPRIM_LINELIST_ADJ = 9, 239b8e80941Smrg _3DPRIM_LINESTRIP_ADJ = 10, 240b8e80941Smrg _3DPRIM_TRILIST_ADJ = 11, 241b8e80941Smrg _3DPRIM_TRISTRIP_ADJ = 12, 242b8e80941Smrg _3DPRIM_TRISTRIP_REVERSE = 13, 243b8e80941Smrg _3DPRIM_POLYGON = 14, 244b8e80941Smrg _3DPRIM_RECTLIST = 15, 245b8e80941Smrg _3DPRIM_LINELOOP = 16, 246b8e80941Smrg _3DPRIM_POINTLIST_BF = 17, 247b8e80941Smrg _3DPRIM_LINESTRIP_CONT = 18, 248b8e80941Smrg _3DPRIM_LINESTRIP_BF = 19, 249b8e80941Smrg _3DPRIM_LINESTRIP_CONT_BF = 20, 250b8e80941Smrg _3DPRIM_TRIFAN_NOSTIPPLE = 22, 251b8e80941Smrg}; 252b8e80941Smrg 253b8e80941Smrgenum GEN5_3D_Stencil_Operation { 254b8e80941Smrg STENCILOP_KEEP = 0, 255b8e80941Smrg STENCILOP_ZERO = 1, 256b8e80941Smrg STENCILOP_REPLACE = 2, 257b8e80941Smrg STENCILOP_INCRSAT = 3, 258b8e80941Smrg STENCILOP_DECRSAT = 4, 259b8e80941Smrg STENCILOP_INCR = 5, 260b8e80941Smrg STENCILOP_DECR = 6, 261b8e80941Smrg STENCILOP_INVERT = 7, 262b8e80941Smrg}; 263b8e80941Smrg 264b8e80941Smrgenum GEN5_3D_Vertex_Component_Control { 265b8e80941Smrg VFCOMP_NOSTORE = 0, 266b8e80941Smrg VFCOMP_STORE_SRC = 1, 267b8e80941Smrg VFCOMP_STORE_0 = 2, 268b8e80941Smrg VFCOMP_STORE_1_FP = 3, 269b8e80941Smrg VFCOMP_STORE_1_INT = 4, 270b8e80941Smrg VFCOMP_STORE_VID = 5, 271b8e80941Smrg VFCOMP_STORE_IID = 6, 272b8e80941Smrg VFCOMP_STORE_PID = 7, 273b8e80941Smrg}; 274b8e80941Smrg 275b8e80941Smrgenum GEN5_Texture_Coordinate_Mode { 276b8e80941Smrg TCM_WRAP = 0, 277b8e80941Smrg TCM_MIRROR = 1, 278b8e80941Smrg TCM_CLAMP = 2, 279b8e80941Smrg TCM_CUBE = 3, 280b8e80941Smrg TCM_CLAMP_BORDER = 4, 281b8e80941Smrg TCM_MIRROR_ONCE = 5, 282b8e80941Smrg}; 283b8e80941Smrg 284b8e80941Smrg#define GEN5_CC_VIEWPORT_length 2 285b8e80941Smrgstruct GEN5_CC_VIEWPORT { 286b8e80941Smrg float MinimumDepth; 287b8e80941Smrg float MaximumDepth; 288b8e80941Smrg}; 289b8e80941Smrg 290b8e80941Smrgstatic inline void 291b8e80941SmrgGEN5_CC_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 292b8e80941Smrg __attribute__((unused)) void * restrict dst, 293b8e80941Smrg __attribute__((unused)) const struct GEN5_CC_VIEWPORT * restrict values) 294b8e80941Smrg{ 295b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 296b8e80941Smrg 297b8e80941Smrg dw[0] = 298b8e80941Smrg __gen_float(values->MinimumDepth); 299b8e80941Smrg 300b8e80941Smrg dw[1] = 301b8e80941Smrg __gen_float(values->MaximumDepth); 302b8e80941Smrg} 303b8e80941Smrg 304b8e80941Smrg#define GEN5_CLIP_STATE_length 11 305b8e80941Smrgstruct GEN5_CLIP_STATE { 306b8e80941Smrg uint32_t GRFRegisterCount; 307b8e80941Smrg uint64_t KernelStartPointer; 308b8e80941Smrg bool SoftwareExceptionEnable; 309b8e80941Smrg bool MaskStackExceptionEnable; 310b8e80941Smrg bool IllegalOpcodeExceptionEnable; 311b8e80941Smrg uint32_t FloatingPointMode; 312b8e80941Smrg#define FLOATING_POINT_MODE_IEEE754 0 313b8e80941Smrg#define FLOATING_POINT_MODE_Alternate 1 314b8e80941Smrg uint32_t ThreadPriority; 315b8e80941Smrg#define NormalPriority 0 316b8e80941Smrg#define HighPriority 1 317b8e80941Smrg uint32_t BindingTableEntryCount; 318b8e80941Smrg bool SingleProgramFlow; 319b8e80941Smrg uint32_t PerThreadScratchSpace; 320b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 321b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 322b8e80941Smrg uint32_t VertexURBEntryReadOffset; 323b8e80941Smrg uint32_t VertexURBEntryReadLength; 324b8e80941Smrg uint32_t ConstantURBEntryReadOffset; 325b8e80941Smrg uint32_t ConstantURBEntryReadLength; 326b8e80941Smrg uint32_t NumberofURBEntries; 327b8e80941Smrg uint32_t URBEntryAllocationSize; 328b8e80941Smrg uint32_t MaximumNumberofThreads; 329b8e80941Smrg uint32_t ClipMode; 330b8e80941Smrg#define CLIPMODE_NORMAL 0 331b8e80941Smrg#define CLIPMODE_ALL 1 332b8e80941Smrg#define CLIPMODE_CLIP_NON_REJECTED 2 333b8e80941Smrg#define CLIPMODE_REJECT_ALL 3 334b8e80941Smrg#define CLIPMODE_ACCEPT_ALL 4 335b8e80941Smrg uint32_t UserClipDistanceClipTestEnableBitmask; 336b8e80941Smrg bool UserClipFlagsMustClipEnable; 337b8e80941Smrg bool NegativeWClipTestEnable; 338b8e80941Smrg bool GuardbandClipTestEnable; 339b8e80941Smrg bool ViewportZClipTestEnable; 340b8e80941Smrg bool ViewportXYClipTestEnable; 341b8e80941Smrg uint32_t VertexPositionSpace; 342b8e80941Smrg#define VPOS_NDCSPACE 0 343b8e80941Smrg#define VPOS_SCREENSPACE 1 344b8e80941Smrg uint32_t APIMode; 345b8e80941Smrg#define APIMODE_OGL 0 346b8e80941Smrg#define APIMODE_D3D 1 347b8e80941Smrg __gen_address_type ClipperViewportStatePointer; 348b8e80941Smrg float ScreenSpaceViewportXMin; 349b8e80941Smrg float ScreenSpaceViewportXMax; 350b8e80941Smrg float ScreenSpaceViewportYMin; 351b8e80941Smrg float ScreenSpaceViewportYMax; 352b8e80941Smrg}; 353b8e80941Smrg 354b8e80941Smrgstatic inline void 355b8e80941SmrgGEN5_CLIP_STATE_pack(__attribute__((unused)) __gen_user_data *data, 356b8e80941Smrg __attribute__((unused)) void * restrict dst, 357b8e80941Smrg __attribute__((unused)) const struct GEN5_CLIP_STATE * restrict values) 358b8e80941Smrg{ 359b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 360b8e80941Smrg 361b8e80941Smrg dw[0] = 362b8e80941Smrg __gen_uint(values->GRFRegisterCount, 1, 3) | 363b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 31); 364b8e80941Smrg 365b8e80941Smrg dw[1] = 366b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 367b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 368b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 369b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 370b8e80941Smrg __gen_uint(values->ThreadPriority, 17, 17) | 371b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 372b8e80941Smrg __gen_uint(values->SingleProgramFlow, 31, 31); 373b8e80941Smrg 374b8e80941Smrg const uint32_t v2 = 375b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 376b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->ScratchSpaceBasePointer, v2); 377b8e80941Smrg 378b8e80941Smrg dw[3] = 379b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 380b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 381b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 382b8e80941Smrg __gen_uint(values->ConstantURBEntryReadOffset, 18, 23) | 383b8e80941Smrg __gen_uint(values->ConstantURBEntryReadLength, 25, 30); 384b8e80941Smrg 385b8e80941Smrg dw[4] = 386b8e80941Smrg __gen_uint(values->NumberofURBEntries, 11, 18) | 387b8e80941Smrg __gen_uint(values->URBEntryAllocationSize, 19, 23) | 388b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 25, 30); 389b8e80941Smrg 390b8e80941Smrg dw[5] = 391b8e80941Smrg __gen_uint(values->ClipMode, 13, 15) | 392b8e80941Smrg __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 16, 23) | 393b8e80941Smrg __gen_uint(values->UserClipFlagsMustClipEnable, 24, 24) | 394b8e80941Smrg __gen_uint(values->NegativeWClipTestEnable, 25, 25) | 395b8e80941Smrg __gen_uint(values->GuardbandClipTestEnable, 26, 26) | 396b8e80941Smrg __gen_uint(values->ViewportZClipTestEnable, 27, 27) | 397b8e80941Smrg __gen_uint(values->ViewportXYClipTestEnable, 28, 28) | 398b8e80941Smrg __gen_uint(values->VertexPositionSpace, 29, 29) | 399b8e80941Smrg __gen_uint(values->APIMode, 30, 30); 400b8e80941Smrg 401b8e80941Smrg dw[6] = __gen_combine_address(data, &dw[6], values->ClipperViewportStatePointer, 0); 402b8e80941Smrg 403b8e80941Smrg dw[7] = 404b8e80941Smrg __gen_float(values->ScreenSpaceViewportXMin); 405b8e80941Smrg 406b8e80941Smrg dw[8] = 407b8e80941Smrg __gen_float(values->ScreenSpaceViewportXMax); 408b8e80941Smrg 409b8e80941Smrg dw[9] = 410b8e80941Smrg __gen_float(values->ScreenSpaceViewportYMin); 411b8e80941Smrg 412b8e80941Smrg dw[10] = 413b8e80941Smrg __gen_float(values->ScreenSpaceViewportYMax); 414b8e80941Smrg} 415b8e80941Smrg 416b8e80941Smrg#define GEN5_CLIP_VIEWPORT_length 4 417b8e80941Smrgstruct GEN5_CLIP_VIEWPORT { 418b8e80941Smrg float XMinClipGuardband; 419b8e80941Smrg float XMaxClipGuardband; 420b8e80941Smrg float YMinClipGuardband; 421b8e80941Smrg float YMaxClipGuardband; 422b8e80941Smrg}; 423b8e80941Smrg 424b8e80941Smrgstatic inline void 425b8e80941SmrgGEN5_CLIP_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 426b8e80941Smrg __attribute__((unused)) void * restrict dst, 427b8e80941Smrg __attribute__((unused)) const struct GEN5_CLIP_VIEWPORT * restrict values) 428b8e80941Smrg{ 429b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 430b8e80941Smrg 431b8e80941Smrg dw[0] = 432b8e80941Smrg __gen_float(values->XMinClipGuardband); 433b8e80941Smrg 434b8e80941Smrg dw[1] = 435b8e80941Smrg __gen_float(values->XMaxClipGuardband); 436b8e80941Smrg 437b8e80941Smrg dw[2] = 438b8e80941Smrg __gen_float(values->YMinClipGuardband); 439b8e80941Smrg 440b8e80941Smrg dw[3] = 441b8e80941Smrg __gen_float(values->YMaxClipGuardband); 442b8e80941Smrg} 443b8e80941Smrg 444b8e80941Smrg#define GEN5_COLOR_CALC_STATE_length 8 445b8e80941Smrgstruct GEN5_COLOR_CALC_STATE { 446b8e80941Smrg enum GEN5_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; 447b8e80941Smrg enum GEN5_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; 448b8e80941Smrg enum GEN5_3D_Stencil_Operation BackfaceStencilFailOp; 449b8e80941Smrg enum GEN5_3D_Compare_Function BackfaceStencilTestFunction; 450b8e80941Smrg bool DoubleSidedStencilEnable; 451b8e80941Smrg bool StencilBufferWriteEnable; 452b8e80941Smrg enum GEN5_3D_Stencil_Operation StencilPassDepthPassOp; 453b8e80941Smrg enum GEN5_3D_Stencil_Operation StencilPassDepthFailOp; 454b8e80941Smrg enum GEN5_3D_Stencil_Operation StencilFailOp; 455b8e80941Smrg enum GEN5_3D_Compare_Function StencilTestFunction; 456b8e80941Smrg bool StencilTestEnable; 457b8e80941Smrg uint32_t BackfaceStencilReferenceValue; 458b8e80941Smrg uint32_t StencilWriteMask; 459b8e80941Smrg uint32_t StencilTestMask; 460b8e80941Smrg uint32_t StencilReferenceValue; 461b8e80941Smrg bool LogicOpEnable; 462b8e80941Smrg bool DepthBufferWriteEnable; 463b8e80941Smrg enum GEN5_3D_Compare_Function DepthTestFunction; 464b8e80941Smrg bool DepthTestEnable; 465b8e80941Smrg uint32_t BackfaceStencilWriteMask; 466b8e80941Smrg uint32_t BackfaceStencilTestMask; 467b8e80941Smrg enum GEN5_3D_Compare_Function AlphaTestFunction; 468b8e80941Smrg bool AlphaTestEnable; 469b8e80941Smrg bool ColorBufferBlendEnable; 470b8e80941Smrg bool IndependentAlphaBlendEnable; 471b8e80941Smrg uint32_t AlphaTestFormat; 472b8e80941Smrg#define ALPHATEST_UNORM8 0 473b8e80941Smrg#define ALPHATEST_FLOAT32 1 474b8e80941Smrg __gen_address_type CCViewportStatePointer; 475b8e80941Smrg enum GEN5_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 476b8e80941Smrg enum GEN5_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 477b8e80941Smrg enum GEN5_3D_Color_Buffer_Blend_Function AlphaBlendFunction; 478b8e80941Smrg bool StatisticsEnable; 479b8e80941Smrg enum GEN5_3D_Logic_Op_Function LogicOpFunction; 480b8e80941Smrg bool RoundDisableFunctionDisable; 481b8e80941Smrg bool ColorDitherEnable; 482b8e80941Smrg bool PostBlendColorClampEnable; 483b8e80941Smrg bool PreBlendColorClampEnable; 484b8e80941Smrg uint32_t ColorClampRange; 485b8e80941Smrg#define COLORCLAMP_UNORM 0 486b8e80941Smrg#define COLORCLAMP_SNORM 1 487b8e80941Smrg#define COLORCLAMP_RTFORMAT 2 488b8e80941Smrg uint32_t YDitherOffset; 489b8e80941Smrg uint32_t XDitherOffset; 490b8e80941Smrg enum GEN5_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 491b8e80941Smrg enum GEN5_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 492b8e80941Smrg enum GEN5_3D_Color_Buffer_Blend_Function ColorBlendFunction; 493b8e80941Smrg uint32_t AlphaReferenceValueAsUNORM8; 494b8e80941Smrg float AlphaReferenceValueAsFLOAT32; 495b8e80941Smrg}; 496b8e80941Smrg 497b8e80941Smrgstatic inline void 498b8e80941SmrgGEN5_COLOR_CALC_STATE_pack(__attribute__((unused)) __gen_user_data *data, 499b8e80941Smrg __attribute__((unused)) void * restrict dst, 500b8e80941Smrg __attribute__((unused)) const struct GEN5_COLOR_CALC_STATE * restrict values) 501b8e80941Smrg{ 502b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 503b8e80941Smrg 504b8e80941Smrg dw[0] = 505b8e80941Smrg __gen_uint(values->BackfaceStencilPassDepthPassOp, 3, 5) | 506b8e80941Smrg __gen_uint(values->BackfaceStencilPassDepthFailOp, 6, 8) | 507b8e80941Smrg __gen_uint(values->BackfaceStencilFailOp, 9, 11) | 508b8e80941Smrg __gen_uint(values->BackfaceStencilTestFunction, 12, 14) | 509b8e80941Smrg __gen_uint(values->DoubleSidedStencilEnable, 15, 15) | 510b8e80941Smrg __gen_uint(values->StencilBufferWriteEnable, 18, 18) | 511b8e80941Smrg __gen_uint(values->StencilPassDepthPassOp, 19, 21) | 512b8e80941Smrg __gen_uint(values->StencilPassDepthFailOp, 22, 24) | 513b8e80941Smrg __gen_uint(values->StencilFailOp, 25, 27) | 514b8e80941Smrg __gen_uint(values->StencilTestFunction, 28, 30) | 515b8e80941Smrg __gen_uint(values->StencilTestEnable, 31, 31); 516b8e80941Smrg 517b8e80941Smrg dw[1] = 518b8e80941Smrg __gen_uint(values->BackfaceStencilReferenceValue, 0, 7) | 519b8e80941Smrg __gen_uint(values->StencilWriteMask, 8, 15) | 520b8e80941Smrg __gen_uint(values->StencilTestMask, 16, 23) | 521b8e80941Smrg __gen_uint(values->StencilReferenceValue, 24, 31); 522b8e80941Smrg 523b8e80941Smrg dw[2] = 524b8e80941Smrg __gen_uint(values->LogicOpEnable, 0, 0) | 525b8e80941Smrg __gen_uint(values->DepthBufferWriteEnable, 11, 11) | 526b8e80941Smrg __gen_uint(values->DepthTestFunction, 12, 14) | 527b8e80941Smrg __gen_uint(values->DepthTestEnable, 15, 15) | 528b8e80941Smrg __gen_uint(values->BackfaceStencilWriteMask, 16, 23) | 529b8e80941Smrg __gen_uint(values->BackfaceStencilTestMask, 24, 31); 530b8e80941Smrg 531b8e80941Smrg dw[3] = 532b8e80941Smrg __gen_uint(values->AlphaTestFunction, 8, 10) | 533b8e80941Smrg __gen_uint(values->AlphaTestEnable, 11, 11) | 534b8e80941Smrg __gen_uint(values->ColorBufferBlendEnable, 12, 12) | 535b8e80941Smrg __gen_uint(values->IndependentAlphaBlendEnable, 13, 13) | 536b8e80941Smrg __gen_uint(values->AlphaTestFormat, 15, 15); 537b8e80941Smrg 538b8e80941Smrg dw[4] = __gen_combine_address(data, &dw[4], values->CCViewportStatePointer, 0); 539b8e80941Smrg 540b8e80941Smrg dw[5] = 541b8e80941Smrg __gen_uint(values->DestinationAlphaBlendFactor, 2, 6) | 542b8e80941Smrg __gen_uint(values->SourceAlphaBlendFactor, 7, 11) | 543b8e80941Smrg __gen_uint(values->AlphaBlendFunction, 12, 14) | 544b8e80941Smrg __gen_uint(values->StatisticsEnable, 15, 15) | 545b8e80941Smrg __gen_uint(values->LogicOpFunction, 16, 19) | 546b8e80941Smrg __gen_uint(values->RoundDisableFunctionDisable, 30, 30) | 547b8e80941Smrg __gen_uint(values->ColorDitherEnable, 31, 31); 548b8e80941Smrg 549b8e80941Smrg dw[6] = 550b8e80941Smrg __gen_uint(values->PostBlendColorClampEnable, 0, 0) | 551b8e80941Smrg __gen_uint(values->PreBlendColorClampEnable, 1, 1) | 552b8e80941Smrg __gen_uint(values->ColorClampRange, 2, 3) | 553b8e80941Smrg __gen_uint(values->YDitherOffset, 15, 16) | 554b8e80941Smrg __gen_uint(values->XDitherOffset, 17, 18) | 555b8e80941Smrg __gen_uint(values->DestinationBlendFactor, 19, 23) | 556b8e80941Smrg __gen_uint(values->SourceBlendFactor, 24, 28) | 557b8e80941Smrg __gen_uint(values->ColorBlendFunction, 29, 31); 558b8e80941Smrg 559b8e80941Smrg dw[7] = 560b8e80941Smrg __gen_uint(values->AlphaReferenceValueAsUNORM8, 0, 31) | 561b8e80941Smrg __gen_float(values->AlphaReferenceValueAsFLOAT32); 562b8e80941Smrg} 563b8e80941Smrg 564b8e80941Smrg#define GEN5_GS_STATE_length 7 565b8e80941Smrgstruct GEN5_GS_STATE { 566b8e80941Smrg uint32_t GRFRegisterCount; 567b8e80941Smrg uint64_t KernelStartPointer; 568b8e80941Smrg bool SoftwareExceptionEnable; 569b8e80941Smrg bool MaskStackExceptionEnable; 570b8e80941Smrg bool IllegalOpcodeExceptionEnable; 571b8e80941Smrg uint32_t FloatingPointMode; 572b8e80941Smrg#define FLOATING_POINT_MODE_IEEE754 0 573b8e80941Smrg#define FLOATING_POINT_MODE_Alternate 1 574b8e80941Smrg uint32_t BindingTableEntryCount; 575b8e80941Smrg bool SingleProgramFlow; 576b8e80941Smrg uint32_t PerThreadScratchSpace; 577b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 578b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 579b8e80941Smrg uint32_t VertexURBEntryReadOffset; 580b8e80941Smrg uint32_t VertexURBEntryReadLength; 581b8e80941Smrg uint32_t ConstantURBEntryReadOffset; 582b8e80941Smrg uint32_t ConstantURBEntryReadLength; 583b8e80941Smrg bool RenderingEnabled; 584b8e80941Smrg bool SOStatisticsEnable; 585b8e80941Smrg bool GSStatisticsEnable; 586b8e80941Smrg uint32_t NumberofURBEntries; 587b8e80941Smrg uint32_t URBEntryAllocationSize; 588b8e80941Smrg uint32_t MaximumNumberofThreads; 589b8e80941Smrg uint32_t SamplerCount; 590b8e80941Smrg __gen_address_type SamplerStatePointer; 591b8e80941Smrg uint32_t MaximumVPIndex; 592b8e80941Smrg bool ReorderEnable; 593b8e80941Smrg}; 594b8e80941Smrg 595b8e80941Smrgstatic inline void 596b8e80941SmrgGEN5_GS_STATE_pack(__attribute__((unused)) __gen_user_data *data, 597b8e80941Smrg __attribute__((unused)) void * restrict dst, 598b8e80941Smrg __attribute__((unused)) const struct GEN5_GS_STATE * restrict values) 599b8e80941Smrg{ 600b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 601b8e80941Smrg 602b8e80941Smrg dw[0] = 603b8e80941Smrg __gen_uint(values->GRFRegisterCount, 1, 3) | 604b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 31); 605b8e80941Smrg 606b8e80941Smrg dw[1] = 607b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 608b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 609b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 610b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 611b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 612b8e80941Smrg __gen_uint(values->SingleProgramFlow, 31, 31); 613b8e80941Smrg 614b8e80941Smrg const uint32_t v2 = 615b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 616b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->ScratchSpaceBasePointer, v2); 617b8e80941Smrg 618b8e80941Smrg dw[3] = 619b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 620b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 621b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 622b8e80941Smrg __gen_uint(values->ConstantURBEntryReadOffset, 18, 23) | 623b8e80941Smrg __gen_uint(values->ConstantURBEntryReadLength, 25, 30); 624b8e80941Smrg 625b8e80941Smrg dw[4] = 626b8e80941Smrg __gen_uint(values->RenderingEnabled, 8, 8) | 627b8e80941Smrg __gen_uint(values->SOStatisticsEnable, 9, 9) | 628b8e80941Smrg __gen_uint(values->GSStatisticsEnable, 10, 10) | 629b8e80941Smrg __gen_uint(values->NumberofURBEntries, 11, 18) | 630b8e80941Smrg __gen_uint(values->URBEntryAllocationSize, 19, 23) | 631b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 25, 30); 632b8e80941Smrg 633b8e80941Smrg const uint32_t v5 = 634b8e80941Smrg __gen_uint(values->SamplerCount, 0, 2); 635b8e80941Smrg dw[5] = __gen_combine_address(data, &dw[5], values->SamplerStatePointer, v5); 636b8e80941Smrg 637b8e80941Smrg dw[6] = 638b8e80941Smrg __gen_uint(values->MaximumVPIndex, 0, 3) | 639b8e80941Smrg __gen_uint(values->ReorderEnable, 30, 30); 640b8e80941Smrg} 641b8e80941Smrg 642b8e80941Smrg#define GEN5_MEMORY_OBJECT_CONTROL_STATE_length 1 643b8e80941Smrgstruct GEN5_MEMORY_OBJECT_CONTROL_STATE { 644b8e80941Smrg uint32_t CacheabilityControl; 645b8e80941Smrg uint32_t GraphicsDataTypeGFDT; 646b8e80941Smrg bool EncryptedData; 647b8e80941Smrg}; 648b8e80941Smrg 649b8e80941Smrgstatic inline void 650b8e80941SmrgGEN5_MEMORY_OBJECT_CONTROL_STATE_pack(__attribute__((unused)) __gen_user_data *data, 651b8e80941Smrg __attribute__((unused)) void * restrict dst, 652b8e80941Smrg __attribute__((unused)) const struct GEN5_MEMORY_OBJECT_CONTROL_STATE * restrict values) 653b8e80941Smrg{ 654b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 655b8e80941Smrg 656b8e80941Smrg dw[0] = 657b8e80941Smrg __gen_uint(values->CacheabilityControl, 0, 1) | 658b8e80941Smrg __gen_uint(values->GraphicsDataTypeGFDT, 2, 2) | 659b8e80941Smrg __gen_uint(values->EncryptedData, 3, 3); 660b8e80941Smrg} 661b8e80941Smrg 662b8e80941Smrg#define GEN5_RENDER_SURFACE_STATE_length 6 663b8e80941Smrgstruct GEN5_RENDER_SURFACE_STATE { 664b8e80941Smrg bool CubeFaceEnablePositiveZ; 665b8e80941Smrg bool CubeFaceEnableNegativeZ; 666b8e80941Smrg bool CubeFaceEnablePositiveY; 667b8e80941Smrg bool CubeFaceEnableNegativeY; 668b8e80941Smrg bool CubeFaceEnablePositiveX; 669b8e80941Smrg bool CubeFaceEnableNegativeX; 670b8e80941Smrg uint32_t MediaBoundaryPixelMode; 671b8e80941Smrg#define NORMAL_MODE 0 672b8e80941Smrg uint32_t RenderCacheReadWriteMode; 673b8e80941Smrg#define WRITE_ONLY 0 674b8e80941Smrg#define READ_WRITE 1 675b8e80941Smrg uint32_t CubeMapCornerMode; 676b8e80941Smrg#define CUBE_REPLICATE 0 677b8e80941Smrg#define CUBE_AVERAGE 1 678b8e80941Smrg uint32_t MIPMapLayoutMode; 679b8e80941Smrg#define MIPLAYOUT_BELOW 0 680b8e80941Smrg#define MIPLAYOUT_RIGHT 1 681b8e80941Smrg uint32_t VerticalLineStrideOffset; 682b8e80941Smrg uint32_t VerticalLineStride; 683b8e80941Smrg bool ColorBlendEnable; 684b8e80941Smrg uint32_t ColorBufferComponentWriteDisables; 685b8e80941Smrg#define WRITEDISABLE_ALPHA 8 686b8e80941Smrg#define WRITEDISABLE_RED 4 687b8e80941Smrg#define WRITEDISABLE_GREEN 2 688b8e80941Smrg#define WRITEDISABLE_BLUE 1 689b8e80941Smrg uint32_t SurfaceFormat; 690b8e80941Smrg uint32_t DataReturnFormat; 691b8e80941Smrg#define DATA_RETURN_FLOAT32 0 692b8e80941Smrg#define DATA_RETURN_S114 1 693b8e80941Smrg uint32_t SurfaceType; 694b8e80941Smrg#define SURFTYPE_1D 0 695b8e80941Smrg#define SURFTYPE_2D 1 696b8e80941Smrg#define SURFTYPE_3D 2 697b8e80941Smrg#define SURFTYPE_CUBE 3 698b8e80941Smrg#define SURFTYPE_BUFFER 4 699b8e80941Smrg#define SURFTYPE_NULL 7 700b8e80941Smrg __gen_address_type SurfaceBaseAddress; 701b8e80941Smrg uint32_t RenderTargetRotation; 702b8e80941Smrg#define RTROTATE_0DEG 0 703b8e80941Smrg#define RTROTATE_90DEG 1 704b8e80941Smrg#define RTROTATE_270DEG 3 705b8e80941Smrg uint32_t MIPCountLOD; 706b8e80941Smrg uint32_t Width; 707b8e80941Smrg uint32_t Height; 708b8e80941Smrg uint32_t TileWalk; 709b8e80941Smrg#define TILEWALK_XMAJOR 0 710b8e80941Smrg#define TILEWALK_YMAJOR 1 711b8e80941Smrg uint32_t TiledSurface; 712b8e80941Smrg uint32_t SurfacePitch; 713b8e80941Smrg uint32_t Depth; 714b8e80941Smrg uint32_t RenderTargetViewExtent; 715b8e80941Smrg uint32_t MinimumArrayElement; 716b8e80941Smrg uint32_t SurfaceMinLOD; 717b8e80941Smrg uint32_t YOffset; 718b8e80941Smrg uint32_t XOffset; 719b8e80941Smrg}; 720b8e80941Smrg 721b8e80941Smrgstatic inline void 722b8e80941SmrgGEN5_RENDER_SURFACE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 723b8e80941Smrg __attribute__((unused)) void * restrict dst, 724b8e80941Smrg __attribute__((unused)) const struct GEN5_RENDER_SURFACE_STATE * restrict values) 725b8e80941Smrg{ 726b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 727b8e80941Smrg 728b8e80941Smrg dw[0] = 729b8e80941Smrg __gen_uint(values->CubeFaceEnablePositiveZ, 0, 0) | 730b8e80941Smrg __gen_uint(values->CubeFaceEnableNegativeZ, 1, 1) | 731b8e80941Smrg __gen_uint(values->CubeFaceEnablePositiveY, 2, 2) | 732b8e80941Smrg __gen_uint(values->CubeFaceEnableNegativeY, 3, 3) | 733b8e80941Smrg __gen_uint(values->CubeFaceEnablePositiveX, 4, 4) | 734b8e80941Smrg __gen_uint(values->CubeFaceEnableNegativeX, 5, 5) | 735b8e80941Smrg __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | 736b8e80941Smrg __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | 737b8e80941Smrg __gen_uint(values->CubeMapCornerMode, 9, 9) | 738b8e80941Smrg __gen_uint(values->MIPMapLayoutMode, 10, 10) | 739b8e80941Smrg __gen_uint(values->VerticalLineStrideOffset, 11, 11) | 740b8e80941Smrg __gen_uint(values->VerticalLineStride, 12, 12) | 741b8e80941Smrg __gen_uint(values->ColorBlendEnable, 13, 13) | 742b8e80941Smrg __gen_uint(values->ColorBufferComponentWriteDisables, 14, 17) | 743b8e80941Smrg __gen_uint(values->SurfaceFormat, 18, 26) | 744b8e80941Smrg __gen_uint(values->DataReturnFormat, 27, 27) | 745b8e80941Smrg __gen_uint(values->SurfaceType, 29, 31); 746b8e80941Smrg 747b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, 0); 748b8e80941Smrg 749b8e80941Smrg dw[2] = 750b8e80941Smrg __gen_uint(values->RenderTargetRotation, 0, 1) | 751b8e80941Smrg __gen_uint(values->MIPCountLOD, 2, 5) | 752b8e80941Smrg __gen_uint(values->Width, 6, 18) | 753b8e80941Smrg __gen_uint(values->Height, 19, 31); 754b8e80941Smrg 755b8e80941Smrg dw[3] = 756b8e80941Smrg __gen_uint(values->TileWalk, 0, 0) | 757b8e80941Smrg __gen_uint(values->TiledSurface, 1, 1) | 758b8e80941Smrg __gen_uint(values->SurfacePitch, 3, 19) | 759b8e80941Smrg __gen_uint(values->Depth, 21, 31); 760b8e80941Smrg 761b8e80941Smrg dw[4] = 762b8e80941Smrg __gen_uint(values->RenderTargetViewExtent, 8, 16) | 763b8e80941Smrg __gen_uint(values->MinimumArrayElement, 17, 27) | 764b8e80941Smrg __gen_uint(values->SurfaceMinLOD, 28, 31); 765b8e80941Smrg 766b8e80941Smrg dw[5] = 767b8e80941Smrg __gen_uint(values->YOffset, 20, 23) | 768b8e80941Smrg __gen_uint(values->XOffset, 25, 31); 769b8e80941Smrg} 770b8e80941Smrg 771b8e80941Smrg#define GEN5_SAMPLER_BORDER_COLOR_STATE_length 12 772b8e80941Smrgstruct GEN5_SAMPLER_BORDER_COLOR_STATE { 773b8e80941Smrg uint32_t BorderColorUnormRed; 774b8e80941Smrg uint32_t BorderColorUnormGreen; 775b8e80941Smrg uint32_t BorderColorUnormBlue; 776b8e80941Smrg uint32_t BorderColorUnormAlpha; 777b8e80941Smrg float BorderColorFloatRed; 778b8e80941Smrg float BorderColorFloatGreen; 779b8e80941Smrg float BorderColorFloatBlue; 780b8e80941Smrg float BorderColorFloatAlpha; 781b8e80941Smrg uint32_t BorderColorFloat16Red; 782b8e80941Smrg uint32_t BorderColorFloat16Green; 783b8e80941Smrg uint32_t BorderColorFloat16Blue; 784b8e80941Smrg uint32_t BorderColorFloat16Alpha; 785b8e80941Smrg uint32_t BorderColorUnorm16Red; 786b8e80941Smrg uint32_t BorderColorUnorm16Green; 787b8e80941Smrg uint32_t BorderColorUnorm16Blue; 788b8e80941Smrg uint32_t BorderColorUnorm16Alpha; 789b8e80941Smrg int32_t BorderColorSnorm16Red; 790b8e80941Smrg int32_t BorderColorSnorm16Green; 791b8e80941Smrg int32_t BorderColorSnorm16Blue; 792b8e80941Smrg int32_t BorderColorSnorm16Alpha; 793b8e80941Smrg int32_t BorderColorSnorm8Red; 794b8e80941Smrg int32_t BorderColorSnorm8Green; 795b8e80941Smrg int32_t BorderColorSnorm8Blue; 796b8e80941Smrg int32_t BorderColorSnorm8Alpha; 797b8e80941Smrg}; 798b8e80941Smrg 799b8e80941Smrgstatic inline void 800b8e80941SmrgGEN5_SAMPLER_BORDER_COLOR_STATE_pack(__attribute__((unused)) __gen_user_data *data, 801b8e80941Smrg __attribute__((unused)) void * restrict dst, 802b8e80941Smrg __attribute__((unused)) const struct GEN5_SAMPLER_BORDER_COLOR_STATE * restrict values) 803b8e80941Smrg{ 804b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 805b8e80941Smrg 806b8e80941Smrg dw[0] = 807b8e80941Smrg __gen_uint(values->BorderColorUnormRed, 0, 7) | 808b8e80941Smrg __gen_uint(values->BorderColorUnormGreen, 8, 15) | 809b8e80941Smrg __gen_uint(values->BorderColorUnormBlue, 16, 23) | 810b8e80941Smrg __gen_uint(values->BorderColorUnormAlpha, 24, 31); 811b8e80941Smrg 812b8e80941Smrg dw[1] = 813b8e80941Smrg __gen_float(values->BorderColorFloatRed); 814b8e80941Smrg 815b8e80941Smrg dw[2] = 816b8e80941Smrg __gen_float(values->BorderColorFloatGreen); 817b8e80941Smrg 818b8e80941Smrg dw[3] = 819b8e80941Smrg __gen_float(values->BorderColorFloatBlue); 820b8e80941Smrg 821b8e80941Smrg dw[4] = 822b8e80941Smrg __gen_float(values->BorderColorFloatAlpha); 823b8e80941Smrg 824b8e80941Smrg dw[5] = 825b8e80941Smrg __gen_uint(values->BorderColorFloat16Red, 0, 15) | 826b8e80941Smrg __gen_uint(values->BorderColorFloat16Green, 16, 31); 827b8e80941Smrg 828b8e80941Smrg dw[6] = 829b8e80941Smrg __gen_uint(values->BorderColorFloat16Blue, 0, 15) | 830b8e80941Smrg __gen_uint(values->BorderColorFloat16Alpha, 16, 31); 831b8e80941Smrg 832b8e80941Smrg dw[7] = 833b8e80941Smrg __gen_uint(values->BorderColorUnorm16Red, 0, 15) | 834b8e80941Smrg __gen_uint(values->BorderColorUnorm16Green, 16, 31); 835b8e80941Smrg 836b8e80941Smrg dw[8] = 837b8e80941Smrg __gen_uint(values->BorderColorUnorm16Blue, 0, 15) | 838b8e80941Smrg __gen_uint(values->BorderColorUnorm16Alpha, 16, 31); 839b8e80941Smrg 840b8e80941Smrg dw[9] = 841b8e80941Smrg __gen_sint(values->BorderColorSnorm16Red, 0, 15) | 842b8e80941Smrg __gen_sint(values->BorderColorSnorm16Green, 16, 31); 843b8e80941Smrg 844b8e80941Smrg dw[10] = 845b8e80941Smrg __gen_sint(values->BorderColorSnorm16Blue, 0, 15) | 846b8e80941Smrg __gen_sint(values->BorderColorSnorm16Alpha, 16, 31); 847b8e80941Smrg 848b8e80941Smrg dw[11] = 849b8e80941Smrg __gen_sint(values->BorderColorSnorm8Red, 0, 7) | 850b8e80941Smrg __gen_sint(values->BorderColorSnorm8Green, 8, 15) | 851b8e80941Smrg __gen_sint(values->BorderColorSnorm8Blue, 16, 23) | 852b8e80941Smrg __gen_sint(values->BorderColorSnorm8Alpha, 24, 31); 853b8e80941Smrg} 854b8e80941Smrg 855b8e80941Smrg#define GEN5_SAMPLER_STATE_length 4 856b8e80941Smrgstruct GEN5_SAMPLER_STATE { 857b8e80941Smrg uint32_t ShadowFunction; 858b8e80941Smrg#define PREFILTEROP_ALWAYS 0 859b8e80941Smrg#define PREFILTEROP_NEVER 1 860b8e80941Smrg#define PREFILTEROP_LESS 2 861b8e80941Smrg#define PREFILTEROP_EQUAL 3 862b8e80941Smrg#define PREFILTEROP_LEQUAL 4 863b8e80941Smrg#define PREFILTEROP_GREATER 5 864b8e80941Smrg#define PREFILTEROP_NOTEQUAL 6 865b8e80941Smrg#define PREFILTEROP_GEQUAL 7 866b8e80941Smrg float TextureLODBias; 867b8e80941Smrg uint32_t MinModeFilter; 868b8e80941Smrg uint32_t MagModeFilter; 869b8e80941Smrg#define MAPFILTER_NEAREST 0 870b8e80941Smrg#define MAPFILTER_LINEAR 1 871b8e80941Smrg#define MAPFILTER_ANISOTROPIC 2 872b8e80941Smrg#define MAPFILTER_MONO 6 873b8e80941Smrg uint32_t MipModeFilter; 874b8e80941Smrg#define MIPFILTER_NONE 0 875b8e80941Smrg#define MIPFILTER_NEAREST 1 876b8e80941Smrg#define MIPFILTER_LINEAR 3 877b8e80941Smrg float BaseMipLevel; 878b8e80941Smrg bool LODPreClampEnable; 879b8e80941Smrg bool SamplerDisable; 880b8e80941Smrg enum GEN5_Texture_Coordinate_Mode TCZAddressControlMode; 881b8e80941Smrg enum GEN5_Texture_Coordinate_Mode TCYAddressControlMode; 882b8e80941Smrg enum GEN5_Texture_Coordinate_Mode TCXAddressControlMode; 883b8e80941Smrg uint32_t CubeSurfaceControlMode; 884b8e80941Smrg#define CUBECTRLMODE_PROGRAMMED 0 885b8e80941Smrg#define CUBECTRLMODE_OVERRIDE 1 886b8e80941Smrg float MaxLOD; 887b8e80941Smrg float MinLOD; 888b8e80941Smrg __gen_address_type BorderColorPointer; 889b8e80941Smrg bool RAddressMinFilterRoundingEnable; 890b8e80941Smrg bool RAddressMagFilterRoundingEnable; 891b8e80941Smrg bool VAddressMinFilterRoundingEnable; 892b8e80941Smrg bool VAddressMagFilterRoundingEnable; 893b8e80941Smrg bool UAddressMinFilterRoundingEnable; 894b8e80941Smrg bool UAddressMagFilterRoundingEnable; 895b8e80941Smrg uint32_t MaximumAnisotropy; 896b8e80941Smrg#define RATIO21 0 897b8e80941Smrg#define RATIO41 1 898b8e80941Smrg#define RATIO61 2 899b8e80941Smrg#define RATIO81 3 900b8e80941Smrg#define RATIO101 4 901b8e80941Smrg#define RATIO121 5 902b8e80941Smrg#define RATIO141 6 903b8e80941Smrg#define RATIO161 7 904b8e80941Smrg uint32_t ChromaKeyMode; 905b8e80941Smrg#define KEYFILTER_KILL_ON_ANY_MATCH 0 906b8e80941Smrg#define KEYFILTER_REPLACE_BLACK 1 907b8e80941Smrg uint32_t ChromaKeyIndex; 908b8e80941Smrg bool ChromaKeyEnable; 909b8e80941Smrg uint32_t MonochromeFilterWidth; 910b8e80941Smrg uint32_t MonochromeFilterHeight; 911b8e80941Smrg}; 912b8e80941Smrg 913b8e80941Smrgstatic inline void 914b8e80941SmrgGEN5_SAMPLER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 915b8e80941Smrg __attribute__((unused)) void * restrict dst, 916b8e80941Smrg __attribute__((unused)) const struct GEN5_SAMPLER_STATE * restrict values) 917b8e80941Smrg{ 918b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 919b8e80941Smrg 920b8e80941Smrg dw[0] = 921b8e80941Smrg __gen_uint(values->ShadowFunction, 0, 2) | 922b8e80941Smrg __gen_sfixed(values->TextureLODBias, 3, 13, 6) | 923b8e80941Smrg __gen_uint(values->MinModeFilter, 14, 16) | 924b8e80941Smrg __gen_uint(values->MagModeFilter, 17, 19) | 925b8e80941Smrg __gen_uint(values->MipModeFilter, 20, 21) | 926b8e80941Smrg __gen_ufixed(values->BaseMipLevel, 22, 26, 1) | 927b8e80941Smrg __gen_uint(values->LODPreClampEnable, 28, 28) | 928b8e80941Smrg __gen_uint(values->SamplerDisable, 31, 31); 929b8e80941Smrg 930b8e80941Smrg dw[1] = 931b8e80941Smrg __gen_uint(values->TCZAddressControlMode, 0, 2) | 932b8e80941Smrg __gen_uint(values->TCYAddressControlMode, 3, 5) | 933b8e80941Smrg __gen_uint(values->TCXAddressControlMode, 6, 8) | 934b8e80941Smrg __gen_uint(values->CubeSurfaceControlMode, 9, 9) | 935b8e80941Smrg __gen_ufixed(values->MaxLOD, 12, 21, 6) | 936b8e80941Smrg __gen_ufixed(values->MinLOD, 22, 31, 6); 937b8e80941Smrg 938b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->BorderColorPointer, 0); 939b8e80941Smrg 940b8e80941Smrg dw[3] = 941b8e80941Smrg __gen_uint(values->RAddressMinFilterRoundingEnable, 13, 13) | 942b8e80941Smrg __gen_uint(values->RAddressMagFilterRoundingEnable, 14, 14) | 943b8e80941Smrg __gen_uint(values->VAddressMinFilterRoundingEnable, 15, 15) | 944b8e80941Smrg __gen_uint(values->VAddressMagFilterRoundingEnable, 16, 16) | 945b8e80941Smrg __gen_uint(values->UAddressMinFilterRoundingEnable, 17, 17) | 946b8e80941Smrg __gen_uint(values->UAddressMagFilterRoundingEnable, 18, 18) | 947b8e80941Smrg __gen_uint(values->MaximumAnisotropy, 19, 21) | 948b8e80941Smrg __gen_uint(values->ChromaKeyMode, 22, 22) | 949b8e80941Smrg __gen_uint(values->ChromaKeyIndex, 23, 24) | 950b8e80941Smrg __gen_uint(values->ChromaKeyEnable, 25, 25) | 951b8e80941Smrg __gen_uint(values->MonochromeFilterWidth, 26, 28) | 952b8e80941Smrg __gen_uint(values->MonochromeFilterHeight, 29, 31); 953b8e80941Smrg} 954b8e80941Smrg 955b8e80941Smrg#define GEN5_SCISSOR_RECT_length 2 956b8e80941Smrgstruct GEN5_SCISSOR_RECT { 957b8e80941Smrg uint32_t ScissorRectangleXMin; 958b8e80941Smrg uint32_t ScissorRectangleYMin; 959b8e80941Smrg uint32_t ScissorRectangleXMax; 960b8e80941Smrg uint32_t ScissorRectangleYMax; 961b8e80941Smrg}; 962b8e80941Smrg 963b8e80941Smrgstatic inline void 964b8e80941SmrgGEN5_SCISSOR_RECT_pack(__attribute__((unused)) __gen_user_data *data, 965b8e80941Smrg __attribute__((unused)) void * restrict dst, 966b8e80941Smrg __attribute__((unused)) const struct GEN5_SCISSOR_RECT * restrict values) 967b8e80941Smrg{ 968b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 969b8e80941Smrg 970b8e80941Smrg dw[0] = 971b8e80941Smrg __gen_uint(values->ScissorRectangleXMin, 0, 15) | 972b8e80941Smrg __gen_uint(values->ScissorRectangleYMin, 16, 31); 973b8e80941Smrg 974b8e80941Smrg dw[1] = 975b8e80941Smrg __gen_uint(values->ScissorRectangleXMax, 0, 15) | 976b8e80941Smrg __gen_uint(values->ScissorRectangleYMax, 16, 31); 977b8e80941Smrg} 978b8e80941Smrg 979b8e80941Smrg#define GEN5_SF_STATE_length 8 980b8e80941Smrgstruct GEN5_SF_STATE { 981b8e80941Smrg uint32_t GRFRegisterCount; 982b8e80941Smrg uint64_t KernelStartPointer; 983b8e80941Smrg bool SoftwareExceptionEnable; 984b8e80941Smrg bool MaskStackExceptionEnable; 985b8e80941Smrg bool IllegalOpcodeExceptionEnable; 986b8e80941Smrg uint32_t FloatingPointMode; 987b8e80941Smrg#define FLOATING_POINT_MODE_IEEE754 0 988b8e80941Smrg#define FLOATING_POINT_MODE_Alternate 1 989b8e80941Smrg uint32_t ThreadPriority; 990b8e80941Smrg#define NormalPriority 0 991b8e80941Smrg#define HighPriority 1 992b8e80941Smrg uint32_t BindingTableEntryCount; 993b8e80941Smrg bool SingleProgramFlow; 994b8e80941Smrg uint32_t PerThreadScratchSpace; 995b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 996b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 997b8e80941Smrg uint32_t VertexURBEntryReadOffset; 998b8e80941Smrg uint32_t VertexURBEntryReadLength; 999b8e80941Smrg uint32_t ConstantURBEntryReadOffset; 1000b8e80941Smrg uint32_t ConstantURBEntryReadLength; 1001b8e80941Smrg uint32_t NumberofURBEntries; 1002b8e80941Smrg uint32_t URBEntryAllocationSize; 1003b8e80941Smrg uint32_t MaximumNumberofThreads; 1004b8e80941Smrg uint32_t FrontWinding; 1005b8e80941Smrg#define FRONTWINDING_CW 0 1006b8e80941Smrg#define FRONTWINDING_CCW 1 1007b8e80941Smrg bool ViewportTransformEnable; 1008b8e80941Smrg __gen_address_type SetupViewportStateOffset; 1009b8e80941Smrg float DestinationOriginVerticalBias; 1010b8e80941Smrg float DestinationOriginHorizontalBias; 1011b8e80941Smrg bool ScissorRectangleEnable; 1012b8e80941Smrg bool _2x2PixelTriangleFilterDisable; 1013b8e80941Smrg bool ZeroPixelTriangleFilterDisable; 1014b8e80941Smrg uint32_t PointRasterizationRule; 1015b8e80941Smrg#define RASTRULE_UPPER_LEFT 0 1016b8e80941Smrg#define RASTRULE_UPPER_RIGHT 1 1017b8e80941Smrg uint32_t LineEndCapAntialiasingRegionWidth; 1018b8e80941Smrg#define _05pixels 0 1019b8e80941Smrg#define _10pixels 1 1020b8e80941Smrg#define _20pixels 2 1021b8e80941Smrg#define _40pixels 3 1022b8e80941Smrg float LineWidth; 1023b8e80941Smrg bool FastScissorClipDisable; 1024b8e80941Smrg uint32_t CullMode; 1025b8e80941Smrg#define CULLMODE_BOTH 0 1026b8e80941Smrg#define CULLMODE_NONE 1 1027b8e80941Smrg#define CULLMODE_FRONT 2 1028b8e80941Smrg#define CULLMODE_BACK 3 1029b8e80941Smrg bool AntiAliasingEnable; 1030b8e80941Smrg float PointWidth; 1031b8e80941Smrg uint32_t PointWidthSource; 1032b8e80941Smrg#define Vertex 0 1033b8e80941Smrg#define State 1 1034b8e80941Smrg uint32_t VertexSubPixelPrecisionSelect; 1035b8e80941Smrg#define _8SubPixelPrecisionBits 0 1036b8e80941Smrg#define _4SubPixelPrecisionBits 1 1037b8e80941Smrg bool SpritePointEnable; 1038b8e80941Smrg uint32_t AALineDistanceMode; 1039b8e80941Smrg#define AALINEDISTANCE_MANHATTAN 0 1040b8e80941Smrg#define AALINEDISTANCE_TRUE 1 1041b8e80941Smrg uint32_t TriangleFanProvokingVertexSelect; 1042b8e80941Smrg#define Vertex0 0 1043b8e80941Smrg#define Vertex1 1 1044b8e80941Smrg#define Vertex2 2 1045b8e80941Smrg uint32_t LineStripListProvokingVertexSelect; 1046b8e80941Smrg#define Vertex0 0 1047b8e80941Smrg#define Vertex1 1 1048b8e80941Smrg uint32_t TriangleStripListProvokingVertexSelect; 1049b8e80941Smrg#define Vertex0 0 1050b8e80941Smrg#define Vertex1 1 1051b8e80941Smrg#define Vertex2 2 1052b8e80941Smrg bool LastPixelEnable; 1053b8e80941Smrg}; 1054b8e80941Smrg 1055b8e80941Smrgstatic inline void 1056b8e80941SmrgGEN5_SF_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1057b8e80941Smrg __attribute__((unused)) void * restrict dst, 1058b8e80941Smrg __attribute__((unused)) const struct GEN5_SF_STATE * restrict values) 1059b8e80941Smrg{ 1060b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1061b8e80941Smrg 1062b8e80941Smrg dw[0] = 1063b8e80941Smrg __gen_uint(values->GRFRegisterCount, 1, 3) | 1064b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 31); 1065b8e80941Smrg 1066b8e80941Smrg dw[1] = 1067b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 1068b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 1069b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 1070b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 1071b8e80941Smrg __gen_uint(values->ThreadPriority, 17, 17) | 1072b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 1073b8e80941Smrg __gen_uint(values->SingleProgramFlow, 31, 31); 1074b8e80941Smrg 1075b8e80941Smrg const uint32_t v2 = 1076b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 1077b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->ScratchSpaceBasePointer, v2); 1078b8e80941Smrg 1079b8e80941Smrg dw[3] = 1080b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 1081b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 1082b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 1083b8e80941Smrg __gen_uint(values->ConstantURBEntryReadOffset, 18, 23) | 1084b8e80941Smrg __gen_uint(values->ConstantURBEntryReadLength, 25, 30); 1085b8e80941Smrg 1086b8e80941Smrg dw[4] = 1087b8e80941Smrg __gen_uint(values->NumberofURBEntries, 11, 18) | 1088b8e80941Smrg __gen_uint(values->URBEntryAllocationSize, 19, 23) | 1089b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 25, 30); 1090b8e80941Smrg 1091b8e80941Smrg const uint32_t v5 = 1092b8e80941Smrg __gen_uint(values->FrontWinding, 0, 0) | 1093b8e80941Smrg __gen_uint(values->ViewportTransformEnable, 1, 1); 1094b8e80941Smrg dw[5] = __gen_combine_address(data, &dw[5], values->SetupViewportStateOffset, v5); 1095b8e80941Smrg 1096b8e80941Smrg dw[6] = 1097b8e80941Smrg __gen_ufixed(values->DestinationOriginVerticalBias, 9, 12, 4) | 1098b8e80941Smrg __gen_ufixed(values->DestinationOriginHorizontalBias, 13, 16, 4) | 1099b8e80941Smrg __gen_uint(values->ScissorRectangleEnable, 17, 17) | 1100b8e80941Smrg __gen_uint(values->_2x2PixelTriangleFilterDisable, 18, 18) | 1101b8e80941Smrg __gen_uint(values->ZeroPixelTriangleFilterDisable, 19, 19) | 1102b8e80941Smrg __gen_uint(values->PointRasterizationRule, 20, 21) | 1103b8e80941Smrg __gen_uint(values->LineEndCapAntialiasingRegionWidth, 22, 23) | 1104b8e80941Smrg __gen_ufixed(values->LineWidth, 24, 27, 1) | 1105b8e80941Smrg __gen_uint(values->FastScissorClipDisable, 28, 28) | 1106b8e80941Smrg __gen_uint(values->CullMode, 29, 30) | 1107b8e80941Smrg __gen_uint(values->AntiAliasingEnable, 31, 31); 1108b8e80941Smrg 1109b8e80941Smrg dw[7] = 1110b8e80941Smrg __gen_ufixed(values->PointWidth, 0, 10, 3) | 1111b8e80941Smrg __gen_uint(values->PointWidthSource, 11, 11) | 1112b8e80941Smrg __gen_uint(values->VertexSubPixelPrecisionSelect, 12, 12) | 1113b8e80941Smrg __gen_uint(values->SpritePointEnable, 13, 13) | 1114b8e80941Smrg __gen_uint(values->AALineDistanceMode, 14, 14) | 1115b8e80941Smrg __gen_uint(values->TriangleFanProvokingVertexSelect, 25, 26) | 1116b8e80941Smrg __gen_uint(values->LineStripListProvokingVertexSelect, 27, 28) | 1117b8e80941Smrg __gen_uint(values->TriangleStripListProvokingVertexSelect, 29, 30) | 1118b8e80941Smrg __gen_uint(values->LastPixelEnable, 31, 31); 1119b8e80941Smrg} 1120b8e80941Smrg 1121b8e80941Smrg#define GEN5_SF_VIEWPORT_length 8 1122b8e80941Smrgstruct GEN5_SF_VIEWPORT { 1123b8e80941Smrg float ViewportMatrixElementm00; 1124b8e80941Smrg float ViewportMatrixElementm11; 1125b8e80941Smrg float ViewportMatrixElementm22; 1126b8e80941Smrg float ViewportMatrixElementm30; 1127b8e80941Smrg float ViewportMatrixElementm31; 1128b8e80941Smrg float ViewportMatrixElementm32; 1129b8e80941Smrg struct GEN5_SCISSOR_RECT ScissorRectangle; 1130b8e80941Smrg}; 1131b8e80941Smrg 1132b8e80941Smrgstatic inline void 1133b8e80941SmrgGEN5_SF_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 1134b8e80941Smrg __attribute__((unused)) void * restrict dst, 1135b8e80941Smrg __attribute__((unused)) const struct GEN5_SF_VIEWPORT * restrict values) 1136b8e80941Smrg{ 1137b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1138b8e80941Smrg 1139b8e80941Smrg dw[0] = 1140b8e80941Smrg __gen_float(values->ViewportMatrixElementm00); 1141b8e80941Smrg 1142b8e80941Smrg dw[1] = 1143b8e80941Smrg __gen_float(values->ViewportMatrixElementm11); 1144b8e80941Smrg 1145b8e80941Smrg dw[2] = 1146b8e80941Smrg __gen_float(values->ViewportMatrixElementm22); 1147b8e80941Smrg 1148b8e80941Smrg dw[3] = 1149b8e80941Smrg __gen_float(values->ViewportMatrixElementm30); 1150b8e80941Smrg 1151b8e80941Smrg dw[4] = 1152b8e80941Smrg __gen_float(values->ViewportMatrixElementm31); 1153b8e80941Smrg 1154b8e80941Smrg dw[5] = 1155b8e80941Smrg __gen_float(values->ViewportMatrixElementm32); 1156b8e80941Smrg 1157b8e80941Smrg GEN5_SCISSOR_RECT_pack(data, &dw[6], &values->ScissorRectangle); 1158b8e80941Smrg} 1159b8e80941Smrg 1160b8e80941Smrg#define GEN5_VERTEX_BUFFER_STATE_length 4 1161b8e80941Smrgstruct GEN5_VERTEX_BUFFER_STATE { 1162b8e80941Smrg uint32_t BufferPitch; 1163b8e80941Smrg bool NullVertexBuffer; 1164b8e80941Smrg uint32_t BufferAccessType; 1165b8e80941Smrg#define VERTEXDATA 0 1166b8e80941Smrg#define INSTANCEDATA 1 1167b8e80941Smrg uint32_t VertexBufferIndex; 1168b8e80941Smrg __gen_address_type BufferStartingAddress; 1169b8e80941Smrg __gen_address_type EndAddress; 1170b8e80941Smrg uint32_t InstanceDataStepRate; 1171b8e80941Smrg}; 1172b8e80941Smrg 1173b8e80941Smrgstatic inline void 1174b8e80941SmrgGEN5_VERTEX_BUFFER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1175b8e80941Smrg __attribute__((unused)) void * restrict dst, 1176b8e80941Smrg __attribute__((unused)) const struct GEN5_VERTEX_BUFFER_STATE * restrict values) 1177b8e80941Smrg{ 1178b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1179b8e80941Smrg 1180b8e80941Smrg dw[0] = 1181b8e80941Smrg __gen_uint(values->BufferPitch, 0, 11) | 1182b8e80941Smrg __gen_uint(values->NullVertexBuffer, 13, 13) | 1183b8e80941Smrg __gen_uint(values->BufferAccessType, 26, 26) | 1184b8e80941Smrg __gen_uint(values->VertexBufferIndex, 27, 31); 1185b8e80941Smrg 1186b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->BufferStartingAddress, 0); 1187b8e80941Smrg 1188b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->EndAddress, 0); 1189b8e80941Smrg 1190b8e80941Smrg dw[3] = 1191b8e80941Smrg __gen_uint(values->InstanceDataStepRate, 0, 31); 1192b8e80941Smrg} 1193b8e80941Smrg 1194b8e80941Smrg#define GEN5_VERTEX_ELEMENT_STATE_length 2 1195b8e80941Smrgstruct GEN5_VERTEX_ELEMENT_STATE { 1196b8e80941Smrg uint32_t SourceElementOffset; 1197b8e80941Smrg uint32_t SourceElementFormat; 1198b8e80941Smrg bool Valid; 1199b8e80941Smrg uint32_t VertexBufferIndex; 1200b8e80941Smrg uint32_t DestinationElementOffset; 1201b8e80941Smrg enum GEN5_3D_Vertex_Component_Control Component3Control; 1202b8e80941Smrg enum GEN5_3D_Vertex_Component_Control Component2Control; 1203b8e80941Smrg enum GEN5_3D_Vertex_Component_Control Component1Control; 1204b8e80941Smrg enum GEN5_3D_Vertex_Component_Control Component0Control; 1205b8e80941Smrg}; 1206b8e80941Smrg 1207b8e80941Smrgstatic inline void 1208b8e80941SmrgGEN5_VERTEX_ELEMENT_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1209b8e80941Smrg __attribute__((unused)) void * restrict dst, 1210b8e80941Smrg __attribute__((unused)) const struct GEN5_VERTEX_ELEMENT_STATE * restrict values) 1211b8e80941Smrg{ 1212b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1213b8e80941Smrg 1214b8e80941Smrg dw[0] = 1215b8e80941Smrg __gen_uint(values->SourceElementOffset, 0, 10) | 1216b8e80941Smrg __gen_uint(values->SourceElementFormat, 16, 24) | 1217b8e80941Smrg __gen_uint(values->Valid, 26, 26) | 1218b8e80941Smrg __gen_uint(values->VertexBufferIndex, 27, 31); 1219b8e80941Smrg 1220b8e80941Smrg dw[1] = 1221b8e80941Smrg __gen_uint(values->DestinationElementOffset, 0, 7) | 1222b8e80941Smrg __gen_uint(values->Component3Control, 16, 18) | 1223b8e80941Smrg __gen_uint(values->Component2Control, 20, 22) | 1224b8e80941Smrg __gen_uint(values->Component1Control, 24, 26) | 1225b8e80941Smrg __gen_uint(values->Component0Control, 28, 30); 1226b8e80941Smrg} 1227b8e80941Smrg 1228b8e80941Smrg#define GEN5_VS_STATE_length 7 1229b8e80941Smrgstruct GEN5_VS_STATE { 1230b8e80941Smrg uint32_t GRFRegisterCount; 1231b8e80941Smrg uint64_t KernelStartPointer; 1232b8e80941Smrg bool SoftwareExceptionEnable; 1233b8e80941Smrg bool MaskStackExceptionEnable; 1234b8e80941Smrg bool IllegalOpcodeExceptionEnable; 1235b8e80941Smrg uint32_t FloatingPointMode; 1236b8e80941Smrg#define FLOATING_POINT_MODE_IEEE754 0 1237b8e80941Smrg#define FLOATING_POINT_MODE_Alternate 1 1238b8e80941Smrg uint32_t ThreadPriority; 1239b8e80941Smrg#define NormalPriority 0 1240b8e80941Smrg#define HighPriority 1 1241b8e80941Smrg uint32_t BindingTableEntryCount; 1242b8e80941Smrg bool SingleProgramFlow; 1243b8e80941Smrg uint32_t PerThreadScratchSpace; 1244b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 1245b8e80941Smrg uint32_t DispatchGRFStartRegisterForURBData; 1246b8e80941Smrg uint32_t VertexURBEntryReadOffset; 1247b8e80941Smrg uint32_t VertexURBEntryReadLength; 1248b8e80941Smrg uint32_t ConstantURBEntryReadOffset; 1249b8e80941Smrg uint32_t ConstantURBEntryReadLength; 1250b8e80941Smrg bool StatisticsEnable; 1251b8e80941Smrg uint32_t NumberofURBEntries; 1252b8e80941Smrg uint32_t URBEntryAllocationSize; 1253b8e80941Smrg uint32_t MaximumNumberofThreads; 1254b8e80941Smrg uint32_t SamplerCount; 1255b8e80941Smrg __gen_address_type SamplerStatePointer; 1256b8e80941Smrg bool Enable; 1257b8e80941Smrg bool VertexCacheDisable; 1258b8e80941Smrg}; 1259b8e80941Smrg 1260b8e80941Smrgstatic inline void 1261b8e80941SmrgGEN5_VS_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1262b8e80941Smrg __attribute__((unused)) void * restrict dst, 1263b8e80941Smrg __attribute__((unused)) const struct GEN5_VS_STATE * restrict values) 1264b8e80941Smrg{ 1265b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1266b8e80941Smrg 1267b8e80941Smrg dw[0] = 1268b8e80941Smrg __gen_uint(values->GRFRegisterCount, 1, 3) | 1269b8e80941Smrg __gen_offset(values->KernelStartPointer, 6, 31); 1270b8e80941Smrg 1271b8e80941Smrg dw[1] = 1272b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 1273b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 1274b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 1275b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 1276b8e80941Smrg __gen_uint(values->ThreadPriority, 17, 17) | 1277b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 1278b8e80941Smrg __gen_uint(values->SingleProgramFlow, 31, 31); 1279b8e80941Smrg 1280b8e80941Smrg const uint32_t v2 = 1281b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 1282b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->ScratchSpaceBasePointer, v2); 1283b8e80941Smrg 1284b8e80941Smrg dw[3] = 1285b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 1286b8e80941Smrg __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 1287b8e80941Smrg __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 1288b8e80941Smrg __gen_uint(values->ConstantURBEntryReadOffset, 18, 23) | 1289b8e80941Smrg __gen_uint(values->ConstantURBEntryReadLength, 25, 30); 1290b8e80941Smrg 1291b8e80941Smrg dw[4] = 1292b8e80941Smrg __gen_uint(values->StatisticsEnable, 10, 10) | 1293b8e80941Smrg __gen_uint(values->NumberofURBEntries, 11, 18) | 1294b8e80941Smrg __gen_uint(values->URBEntryAllocationSize, 19, 23) | 1295b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 25, 30); 1296b8e80941Smrg 1297b8e80941Smrg const uint32_t v5 = 1298b8e80941Smrg __gen_uint(values->SamplerCount, 0, 2); 1299b8e80941Smrg dw[5] = __gen_combine_address(data, &dw[5], values->SamplerStatePointer, v5); 1300b8e80941Smrg 1301b8e80941Smrg dw[6] = 1302b8e80941Smrg __gen_uint(values->Enable, 0, 0) | 1303b8e80941Smrg __gen_uint(values->VertexCacheDisable, 1, 1); 1304b8e80941Smrg} 1305b8e80941Smrg 1306b8e80941Smrg#define GEN5_WM_STATE_length 11 1307b8e80941Smrgstruct GEN5_WM_STATE { 1308b8e80941Smrg uint32_t GRFRegisterCount0; 1309b8e80941Smrg uint64_t KernelStartPointer0; 1310b8e80941Smrg bool SoftwareExceptionEnable; 1311b8e80941Smrg bool MaskStackExceptionEnable; 1312b8e80941Smrg bool IllegalOpcodeExceptionEnable; 1313b8e80941Smrg uint32_t DepthCoefficientURBReadOffset; 1314b8e80941Smrg uint32_t FloatingPointMode; 1315b8e80941Smrg#define FLOATING_POINT_MODE_IEEE754 0 1316b8e80941Smrg#define FLOATING_POINT_MODE_Alternate 1 1317b8e80941Smrg uint32_t ThreadPriority; 1318b8e80941Smrg#define High 1 1319b8e80941Smrg uint32_t BindingTableEntryCount; 1320b8e80941Smrg bool SingleProgramFlow; 1321b8e80941Smrg uint32_t PerThreadScratchSpace; 1322b8e80941Smrg __gen_address_type ScratchSpaceBasePointer; 1323b8e80941Smrg uint32_t DispatchGRFStartRegisterForConstantSetupData0; 1324b8e80941Smrg uint32_t SetupURBEntryReadOffset; 1325b8e80941Smrg uint32_t SetupURBEntryReadLength; 1326b8e80941Smrg uint32_t ConstantURBEntryReadOffset; 1327b8e80941Smrg uint32_t ConstantURBEntryReadLength; 1328b8e80941Smrg bool StatisticsEnable; 1329b8e80941Smrg uint32_t SamplerCount; 1330b8e80941Smrg __gen_address_type SamplerStatePointer; 1331b8e80941Smrg bool _8PixelDispatchEnable; 1332b8e80941Smrg bool _16PixelDispatchEnable; 1333b8e80941Smrg bool _32PixelDispatchEnable; 1334b8e80941Smrg bool Contiguous32PixelDispatchEnable; 1335b8e80941Smrg bool Contiguous64PixelDispatchEnable; 1336b8e80941Smrg bool FastSpanCoverageEnable; 1337b8e80941Smrg bool DepthBufferClear; 1338b8e80941Smrg bool DepthBufferResolveEnable; 1339b8e80941Smrg bool HierarchicalDepthBufferResolveEnable; 1340b8e80941Smrg bool LegacyGlobalDepthBiasEnable; 1341b8e80941Smrg bool LineStippleEnable; 1342b8e80941Smrg bool GlobalDepthOffsetEnable; 1343b8e80941Smrg bool PolygonStippleEnable; 1344b8e80941Smrg uint32_t LineAntialiasingRegionWidth; 1345b8e80941Smrg#define _05pixels 0 1346b8e80941Smrg#define _10pixels 1 1347b8e80941Smrg#define _20pixels 2 1348b8e80941Smrg#define _40pixels 3 1349b8e80941Smrg uint32_t LineEndCapAntialiasingRegionWidth; 1350b8e80941Smrg#define _05pixels 0 1351b8e80941Smrg#define _10pixels 1 1352b8e80941Smrg#define _20pixels 2 1353b8e80941Smrg#define _40pixels 3 1354b8e80941Smrg bool EarlyDepthTestEnable; 1355b8e80941Smrg bool ThreadDispatchEnable; 1356b8e80941Smrg bool PixelShaderUsesSourceDepth; 1357b8e80941Smrg bool PixelShaderComputedDepth; 1358b8e80941Smrg bool PixelShaderKillsPixel; 1359b8e80941Smrg bool LegacyDiamondLineRasterization; 1360b8e80941Smrg uint32_t MaximumNumberofThreads; 1361b8e80941Smrg float GlobalDepthOffsetConstant; 1362b8e80941Smrg float GlobalDepthOffsetScale; 1363b8e80941Smrg uint32_t GRFRegisterCount1; 1364b8e80941Smrg uint64_t KernelStartPointer1; 1365b8e80941Smrg uint32_t GRFRegisterCount2; 1366b8e80941Smrg uint64_t KernelStartPointer2; 1367b8e80941Smrg uint32_t GRFRegisterCount3; 1368b8e80941Smrg uint64_t KernelStartPointer3; 1369b8e80941Smrg}; 1370b8e80941Smrg 1371b8e80941Smrgstatic inline void 1372b8e80941SmrgGEN5_WM_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1373b8e80941Smrg __attribute__((unused)) void * restrict dst, 1374b8e80941Smrg __attribute__((unused)) const struct GEN5_WM_STATE * restrict values) 1375b8e80941Smrg{ 1376b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1377b8e80941Smrg 1378b8e80941Smrg dw[0] = 1379b8e80941Smrg __gen_uint(values->GRFRegisterCount0, 1, 3) | 1380b8e80941Smrg __gen_offset(values->KernelStartPointer0, 6, 31); 1381b8e80941Smrg 1382b8e80941Smrg dw[1] = 1383b8e80941Smrg __gen_uint(values->SoftwareExceptionEnable, 1, 1) | 1384b8e80941Smrg __gen_uint(values->MaskStackExceptionEnable, 2, 2) | 1385b8e80941Smrg __gen_uint(values->IllegalOpcodeExceptionEnable, 4, 4) | 1386b8e80941Smrg __gen_uint(values->DepthCoefficientURBReadOffset, 8, 13) | 1387b8e80941Smrg __gen_uint(values->FloatingPointMode, 16, 16) | 1388b8e80941Smrg __gen_uint(values->ThreadPriority, 17, 17) | 1389b8e80941Smrg __gen_uint(values->BindingTableEntryCount, 18, 25) | 1390b8e80941Smrg __gen_uint(values->SingleProgramFlow, 31, 31); 1391b8e80941Smrg 1392b8e80941Smrg const uint32_t v2 = 1393b8e80941Smrg __gen_uint(values->PerThreadScratchSpace, 0, 3); 1394b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->ScratchSpaceBasePointer, v2); 1395b8e80941Smrg 1396b8e80941Smrg dw[3] = 1397b8e80941Smrg __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 0, 3) | 1398b8e80941Smrg __gen_uint(values->SetupURBEntryReadOffset, 4, 9) | 1399b8e80941Smrg __gen_uint(values->SetupURBEntryReadLength, 11, 16) | 1400b8e80941Smrg __gen_uint(values->ConstantURBEntryReadOffset, 18, 23) | 1401b8e80941Smrg __gen_uint(values->ConstantURBEntryReadLength, 25, 30); 1402b8e80941Smrg 1403b8e80941Smrg const uint32_t v4 = 1404b8e80941Smrg __gen_uint(values->StatisticsEnable, 0, 0) | 1405b8e80941Smrg __gen_uint(values->SamplerCount, 2, 4); 1406b8e80941Smrg dw[4] = __gen_combine_address(data, &dw[4], values->SamplerStatePointer, v4); 1407b8e80941Smrg 1408b8e80941Smrg dw[5] = 1409b8e80941Smrg __gen_uint(values->_8PixelDispatchEnable, 0, 0) | 1410b8e80941Smrg __gen_uint(values->_16PixelDispatchEnable, 1, 1) | 1411b8e80941Smrg __gen_uint(values->_32PixelDispatchEnable, 2, 2) | 1412b8e80941Smrg __gen_uint(values->Contiguous32PixelDispatchEnable, 3, 3) | 1413b8e80941Smrg __gen_uint(values->Contiguous64PixelDispatchEnable, 4, 4) | 1414b8e80941Smrg __gen_uint(values->FastSpanCoverageEnable, 6, 6) | 1415b8e80941Smrg __gen_uint(values->DepthBufferClear, 7, 7) | 1416b8e80941Smrg __gen_uint(values->DepthBufferResolveEnable, 8, 8) | 1417b8e80941Smrg __gen_uint(values->HierarchicalDepthBufferResolveEnable, 9, 9) | 1418b8e80941Smrg __gen_uint(values->LegacyGlobalDepthBiasEnable, 10, 10) | 1419b8e80941Smrg __gen_uint(values->LineStippleEnable, 11, 11) | 1420b8e80941Smrg __gen_uint(values->GlobalDepthOffsetEnable, 12, 12) | 1421b8e80941Smrg __gen_uint(values->PolygonStippleEnable, 13, 13) | 1422b8e80941Smrg __gen_uint(values->LineAntialiasingRegionWidth, 14, 15) | 1423b8e80941Smrg __gen_uint(values->LineEndCapAntialiasingRegionWidth, 16, 17) | 1424b8e80941Smrg __gen_uint(values->EarlyDepthTestEnable, 18, 18) | 1425b8e80941Smrg __gen_uint(values->ThreadDispatchEnable, 19, 19) | 1426b8e80941Smrg __gen_uint(values->PixelShaderUsesSourceDepth, 20, 20) | 1427b8e80941Smrg __gen_uint(values->PixelShaderComputedDepth, 21, 21) | 1428b8e80941Smrg __gen_uint(values->PixelShaderKillsPixel, 22, 22) | 1429b8e80941Smrg __gen_uint(values->LegacyDiamondLineRasterization, 23, 23) | 1430b8e80941Smrg __gen_uint(values->MaximumNumberofThreads, 25, 31); 1431b8e80941Smrg 1432b8e80941Smrg dw[6] = 1433b8e80941Smrg __gen_float(values->GlobalDepthOffsetConstant); 1434b8e80941Smrg 1435b8e80941Smrg dw[7] = 1436b8e80941Smrg __gen_float(values->GlobalDepthOffsetScale); 1437b8e80941Smrg 1438b8e80941Smrg dw[8] = 1439b8e80941Smrg __gen_uint(values->GRFRegisterCount1, 1, 3) | 1440b8e80941Smrg __gen_offset(values->KernelStartPointer1, 6, 31); 1441b8e80941Smrg 1442b8e80941Smrg dw[9] = 1443b8e80941Smrg __gen_uint(values->GRFRegisterCount2, 1, 3) | 1444b8e80941Smrg __gen_offset(values->KernelStartPointer2, 6, 31); 1445b8e80941Smrg 1446b8e80941Smrg dw[10] = 1447b8e80941Smrg __gen_uint(values->GRFRegisterCount3, 1, 3) | 1448b8e80941Smrg __gen_offset(values->KernelStartPointer3, 6, 31); 1449b8e80941Smrg} 1450b8e80941Smrg 1451b8e80941Smrg#define GEN5_3DPRIMITIVE_length 6 1452b8e80941Smrg#define GEN5_3DPRIMITIVE_length_bias 2 1453b8e80941Smrg#define GEN5_3DPRIMITIVE_header \ 1454b8e80941Smrg .DWordLength = 4, \ 1455b8e80941Smrg ._3DCommandSubOpcode = 0, \ 1456b8e80941Smrg ._3DCommandOpcode = 3, \ 1457b8e80941Smrg .CommandSubType = 3, \ 1458b8e80941Smrg .CommandType = 3 1459b8e80941Smrg 1460b8e80941Smrgstruct GEN5_3DPRIMITIVE { 1461b8e80941Smrg uint32_t DWordLength; 1462b8e80941Smrg uint32_t IndirectVertexCount; 1463b8e80941Smrg enum GEN5_3D_Prim_Topo_Type PrimitiveTopologyType; 1464b8e80941Smrg uint32_t VertexAccessType; 1465b8e80941Smrg#define SEQUENTIAL 0 1466b8e80941Smrg#define RANDOM 1 1467b8e80941Smrg uint32_t _3DCommandSubOpcode; 1468b8e80941Smrg uint32_t _3DCommandOpcode; 1469b8e80941Smrg uint32_t CommandSubType; 1470b8e80941Smrg uint32_t CommandType; 1471b8e80941Smrg uint32_t VertexCountPerInstance; 1472b8e80941Smrg uint32_t StartVertexLocation; 1473b8e80941Smrg uint32_t InstanceCount; 1474b8e80941Smrg uint32_t StartInstanceLocation; 1475b8e80941Smrg int32_t BaseVertexLocation; 1476b8e80941Smrg}; 1477b8e80941Smrg 1478b8e80941Smrgstatic inline void 1479b8e80941SmrgGEN5_3DPRIMITIVE_pack(__attribute__((unused)) __gen_user_data *data, 1480b8e80941Smrg __attribute__((unused)) void * restrict dst, 1481b8e80941Smrg __attribute__((unused)) const struct GEN5_3DPRIMITIVE * restrict values) 1482b8e80941Smrg{ 1483b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1484b8e80941Smrg 1485b8e80941Smrg dw[0] = 1486b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1487b8e80941Smrg __gen_uint(values->IndirectVertexCount, 9, 9) | 1488b8e80941Smrg __gen_uint(values->PrimitiveTopologyType, 10, 14) | 1489b8e80941Smrg __gen_uint(values->VertexAccessType, 15, 15) | 1490b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1491b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1492b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1493b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1494b8e80941Smrg 1495b8e80941Smrg dw[1] = 1496b8e80941Smrg __gen_uint(values->VertexCountPerInstance, 0, 31); 1497b8e80941Smrg 1498b8e80941Smrg dw[2] = 1499b8e80941Smrg __gen_uint(values->StartVertexLocation, 0, 31); 1500b8e80941Smrg 1501b8e80941Smrg dw[3] = 1502b8e80941Smrg __gen_uint(values->InstanceCount, 0, 31); 1503b8e80941Smrg 1504b8e80941Smrg dw[4] = 1505b8e80941Smrg __gen_uint(values->StartInstanceLocation, 0, 31); 1506b8e80941Smrg 1507b8e80941Smrg dw[5] = 1508b8e80941Smrg __gen_sint(values->BaseVertexLocation, 0, 31); 1509b8e80941Smrg} 1510b8e80941Smrg 1511b8e80941Smrg#define GEN5_3DSTATE_AA_LINE_PARAMETERS_length 3 1512b8e80941Smrg#define GEN5_3DSTATE_AA_LINE_PARAMETERS_length_bias 2 1513b8e80941Smrg#define GEN5_3DSTATE_AA_LINE_PARAMETERS_header \ 1514b8e80941Smrg .DWordLength = 1, \ 1515b8e80941Smrg ._3DCommandSubOpcode = 10, \ 1516b8e80941Smrg ._3DCommandOpcode = 1, \ 1517b8e80941Smrg .CommandSubType = 3, \ 1518b8e80941Smrg .CommandType = 3 1519b8e80941Smrg 1520b8e80941Smrgstruct GEN5_3DSTATE_AA_LINE_PARAMETERS { 1521b8e80941Smrg uint32_t DWordLength; 1522b8e80941Smrg uint32_t _3DCommandSubOpcode; 1523b8e80941Smrg uint32_t _3DCommandOpcode; 1524b8e80941Smrg uint32_t CommandSubType; 1525b8e80941Smrg uint32_t CommandType; 1526b8e80941Smrg float AACoverageSlope; 1527b8e80941Smrg float AACoverageBias; 1528b8e80941Smrg float AACoverageEndCapSlope; 1529b8e80941Smrg float AACoverageEndCapBias; 1530b8e80941Smrg}; 1531b8e80941Smrg 1532b8e80941Smrgstatic inline void 1533b8e80941SmrgGEN5_3DSTATE_AA_LINE_PARAMETERS_pack(__attribute__((unused)) __gen_user_data *data, 1534b8e80941Smrg __attribute__((unused)) void * restrict dst, 1535b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_AA_LINE_PARAMETERS * restrict values) 1536b8e80941Smrg{ 1537b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1538b8e80941Smrg 1539b8e80941Smrg dw[0] = 1540b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1541b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1542b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1543b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1544b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1545b8e80941Smrg 1546b8e80941Smrg dw[1] = 1547b8e80941Smrg __gen_ufixed(values->AACoverageSlope, 0, 7, 8) | 1548b8e80941Smrg __gen_ufixed(values->AACoverageBias, 16, 23, 8); 1549b8e80941Smrg 1550b8e80941Smrg dw[2] = 1551b8e80941Smrg __gen_ufixed(values->AACoverageEndCapSlope, 0, 7, 8) | 1552b8e80941Smrg __gen_ufixed(values->AACoverageEndCapBias, 16, 23, 8); 1553b8e80941Smrg} 1554b8e80941Smrg 1555b8e80941Smrg#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_length 6 1556b8e80941Smrg#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_length_bias 2 1557b8e80941Smrg#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_header\ 1558b8e80941Smrg .DWordLength = 4, \ 1559b8e80941Smrg ._3DCommandSubOpcode = 1, \ 1560b8e80941Smrg ._3DCommandOpcode = 0, \ 1561b8e80941Smrg .CommandSubType = 3, \ 1562b8e80941Smrg .CommandType = 3 1563b8e80941Smrg 1564b8e80941Smrgstruct GEN5_3DSTATE_BINDING_TABLE_POINTERS { 1565b8e80941Smrg uint32_t DWordLength; 1566b8e80941Smrg uint32_t _3DCommandSubOpcode; 1567b8e80941Smrg uint32_t _3DCommandOpcode; 1568b8e80941Smrg uint32_t CommandSubType; 1569b8e80941Smrg uint32_t CommandType; 1570b8e80941Smrg uint64_t PointertoVSBindingTable; 1571b8e80941Smrg uint64_t PointertoGSBindingTable; 1572b8e80941Smrg uint64_t PointertoCLIPBindingTable; 1573b8e80941Smrg uint64_t PointertoSFBindingTable; 1574b8e80941Smrg uint64_t PointertoPSBindingTable; 1575b8e80941Smrg}; 1576b8e80941Smrg 1577b8e80941Smrgstatic inline void 1578b8e80941SmrgGEN5_3DSTATE_BINDING_TABLE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 1579b8e80941Smrg __attribute__((unused)) void * restrict dst, 1580b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_BINDING_TABLE_POINTERS * restrict values) 1581b8e80941Smrg{ 1582b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1583b8e80941Smrg 1584b8e80941Smrg dw[0] = 1585b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1586b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1587b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1588b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1589b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1590b8e80941Smrg 1591b8e80941Smrg dw[1] = 1592b8e80941Smrg __gen_offset(values->PointertoVSBindingTable, 5, 31); 1593b8e80941Smrg 1594b8e80941Smrg dw[2] = 1595b8e80941Smrg __gen_offset(values->PointertoGSBindingTable, 5, 31); 1596b8e80941Smrg 1597b8e80941Smrg dw[3] = 1598b8e80941Smrg __gen_offset(values->PointertoCLIPBindingTable, 5, 31); 1599b8e80941Smrg 1600b8e80941Smrg dw[4] = 1601b8e80941Smrg __gen_offset(values->PointertoSFBindingTable, 5, 31); 1602b8e80941Smrg 1603b8e80941Smrg dw[5] = 1604b8e80941Smrg __gen_offset(values->PointertoPSBindingTable, 5, 31); 1605b8e80941Smrg} 1606b8e80941Smrg 1607b8e80941Smrg#define GEN5_3DSTATE_CLEAR_PARAMS_length 2 1608b8e80941Smrg#define GEN5_3DSTATE_CLEAR_PARAMS_length_bias 2 1609b8e80941Smrg#define GEN5_3DSTATE_CLEAR_PARAMS_header \ 1610b8e80941Smrg .DWordLength = 0, \ 1611b8e80941Smrg ._3DCommandSubOpcode = 16, \ 1612b8e80941Smrg ._3DCommandOpcode = 1, \ 1613b8e80941Smrg .CommandSubType = 3, \ 1614b8e80941Smrg .CommandType = 3 1615b8e80941Smrg 1616b8e80941Smrgstruct GEN5_3DSTATE_CLEAR_PARAMS { 1617b8e80941Smrg uint32_t DWordLength; 1618b8e80941Smrg bool DepthClearValueValid; 1619b8e80941Smrg uint32_t _3DCommandSubOpcode; 1620b8e80941Smrg uint32_t _3DCommandOpcode; 1621b8e80941Smrg uint32_t CommandSubType; 1622b8e80941Smrg uint32_t CommandType; 1623b8e80941Smrg uint32_t DepthClearValue; 1624b8e80941Smrg}; 1625b8e80941Smrg 1626b8e80941Smrgstatic inline void 1627b8e80941SmrgGEN5_3DSTATE_CLEAR_PARAMS_pack(__attribute__((unused)) __gen_user_data *data, 1628b8e80941Smrg __attribute__((unused)) void * restrict dst, 1629b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_CLEAR_PARAMS * restrict values) 1630b8e80941Smrg{ 1631b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1632b8e80941Smrg 1633b8e80941Smrg dw[0] = 1634b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1635b8e80941Smrg __gen_uint(values->DepthClearValueValid, 15, 15) | 1636b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1637b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1638b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1639b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1640b8e80941Smrg 1641b8e80941Smrg dw[1] = 1642b8e80941Smrg __gen_uint(values->DepthClearValue, 0, 31); 1643b8e80941Smrg} 1644b8e80941Smrg 1645b8e80941Smrg#define GEN5_3DSTATE_CONSTANT_COLOR_length 5 1646b8e80941Smrg#define GEN5_3DSTATE_CONSTANT_COLOR_length_bias 2 1647b8e80941Smrg#define GEN5_3DSTATE_CONSTANT_COLOR_header \ 1648b8e80941Smrg .DWordLength = 3, \ 1649b8e80941Smrg ._3DCommandSubOpcode = 1, \ 1650b8e80941Smrg ._3DCommandOpcode = 1, \ 1651b8e80941Smrg .CommandSubType = 3, \ 1652b8e80941Smrg .CommandType = 3 1653b8e80941Smrg 1654b8e80941Smrgstruct GEN5_3DSTATE_CONSTANT_COLOR { 1655b8e80941Smrg uint32_t DWordLength; 1656b8e80941Smrg uint32_t _3DCommandSubOpcode; 1657b8e80941Smrg uint32_t _3DCommandOpcode; 1658b8e80941Smrg uint32_t CommandSubType; 1659b8e80941Smrg uint32_t CommandType; 1660b8e80941Smrg float BlendConstantColorRed; 1661b8e80941Smrg float BlendConstantColorGreen; 1662b8e80941Smrg float BlendConstantColorBlue; 1663b8e80941Smrg float BlendConstantColorAlpha; 1664b8e80941Smrg}; 1665b8e80941Smrg 1666b8e80941Smrgstatic inline void 1667b8e80941SmrgGEN5_3DSTATE_CONSTANT_COLOR_pack(__attribute__((unused)) __gen_user_data *data, 1668b8e80941Smrg __attribute__((unused)) void * restrict dst, 1669b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_CONSTANT_COLOR * restrict values) 1670b8e80941Smrg{ 1671b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1672b8e80941Smrg 1673b8e80941Smrg dw[0] = 1674b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1675b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1676b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1677b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1678b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1679b8e80941Smrg 1680b8e80941Smrg dw[1] = 1681b8e80941Smrg __gen_float(values->BlendConstantColorRed); 1682b8e80941Smrg 1683b8e80941Smrg dw[2] = 1684b8e80941Smrg __gen_float(values->BlendConstantColorGreen); 1685b8e80941Smrg 1686b8e80941Smrg dw[3] = 1687b8e80941Smrg __gen_float(values->BlendConstantColorBlue); 1688b8e80941Smrg 1689b8e80941Smrg dw[4] = 1690b8e80941Smrg __gen_float(values->BlendConstantColorAlpha); 1691b8e80941Smrg} 1692b8e80941Smrg 1693b8e80941Smrg#define GEN5_3DSTATE_DEPTH_BUFFER_length 6 1694b8e80941Smrg#define GEN5_3DSTATE_DEPTH_BUFFER_length_bias 2 1695b8e80941Smrg#define GEN5_3DSTATE_DEPTH_BUFFER_header \ 1696b8e80941Smrg .DWordLength = 4, \ 1697b8e80941Smrg ._3DCommandSubOpcode = 5, \ 1698b8e80941Smrg ._3DCommandOpcode = 1, \ 1699b8e80941Smrg .CommandSubType = 3, \ 1700b8e80941Smrg .CommandType = 3 1701b8e80941Smrg 1702b8e80941Smrgstruct GEN5_3DSTATE_DEPTH_BUFFER { 1703b8e80941Smrg uint32_t DWordLength; 1704b8e80941Smrg uint32_t _3DCommandSubOpcode; 1705b8e80941Smrg uint32_t _3DCommandOpcode; 1706b8e80941Smrg uint32_t CommandSubType; 1707b8e80941Smrg uint32_t CommandType; 1708b8e80941Smrg uint32_t SurfacePitch; 1709b8e80941Smrg uint32_t SurfaceFormat; 1710b8e80941Smrg#define D32_FLOAT_S8X24_UINT 0 1711b8e80941Smrg#define D32_FLOAT 1 1712b8e80941Smrg#define D24_UNORM_S8_UINT 2 1713b8e80941Smrg#define D24_UNORM_X8_UINT 3 1714b8e80941Smrg#define D16_UNORM 5 1715b8e80941Smrg bool SeparateStencilBufferEnable; 1716b8e80941Smrg bool HierarchicalDepthBufferEnable; 1717b8e80941Smrg uint32_t SoftwareTiledRenderingMode; 1718b8e80941Smrg#define NORMAL 0 1719b8e80941Smrg#define STR1 1 1720b8e80941Smrg#define STR2 3 1721b8e80941Smrg uint32_t TileWalk; 1722b8e80941Smrg#define TILEWALK_YMAJOR 1 1723b8e80941Smrg bool TiledSurface; 1724b8e80941Smrg uint32_t SurfaceType; 1725b8e80941Smrg#define SURFTYPE_1D 0 1726b8e80941Smrg#define SURFTYPE_2D 1 1727b8e80941Smrg#define SURFTYPE_3D 2 1728b8e80941Smrg#define SURFTYPE_CUBE 3 1729b8e80941Smrg#define SURFTYPE_NULL 7 1730b8e80941Smrg __gen_address_type SurfaceBaseAddress; 1731b8e80941Smrg uint32_t MIPMapLayoutMode; 1732b8e80941Smrg#define MIPLAYOUT_BELOW 0 1733b8e80941Smrg#define MIPLAYOUT_RIGHT 1 1734b8e80941Smrg uint32_t LOD; 1735b8e80941Smrg uint32_t Width; 1736b8e80941Smrg uint32_t Height; 1737b8e80941Smrg uint32_t RenderTargetViewExtent; 1738b8e80941Smrg uint32_t MinimumArrayElement; 1739b8e80941Smrg uint32_t Depth; 1740b8e80941Smrg int32_t DepthCoordinateOffsetX; 1741b8e80941Smrg int32_t DepthCoordinateOffsetY; 1742b8e80941Smrg}; 1743b8e80941Smrg 1744b8e80941Smrgstatic inline void 1745b8e80941SmrgGEN5_3DSTATE_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 1746b8e80941Smrg __attribute__((unused)) void * restrict dst, 1747b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_DEPTH_BUFFER * restrict values) 1748b8e80941Smrg{ 1749b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1750b8e80941Smrg 1751b8e80941Smrg dw[0] = 1752b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1753b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1754b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1755b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1756b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1757b8e80941Smrg 1758b8e80941Smrg dw[1] = 1759b8e80941Smrg __gen_uint(values->SurfacePitch, 0, 16) | 1760b8e80941Smrg __gen_uint(values->SurfaceFormat, 18, 20) | 1761b8e80941Smrg __gen_uint(values->SeparateStencilBufferEnable, 21, 21) | 1762b8e80941Smrg __gen_uint(values->HierarchicalDepthBufferEnable, 22, 22) | 1763b8e80941Smrg __gen_uint(values->SoftwareTiledRenderingMode, 23, 24) | 1764b8e80941Smrg __gen_uint(values->TileWalk, 26, 26) | 1765b8e80941Smrg __gen_uint(values->TiledSurface, 27, 27) | 1766b8e80941Smrg __gen_uint(values->SurfaceType, 29, 31); 1767b8e80941Smrg 1768b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 1769b8e80941Smrg 1770b8e80941Smrg dw[3] = 1771b8e80941Smrg __gen_uint(values->MIPMapLayoutMode, 1, 1) | 1772b8e80941Smrg __gen_uint(values->LOD, 2, 5) | 1773b8e80941Smrg __gen_uint(values->Width, 6, 18) | 1774b8e80941Smrg __gen_uint(values->Height, 19, 31); 1775b8e80941Smrg 1776b8e80941Smrg dw[4] = 1777b8e80941Smrg __gen_uint(values->RenderTargetViewExtent, 1, 9) | 1778b8e80941Smrg __gen_uint(values->MinimumArrayElement, 10, 20) | 1779b8e80941Smrg __gen_uint(values->Depth, 21, 31); 1780b8e80941Smrg 1781b8e80941Smrg dw[5] = 1782b8e80941Smrg __gen_sint(values->DepthCoordinateOffsetX, 0, 15) | 1783b8e80941Smrg __gen_sint(values->DepthCoordinateOffsetY, 16, 31); 1784b8e80941Smrg} 1785b8e80941Smrg 1786b8e80941Smrg#define GEN5_3DSTATE_DRAWING_RECTANGLE_length 4 1787b8e80941Smrg#define GEN5_3DSTATE_DRAWING_RECTANGLE_length_bias 2 1788b8e80941Smrg#define GEN5_3DSTATE_DRAWING_RECTANGLE_header \ 1789b8e80941Smrg .DWordLength = 2, \ 1790b8e80941Smrg ._3DCommandSubOpcode = 0, \ 1791b8e80941Smrg ._3DCommandOpcode = 1, \ 1792b8e80941Smrg .CommandSubType = 3, \ 1793b8e80941Smrg .CommandType = 3 1794b8e80941Smrg 1795b8e80941Smrgstruct GEN5_3DSTATE_DRAWING_RECTANGLE { 1796b8e80941Smrg uint32_t DWordLength; 1797b8e80941Smrg uint32_t _3DCommandSubOpcode; 1798b8e80941Smrg uint32_t _3DCommandOpcode; 1799b8e80941Smrg uint32_t CommandSubType; 1800b8e80941Smrg uint32_t CommandType; 1801b8e80941Smrg uint32_t ClippedDrawingRectangleXMin; 1802b8e80941Smrg uint32_t ClippedDrawingRectangleYMin; 1803b8e80941Smrg uint32_t ClippedDrawingRectangleXMax; 1804b8e80941Smrg uint32_t ClippedDrawingRectangleYMax; 1805b8e80941Smrg int32_t DrawingRectangleOriginX; 1806b8e80941Smrg int32_t DrawingRectangleOriginY; 1807b8e80941Smrg}; 1808b8e80941Smrg 1809b8e80941Smrgstatic inline void 1810b8e80941SmrgGEN5_3DSTATE_DRAWING_RECTANGLE_pack(__attribute__((unused)) __gen_user_data *data, 1811b8e80941Smrg __attribute__((unused)) void * restrict dst, 1812b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_DRAWING_RECTANGLE * restrict values) 1813b8e80941Smrg{ 1814b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1815b8e80941Smrg 1816b8e80941Smrg dw[0] = 1817b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1818b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1819b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1820b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1821b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1822b8e80941Smrg 1823b8e80941Smrg dw[1] = 1824b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleXMin, 0, 15) | 1825b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleYMin, 16, 31); 1826b8e80941Smrg 1827b8e80941Smrg dw[2] = 1828b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleXMax, 0, 15) | 1829b8e80941Smrg __gen_uint(values->ClippedDrawingRectangleYMax, 16, 31); 1830b8e80941Smrg 1831b8e80941Smrg dw[3] = 1832b8e80941Smrg __gen_sint(values->DrawingRectangleOriginX, 0, 15) | 1833b8e80941Smrg __gen_sint(values->DrawingRectangleOriginY, 16, 31); 1834b8e80941Smrg} 1835b8e80941Smrg 1836b8e80941Smrg#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_length 2 1837b8e80941Smrg#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_length_bias 2 1838b8e80941Smrg#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_header\ 1839b8e80941Smrg .DWordLength = 0, \ 1840b8e80941Smrg ._3DCommandSubOpcode = 9, \ 1841b8e80941Smrg ._3DCommandOpcode = 1, \ 1842b8e80941Smrg .CommandSubType = 3, \ 1843b8e80941Smrg .CommandType = 3 1844b8e80941Smrg 1845b8e80941Smrgstruct GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP { 1846b8e80941Smrg uint32_t DWordLength; 1847b8e80941Smrg uint32_t _3DCommandSubOpcode; 1848b8e80941Smrg uint32_t _3DCommandOpcode; 1849b8e80941Smrg uint32_t CommandSubType; 1850b8e80941Smrg uint32_t CommandType; 1851b8e80941Smrg float GlobalDepthOffsetClamp; 1852b8e80941Smrg}; 1853b8e80941Smrg 1854b8e80941Smrgstatic inline void 1855b8e80941SmrgGEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_pack(__attribute__((unused)) __gen_user_data *data, 1856b8e80941Smrg __attribute__((unused)) void * restrict dst, 1857b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP * restrict values) 1858b8e80941Smrg{ 1859b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1860b8e80941Smrg 1861b8e80941Smrg dw[0] = 1862b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1863b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1864b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1865b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1866b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1867b8e80941Smrg 1868b8e80941Smrg dw[1] = 1869b8e80941Smrg __gen_float(values->GlobalDepthOffsetClamp); 1870b8e80941Smrg} 1871b8e80941Smrg 1872b8e80941Smrg#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_length 3 1873b8e80941Smrg#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_length_bias 2 1874b8e80941Smrg#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_header \ 1875b8e80941Smrg .DWordLength = 1, \ 1876b8e80941Smrg ._3DCommandSubOpcode = 15, \ 1877b8e80941Smrg ._3DCommandOpcode = 1, \ 1878b8e80941Smrg .CommandSubType = 3, \ 1879b8e80941Smrg .CommandType = 3 1880b8e80941Smrg 1881b8e80941Smrgstruct GEN5_3DSTATE_HIER_DEPTH_BUFFER { 1882b8e80941Smrg uint32_t DWordLength; 1883b8e80941Smrg uint32_t _3DCommandSubOpcode; 1884b8e80941Smrg uint32_t _3DCommandOpcode; 1885b8e80941Smrg uint32_t CommandSubType; 1886b8e80941Smrg uint32_t CommandType; 1887b8e80941Smrg uint32_t SurfacePitch; 1888b8e80941Smrg __gen_address_type SurfaceBaseAddress; 1889b8e80941Smrg}; 1890b8e80941Smrg 1891b8e80941Smrgstatic inline void 1892b8e80941SmrgGEN5_3DSTATE_HIER_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 1893b8e80941Smrg __attribute__((unused)) void * restrict dst, 1894b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_HIER_DEPTH_BUFFER * restrict values) 1895b8e80941Smrg{ 1896b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1897b8e80941Smrg 1898b8e80941Smrg dw[0] = 1899b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1900b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1901b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1902b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1903b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1904b8e80941Smrg 1905b8e80941Smrg dw[1] = 1906b8e80941Smrg __gen_uint(values->SurfacePitch, 0, 16); 1907b8e80941Smrg 1908b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 1909b8e80941Smrg} 1910b8e80941Smrg 1911b8e80941Smrg#define GEN5_3DSTATE_INDEX_BUFFER_length 3 1912b8e80941Smrg#define GEN5_3DSTATE_INDEX_BUFFER_length_bias 2 1913b8e80941Smrg#define GEN5_3DSTATE_INDEX_BUFFER_header \ 1914b8e80941Smrg .DWordLength = 1, \ 1915b8e80941Smrg ._3DCommandSubOpcode = 10, \ 1916b8e80941Smrg ._3DCommandOpcode = 0, \ 1917b8e80941Smrg .CommandSubType = 3, \ 1918b8e80941Smrg .CommandType = 3 1919b8e80941Smrg 1920b8e80941Smrgstruct GEN5_3DSTATE_INDEX_BUFFER { 1921b8e80941Smrg uint32_t DWordLength; 1922b8e80941Smrg uint32_t IndexFormat; 1923b8e80941Smrg#define INDEX_BYTE 0 1924b8e80941Smrg#define INDEX_WORD 1 1925b8e80941Smrg#define INDEX_DWORD 2 1926b8e80941Smrg bool CutIndexEnable; 1927b8e80941Smrg uint32_t _3DCommandSubOpcode; 1928b8e80941Smrg uint32_t _3DCommandOpcode; 1929b8e80941Smrg uint32_t CommandSubType; 1930b8e80941Smrg uint32_t CommandType; 1931b8e80941Smrg __gen_address_type BufferStartingAddress; 1932b8e80941Smrg __gen_address_type BufferEndingAddress; 1933b8e80941Smrg}; 1934b8e80941Smrg 1935b8e80941Smrgstatic inline void 1936b8e80941SmrgGEN5_3DSTATE_INDEX_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 1937b8e80941Smrg __attribute__((unused)) void * restrict dst, 1938b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_INDEX_BUFFER * restrict values) 1939b8e80941Smrg{ 1940b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1941b8e80941Smrg 1942b8e80941Smrg dw[0] = 1943b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1944b8e80941Smrg __gen_uint(values->IndexFormat, 8, 9) | 1945b8e80941Smrg __gen_uint(values->CutIndexEnable, 10, 10) | 1946b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1947b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1948b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1949b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1950b8e80941Smrg 1951b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->BufferStartingAddress, 0); 1952b8e80941Smrg 1953b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->BufferEndingAddress, 0); 1954b8e80941Smrg} 1955b8e80941Smrg 1956b8e80941Smrg#define GEN5_3DSTATE_LINE_STIPPLE_length 3 1957b8e80941Smrg#define GEN5_3DSTATE_LINE_STIPPLE_length_bias 2 1958b8e80941Smrg#define GEN5_3DSTATE_LINE_STIPPLE_header \ 1959b8e80941Smrg .DWordLength = 1, \ 1960b8e80941Smrg ._3DCommandSubOpcode = 8, \ 1961b8e80941Smrg ._3DCommandOpcode = 1, \ 1962b8e80941Smrg .CommandSubType = 3, \ 1963b8e80941Smrg .CommandType = 3 1964b8e80941Smrg 1965b8e80941Smrgstruct GEN5_3DSTATE_LINE_STIPPLE { 1966b8e80941Smrg uint32_t DWordLength; 1967b8e80941Smrg uint32_t _3DCommandSubOpcode; 1968b8e80941Smrg uint32_t _3DCommandOpcode; 1969b8e80941Smrg uint32_t CommandSubType; 1970b8e80941Smrg uint32_t CommandType; 1971b8e80941Smrg uint32_t LineStipplePattern; 1972b8e80941Smrg uint32_t CurrentStippleIndex; 1973b8e80941Smrg uint32_t CurrentRepeatCounter; 1974b8e80941Smrg bool ModifyEnable; 1975b8e80941Smrg uint32_t LineStippleRepeatCount; 1976b8e80941Smrg float LineStippleInverseRepeatCount; 1977b8e80941Smrg}; 1978b8e80941Smrg 1979b8e80941Smrgstatic inline void 1980b8e80941SmrgGEN5_3DSTATE_LINE_STIPPLE_pack(__attribute__((unused)) __gen_user_data *data, 1981b8e80941Smrg __attribute__((unused)) void * restrict dst, 1982b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_LINE_STIPPLE * restrict values) 1983b8e80941Smrg{ 1984b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 1985b8e80941Smrg 1986b8e80941Smrg dw[0] = 1987b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 1988b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 1989b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 1990b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 1991b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 1992b8e80941Smrg 1993b8e80941Smrg dw[1] = 1994b8e80941Smrg __gen_uint(values->LineStipplePattern, 0, 15) | 1995b8e80941Smrg __gen_uint(values->CurrentStippleIndex, 16, 19) | 1996b8e80941Smrg __gen_uint(values->CurrentRepeatCounter, 21, 29) | 1997b8e80941Smrg __gen_uint(values->ModifyEnable, 31, 31); 1998b8e80941Smrg 1999b8e80941Smrg dw[2] = 2000b8e80941Smrg __gen_uint(values->LineStippleRepeatCount, 0, 8) | 2001b8e80941Smrg __gen_ufixed(values->LineStippleInverseRepeatCount, 16, 31, 13); 2002b8e80941Smrg} 2003b8e80941Smrg 2004b8e80941Smrg#define GEN5_3DSTATE_PIPELINED_POINTERS_length 7 2005b8e80941Smrg#define GEN5_3DSTATE_PIPELINED_POINTERS_length_bias 2 2006b8e80941Smrg#define GEN5_3DSTATE_PIPELINED_POINTERS_header \ 2007b8e80941Smrg .DWordLength = 5, \ 2008b8e80941Smrg ._3DCommandSubOpcode = 0, \ 2009b8e80941Smrg ._3DCommandOpcode = 0, \ 2010b8e80941Smrg .CommandSubType = 3, \ 2011b8e80941Smrg .CommandType = 3 2012b8e80941Smrg 2013b8e80941Smrgstruct GEN5_3DSTATE_PIPELINED_POINTERS { 2014b8e80941Smrg uint32_t DWordLength; 2015b8e80941Smrg uint32_t _3DCommandSubOpcode; 2016b8e80941Smrg uint32_t _3DCommandOpcode; 2017b8e80941Smrg uint32_t CommandSubType; 2018b8e80941Smrg uint32_t CommandType; 2019b8e80941Smrg __gen_address_type PointertoVSState; 2020b8e80941Smrg bool GSEnable; 2021b8e80941Smrg __gen_address_type PointertoGSState; 2022b8e80941Smrg bool ClipEnable; 2023b8e80941Smrg __gen_address_type PointertoCLIPState; 2024b8e80941Smrg __gen_address_type PointertoSFState; 2025b8e80941Smrg __gen_address_type PointertoWMState; 2026b8e80941Smrg __gen_address_type PointertoColorCalcState; 2027b8e80941Smrg}; 2028b8e80941Smrg 2029b8e80941Smrgstatic inline void 2030b8e80941SmrgGEN5_3DSTATE_PIPELINED_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 2031b8e80941Smrg __attribute__((unused)) void * restrict dst, 2032b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_PIPELINED_POINTERS * restrict values) 2033b8e80941Smrg{ 2034b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2035b8e80941Smrg 2036b8e80941Smrg dw[0] = 2037b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2038b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2039b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2040b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2041b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2042b8e80941Smrg 2043b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->PointertoVSState, 0); 2044b8e80941Smrg 2045b8e80941Smrg const uint32_t v2 = 2046b8e80941Smrg __gen_uint(values->GSEnable, 0, 0); 2047b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->PointertoGSState, v2); 2048b8e80941Smrg 2049b8e80941Smrg const uint32_t v3 = 2050b8e80941Smrg __gen_uint(values->ClipEnable, 0, 0); 2051b8e80941Smrg dw[3] = __gen_combine_address(data, &dw[3], values->PointertoCLIPState, v3); 2052b8e80941Smrg 2053b8e80941Smrg dw[4] = __gen_combine_address(data, &dw[4], values->PointertoSFState, 0); 2054b8e80941Smrg 2055b8e80941Smrg dw[5] = __gen_combine_address(data, &dw[5], values->PointertoWMState, 0); 2056b8e80941Smrg 2057b8e80941Smrg dw[6] = __gen_combine_address(data, &dw[6], values->PointertoColorCalcState, 0); 2058b8e80941Smrg} 2059b8e80941Smrg 2060b8e80941Smrg#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_length 2 2061b8e80941Smrg#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 2 2062b8e80941Smrg#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_header \ 2063b8e80941Smrg .DWordLength = 0, \ 2064b8e80941Smrg ._3DCommandSubOpcode = 6, \ 2065b8e80941Smrg ._3DCommandOpcode = 1, \ 2066b8e80941Smrg .CommandSubType = 3, \ 2067b8e80941Smrg .CommandType = 3 2068b8e80941Smrg 2069b8e80941Smrgstruct GEN5_3DSTATE_POLY_STIPPLE_OFFSET { 2070b8e80941Smrg uint32_t DWordLength; 2071b8e80941Smrg uint32_t _3DCommandSubOpcode; 2072b8e80941Smrg uint32_t _3DCommandOpcode; 2073b8e80941Smrg uint32_t CommandSubType; 2074b8e80941Smrg uint32_t CommandType; 2075b8e80941Smrg uint32_t PolygonStippleYOffset; 2076b8e80941Smrg uint32_t PolygonStippleXOffset; 2077b8e80941Smrg}; 2078b8e80941Smrg 2079b8e80941Smrgstatic inline void 2080b8e80941SmrgGEN5_3DSTATE_POLY_STIPPLE_OFFSET_pack(__attribute__((unused)) __gen_user_data *data, 2081b8e80941Smrg __attribute__((unused)) void * restrict dst, 2082b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_POLY_STIPPLE_OFFSET * restrict values) 2083b8e80941Smrg{ 2084b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2085b8e80941Smrg 2086b8e80941Smrg dw[0] = 2087b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2088b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2089b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2090b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2091b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2092b8e80941Smrg 2093b8e80941Smrg dw[1] = 2094b8e80941Smrg __gen_uint(values->PolygonStippleYOffset, 0, 4) | 2095b8e80941Smrg __gen_uint(values->PolygonStippleXOffset, 8, 12); 2096b8e80941Smrg} 2097b8e80941Smrg 2098b8e80941Smrg#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_length 33 2099b8e80941Smrg#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 2 2100b8e80941Smrg#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_header\ 2101b8e80941Smrg .DWordLength = 31, \ 2102b8e80941Smrg ._3DCommandSubOpcode = 7, \ 2103b8e80941Smrg ._3DCommandOpcode = 1, \ 2104b8e80941Smrg .CommandSubType = 3, \ 2105b8e80941Smrg .CommandType = 3 2106b8e80941Smrg 2107b8e80941Smrgstruct GEN5_3DSTATE_POLY_STIPPLE_PATTERN { 2108b8e80941Smrg uint32_t DWordLength; 2109b8e80941Smrg uint32_t _3DCommandSubOpcode; 2110b8e80941Smrg uint32_t _3DCommandOpcode; 2111b8e80941Smrg uint32_t CommandSubType; 2112b8e80941Smrg uint32_t CommandType; 2113b8e80941Smrg uint32_t PatternRow[32]; 2114b8e80941Smrg}; 2115b8e80941Smrg 2116b8e80941Smrgstatic inline void 2117b8e80941SmrgGEN5_3DSTATE_POLY_STIPPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 2118b8e80941Smrg __attribute__((unused)) void * restrict dst, 2119b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_POLY_STIPPLE_PATTERN * restrict values) 2120b8e80941Smrg{ 2121b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2122b8e80941Smrg 2123b8e80941Smrg dw[0] = 2124b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2125b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2126b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2127b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2128b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2129b8e80941Smrg 2130b8e80941Smrg dw[1] = 2131b8e80941Smrg __gen_uint(values->PatternRow[0], 0, 31); 2132b8e80941Smrg 2133b8e80941Smrg dw[2] = 2134b8e80941Smrg __gen_uint(values->PatternRow[1], 0, 31); 2135b8e80941Smrg 2136b8e80941Smrg dw[3] = 2137b8e80941Smrg __gen_uint(values->PatternRow[2], 0, 31); 2138b8e80941Smrg 2139b8e80941Smrg dw[4] = 2140b8e80941Smrg __gen_uint(values->PatternRow[3], 0, 31); 2141b8e80941Smrg 2142b8e80941Smrg dw[5] = 2143b8e80941Smrg __gen_uint(values->PatternRow[4], 0, 31); 2144b8e80941Smrg 2145b8e80941Smrg dw[6] = 2146b8e80941Smrg __gen_uint(values->PatternRow[5], 0, 31); 2147b8e80941Smrg 2148b8e80941Smrg dw[7] = 2149b8e80941Smrg __gen_uint(values->PatternRow[6], 0, 31); 2150b8e80941Smrg 2151b8e80941Smrg dw[8] = 2152b8e80941Smrg __gen_uint(values->PatternRow[7], 0, 31); 2153b8e80941Smrg 2154b8e80941Smrg dw[9] = 2155b8e80941Smrg __gen_uint(values->PatternRow[8], 0, 31); 2156b8e80941Smrg 2157b8e80941Smrg dw[10] = 2158b8e80941Smrg __gen_uint(values->PatternRow[9], 0, 31); 2159b8e80941Smrg 2160b8e80941Smrg dw[11] = 2161b8e80941Smrg __gen_uint(values->PatternRow[10], 0, 31); 2162b8e80941Smrg 2163b8e80941Smrg dw[12] = 2164b8e80941Smrg __gen_uint(values->PatternRow[11], 0, 31); 2165b8e80941Smrg 2166b8e80941Smrg dw[13] = 2167b8e80941Smrg __gen_uint(values->PatternRow[12], 0, 31); 2168b8e80941Smrg 2169b8e80941Smrg dw[14] = 2170b8e80941Smrg __gen_uint(values->PatternRow[13], 0, 31); 2171b8e80941Smrg 2172b8e80941Smrg dw[15] = 2173b8e80941Smrg __gen_uint(values->PatternRow[14], 0, 31); 2174b8e80941Smrg 2175b8e80941Smrg dw[16] = 2176b8e80941Smrg __gen_uint(values->PatternRow[15], 0, 31); 2177b8e80941Smrg 2178b8e80941Smrg dw[17] = 2179b8e80941Smrg __gen_uint(values->PatternRow[16], 0, 31); 2180b8e80941Smrg 2181b8e80941Smrg dw[18] = 2182b8e80941Smrg __gen_uint(values->PatternRow[17], 0, 31); 2183b8e80941Smrg 2184b8e80941Smrg dw[19] = 2185b8e80941Smrg __gen_uint(values->PatternRow[18], 0, 31); 2186b8e80941Smrg 2187b8e80941Smrg dw[20] = 2188b8e80941Smrg __gen_uint(values->PatternRow[19], 0, 31); 2189b8e80941Smrg 2190b8e80941Smrg dw[21] = 2191b8e80941Smrg __gen_uint(values->PatternRow[20], 0, 31); 2192b8e80941Smrg 2193b8e80941Smrg dw[22] = 2194b8e80941Smrg __gen_uint(values->PatternRow[21], 0, 31); 2195b8e80941Smrg 2196b8e80941Smrg dw[23] = 2197b8e80941Smrg __gen_uint(values->PatternRow[22], 0, 31); 2198b8e80941Smrg 2199b8e80941Smrg dw[24] = 2200b8e80941Smrg __gen_uint(values->PatternRow[23], 0, 31); 2201b8e80941Smrg 2202b8e80941Smrg dw[25] = 2203b8e80941Smrg __gen_uint(values->PatternRow[24], 0, 31); 2204b8e80941Smrg 2205b8e80941Smrg dw[26] = 2206b8e80941Smrg __gen_uint(values->PatternRow[25], 0, 31); 2207b8e80941Smrg 2208b8e80941Smrg dw[27] = 2209b8e80941Smrg __gen_uint(values->PatternRow[26], 0, 31); 2210b8e80941Smrg 2211b8e80941Smrg dw[28] = 2212b8e80941Smrg __gen_uint(values->PatternRow[27], 0, 31); 2213b8e80941Smrg 2214b8e80941Smrg dw[29] = 2215b8e80941Smrg __gen_uint(values->PatternRow[28], 0, 31); 2216b8e80941Smrg 2217b8e80941Smrg dw[30] = 2218b8e80941Smrg __gen_uint(values->PatternRow[29], 0, 31); 2219b8e80941Smrg 2220b8e80941Smrg dw[31] = 2221b8e80941Smrg __gen_uint(values->PatternRow[30], 0, 31); 2222b8e80941Smrg 2223b8e80941Smrg dw[32] = 2224b8e80941Smrg __gen_uint(values->PatternRow[31], 0, 31); 2225b8e80941Smrg} 2226b8e80941Smrg 2227b8e80941Smrg#define GEN5_3DSTATE_STENCIL_BUFFER_length 3 2228b8e80941Smrg#define GEN5_3DSTATE_STENCIL_BUFFER_length_bias 2 2229b8e80941Smrg#define GEN5_3DSTATE_STENCIL_BUFFER_header \ 2230b8e80941Smrg .DWordLength = 1, \ 2231b8e80941Smrg ._3DCommandSubOpcode = 14, \ 2232b8e80941Smrg ._3DCommandOpcode = 1, \ 2233b8e80941Smrg .CommandSubType = 3, \ 2234b8e80941Smrg .CommandType = 3 2235b8e80941Smrg 2236b8e80941Smrgstruct GEN5_3DSTATE_STENCIL_BUFFER { 2237b8e80941Smrg uint32_t DWordLength; 2238b8e80941Smrg uint32_t _3DCommandSubOpcode; 2239b8e80941Smrg uint32_t _3DCommandOpcode; 2240b8e80941Smrg uint32_t CommandSubType; 2241b8e80941Smrg uint32_t CommandType; 2242b8e80941Smrg uint32_t SurfacePitch; 2243b8e80941Smrg __gen_address_type SurfaceBaseAddress; 2244b8e80941Smrg}; 2245b8e80941Smrg 2246b8e80941Smrgstatic inline void 2247b8e80941SmrgGEN5_3DSTATE_STENCIL_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 2248b8e80941Smrg __attribute__((unused)) void * restrict dst, 2249b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_STENCIL_BUFFER * restrict values) 2250b8e80941Smrg{ 2251b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2252b8e80941Smrg 2253b8e80941Smrg dw[0] = 2254b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2255b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2256b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2257b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2258b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2259b8e80941Smrg 2260b8e80941Smrg dw[1] = 2261b8e80941Smrg __gen_uint(values->SurfacePitch, 0, 16); 2262b8e80941Smrg 2263b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 2264b8e80941Smrg} 2265b8e80941Smrg 2266b8e80941Smrg#define GEN5_3DSTATE_VERTEX_BUFFERS_length_bias 2 2267b8e80941Smrg#define GEN5_3DSTATE_VERTEX_BUFFERS_header \ 2268b8e80941Smrg .DWordLength = 3, \ 2269b8e80941Smrg ._3DCommandSubOpcode = 8, \ 2270b8e80941Smrg ._3DCommandOpcode = 0, \ 2271b8e80941Smrg .CommandSubType = 3, \ 2272b8e80941Smrg .CommandType = 3 2273b8e80941Smrg 2274b8e80941Smrgstruct GEN5_3DSTATE_VERTEX_BUFFERS { 2275b8e80941Smrg uint32_t DWordLength; 2276b8e80941Smrg uint32_t _3DCommandSubOpcode; 2277b8e80941Smrg uint32_t _3DCommandOpcode; 2278b8e80941Smrg uint32_t CommandSubType; 2279b8e80941Smrg uint32_t CommandType; 2280b8e80941Smrg /* variable length fields follow */ 2281b8e80941Smrg}; 2282b8e80941Smrg 2283b8e80941Smrgstatic inline void 2284b8e80941SmrgGEN5_3DSTATE_VERTEX_BUFFERS_pack(__attribute__((unused)) __gen_user_data *data, 2285b8e80941Smrg __attribute__((unused)) void * restrict dst, 2286b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_VERTEX_BUFFERS * restrict values) 2287b8e80941Smrg{ 2288b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2289b8e80941Smrg 2290b8e80941Smrg dw[0] = 2291b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2292b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2293b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2294b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2295b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2296b8e80941Smrg} 2297b8e80941Smrg 2298b8e80941Smrg#define GEN5_3DSTATE_VERTEX_ELEMENTS_length_bias 2 2299b8e80941Smrg#define GEN5_3DSTATE_VERTEX_ELEMENTS_header \ 2300b8e80941Smrg .DWordLength = 1, \ 2301b8e80941Smrg ._3DCommandSubOpcode = 9, \ 2302b8e80941Smrg ._3DCommandOpcode = 0, \ 2303b8e80941Smrg .CommandSubType = 3, \ 2304b8e80941Smrg .CommandType = 3 2305b8e80941Smrg 2306b8e80941Smrgstruct GEN5_3DSTATE_VERTEX_ELEMENTS { 2307b8e80941Smrg uint32_t DWordLength; 2308b8e80941Smrg uint32_t _3DCommandSubOpcode; 2309b8e80941Smrg uint32_t _3DCommandOpcode; 2310b8e80941Smrg uint32_t CommandSubType; 2311b8e80941Smrg uint32_t CommandType; 2312b8e80941Smrg /* variable length fields follow */ 2313b8e80941Smrg}; 2314b8e80941Smrg 2315b8e80941Smrgstatic inline void 2316b8e80941SmrgGEN5_3DSTATE_VERTEX_ELEMENTS_pack(__attribute__((unused)) __gen_user_data *data, 2317b8e80941Smrg __attribute__((unused)) void * restrict dst, 2318b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_VERTEX_ELEMENTS * restrict values) 2319b8e80941Smrg{ 2320b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2321b8e80941Smrg 2322b8e80941Smrg dw[0] = 2323b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2324b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2325b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2326b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2327b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2328b8e80941Smrg} 2329b8e80941Smrg 2330b8e80941Smrg#define GEN5_3DSTATE_VF_STATISTICS_length 1 2331b8e80941Smrg#define GEN5_3DSTATE_VF_STATISTICS_length_bias 1 2332b8e80941Smrg#define GEN5_3DSTATE_VF_STATISTICS_header \ 2333b8e80941Smrg ._3DCommandSubOpcode = 11, \ 2334b8e80941Smrg ._3DCommandOpcode = 0, \ 2335b8e80941Smrg .CommandSubType = 1, \ 2336b8e80941Smrg .CommandType = 3 2337b8e80941Smrg 2338b8e80941Smrgstruct GEN5_3DSTATE_VF_STATISTICS { 2339b8e80941Smrg bool StatisticsEnable; 2340b8e80941Smrg uint32_t _3DCommandSubOpcode; 2341b8e80941Smrg uint32_t _3DCommandOpcode; 2342b8e80941Smrg uint32_t CommandSubType; 2343b8e80941Smrg uint32_t CommandType; 2344b8e80941Smrg}; 2345b8e80941Smrg 2346b8e80941Smrgstatic inline void 2347b8e80941SmrgGEN5_3DSTATE_VF_STATISTICS_pack(__attribute__((unused)) __gen_user_data *data, 2348b8e80941Smrg __attribute__((unused)) void * restrict dst, 2349b8e80941Smrg __attribute__((unused)) const struct GEN5_3DSTATE_VF_STATISTICS * restrict values) 2350b8e80941Smrg{ 2351b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2352b8e80941Smrg 2353b8e80941Smrg dw[0] = 2354b8e80941Smrg __gen_uint(values->StatisticsEnable, 0, 0) | 2355b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2356b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2357b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2358b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2359b8e80941Smrg} 2360b8e80941Smrg 2361b8e80941Smrg#define GEN5_CONSTANT_BUFFER_length 2 2362b8e80941Smrg#define GEN5_CONSTANT_BUFFER_length_bias 2 2363b8e80941Smrg#define GEN5_CONSTANT_BUFFER_header \ 2364b8e80941Smrg .DWordLength = 0, \ 2365b8e80941Smrg ._3DCommandSubOpcode = 2, \ 2366b8e80941Smrg ._3DCommandOpcode = 0, \ 2367b8e80941Smrg .CommandSubType = 0, \ 2368b8e80941Smrg .CommandType = 3 2369b8e80941Smrg 2370b8e80941Smrgstruct GEN5_CONSTANT_BUFFER { 2371b8e80941Smrg uint32_t DWordLength; 2372b8e80941Smrg bool Valid; 2373b8e80941Smrg uint32_t _3DCommandSubOpcode; 2374b8e80941Smrg uint32_t _3DCommandOpcode; 2375b8e80941Smrg uint32_t CommandSubType; 2376b8e80941Smrg uint32_t CommandType; 2377b8e80941Smrg uint32_t BufferLength; 2378b8e80941Smrg __gen_address_type BufferStartingAddress; 2379b8e80941Smrg}; 2380b8e80941Smrg 2381b8e80941Smrgstatic inline void 2382b8e80941SmrgGEN5_CONSTANT_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 2383b8e80941Smrg __attribute__((unused)) void * restrict dst, 2384b8e80941Smrg __attribute__((unused)) const struct GEN5_CONSTANT_BUFFER * restrict values) 2385b8e80941Smrg{ 2386b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2387b8e80941Smrg 2388b8e80941Smrg dw[0] = 2389b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2390b8e80941Smrg __gen_uint(values->Valid, 8, 8) | 2391b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2392b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2393b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2394b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2395b8e80941Smrg 2396b8e80941Smrg const uint32_t v1 = 2397b8e80941Smrg __gen_uint(values->BufferLength, 0, 5); 2398b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->BufferStartingAddress, v1); 2399b8e80941Smrg} 2400b8e80941Smrg 2401b8e80941Smrg#define GEN5_CS_URB_STATE_length 2 2402b8e80941Smrg#define GEN5_CS_URB_STATE_length_bias 2 2403b8e80941Smrg#define GEN5_CS_URB_STATE_header \ 2404b8e80941Smrg .DWordLength = 0, \ 2405b8e80941Smrg ._3DCommandSubOpcode = 1, \ 2406b8e80941Smrg ._3DCommandOpcode = 0, \ 2407b8e80941Smrg .CommandSubType = 0, \ 2408b8e80941Smrg .CommandType = 3 2409b8e80941Smrg 2410b8e80941Smrgstruct GEN5_CS_URB_STATE { 2411b8e80941Smrg uint32_t DWordLength; 2412b8e80941Smrg uint32_t _3DCommandSubOpcode; 2413b8e80941Smrg uint32_t _3DCommandOpcode; 2414b8e80941Smrg uint32_t CommandSubType; 2415b8e80941Smrg uint32_t CommandType; 2416b8e80941Smrg uint32_t NumberofURBEntries; 2417b8e80941Smrg uint32_t URBEntryAllocationSize; 2418b8e80941Smrg}; 2419b8e80941Smrg 2420b8e80941Smrgstatic inline void 2421b8e80941SmrgGEN5_CS_URB_STATE_pack(__attribute__((unused)) __gen_user_data *data, 2422b8e80941Smrg __attribute__((unused)) void * restrict dst, 2423b8e80941Smrg __attribute__((unused)) const struct GEN5_CS_URB_STATE * restrict values) 2424b8e80941Smrg{ 2425b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2426b8e80941Smrg 2427b8e80941Smrg dw[0] = 2428b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2429b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2430b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2431b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2432b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2433b8e80941Smrg 2434b8e80941Smrg dw[1] = 2435b8e80941Smrg __gen_uint(values->NumberofURBEntries, 0, 2) | 2436b8e80941Smrg __gen_uint(values->URBEntryAllocationSize, 4, 8); 2437b8e80941Smrg} 2438b8e80941Smrg 2439b8e80941Smrg#define GEN5_MI_FLUSH_length 1 2440b8e80941Smrg#define GEN5_MI_FLUSH_length_bias 1 2441b8e80941Smrg#define GEN5_MI_FLUSH_header \ 2442b8e80941Smrg .MICommandOpcode = 4, \ 2443b8e80941Smrg .CommandType = 0 2444b8e80941Smrg 2445b8e80941Smrgstruct GEN5_MI_FLUSH { 2446b8e80941Smrg uint32_t StateInstructionCacheInvalidate; 2447b8e80941Smrg#define DontInvalidate 0 2448b8e80941Smrg#define Invalidate 1 2449b8e80941Smrg uint32_t RenderCacheFlushInhibit; 2450b8e80941Smrg#define Flush 0 2451b8e80941Smrg#define DontFlush 1 2452b8e80941Smrg uint32_t GlobalSnapshotCountReset; 2453b8e80941Smrg#define DontReset 0 2454b8e80941Smrg#define Reset 1 2455b8e80941Smrg bool GenericMediaStateClear; 2456b8e80941Smrg bool IndirectStatePointersDisable; 2457b8e80941Smrg bool ProtectedMemoryEnable; 2458b8e80941Smrg uint32_t MICommandOpcode; 2459b8e80941Smrg uint32_t CommandType; 2460b8e80941Smrg}; 2461b8e80941Smrg 2462b8e80941Smrgstatic inline void 2463b8e80941SmrgGEN5_MI_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 2464b8e80941Smrg __attribute__((unused)) void * restrict dst, 2465b8e80941Smrg __attribute__((unused)) const struct GEN5_MI_FLUSH * restrict values) 2466b8e80941Smrg{ 2467b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2468b8e80941Smrg 2469b8e80941Smrg dw[0] = 2470b8e80941Smrg __gen_uint(values->StateInstructionCacheInvalidate, 1, 1) | 2471b8e80941Smrg __gen_uint(values->RenderCacheFlushInhibit, 2, 2) | 2472b8e80941Smrg __gen_uint(values->GlobalSnapshotCountReset, 3, 3) | 2473b8e80941Smrg __gen_uint(values->GenericMediaStateClear, 4, 4) | 2474b8e80941Smrg __gen_uint(values->IndirectStatePointersDisable, 5, 5) | 2475b8e80941Smrg __gen_uint(values->ProtectedMemoryEnable, 6, 6) | 2476b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 2477b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2478b8e80941Smrg} 2479b8e80941Smrg 2480b8e80941Smrg#define GEN5_MI_LOAD_REGISTER_IMM_length 3 2481b8e80941Smrg#define GEN5_MI_LOAD_REGISTER_IMM_length_bias 2 2482b8e80941Smrg#define GEN5_MI_LOAD_REGISTER_IMM_header \ 2483b8e80941Smrg .DWordLength = 1, \ 2484b8e80941Smrg .MICommandOpcode = 34, \ 2485b8e80941Smrg .CommandType = 0 2486b8e80941Smrg 2487b8e80941Smrgstruct GEN5_MI_LOAD_REGISTER_IMM { 2488b8e80941Smrg uint32_t DWordLength; 2489b8e80941Smrg uint32_t ByteWriteDisables; 2490b8e80941Smrg uint32_t MICommandOpcode; 2491b8e80941Smrg uint32_t CommandType; 2492b8e80941Smrg uint64_t RegisterOffset; 2493b8e80941Smrg uint32_t DataDWord; 2494b8e80941Smrg /* variable length fields follow */ 2495b8e80941Smrg}; 2496b8e80941Smrg 2497b8e80941Smrgstatic inline void 2498b8e80941SmrgGEN5_MI_LOAD_REGISTER_IMM_pack(__attribute__((unused)) __gen_user_data *data, 2499b8e80941Smrg __attribute__((unused)) void * restrict dst, 2500b8e80941Smrg __attribute__((unused)) const struct GEN5_MI_LOAD_REGISTER_IMM * restrict values) 2501b8e80941Smrg{ 2502b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2503b8e80941Smrg 2504b8e80941Smrg dw[0] = 2505b8e80941Smrg __gen_uint(values->DWordLength, 0, 5) | 2506b8e80941Smrg __gen_uint(values->ByteWriteDisables, 8, 11) | 2507b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 2508b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2509b8e80941Smrg 2510b8e80941Smrg dw[1] = 2511b8e80941Smrg __gen_offset(values->RegisterOffset, 2, 31); 2512b8e80941Smrg 2513b8e80941Smrg dw[2] = 2514b8e80941Smrg __gen_uint(values->DataDWord, 0, 31); 2515b8e80941Smrg} 2516b8e80941Smrg 2517b8e80941Smrg#define GEN5_MI_STORE_DATA_IMM_length 5 2518b8e80941Smrg#define GEN5_MI_STORE_DATA_IMM_length_bias 2 2519b8e80941Smrg#define GEN5_MI_STORE_DATA_IMM_header \ 2520b8e80941Smrg .DWordLength = 2, \ 2521b8e80941Smrg .MICommandOpcode = 32, \ 2522b8e80941Smrg .CommandType = 0 2523b8e80941Smrg 2524b8e80941Smrgstruct GEN5_MI_STORE_DATA_IMM { 2525b8e80941Smrg uint32_t DWordLength; 2526b8e80941Smrg bool MemoryAddressType; 2527b8e80941Smrg uint32_t MICommandOpcode; 2528b8e80941Smrg uint32_t CommandType; 2529b8e80941Smrg __gen_address_type PhysicalStartAddressExtension; 2530b8e80941Smrg __gen_address_type Address; 2531b8e80941Smrg uint32_t DataDWord0; 2532b8e80941Smrg uint32_t DataDWord1; 2533b8e80941Smrg}; 2534b8e80941Smrg 2535b8e80941Smrgstatic inline void 2536b8e80941SmrgGEN5_MI_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 2537b8e80941Smrg __attribute__((unused)) void * restrict dst, 2538b8e80941Smrg __attribute__((unused)) const struct GEN5_MI_STORE_DATA_IMM * restrict values) 2539b8e80941Smrg{ 2540b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2541b8e80941Smrg 2542b8e80941Smrg dw[0] = 2543b8e80941Smrg __gen_uint(values->DWordLength, 0, 5) | 2544b8e80941Smrg __gen_uint(values->MemoryAddressType, 22, 22) | 2545b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 2546b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2547b8e80941Smrg 2548b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->PhysicalStartAddressExtension, 0); 2549b8e80941Smrg 2550b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->Address, 0); 2551b8e80941Smrg 2552b8e80941Smrg dw[3] = 2553b8e80941Smrg __gen_uint(values->DataDWord0, 0, 31); 2554b8e80941Smrg 2555b8e80941Smrg dw[4] = 2556b8e80941Smrg __gen_uint(values->DataDWord1, 0, 31); 2557b8e80941Smrg} 2558b8e80941Smrg 2559b8e80941Smrg#define GEN5_MI_STORE_REGISTER_MEM_length 3 2560b8e80941Smrg#define GEN5_MI_STORE_REGISTER_MEM_length_bias 2 2561b8e80941Smrg#define GEN5_MI_STORE_REGISTER_MEM_header \ 2562b8e80941Smrg .DWordLength = 1, \ 2563b8e80941Smrg .MICommandOpcode = 36, \ 2564b8e80941Smrg .CommandType = 0 2565b8e80941Smrg 2566b8e80941Smrgstruct GEN5_MI_STORE_REGISTER_MEM { 2567b8e80941Smrg uint32_t DWordLength; 2568b8e80941Smrg bool UseGlobalGTT; 2569b8e80941Smrg uint32_t MICommandOpcode; 2570b8e80941Smrg uint32_t CommandType; 2571b8e80941Smrg uint64_t RegisterAddress; 2572b8e80941Smrg __gen_address_type MemoryAddress; 2573b8e80941Smrg}; 2574b8e80941Smrg 2575b8e80941Smrgstatic inline void 2576b8e80941SmrgGEN5_MI_STORE_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 2577b8e80941Smrg __attribute__((unused)) void * restrict dst, 2578b8e80941Smrg __attribute__((unused)) const struct GEN5_MI_STORE_REGISTER_MEM * restrict values) 2579b8e80941Smrg{ 2580b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2581b8e80941Smrg 2582b8e80941Smrg dw[0] = 2583b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2584b8e80941Smrg __gen_uint(values->UseGlobalGTT, 22, 22) | 2585b8e80941Smrg __gen_uint(values->MICommandOpcode, 23, 28) | 2586b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2587b8e80941Smrg 2588b8e80941Smrg dw[1] = 2589b8e80941Smrg __gen_offset(values->RegisterAddress, 2, 25); 2590b8e80941Smrg 2591b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 2592b8e80941Smrg} 2593b8e80941Smrg 2594b8e80941Smrg#define GEN5_PIPELINE_SELECT_length 1 2595b8e80941Smrg#define GEN5_PIPELINE_SELECT_length_bias 1 2596b8e80941Smrg#define GEN5_PIPELINE_SELECT_header \ 2597b8e80941Smrg ._3DCommandSubOpcode = 4, \ 2598b8e80941Smrg ._3DCommandOpcode = 1, \ 2599b8e80941Smrg .CommandSubType = 1, \ 2600b8e80941Smrg .CommandType = 3 2601b8e80941Smrg 2602b8e80941Smrgstruct GEN5_PIPELINE_SELECT { 2603b8e80941Smrg uint32_t PipelineSelection; 2604b8e80941Smrg#define _3D 0 2605b8e80941Smrg#define Media 1 2606b8e80941Smrg#define GPGPU 2 2607b8e80941Smrg uint32_t _3DCommandSubOpcode; 2608b8e80941Smrg uint32_t _3DCommandOpcode; 2609b8e80941Smrg uint32_t CommandSubType; 2610b8e80941Smrg uint32_t CommandType; 2611b8e80941Smrg}; 2612b8e80941Smrg 2613b8e80941Smrgstatic inline void 2614b8e80941SmrgGEN5_PIPELINE_SELECT_pack(__attribute__((unused)) __gen_user_data *data, 2615b8e80941Smrg __attribute__((unused)) void * restrict dst, 2616b8e80941Smrg __attribute__((unused)) const struct GEN5_PIPELINE_SELECT * restrict values) 2617b8e80941Smrg{ 2618b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2619b8e80941Smrg 2620b8e80941Smrg dw[0] = 2621b8e80941Smrg __gen_uint(values->PipelineSelection, 0, 1) | 2622b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2623b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2624b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2625b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2626b8e80941Smrg} 2627b8e80941Smrg 2628b8e80941Smrg#define GEN5_PIPE_CONTROL_length 4 2629b8e80941Smrg#define GEN5_PIPE_CONTROL_length_bias 2 2630b8e80941Smrg#define GEN5_PIPE_CONTROL_header \ 2631b8e80941Smrg .DWordLength = 2, \ 2632b8e80941Smrg ._3DCommandSubOpcode = 0, \ 2633b8e80941Smrg ._3DCommandOpcode = 2, \ 2634b8e80941Smrg .CommandSubType = 3, \ 2635b8e80941Smrg .CommandType = 3 2636b8e80941Smrg 2637b8e80941Smrgstruct GEN5_PIPE_CONTROL { 2638b8e80941Smrg uint32_t DWordLength; 2639b8e80941Smrg bool NotifyEnable; 2640b8e80941Smrg bool IndirectStatePointersDisable; 2641b8e80941Smrg bool TextureCacheFlushEnable; 2642b8e80941Smrg bool InstructionCacheInvalidateEnable; 2643b8e80941Smrg bool WriteCacheFlush; 2644b8e80941Smrg bool DepthStallEnable; 2645b8e80941Smrg uint32_t PostSyncOperation; 2646b8e80941Smrg#define NoWrite 0 2647b8e80941Smrg#define WriteImmediateData 1 2648b8e80941Smrg#define WritePSDepthCount 2 2649b8e80941Smrg#define WriteTimestamp 3 2650b8e80941Smrg uint32_t _3DCommandSubOpcode; 2651b8e80941Smrg uint32_t _3DCommandOpcode; 2652b8e80941Smrg uint32_t CommandSubType; 2653b8e80941Smrg uint32_t CommandType; 2654b8e80941Smrg uint32_t DepthCacheFlushInhibit; 2655b8e80941Smrg#define Flushed 0 2656b8e80941Smrg#define NotFlushed 1 2657b8e80941Smrg bool StallAtPixelScoreboard; 2658b8e80941Smrg uint32_t DestinationAddressType; 2659b8e80941Smrg#define DAT_PGTT 0 2660b8e80941Smrg#define DAT_GGTT 1 2661b8e80941Smrg __gen_address_type Address; 2662b8e80941Smrg uint64_t ImmediateData; 2663b8e80941Smrg}; 2664b8e80941Smrg 2665b8e80941Smrgstatic inline void 2666b8e80941SmrgGEN5_PIPE_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 2667b8e80941Smrg __attribute__((unused)) void * restrict dst, 2668b8e80941Smrg __attribute__((unused)) const struct GEN5_PIPE_CONTROL * restrict values) 2669b8e80941Smrg{ 2670b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2671b8e80941Smrg 2672b8e80941Smrg dw[0] = 2673b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2674b8e80941Smrg __gen_uint(values->NotifyEnable, 8, 8) | 2675b8e80941Smrg __gen_uint(values->IndirectStatePointersDisable, 9, 9) | 2676b8e80941Smrg __gen_uint(values->TextureCacheFlushEnable, 10, 10) | 2677b8e80941Smrg __gen_uint(values->InstructionCacheInvalidateEnable, 11, 11) | 2678b8e80941Smrg __gen_uint(values->WriteCacheFlush, 12, 12) | 2679b8e80941Smrg __gen_uint(values->DepthStallEnable, 13, 13) | 2680b8e80941Smrg __gen_uint(values->PostSyncOperation, 14, 15) | 2681b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2682b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2683b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2684b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2685b8e80941Smrg 2686b8e80941Smrg const uint32_t v1 = 2687b8e80941Smrg __gen_uint(values->DepthCacheFlushInhibit, 0, 0) | 2688b8e80941Smrg __gen_uint(values->StallAtPixelScoreboard, 1, 1) | 2689b8e80941Smrg __gen_uint(values->DestinationAddressType, 2, 2); 2690b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->Address, v1); 2691b8e80941Smrg 2692b8e80941Smrg const uint64_t v2 = 2693b8e80941Smrg __gen_uint(values->ImmediateData, 0, 63); 2694b8e80941Smrg dw[2] = v2; 2695b8e80941Smrg dw[3] = v2 >> 32; 2696b8e80941Smrg} 2697b8e80941Smrg 2698b8e80941Smrg#define GEN5_STATE_BASE_ADDRESS_length 8 2699b8e80941Smrg#define GEN5_STATE_BASE_ADDRESS_length_bias 2 2700b8e80941Smrg#define GEN5_STATE_BASE_ADDRESS_header \ 2701b8e80941Smrg .DWordLength = 6, \ 2702b8e80941Smrg ._3DCommandSubOpcode = 1, \ 2703b8e80941Smrg ._3DCommandOpcode = 1, \ 2704b8e80941Smrg .CommandSubType = 0, \ 2705b8e80941Smrg .CommandType = 3 2706b8e80941Smrg 2707b8e80941Smrgstruct GEN5_STATE_BASE_ADDRESS { 2708b8e80941Smrg uint32_t DWordLength; 2709b8e80941Smrg uint32_t _3DCommandSubOpcode; 2710b8e80941Smrg uint32_t _3DCommandOpcode; 2711b8e80941Smrg uint32_t CommandSubType; 2712b8e80941Smrg uint32_t CommandType; 2713b8e80941Smrg bool GeneralStateBaseAddressModifyEnable; 2714b8e80941Smrg __gen_address_type GeneralStateBaseAddress; 2715b8e80941Smrg bool SurfaceStateBaseAddressModifyEnable; 2716b8e80941Smrg __gen_address_type SurfaceStateBaseAddress; 2717b8e80941Smrg bool IndirectObjectBaseAddressModifyEnable; 2718b8e80941Smrg __gen_address_type IndirectObjectBaseAddress; 2719b8e80941Smrg bool InstructionBaseAddressModifyEnable; 2720b8e80941Smrg __gen_address_type InstructionBaseAddress; 2721b8e80941Smrg bool GeneralStateAccessUpperBoundModifyEnable; 2722b8e80941Smrg __gen_address_type GeneralStateAccessUpperBound; 2723b8e80941Smrg bool IndirectObjectAccessUpperBoundModifyEnable; 2724b8e80941Smrg __gen_address_type IndirectObjectAccessUpperBound; 2725b8e80941Smrg bool InstructionAccessUpperBoundModifyEnable; 2726b8e80941Smrg __gen_address_type InstructionAccessUpperBound; 2727b8e80941Smrg}; 2728b8e80941Smrg 2729b8e80941Smrgstatic inline void 2730b8e80941SmrgGEN5_STATE_BASE_ADDRESS_pack(__attribute__((unused)) __gen_user_data *data, 2731b8e80941Smrg __attribute__((unused)) void * restrict dst, 2732b8e80941Smrg __attribute__((unused)) const struct GEN5_STATE_BASE_ADDRESS * restrict values) 2733b8e80941Smrg{ 2734b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2735b8e80941Smrg 2736b8e80941Smrg dw[0] = 2737b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2738b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2739b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2740b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2741b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2742b8e80941Smrg 2743b8e80941Smrg const uint32_t v1 = 2744b8e80941Smrg __gen_uint(values->GeneralStateBaseAddressModifyEnable, 0, 0); 2745b8e80941Smrg dw[1] = __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, v1); 2746b8e80941Smrg 2747b8e80941Smrg const uint32_t v2 = 2748b8e80941Smrg __gen_uint(values->SurfaceStateBaseAddressModifyEnable, 0, 0); 2749b8e80941Smrg dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, v2); 2750b8e80941Smrg 2751b8e80941Smrg const uint32_t v3 = 2752b8e80941Smrg __gen_uint(values->IndirectObjectBaseAddressModifyEnable, 0, 0); 2753b8e80941Smrg dw[3] = __gen_combine_address(data, &dw[3], values->IndirectObjectBaseAddress, v3); 2754b8e80941Smrg 2755b8e80941Smrg const uint32_t v4 = 2756b8e80941Smrg __gen_uint(values->InstructionBaseAddressModifyEnable, 0, 0); 2757b8e80941Smrg dw[4] = __gen_combine_address(data, &dw[4], values->InstructionBaseAddress, v4); 2758b8e80941Smrg 2759b8e80941Smrg const uint32_t v5 = 2760b8e80941Smrg __gen_uint(values->GeneralStateAccessUpperBoundModifyEnable, 0, 0); 2761b8e80941Smrg dw[5] = __gen_combine_address(data, &dw[5], values->GeneralStateAccessUpperBound, v5); 2762b8e80941Smrg 2763b8e80941Smrg const uint32_t v6 = 2764b8e80941Smrg __gen_uint(values->IndirectObjectAccessUpperBoundModifyEnable, 0, 0); 2765b8e80941Smrg dw[6] = __gen_combine_address(data, &dw[6], values->IndirectObjectAccessUpperBound, v6); 2766b8e80941Smrg 2767b8e80941Smrg const uint32_t v7 = 2768b8e80941Smrg __gen_uint(values->InstructionAccessUpperBoundModifyEnable, 0, 0); 2769b8e80941Smrg dw[7] = __gen_combine_address(data, &dw[7], values->InstructionAccessUpperBound, v7); 2770b8e80941Smrg} 2771b8e80941Smrg 2772b8e80941Smrg#define GEN5_STATE_SIP_length 2 2773b8e80941Smrg#define GEN5_STATE_SIP_length_bias 2 2774b8e80941Smrg#define GEN5_STATE_SIP_header \ 2775b8e80941Smrg .DWordLength = 0, \ 2776b8e80941Smrg ._3DCommandSubOpcode = 2, \ 2777b8e80941Smrg ._3DCommandOpcode = 1, \ 2778b8e80941Smrg .CommandSubType = 0, \ 2779b8e80941Smrg .CommandType = 3 2780b8e80941Smrg 2781b8e80941Smrgstruct GEN5_STATE_SIP { 2782b8e80941Smrg uint32_t DWordLength; 2783b8e80941Smrg uint32_t _3DCommandSubOpcode; 2784b8e80941Smrg uint32_t _3DCommandOpcode; 2785b8e80941Smrg uint32_t CommandSubType; 2786b8e80941Smrg uint32_t CommandType; 2787b8e80941Smrg uint64_t SystemInstructionPointer; 2788b8e80941Smrg}; 2789b8e80941Smrg 2790b8e80941Smrgstatic inline void 2791b8e80941SmrgGEN5_STATE_SIP_pack(__attribute__((unused)) __gen_user_data *data, 2792b8e80941Smrg __attribute__((unused)) void * restrict dst, 2793b8e80941Smrg __attribute__((unused)) const struct GEN5_STATE_SIP * restrict values) 2794b8e80941Smrg{ 2795b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2796b8e80941Smrg 2797b8e80941Smrg dw[0] = 2798b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2799b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2800b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2801b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2802b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2803b8e80941Smrg 2804b8e80941Smrg dw[1] = 2805b8e80941Smrg __gen_offset(values->SystemInstructionPointer, 4, 31); 2806b8e80941Smrg} 2807b8e80941Smrg 2808b8e80941Smrg#define GEN5_URB_FENCE_length 3 2809b8e80941Smrg#define GEN5_URB_FENCE_length_bias 2 2810b8e80941Smrg#define GEN5_URB_FENCE_header \ 2811b8e80941Smrg .DWordLength = 1, \ 2812b8e80941Smrg ._3DCommandSubOpcode = 0, \ 2813b8e80941Smrg ._3DCommandOpcode = 0, \ 2814b8e80941Smrg .CommandSubType = 0, \ 2815b8e80941Smrg .CommandType = 3 2816b8e80941Smrg 2817b8e80941Smrgstruct GEN5_URB_FENCE { 2818b8e80941Smrg uint32_t DWordLength; 2819b8e80941Smrg bool VSUnitURBReallocationRequest; 2820b8e80941Smrg bool GSUnitURBReallocationRequest; 2821b8e80941Smrg bool CLIPUnitURBReallocationRequest; 2822b8e80941Smrg bool SFUnitURBReallocationRequest; 2823b8e80941Smrg bool VFEUnitURBReallocationRequest; 2824b8e80941Smrg bool CSUnitURBReallocationRequest; 2825b8e80941Smrg uint32_t _3DCommandSubOpcode; 2826b8e80941Smrg uint32_t _3DCommandOpcode; 2827b8e80941Smrg uint32_t CommandSubType; 2828b8e80941Smrg uint32_t CommandType; 2829b8e80941Smrg uint32_t VSFence; 2830b8e80941Smrg uint32_t GSFence; 2831b8e80941Smrg uint32_t CLIPFence; 2832b8e80941Smrg uint32_t SFFence; 2833b8e80941Smrg uint32_t VFEFence; 2834b8e80941Smrg uint32_t CSFence; 2835b8e80941Smrg}; 2836b8e80941Smrg 2837b8e80941Smrgstatic inline void 2838b8e80941SmrgGEN5_URB_FENCE_pack(__attribute__((unused)) __gen_user_data *data, 2839b8e80941Smrg __attribute__((unused)) void * restrict dst, 2840b8e80941Smrg __attribute__((unused)) const struct GEN5_URB_FENCE * restrict values) 2841b8e80941Smrg{ 2842b8e80941Smrg uint32_t * restrict dw = (uint32_t * restrict) dst; 2843b8e80941Smrg 2844b8e80941Smrg dw[0] = 2845b8e80941Smrg __gen_uint(values->DWordLength, 0, 7) | 2846b8e80941Smrg __gen_uint(values->VSUnitURBReallocationRequest, 8, 8) | 2847b8e80941Smrg __gen_uint(values->GSUnitURBReallocationRequest, 9, 9) | 2848b8e80941Smrg __gen_uint(values->CLIPUnitURBReallocationRequest, 10, 10) | 2849b8e80941Smrg __gen_uint(values->SFUnitURBReallocationRequest, 11, 11) | 2850b8e80941Smrg __gen_uint(values->VFEUnitURBReallocationRequest, 12, 12) | 2851b8e80941Smrg __gen_uint(values->CSUnitURBReallocationRequest, 13, 13) | 2852b8e80941Smrg __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2853b8e80941Smrg __gen_uint(values->_3DCommandOpcode, 24, 26) | 2854b8e80941Smrg __gen_uint(values->CommandSubType, 27, 28) | 2855b8e80941Smrg __gen_uint(values->CommandType, 29, 31); 2856b8e80941Smrg 2857b8e80941Smrg dw[1] = 2858b8e80941Smrg __gen_uint(values->VSFence, 0, 9) | 2859b8e80941Smrg __gen_uint(values->GSFence, 10, 19) | 2860b8e80941Smrg __gen_uint(values->CLIPFence, 20, 29); 2861b8e80941Smrg 2862b8e80941Smrg dw[2] = 2863b8e80941Smrg __gen_uint(values->SFFence, 0, 9) | 2864b8e80941Smrg __gen_uint(values->VFEFence, 10, 19) | 2865b8e80941Smrg __gen_uint(values->CSFence, 20, 30); 2866b8e80941Smrg} 2867b8e80941Smrg 2868b8e80941Smrg#endif /* GEN5_PACK_H */ 2869