17ec681f3Smrg.. _screen: 27ec681f3Smrg 37ec681f3SmrgScreen 47ec681f3Smrg====== 57ec681f3Smrg 67ec681f3SmrgA screen is an object representing the context-independent part of a device. 77ec681f3Smrg 87ec681f3SmrgFlags and enumerations 97ec681f3Smrg---------------------- 107ec681f3Smrg 117ec681f3SmrgXXX some of these don't belong in this section. 127ec681f3Smrg 137ec681f3Smrg 147ec681f3Smrg.. _pipe_cap: 157ec681f3Smrg 167ec681f3SmrgPIPE_CAP_* 177ec681f3Smrg^^^^^^^^^^ 187ec681f3Smrg 197ec681f3SmrgCapability queries return information about the features and limits of the 207ec681f3Smrgdriver/GPU. For floating-point values, use :ref:`get_paramf`, and for boolean 217ec681f3Smrgor integer values, use :ref:`get_param`. 227ec681f3Smrg 237ec681f3SmrgThe integer capabilities: 247ec681f3Smrg 257ec681f3Smrg* ``PIPE_CAP_GRAPHICS``: Whether graphics is supported. If not, contexts can 267ec681f3Smrg only be created with PIPE_CONTEXT_COMPUTE_ONLY. 277ec681f3Smrg* ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes, 287ec681f3Smrg normalized coordinates, and mipmaps. 297ec681f3Smrg* ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support. 307ec681f3Smrg :ref:`Blend` for more information. 317ec681f3Smrg* ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically. 327ec681f3Smrg* ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available. 337ec681f3Smrg* ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be 347ec681f3Smrg bound. 357ec681f3Smrg* ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available. 367ec681f3Smrg* ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available. 377ec681f3Smrg* ``PIPE_CAP_TEXTURE_SHADOW_MAP``: indicates whether the fragment shader hardware 387ec681f3Smrg can do the depth texture / Z comparison operation in TEX instructions 397ec681f3Smrg for shadow testing. 407ec681f3Smrg* ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is 417ec681f3Smrg supported. 427ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_2D_SIZE``: The maximum size of 2D (and 1D) textures. 437ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available 447ec681f3Smrg for a 3D texture. 457ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available 467ec681f3Smrg for a cubemap. 477ec681f3Smrg* ``PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE``: Whether mirrored texture coordinates are 487ec681f3Smrg supported with the clamp-to-edge wrap mode. 497ec681f3Smrg* ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates are supported 507ec681f3Smrg with clamp or clamp-to-border wrap modes. 517ec681f3Smrg* ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different 527ec681f3Smrg from color blend equations, in :ref:`Blend` state. 537ec681f3Smrg* ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers. 547ec681f3Smrg* ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported. 557ec681f3Smrg* ``PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX``: Subset of 567ec681f3Smrg PRIMITIVE_RESTART where the restart index is always the fixed maximum 577ec681f3Smrg value for the index type. 587ec681f3Smrg* ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel 597ec681f3Smrg masks are supported. If 0, then the first rendertarget's blend mask is 607ec681f3Smrg replicated across all MRTs. 617ec681f3Smrg* ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are 627ec681f3Smrg available. If 0, then the first rendertarget's blend functions affect all 637ec681f3Smrg MRTs. 647ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array 657ec681f3Smrg layers supported. If 0, the array textures are not supported at all and 667ec681f3Smrg the ARRAY texture targets are invalid. 677ec681f3Smrg* ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property 687ec681f3Smrg FS_COORD_ORIGIN with value UPPER_LEFT is supported. 697ec681f3Smrg* ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property 707ec681f3Smrg FS_COORD_ORIGIN with value LOWER_LEFT is supported. 717ec681f3Smrg* ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI 727ec681f3Smrg property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported. 737ec681f3Smrg* ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI 747ec681f3Smrg property FS_COORD_PIXEL_CENTER with value INTEGER is supported. 757ec681f3Smrg* ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling 767ec681f3Smrg depth clipping (=1) (through pipe_rasterizer_state) or supports lowering 777ec681f3Smrg depth_clamp in the client shader code (=2), for this the driver must 787ec681f3Smrg currently use TGSI. 797ec681f3Smrg* ``PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE``: Whether the driver is capable of 807ec681f3Smrg disabling depth clipping (through pipe_rasterizer_state) separately for 817ec681f3Smrg the near and far plane. If not, depth_clip_near and depth_clip_far will be 827ec681f3Smrg equal. 837ec681f3Smrg ``PIPE_CAP_DEPTH_CLAMP_ENABLE``: Whether the driver is capable of 847ec681f3Smrg enabling depth clamping (through pipe_rasterizer_state) separately from depth 857ec681f3Smrg clipping. If not, depth_clamp will be the inverse of depth_clip_far. 867ec681f3Smrg* ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be 877ec681f3Smrg written from a fragment shader. 887ec681f3Smrg* ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported 897ec681f3Smrg in the vertex shader. 907ec681f3Smrg* ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports 917ec681f3Smrg per-instance vertex attribs. 927ec681f3Smrg* ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is 937ec681f3Smrg supported. That is, is the pipe_rasterizer_state::clamp_fragment_color 947ec681f3Smrg flag supported by the driver? If not, gallium frontends will insert 957ec681f3Smrg clamping code into the fragment shaders when needed. 967ec681f3Smrg 977ec681f3Smrg* ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are 987ec681f3Smrg supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp. 997ec681f3Smrg* ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of 1007ec681f3Smrg outputting unclamped vertex colors from a vertex shader. If unsupported, 1017ec681f3Smrg the vertex colors are always clamped. This is the default for DX9 hardware. 1027ec681f3Smrg* ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of 1037ec681f3Smrg clamping vertex colors when they come out of a vertex shader, as specified 1047ec681f3Smrg by the pipe_rasterizer_state::clamp_vertex_color flag. If unsupported, 1057ec681f3Smrg the vertex colors are never clamped. This is the default for DX10 hardware. 1067ec681f3Smrg If both clamped and unclamped CAPs are supported, the clamping can be 1077ec681f3Smrg controlled through pipe_rasterizer_state. If the driver cannot do vertex 1087ec681f3Smrg color clamping, gallium frontends may insert clamping code into the vertex 1097ec681f3Smrg shader. 1107ec681f3Smrg* ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features 1117ec681f3Smrg equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130. 1127ec681f3Smrg* ``PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY``: Whether the driver supports 1137ec681f3Smrg features equivalent to a specific GLSL version including all legacy OpenGL 1147ec681f3Smrg features only present in the OpenGL compatibility profile. 1157ec681f3Smrg The only legacy features that Gallium drivers must implement are 1167ec681f3Smrg the legacy shader inputs and outputs (colors, texcoords, fog, clipvertex, 1177ec681f3Smrg edgeflag). 1187ec681f3Smrg* ``PIPE_CAP_ESSL_FEATURE_LEVEL``: An optional cap to allow drivers to 1197ec681f3Smrg report a higher GLSL version for GLES contexts. This is useful when a 1207ec681f3Smrg driver does not support all the required features for a higher GL version, 1217ec681f3Smrg but does support the required features for a higher GLES version. A driver 1227ec681f3Smrg is allowed to return ``0`` in which case ``PIPE_CAP_GLSL_FEATURE_LEVEL`` is 1237ec681f3Smrg used. 1247ec681f3Smrg Note that simply returning the same value as the GLSL feature level cap is 1257ec681f3Smrg incorrect. For example, GLSL version 3.30 does not require ``ARB_gpu_shader5``, 1267ec681f3Smrg but ESSL version 3.20 es does require ``EXT_gpu_shader5`` 1277ec681f3Smrg* ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to 1287ec681f3Smrg the flatshade_first setting in ``pipe_rasterizer_state``. 1297ec681f3Smrg* ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex 1307ec681f3Smrg buffers. If not, gallium frontends must upload all data which is not in hw 1317ec681f3Smrg resources. If user-space buffers are supported, the driver must also still 1327ec681f3Smrg accept HW resource buffers. 1337ec681f3Smrg* ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw 1347ec681f3Smrg limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned 1357ec681f3Smrg to 4. If false, there are no restrictions on the offset. 1367ec681f3Smrg* ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw 1377ec681f3Smrg limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4. 1387ec681f3Smrg If false, there are no restrictions on the stride. 1397ec681f3Smrg* ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes 1407ec681f3Smrg a hw limitation. If true, pipe_vertex_element::src_offset must always be 1417ec681f3Smrg aligned to 4. If false, there are no restrictions on src_offset. 1427ec681f3Smrg* ``PIPE_CAP_COMPUTE``: Whether the implementation supports the 1437ec681f3Smrg compute entry points defined in pipe_context and pipe_screen. 1447ec681f3Smrg* ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required 1457ec681f3Smrg alignment of pipe_constant_buffer::buffer_offset. 1467ec681f3Smrg* ``PIPE_CAP_START_INSTANCE``: Whether the driver supports 1477ec681f3Smrg pipe_draw_info::start_instance. 1487ec681f3Smrg* ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and 1497ec681f3Smrg the pipe_screen::get_timestamp hook are implemented. 1507ec681f3Smrg* ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported 1517ec681f3Smrg for rendering are also supported for texturing. 1527ec681f3Smrg* ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be 1537ec681f3Smrg expected for a pointer returned by transfer_map if the resource is 1547ec681f3Smrg PIPE_BUFFER. In other words, the pointer returned by transfer_map is 1557ec681f3Smrg always aligned to this value. 1567ec681f3Smrg* ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required 1577ec681f3Smrg alignment for pipe_sampler_view::u.buf.offset, in bytes. 1587ec681f3Smrg If a driver does not support offset/size, it should return 0. 1597ec681f3Smrg* ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only 1607ec681f3Smrg supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views. 1617ec681f3Smrg When this is the case it should be assumed that the swizzle parameters 1627ec681f3Smrg in the sampler view have no effect. 1637ec681f3Smrg* ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation. 1647ec681f3Smrg If true, the hardware cannot replace arbitrary shader inputs with sprite 1657ec681f3Smrg coordinates and hence the inputs that are desired to be replaceable must 1667ec681f3Smrg be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC. 1677ec681f3Smrg The rasterizer's sprite_coord_enable state therefore also applies to the 1687ec681f3Smrg TEXCOORD semantic. 1697ec681f3Smrg Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader 1707ec681f3Smrg input that will always be replaced with sprite coordinates. 1717ec681f3Smrg* ``PIPE_CAP_TEXTURE_BUFFER_SAMPLER``: Whether a sampler should still 1727ec681f3Smrg be used for PIPE_BUFFER resources (normally a sampler is only used 1737ec681f3Smrg if the texture target is PIPE_TEXTURE_*). 1747ec681f3Smrg* ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable 1757ec681f3Smrg to use a blit to implement a texture transfer which needs format conversions 1767ec681f3Smrg and swizzling in gallium frontends. Generally, all hardware drivers with 1777ec681f3Smrg dedicated memory should return 1 and all software rasterizers should return 0. 1787ec681f3Smrg* ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS 1797ec681f3Smrg is supported. 1807ec681f3Smrg* ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special 1817ec681f3Smrg considerations have to be given to the interaction between the border color 1827ec681f3Smrg in the sampler object and the sampler view used with it. 1837ec681f3Smrg If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color 1847ec681f3Smrg may be affected in undefined ways for any kind of permutational swizzle 1857ec681f3Smrg (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively) 1867ec681f3Smrg in the sampler view. 1877ec681f3Smrg If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color 1887ec681f3Smrg state should be swizzled manually according to the swizzle in the sampler 1897ec681f3Smrg view it is intended to be used with, or herein undefined results may occur 1907ec681f3Smrg for permutational swizzles. 1917ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with 1927ec681f3Smrg a buffer sampler view, in texels. 1937ec681f3Smrg* ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors 1947ec681f3Smrg since they are linked) a driver can support. Returning 0 is equivalent 1957ec681f3Smrg to returning 1 because every driver has to support at least a single 1967ec681f3Smrg viewport/scissor combination. 1977ec681f3Smrg* ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either 1987ec681f3Smrg PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE. 1997ec681f3Smrg* ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have 2007ec681f3Smrg different sizes for fb color/zs attachments. This controls whether 2017ec681f3Smrg ARB_framebuffer_object is provided. 2027ec681f3Smrg* ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and 2037ec681f3Smrg ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader 2047ec681f3Smrg outputs. Note that the viewport will only be used if multiple viewports are 2057ec681f3Smrg exposed. 2067ec681f3Smrg* ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices 2077ec681f3Smrg output by a single invocation of a geometry shader. 2087ec681f3Smrg* ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of 2097ec681f3Smrg vertex components output by a single invocation of a geometry shader. 2107ec681f3Smrg This is the product of the number of attribute components per vertex and 2117ec681f3Smrg the number of output vertices. 2127ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components 2137ec681f3Smrg in format that texture gather can operate on. 1 == RED, ALPHA etc, 2147ec681f3Smrg 4 == All formats. 2157ec681f3Smrg* ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather 2167ec681f3Smrg hardware implements the SM5 features, component selection, 2177ec681f3Smrg shadow comparison, and run-time offsets. 2187ec681f3Smrg* ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether 2197ec681f3Smrg PIPE_MAP_PERSISTENT and PIPE_MAP_COHERENT are supported 2207ec681f3Smrg for buffers. 2217ec681f3Smrg* ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is 2227ec681f3Smrg supported. 2237ec681f3Smrg* ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used 2247ec681f3Smrg in conjunction with a texture gather opcode. 2257ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used 2267ec681f3Smrg in conjunction with a texture gather opcode. 2277ec681f3Smrg* ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample 2287ec681f3Smrg shading. The context->set_min_samples function will be expected to be 2297ec681f3Smrg implemented. 2307ec681f3Smrg* ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can 2317ec681f3Smrg accept 4 offsets. 2327ec681f3Smrg* ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether 2337ec681f3Smrg TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping 2347ec681f3Smrg and viewport transformation. 2357ec681f3Smrg* ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams 2367ec681f3Smrg supported by the geometry shader. If stream-out is supported, this should be 2377ec681f3Smrg at least 1. If stream-out is not supported, this should be 0. 2387ec681f3Smrg* ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments 2397ec681f3Smrg { count, instance_count, start, index_bias } from a PIPE_BUFFER resource. 2407ec681f3Smrg See pipe_draw_info. 2417ec681f3Smrg* ``PIPE_CAP_MULTI_DRAW_INDIRECT``: Whether the driver supports 2427ec681f3Smrg pipe_draw_info::indirect_stride and ::indirect_count 2437ec681f3Smrg* ``PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS``: Whether the driver supports 2447ec681f3Smrg taking the number of indirect draws from a separate parameter 2457ec681f3Smrg buffer, see pipe_draw_indirect_info::indirect_draw_count. 2467ec681f3Smrg* ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports 2477ec681f3Smrg the FINE versions of DDX/DDY. 2487ec681f3Smrg* ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's 2497ec681f3Smrg not available one should return 0xFFFFFFFF. 2507ec681f3Smrg* ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware. 2517ec681f3Smrg 0xFFFFFFFF if not available. 2527ec681f3Smrg* ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated. 2537ec681f3Smrg* ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes. 2547ec681f3Smrg* ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card 2557ec681f3Smrg memory and GART. 2567ec681f3Smrg* ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted 2577ec681f3Smrg condition for conditional rendering. 2587ec681f3Smrg* ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride. 2597ec681f3Smrg* ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be 2607ec681f3Smrg different than the underlying resource's, as permitted by 2617ec681f3Smrg ARB_texture_view. For example a 2d array texture may be reinterpreted as a 2627ec681f3Smrg cube (array) texture and vice-versa. 2637ec681f3Smrg* ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the 2647ec681f3Smrg pipe_rasterizer_state::clip_halfz being set to true. This is required 2657ec681f3Smrg for enabling ARB_clip_control. 2667ec681f3Smrg* ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports 2677ec681f3Smrg TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means 2687ec681f3Smrg gallium frontends for APIs whose vertexIDs are offset by basevertex (such as GL) 2697ec681f3Smrg will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE 2707ec681f3Smrg and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these 2717ec681f3Smrg semantics. Only relevant if geometry shaders are supported. 2727ec681f3Smrg (BASEVERTEX could be exposed separately too via ``PIPE_CAP_DRAW_PARAMETERS``). 2737ec681f3Smrg* ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support 2747ec681f3Smrg for ``pipe_rasterizer_state::offset_clamp``. 2757ec681f3Smrg* ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting 2767ec681f3Smrg a multisampled depth buffer into a single-sampled texture (or depth buffer). 2777ec681f3Smrg Only the first sampled should be copied. 2787ec681f3Smrg* ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create 2797ec681f3Smrg a pipe_resource where an already-existing piece of (malloc'd) user memory 2807ec681f3Smrg is used as its backing storage. In other words, whether the driver can map 2817ec681f3Smrg existing user memory into the device address space for direct device access. 2827ec681f3Smrg The create function is pipe_screen::resource_from_user_memory. The address 2837ec681f3Smrg and size must be page-aligned. 2847ec681f3Smrg* ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY_COMPUTE_ONLY``: Same as 2857ec681f3Smrg ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY`` but indicates it is only supported from 2867ec681f3Smrg the compute engines. 2877ec681f3Smrg* ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``: 2887ec681f3Smrg Whether pipe_context::get_device_reset_status is implemented. 2897ec681f3Smrg* ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``: 2907ec681f3Smrg How many per-patch outputs and inputs are supported between tessellation 2917ec681f3Smrg control and tessellation evaluation shaders, not counting in TESSINNER and 2927ec681f3Smrg TESSOUTER. The minimum allowed value for OpenGL is 30. 2937ec681f3Smrg* ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and 2947ec681f3Smrg magnification filters are supported with single-precision floating-point 2957ec681f3Smrg textures. 2967ec681f3Smrg* ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and 2977ec681f3Smrg magnification filters are supported with half-precision floating-point 2987ec681f3Smrg textures. 2997ec681f3Smrg* ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and 3007ec681f3Smrg bounds_max states of pipe_depth_stencil_alpha_state behave according 3017ec681f3Smrg to the GL_EXT_depth_bounds_test specification. 3027ec681f3Smrg* ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported 3037ec681f3Smrg* ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample 3047ec681f3Smrg interpolation for all fragment shader inputs if 3057ec681f3Smrg pipe_rasterizer_state::force_persample_interp is set. This is only used 3067ec681f3Smrg by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading 3077ec681f3Smrg (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it, 3087ec681f3Smrg GL4 hardware will likely need to emulate it with a shader variant, or by 3097ec681f3Smrg selecting the interpolation weights with a conditional assignment 3107ec681f3Smrg in the shader. 3117ec681f3Smrg* ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any 3127ec681f3Smrg pipe_context. Important for reducing jank at draw time by letting GL shaders 3137ec681f3Smrg linked in one thread be used in another thread without recompiling. 3147ec681f3Smrg* ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``: 3157ec681f3Smrg Whether copying between compressed and plain formats is supported where 3167ec681f3Smrg a compressed block is copied to/from a plain pixel of the same size. 3177ec681f3Smrg* ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be 3187ec681f3Smrg available in contexts. 3197ec681f3Smrg* ``PIPE_CAP_CLEAR_SCISSORED``: Whether `clear` can accept a scissored 3207ec681f3Smrg bounding box. 3217ec681f3Smrg* ``PIPE_CAP_DRAW_PARAMETERS``: Whether ``TGSI_SEMANTIC_BASEVERTEX``, 3227ec681f3Smrg ``TGSI_SEMANTIC_BASEINSTANCE``, and ``TGSI_SEMANTIC_DRAWID`` are 3237ec681f3Smrg supported in vertex shaders. 3247ec681f3Smrg* ``PIPE_CAP_TGSI_PACK_HALF_FLOAT``: Whether the ``UP2H`` and ``PK2H`` 3257ec681f3Smrg TGSI opcodes are supported. 3267ec681f3Smrg* ``PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL``: If gallium frontends should use 3277ec681f3Smrg a system value for the POSITION fragment shader input. 3287ec681f3Smrg* ``PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL``: If gallium frontends should use 3297ec681f3Smrg a system value for the POINT fragment shader input. 3307ec681f3Smrg* ``PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL``: If gallium frontends should use 3317ec681f3Smrg a system value for the FACE fragment shader input. 3327ec681f3Smrg Also, the FACE system value is integer, not float. 3337ec681f3Smrg* ``PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT``: Describes the required 3347ec681f3Smrg alignment for pipe_shader_buffer::buffer_offset, in bytes. Maximum 3357ec681f3Smrg value allowed is 256 (for GL conformance). 0 is only allowed if 3367ec681f3Smrg shader buffers are not supported. 3377ec681f3Smrg* ``PIPE_CAP_INVALIDATE_BUFFER``: Whether the use of ``invalidate_resource`` 3387ec681f3Smrg for buffers is supported. 3397ec681f3Smrg* ``PIPE_CAP_GENERATE_MIPMAP``: Indicates whether pipe_context::generate_mipmap 3407ec681f3Smrg is supported. 3417ec681f3Smrg* ``PIPE_CAP_STRING_MARKER``: Whether pipe->emit_string_marker() is supported. 3427ec681f3Smrg* ``PIPE_CAP_SURFACE_REINTERPRET_BLOCKS``: Indicates whether 3437ec681f3Smrg pipe_context::create_surface supports reinterpreting a texture as a surface 3447ec681f3Smrg of a format with different block width/height (but same block size in bits). 3457ec681f3Smrg For example, a compressed texture image can be interpreted as a 3467ec681f3Smrg non-compressed surface whose texels are the same number of bits as the 3477ec681f3Smrg compressed blocks, and vice versa. The width and height of the surface is 3487ec681f3Smrg adjusted appropriately. 3497ec681f3Smrg* ``PIPE_CAP_QUERY_BUFFER_OBJECT``: Driver supports 3507ec681f3Smrg context::get_query_result_resource callback. 3517ec681f3Smrg* ``PIPE_CAP_PCI_GROUP``: Return the PCI segment group number. 3527ec681f3Smrg* ``PIPE_CAP_PCI_BUS``: Return the PCI bus number. 3537ec681f3Smrg* ``PIPE_CAP_PCI_DEVICE``: Return the PCI device number. 3547ec681f3Smrg* ``PIPE_CAP_PCI_FUNCTION``: Return the PCI function number. 3557ec681f3Smrg* ``PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT``: 3567ec681f3Smrg If non-zero, rendering to framebuffers with no surface attachments 3577ec681f3Smrg is supported. The context->is_format_supported function will be expected 3587ec681f3Smrg to be implemented with PIPE_FORMAT_NONE yeilding the MSAA modes the hardware 3597ec681f3Smrg supports. N.B., The maximum number of layers supported for rasterizing a 3607ec681f3Smrg primitive on a layer is obtained from ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS`` 3617ec681f3Smrg even though it can be larger than the number of layers supported by either 3627ec681f3Smrg rendering or textures. 3637ec681f3Smrg* ``PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR``: Implementation uses bounds 3647ec681f3Smrg checking on resource accesses by shader if the context is created with 3657ec681f3Smrg PIPE_CONTEXT_ROBUST_BUFFER_ACCESS. See the ARB_robust_buffer_access_behavior 3667ec681f3Smrg extension for information on the required behavior for out of bounds accesses 3677ec681f3Smrg and accesses to unbound resources. 3687ec681f3Smrg* ``PIPE_CAP_CULL_DISTANCE``: Whether the driver supports the arb_cull_distance 3697ec681f3Smrg extension and thus implements proper support for culling planes. 3707ec681f3Smrg* ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is 3717ec681f3Smrg supported for patch primitives. 3727ec681f3Smrg* ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders. 3737ec681f3Smrg* ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles 3747ec681f3Smrg supported in ``set_window_rectangles``. 3757ec681f3Smrg* ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support 3767ec681f3Smrg for ``pipe_rasterizer_state::offset_units_unscaled``. 3777ec681f3Smrg* ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for 3787ec681f3Smrg floating point viewport bounds. 3797ec681f3Smrg* ``PIPE_CAP_RASTERIZER_SUBPIXEL_BITS``: Number of bits of subpixel precision used 3807ec681f3Smrg by the rasterizer. 3817ec681f3Smrg* ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback 3827ec681f3Smrg support for color/depth format combinations that use a different 3837ec681f3Smrg number of bits. For the purpose of this cap, Z24 is treated as 3847ec681f3Smrg 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16 3857ec681f3Smrg combination will require a driver fallback, and should not be 3867ec681f3Smrg advertised in the GLX/EGL config list. 3877ec681f3Smrg* ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the 3887ec681f3Smrg UsageMask of input and output declarations and allows declaring arrays 3897ec681f3Smrg in overlapping ranges. The components must be a contiguous range, e.g. a 3907ec681f3Smrg UsageMask of xy or yzw is allowed, but xz or yw isn't. Declarations with 3917ec681f3Smrg overlapping locations must have matching semantic names and indices, and 3927ec681f3Smrg equal interpolation qualifiers. 3937ec681f3Smrg Components may overlap, notably when the gaps in an array of dvec3 are 3947ec681f3Smrg filled in. 3957ec681f3Smrg* ``PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME``: Whether GL_ARB_transform_feeddback2 3967ec681f3Smrg is supported, including pausing/resuming queries and having 3977ec681f3Smrg `count_from_stream_output` set on indirect draws to implement 3987ec681f3Smrg glDrawTransformFeedback. Required for OpenGL 4.0. 3997ec681f3Smrg* ``PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS``: Whether interleaved stream 4007ec681f3Smrg output mode is able to interleave across buffers. This is required for 4017ec681f3Smrg ARB_transform_feedback3. 4027ec681f3Smrg* ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can read 4037ec681f3Smrg from the output file. 4047ec681f3Smrg* ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use 4057ec681f3Smrg the minimum amount of optimizations just to be able to do all the linking 4067ec681f3Smrg and lowering. 4077ec681f3Smrg* ``PIPE_CAP_FBFETCH``: The number of render targets whose value in the 4087ec681f3Smrg current framebuffer can be read in the shader. 0 means framebuffer fetch 4097ec681f3Smrg is not supported. 1 means that only the first render target can be read, 4107ec681f3Smrg and a larger value would mean that multiple render targets are supported. 4117ec681f3Smrg* ``PIPE_CAP_FBFETCH_COHERENT``: Whether framebuffer fetches from the fragment 4127ec681f3Smrg shader can be guaranteed to be coherent with framebuffer writes. 4137ec681f3Smrg* ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the 4147ec681f3Smrg ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property. 4157ec681f3Smrg* ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations 4167ec681f3Smrg are supported. 4177ec681f3Smrg* ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported. 4187ec681f3Smrg* ``PIPE_CAP_INT64_DIVMOD``: Whether 64-bit integer division/modulo 4197ec681f3Smrg operations are supported. 4207ec681f3Smrg* ``PIPE_CAP_TGSI_TEX_TXF_LZ``: Whether TEX_LZ and TXF_LZ opcodes are 4217ec681f3Smrg supported. 4227ec681f3Smrg* ``PIPE_CAP_TGSI_CLOCK``: Whether the CLOCK opcode is supported. 4237ec681f3Smrg* ``PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE``: Whether the 4247ec681f3Smrg PIPE_POLYGON_MODE_FILL_RECTANGLE mode is supported for 4257ec681f3Smrg ``pipe_rasterizer_state::fill_front`` and 4267ec681f3Smrg ``pipe_rasterizer_state::fill_back``. 4277ec681f3Smrg* ``PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE``: The page size of sparse buffers in 4287ec681f3Smrg bytes, or 0 if sparse buffers are not supported. The page size must be at 4297ec681f3Smrg most 64KB. 4307ec681f3Smrg* ``PIPE_CAP_TGSI_BALLOT``: Whether the BALLOT and READ_* opcodes as well as 4317ec681f3Smrg the SUBGROUP_* semantics are supported. 4327ec681f3Smrg* ``PIPE_CAP_TGSI_TES_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and 4337ec681f3Smrg ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as tessellation evaluation 4347ec681f3Smrg shader outputs. 4357ec681f3Smrg* ``PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX``: Whether a buffer with just 4367ec681f3Smrg PIPE_BIND_CONSTANT_BUFFER can be legally passed to set_vertex_buffers. 4377ec681f3Smrg* ``PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION``: As the name says. 4387ec681f3Smrg* ``PIPE_CAP_POST_DEPTH_COVERAGE``: whether 4397ec681f3Smrg ``TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE`` is supported. 4407ec681f3Smrg* ``PIPE_CAP_BINDLESS_TEXTURE``: Whether bindless texture operations are 4417ec681f3Smrg supported. 4427ec681f3Smrg* ``PIPE_CAP_NIR_SAMPLERS_AS_DEREF``: Whether NIR tex instructions should 4437ec681f3Smrg reference texture and sampler as NIR derefs instead of by indices. 4447ec681f3Smrg* ``PIPE_CAP_QUERY_SO_OVERFLOW``: Whether the 4457ec681f3Smrg ``PIPE_QUERY_SO_OVERFLOW_PREDICATE`` and 4467ec681f3Smrg ``PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE`` query types are supported. Note that 4477ec681f3Smrg for a driver that does not support multiple output streams (i.e., 4487ec681f3Smrg ``PIPE_CAP_MAX_VERTEX_STREAMS`` is 1), both query types are identical. 4497ec681f3Smrg* ``PIPE_CAP_MEMOBJ``: Whether operations on memory objects are supported. 4507ec681f3Smrg* ``PIPE_CAP_LOAD_CONSTBUF``: True if the driver supports ``TGSI_OPCODE_LOAD`` use 4517ec681f3Smrg with constant buffers. 4527ec681f3Smrg* ``PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS``: Any TGSI register can be used as 4537ec681f3Smrg an address for indirect register indexing. 4547ec681f3Smrg* ``PIPE_CAP_TILE_RASTER_ORDER``: Whether the driver supports 4557ec681f3Smrg GL_MESA_tile_raster_order, using the tile_raster_order_* fields in 4567ec681f3Smrg pipe_rasterizer_state. 4577ec681f3Smrg* ``PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES``: Limit on combined shader 4587ec681f3Smrg output resources (images + buffers + fragment outputs). If 0 the state 4597ec681f3Smrg tracker works it out. 4607ec681f3Smrg* ``PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS``: This determines limitations 4617ec681f3Smrg on the number of samples that framebuffer attachments can have. 4627ec681f3Smrg Possible values: 4637ec681f3Smrg 4647ec681f3Smrg 0. color.nr_samples == zs.nr_samples == color.nr_storage_samples 4657ec681f3Smrg (standard MSAA quality) 4667ec681f3Smrg 1. color.nr_samples >= zs.nr_samples == color.nr_storage_samples 4677ec681f3Smrg (enhanced MSAA quality) 4687ec681f3Smrg 2. color.nr_samples >= zs.nr_samples >= color.nr_storage_samples 4697ec681f3Smrg (full flexibility in tuning MSAA quality and performance) 4707ec681f3Smrg 4717ec681f3Smrg All color attachments must have the same number of samples and the same 4727ec681f3Smrg number of storage samples. 4737ec681f3Smrg* ``PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET``: 4747ec681f3Smrg Whether pipe_vertex_buffer::buffer_offset is treated as signed. The u_vbuf 4757ec681f3Smrg module needs this for optimal performance in workstation applications. 4767ec681f3Smrg* ``PIPE_CAP_CONTEXT_PRIORITY_MASK``: For drivers that support per-context 4777ec681f3Smrg priorities, this returns a bitmask of ``PIPE_CONTEXT_PRIORITY_x`` for the 4787ec681f3Smrg supported priority levels. A driver that does not support prioritized 4797ec681f3Smrg contexts can return 0. 4807ec681f3Smrg* ``PIPE_CAP_FENCE_SIGNAL``: True if the driver supports signaling semaphores 4817ec681f3Smrg using fence_server_signal(). 4827ec681f3Smrg* ``PIPE_CAP_CONSTBUF0_FLAGS``: The bits of pipe_resource::flags that must be 4837ec681f3Smrg set when binding that buffer as constant buffer 0. If the buffer doesn't have 4847ec681f3Smrg those bits set, pipe_context::set_constant_buffer(.., 0, ..) is ignored 4857ec681f3Smrg by the driver, and the driver can throw assertion failures. 4867ec681f3Smrg* ``PIPE_CAP_PACKED_UNIFORMS``: True if the driver supports packed uniforms 4877ec681f3Smrg as opposed to padding to vec4s. Requires ``PIPE_SHADER_CAP_INTEGERS`` if 4887ec681f3Smrg ``lower_uniforms_to_ubo`` is set. 4897ec681f3Smrg* ``PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES``: Whether the 4907ec681f3Smrg ``PIPE_CONSERVATIVE_RASTER_POST_SNAP`` mode is supported for triangles. 4917ec681f3Smrg The post-snap mode means the conservative rasterization occurs after 4927ec681f3Smrg the conversion from floating-point to fixed-point coordinates 4937ec681f3Smrg on the subpixel grid. 4947ec681f3Smrg* ``PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES``: Whether the 4957ec681f3Smrg ``PIPE_CONSERVATIVE_RASTER_POST_SNAP`` mode is supported for points and lines. 4967ec681f3Smrg* ``PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES``: Whether the 4977ec681f3Smrg ``PIPE_CONSERVATIVE_RASTER_PRE_SNAP`` mode is supported for triangles. 4987ec681f3Smrg The pre-snap mode means the conservative rasterization occurs before 4997ec681f3Smrg the conversion from floating-point to fixed-point coordinates. 5007ec681f3Smrg* ``PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES``: Whether the 5017ec681f3Smrg ``PIPE_CONSERVATIVE_RASTER_PRE_SNAP`` mode is supported for points and lines. 5027ec681f3Smrg* ``PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE``: Whether 5037ec681f3Smrg ``PIPE_CAP_POST_DEPTH_COVERAGE`` works with conservative rasterization. 5047ec681f3Smrg* ``PIPE_CAP_CONSERVATIVE_RASTER_INNER_COVERAGE``: Whether 5057ec681f3Smrg inner_coverage from GL_INTEL_conservative_rasterization is supported. 5067ec681f3Smrg* ``PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS``: The maximum 5077ec681f3Smrg subpixel precision bias in bits during conservative rasterization. 5087ec681f3Smrg* ``PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS``: True is the driver supports 5097ec681f3Smrg programmable sample location through ```get_sample_pixel_grid``` and 5107ec681f3Smrg ```set_sample_locations```. 5117ec681f3Smrg* ``PIPE_CAP_MAX_GS_INVOCATIONS``: Maximum supported value of 5127ec681f3Smrg TGSI_PROPERTY_GS_INVOCATIONS. 5137ec681f3Smrg* ``PIPE_CAP_MAX_SHADER_BUFFER_SIZE``: Maximum supported size for binding 5147ec681f3Smrg with set_shader_buffers. 5157ec681f3Smrg* ``PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS``: Maximum total number of shader 5167ec681f3Smrg buffers. A value of 0 means the sum of all per-shader stage maximums (see 5177ec681f3Smrg ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``). 5187ec681f3Smrg* ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS``: Maximum total number of atomic 5197ec681f3Smrg counters. A value of 0 means the default value (MAX_ATOMIC_COUNTERS = 4096). 5207ec681f3Smrg* ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS``: Maximum total number of 5217ec681f3Smrg atomic counter buffers. A value of 0 means the sum of all per-shader stage 5227ec681f3Smrg maximums (see ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``). 5237ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET``: Maximum recommend memory size 5247ec681f3Smrg for all active texture uploads combined. This is a performance hint. 5257ec681f3Smrg 0 means no limit. 5267ec681f3Smrg* ``PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET``: The maximum supported value for 5277ec681f3Smrg of pipe_vertex_element::src_offset. 5287ec681f3Smrg* ``PIPE_CAP_SURFACE_SAMPLE_COUNT``: Whether the driver 5297ec681f3Smrg supports pipe_surface overrides of resource nr_samples. If set, will 5307ec681f3Smrg enable EXT_multisampled_render_to_texture. 5317ec681f3Smrg* ``PIPE_CAP_TGSI_ATOMFADD``: Atomic floating point adds are supported on 5327ec681f3Smrg images, buffers, and shared memory. 5337ec681f3Smrg* ``PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND``: True if the driver needs blend state to use zero/one instead of destination alpha for RGB/XRGB formats. 5347ec681f3Smrg* ``PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS``: True if the driver wants TESSINNER and TESSOUTER to be inputs (rather than system values) for tessellation evaluation shaders. 5357ec681f3Smrg* ``PIPE_CAP_DEST_SURFACE_SRGB_CONTROL``: Indicates whether the drivers 5367ec681f3Smrg supports switching the format between sRGB and linear for a surface that is 5377ec681f3Smrg used as destination in draw and blit calls. 5387ec681f3Smrg* ``PIPE_CAP_NIR_COMPACT_ARRAYS``: True if the compiler backend supports NIR's compact array feature, for all shader stages. 5397ec681f3Smrg* ``PIPE_CAP_MAX_VARYINGS``: The maximum number of fragment shader 5407ec681f3Smrg varyings. This will generally correspond to 5417ec681f3Smrg ``PIPE_SHADER_CAP_MAX_INPUTS`` for the fragment shader, but in some 5427ec681f3Smrg cases may be a smaller number. 5437ec681f3Smrg* ``PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK``: Whether pipe_grid_info::last_block 5447ec681f3Smrg is implemented by the driver. See struct pipe_grid_info for more details. 5457ec681f3Smrg* ``PIPE_CAP_COMPUTE_SHADER_DERIVATIVE``: True if the driver supports derivatives (and texture lookups with implicit derivatives) in compute shaders. 5467ec681f3Smrg* ``PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS``: Whether the TGSI pass to shrink IO 5477ec681f3Smrg arrays should be skipped and enforce keeping the declared array sizes instead. 5487ec681f3Smrg A driver might rely on the input mapping that was defined with the original 5497ec681f3Smrg GLSL code. 5507ec681f3Smrg* ``PIPE_CAP_IMAGE_LOAD_FORMATTED``: True if a format for image loads does not need to be specified in the shader IR 5517ec681f3Smrg* ``PIPE_CAP_THROTTLE``: Whether or not gallium frontends should throttle pipe_context 5527ec681f3Smrg execution. 0 = throttling is disabled. 5537ec681f3Smrg* ``PIPE_CAP_DMABUF``: Whether Linux DMABUF handles are supported by 5547ec681f3Smrg resource_from_handle and resource_get_handle. 5557ec681f3Smrg* ``PIPE_CAP_PREFER_COMPUTE_FOR_MULTIMEDIA``: Whether VDPAU, VAAPI, and 5567ec681f3Smrg OpenMAX should use a compute-based blit instead of pipe_context::blit and compute pipeline for compositing images. 5577ec681f3Smrg* ``PIPE_CAP_FRAGMENT_SHADER_INTERLOCK``: True if fragment shader interlock 5587ec681f3Smrg functionality is supported. 5597ec681f3Smrg* ``PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED``: True if driver handles 5607ec681f3Smrg gl_LocalInvocationIndex and gl_GlobalInvocationID. Otherwise, gallium frontends will 5617ec681f3Smrg lower those system values. 5627ec681f3Smrg* ``PIPE_CAP_ATOMIC_FLOAT_MINMAX``: Atomic float point minimum, 5637ec681f3Smrg maximum, exchange and compare-and-swap support to buffer and shared variables. 5647ec681f3Smrg* ``PIPE_CAP_TGSI_DIV``: Whether opcode DIV is supported 5657ec681f3Smrg* ``PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD``: Whether texture lookups with 5667ec681f3Smrg explicit LOD is supported in the fragment shader. 5677ec681f3Smrg* ``PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES``: True if the driver supports 5687ec681f3Smrg derivatives in fragment shaders. 5697ec681f3Smrg* ``PIPE_CAP_VERTEX_SHADER_SATURATE``: True if the driver supports saturate 5707ec681f3Smrg modifiers in the vertex shader. 5717ec681f3Smrg* ``PIPE_CAP_TEXTURE_SHADOW_LOD``: True if the driver supports shadow sampler 5727ec681f3Smrg types with texture functions having interaction with LOD of texture lookup. 5737ec681f3Smrg* ``PIPE_CAP_SHADER_SAMPLES_IDENTICAL``: True if the driver supports a shader query to tell whether all samples of a multisampled surface are definitely identical. 5747ec681f3Smrg* ``PIPE_CAP_TGSI_ATOMINC_WRAP``: Atomic increment/decrement + wrap around are supported. 5757ec681f3Smrg* ``PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF``: True if gallium frontends should 5767ec681f3Smrg turn arrays whose contents can be deduced at compile time into constant 5777ec681f3Smrg buffer loads, or false if the driver can handle such arrays itself in a more 5787ec681f3Smrg efficient manner. 5797ec681f3Smrg* ``PIPE_CAP_GL_SPIRV``: True if the driver supports ARB_gl_spirv extension. 5807ec681f3Smrg* ``PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS``: True if the driver supports Variable Pointers in SPIR-V shaders. 5817ec681f3Smrg* ``PIPE_CAP_DEMOTE_TO_HELPER_INVOCATION``: True if driver supports demote keyword in GLSL programs. 5827ec681f3Smrg* ``PIPE_CAP_TGSI_TG4_COMPONENT_IN_SWIZZLE``: True if driver wants the TG4 component encoded in sampler swizzle rather than as a separate source. 5837ec681f3Smrg* ``PIPE_CAP_FLATSHADE``: Driver supports pipe_rasterizer_state::flatshade. Must be 1 5847ec681f3Smrg for non-NIR drivers or gallium nine. 5857ec681f3Smrg* ``PIPE_CAP_ALPHA_TEST``: Driver supports alpha-testing. Must be 1 5867ec681f3Smrg for non-NIR drivers or gallium nine. If set, frontend may set 5877ec681f3Smrg ``pipe_depth_stencil_alpha_state->alpha_enabled`` and ``alpha_func``. 5887ec681f3Smrg Otherwise, alpha test will be lowered to a comparison and discard_if in the 5897ec681f3Smrg fragment shader. 5907ec681f3Smrg* ``PIPE_CAP_POINT_SIZE_FIXED``: Driver supports point-sizes that are fixed, 5917ec681f3Smrg as opposed to writing gl_PointSize for every point. 5927ec681f3Smrg* ``PIPE_CAP_TWO_SIDED_COLOR``: Driver supports two-sided coloring. Must be 1 5937ec681f3Smrg for non-NIR drivers. If set, pipe_rasterizer_state may be set to indicate 5947ec681f3Smrg that backfacing primitives should use the back-side color as the FS input 5957ec681f3Smrg color. If unset, mesa/st will lower it to gl_FrontFacing reads in the 5967ec681f3Smrg fragment shader. 5977ec681f3Smrg* ``PIPE_CAP_CLIP_PLANES``: Driver supports user-defined clip-planes. 5987ec681f3Smrg* ``PIPE_CAP_MAX_VERTEX_BUFFERS``: Number of supported vertex buffers. 5997ec681f3Smrg* ``PIPE_CAP_OPENCL_INTEGER_FUNCTIONS``: Driver supports extended OpenCL-style integer functions. This includes averge, saturating additiong, saturating subtraction, absolute difference, count leading zeros, and count trailing zeros. 6007ec681f3Smrg* ``PIPE_CAP_INTEGER_MULTIPLY_32X16``: Driver supports integer multiplication between a 32-bit integer and a 16-bit integer. If the second operand is 32-bits, the upper 16-bits are ignored, and the low 16-bits are possibly sign extended as necessary. 6017ec681f3Smrg* ``PIPE_CAP_NIR_IMAGES_AS_DEREF``: Whether NIR image load/store intrinsics should be nir_intrinsic_image_deref_* instead of nir_intrinsic_image_*. Defaults to true. 6027ec681f3Smrg* ``PIPE_CAP_PACKED_STREAM_OUTPUT``: Driver supports packing optimization for stream output (e.g. GL transform feedback captured variables). Defaults to true. 6037ec681f3Smrg* ``PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED``: Driver needs the nir_lower_viewport_transform pass to be enabled. This also means that the gl_Position value is modified and should be lowered for transform feedback, if needed. Defaults to false. 6047ec681f3Smrg* ``PIPE_CAP_PSIZ_CLAMPED``: Driver needs for the point size to be clamped. Additionally, the gl_PointSize has been modified and its value should be lowered for transform feedback, if needed. Defaults to false. 6057ec681f3Smrg* ``PIPE_CAP_GL_BEGIN_END_BUFFER_SIZE``: Buffer size used to upload vertices for glBegin/glEnd. 6067ec681f3Smrg* ``PIPE_CAP_VIEWPORT_SWIZZLE``: Whether pipe_viewport_state::swizzle can be used to specify pre-clipping swizzling of coordinates (see GL_NV_viewport_swizzle). 6077ec681f3Smrg* ``PIPE_CAP_SYSTEM_SVM``: True if all application memory can be shared with the GPU without explicit mapping. 6087ec681f3Smrg* ``PIPE_CAP_VIEWPORT_MASK``: Whether ``TGSI_SEMANTIC_VIEWPORT_MASK`` and ``TGSI_PROPERTY_LAYER_VIEWPORT_RELATIVE`` are supported (see GL_NV_viewport_array2). 6097ec681f3Smrg* ``PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE``: Whether mapping a buffer as unsynchronized from any thread is safe. 6107ec681f3Smrg* ``PIPE_CAP_GLSL_ZERO_INIT``: Choose a default zero initialization some glsl variables. If `1`, then all glsl shader variables and gl_FragColor are initialized to zero. If `2`, then shader out variables are not initialized but function out variables are. 6117ec681f3Smrg* ``PIPE_CAP_BLEND_EQUATION_ADVANCED``: Driver supports blend equation advanced without necessarily supporting FBFETCH. 6127ec681f3Smrg* ``PIPE_CAP_NIR_ATOMICS_AS_DEREF``: Whether NIR atomics instructions should reference atomics as NIR derefs instead of by indices. 6137ec681f3Smrg* ``PIPE_CAP_NO_CLIP_ON_COPY_TEX``: Driver doesn't want x/y/width/height clipped based on src size when doing a copy texture operation (eg: may want out-of-bounds reads that produce 0 instead of leaving the texture content undefined) 6147ec681f3Smrg* ``PIPE_CAP_MAX_TEXTURE_MB``: Maximum texture size in MB (default is 1024) 6157ec681f3Smrg* ``PIPE_CAP_DEVICE_PROTECTED_CONTENT``: Whether the device support protected / encrypted content. 6167ec681f3Smrg* ``PIPE_CAP_PREFER_REAL_BUFFER_IN_CONSTBUF0``: The state tracker is encouraged to upload constants into a real buffer and bind it into constant buffer 0 instead of binding a user pointer. This may enable a faster codepath in a gallium frontend for drivers that really prefer a real buffer. 6177ec681f3Smrg* ``PIPE_CAP_GL_CLAMP``: Driver natively supports GL_CLAMP. Required for non-NIR drivers with the GL frontend. NIR drivers with the cap unavailable will have GL_CLAMP lowered to txd/txl with a saturate on the coordinates. 6187ec681f3Smrg* ``PIPE_CAP_TEXRECT``: Driver supports rectangle textures. Required for OpenGL on `!prefers_nir` drivers. If this cap is not present, st/mesa will lower the NIR to use normal 2D texture sampling by using either `txs` or `nir_intrinsic_load_texture_scaling` to normalize the texture coordinates. 6197ec681f3Smrg* ``PIPE_CAP_SAMPLER_REDUCTION_MINMAX``: Driver supports EXT min/max sampler reduction. 6207ec681f3Smrg* ``PIPE_CAP_SAMPLER_REDUCTION_MINMAX_ARB``: Driver supports ARB min/max sampler reduction with format queries. 6217ec681f3Smrg* ``PIPE_CAP_EMULATE_NONFIXED_PRIMITIVE_RESTART``: Driver requests all draws using a non-fixed restart index to be rewritten to use a fixed restart index. 6227ec681f3Smrg* ``PIPE_CAP_SUPPORTED_PRIM_MODES``: A bitmask of the ``pipe_prim_type`` enum values that the driver can natively support. 6237ec681f3Smrg* ``PIPE_CAP_SUPPORTED_PRIM_MODES_WITH_RESTART``: A bitmask of the ``pipe_prim_type`` enum values that the driver can natively support for primitive restart. Only useful if ``PIPE_CAP_PRIMITIVE_RESTART`` is also exported. 6247ec681f3Smrg* ``PIPE_CAP_PREFER_BACK_BUFFER_REUSE``: Only applies to DRI_PRIME. If 1, the driver prefers that DRI3 tries to use the same back buffer each frame. If 0, this means DRI3 will at least use 2 back buffers and ping-pong between them to allow the tiled->linear copy to run in parallel. 6257ec681f3Smrg* ``PIPE_CAP_DRAW_VERTEX_STATE``: Driver supports `pipe_screen::create_vertex_state/vertex_state_destroy` and `pipe_context::draw_vertex_state`. Only used by display lists and designed to serve vbo_save. 6267ec681f3Smrg 6277ec681f3Smrg.. _pipe_capf: 6287ec681f3Smrg 6297ec681f3SmrgPIPE_CAPF_* 6307ec681f3Smrg^^^^^^^^^^^^^^^^ 6317ec681f3Smrg 6327ec681f3SmrgThe floating-point capabilities are: 6337ec681f3Smrg 6347ec681f3Smrg* ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line. 6357ec681f3Smrg* ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line. 6367ec681f3Smrg* ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point. 6377ec681f3Smrg* ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point. 6387ec681f3Smrg* ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be 6397ec681f3Smrg applied to anisotropically filtered textures. 6407ec681f3Smrg* ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied 6417ec681f3Smrg to filtered textures. 6427ec681f3Smrg* ``PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE``: The minimum conservative rasterization 6437ec681f3Smrg dilation. 6447ec681f3Smrg* ``PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE``: The maximum conservative rasterization 6457ec681f3Smrg dilation. 6467ec681f3Smrg* ``PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY``: The conservative rasterization 6477ec681f3Smrg dilation granularity for values relative to the minimum dilation. 6487ec681f3Smrg 6497ec681f3Smrg 6507ec681f3Smrg.. _pipe_shader_cap: 6517ec681f3Smrg 6527ec681f3SmrgPIPE_SHADER_CAP_* 6537ec681f3Smrg^^^^^^^^^^^^^^^^^ 6547ec681f3Smrg 6557ec681f3SmrgThese are per-shader-stage capabitity queries. Different shader stages may 6567ec681f3Smrgsupport different features. 6577ec681f3Smrg 6587ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions. 6597ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions. 6607ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions. 6617ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections. 6627ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth. 6637ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers. 6647ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers. 6657ec681f3Smrg This is valid for all shaders except the fragment shader. 6667ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes. 6677ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound 6687ec681f3Smrg to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will 6697ec681f3Smrg only permit binding one constant buffer per shader. 6707ec681f3Smrg 6717ec681f3SmrgIf a value greater than 0 is returned, the driver can have multiple 6727ec681f3Smrgconstant buffers bound to shader stages. The CONST register file is 6737ec681f3Smrgaccessed with two-dimensional indices, like in the example below. 6747ec681f3Smrg 6757ec681f3SmrgDCL CONST[0][0..7] # declare first 8 vectors of constbuf 0 6767ec681f3SmrgDCL CONST[3][0] # declare first vector of constbuf 3 6777ec681f3SmrgMOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0 6787ec681f3Smrg 6797ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers. 6807ec681f3Smrg* ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported. 6817ec681f3Smrg* ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing 6827ec681f3Smrg of the input file is supported. 6837ec681f3Smrg* ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing 6847ec681f3Smrg of the output file is supported. 6857ec681f3Smrg* ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing 6867ec681f3Smrg of the temporary file is supported. 6877ec681f3Smrg* ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing 6887ec681f3Smrg of the constant file is supported. 6897ec681f3Smrg* ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e. 6907ec681f3Smrg BGNSUB, ENDSUB, CAL, and RET, including RET in the main block. 6917ec681f3Smrg* ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported. 6927ec681f3Smrg If unsupported, only float opcodes are supported. 6937ec681f3Smrg* ``PIPE_SHADER_CAP_INT64_ATOMICS``: Whether int64 atomic opcodes are supported. The device needs to support add, sub, swap, cmpswap, and, or, xor, min, and max. 6947ec681f3Smrg* ``PIPE_SHADER_CAP_FP16``: Whether half precision floating-point opcodes are supported. 6957ec681f3Smrg If unsupported, half precision ops need to be lowered to full precision. 6967ec681f3Smrg* ``PIPE_SHADER_CAP_FP16_DERIVATIVES``: Whether half precision floating-point 6977ec681f3Smrg DDX and DDY opcodes are supported. 6987ec681f3Smrg* ``PIPE_SHADER_CAP_FP16_CONST_BUFFERS``: Whether half precision floating-point 6997ec681f3Smrg constant buffer loads are supported. Drivers are recommended to report 0 7007ec681f3Smrg if x86 F16C is not supported by the CPU (or an equivalent instruction set 7017ec681f3Smrg on other CPU architectures), otherwise they could be impacted by emulated 7027ec681f3Smrg FP16 conversions in glUniform. 7037ec681f3Smrg* ``PIPE_SHADER_CAP_INT16``: Whether 16-bit signed and unsigned integer types 7047ec681f3Smrg are supported. 7057ec681f3Smrg* ``PIPE_SHADER_CAP_GLSL_16BIT_CONSTS``: Lower mediump constants to 16-bit. 7067ec681f3Smrg Note that 16-bit constants are not lowered to uniforms in GLSL. 7077ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture 7087ec681f3Smrg samplers. 7097ec681f3Smrg* ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the 7107ec681f3Smrg program. It should be one of the ``pipe_shader_ir`` enum values. 7117ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture 7127ec681f3Smrg sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS. 7137ec681f3Smrg* ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding 7147ec681f3Smrg is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used. 7157ec681f3Smrg* ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and 7167ec681f3Smrg DLDEXP are supported. 7177ec681f3Smrg* ``PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED``: Whether LDEXP is supported. 7187ec681f3Smrg* ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only) 7197ec681f3Smrg are supported. 7207ec681f3Smrg* ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't 7217ec681f3Smrg ignore tgsi_declaration_range::Last for shader inputs and outputs. 7227ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number 7237ec681f3Smrg of iterations that loops are allowed to have to be unrolled. It is only 7247ec681f3Smrg a hint to gallium frontends. Whether any loops will be unrolled is not 7257ec681f3Smrg guaranteed. 7267ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers 7277ec681f3Smrg (also used to implement atomic counters). Having this be non-0 also 7287ec681f3Smrg implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI 7297ec681f3Smrg opcodes. 7307ec681f3Smrg* ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the 7317ec681f3Smrg program. It should be a mask of ``pipe_shader_ir`` bits. 7327ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units. 7337ec681f3Smrg* ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower 7347ec681f3Smrg cost than this value should be lowered by gallium frontends for better 7357ec681f3Smrg performance. This is a tunable for the GLSL compiler and the behavior is 7367ec681f3Smrg specific to the compiler. 7377ec681f3Smrg* ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers 7387ec681f3Smrg TGSI pass is skipped. This might reduce code size and register pressure if 7397ec681f3Smrg the underlying driver has a real backend compiler. 7407ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS``: If atomic counters are separate, 7417ec681f3Smrg how many HW counters are available for this stage. (0 uses SSBO atomics). 7427ec681f3Smrg* ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``: If atomic counters are 7437ec681f3Smrg separate, how many atomic counter buffers are available for this stage. 7447ec681f3Smrg 7457ec681f3Smrg.. _pipe_compute_cap: 7467ec681f3Smrg 7477ec681f3SmrgPIPE_COMPUTE_CAP_* 7487ec681f3Smrg^^^^^^^^^^^^^^^^^^ 7497ec681f3Smrg 7507ec681f3SmrgCompute-specific capabilities. They can be queried using 7517ec681f3Smrgpipe_screen::get_compute_param. 7527ec681f3Smrg 7537ec681f3Smrg* ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form 7547ec681f3Smrg ``processor-arch-manufacturer-os`` that will be passed on to the compiler. 7557ec681f3Smrg This CAP is only relevant for drivers that specify PIPE_SHADER_IR_NATIVE for 7567ec681f3Smrg their preferred IR. 7577ec681f3Smrg Value type: null-terminated string. Shader IR type dependent. 7587ec681f3Smrg* ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions 7597ec681f3Smrg for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent. 7607ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block 7617ec681f3Smrg units. Value type: ``uint64_t []``. Shader IR type dependent. 7627ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread 7637ec681f3Smrg units. Value type: ``uint64_t []``. Shader IR type dependent. 7647ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that 7657ec681f3Smrg a single block can contain. Value type: ``uint64_t``. Shader IR type dependent. 7667ec681f3Smrg This may be less than the product of the components of MAX_BLOCK_SIZE and is 7677ec681f3Smrg usually limited by the number of threads that can be resident simultaneously 7687ec681f3Smrg on a compute unit. 7697ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL 7707ec681f3Smrg resource. Value type: ``uint64_t``. Shader IR type dependent. 7717ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL 7727ec681f3Smrg resource. Value type: ``uint64_t``. Shader IR type dependent. 7737ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE 7747ec681f3Smrg resource. Value type: ``uint64_t``. Shader IR type dependent. 7757ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT 7767ec681f3Smrg resource. Value type: ``uint64_t``. Shader IR type dependent. 7777ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object 7787ec681f3Smrg allocation in bytes. Value type: ``uint64_t``. 7797ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU 7807ec681f3Smrg clock in MHz. Value type: ``uint32_t`` 7817ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units 7827ec681f3Smrg Value type: ``uint32_t`` 7837ec681f3Smrg* ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported 7847ec681f3Smrg non-zero means yes, zero means no. Value type: ``uint32_t`` 7857ec681f3Smrg* ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in 7867ec681f3Smrg threads. Also known as wavefront size, warp size or SIMD width. 7877ec681f3Smrg* ``PIPE_COMPUTE_CAP_ADDRESS_BITS``: The default compute device address space 7887ec681f3Smrg size specified as an unsigned integer value in bits. 7897ec681f3Smrg* ``PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK``: Maximum variable number 7907ec681f3Smrg of threads that a single block can contain. This is similar to 7917ec681f3Smrg PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, except that the variable size is not 7927ec681f3Smrg known a compile-time but at dispatch-time. 7937ec681f3Smrg 7947ec681f3Smrg.. _pipe_bind: 7957ec681f3Smrg 7967ec681f3SmrgPIPE_BIND_* 7977ec681f3Smrg^^^^^^^^^^^ 7987ec681f3Smrg 7997ec681f3SmrgThese flags indicate how a resource will be used and are specified at resource 8007ec681f3Smrgcreation time. Resources may be used in different roles 8017ec681f3Smrgduring their lifecycle. Bind flags are cumulative and may be combined to create 8027ec681f3Smrga resource which can be used for multiple things. 8037ec681f3SmrgDepending on the pipe driver's memory management and these bind flags, 8047ec681f3Smrgresources might be created and handled quite differently. 8057ec681f3Smrg 8067ec681f3Smrg* ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be 8077ec681f3Smrg rendered to. Any surface/resource attached to pipe_framebuffer_state::cbufs 8087ec681f3Smrg must have this flag set. 8097ec681f3Smrg* ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any 8107ec681f3Smrg depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must 8117ec681f3Smrg have this flag set. 8127ec681f3Smrg* ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to 8137ec681f3Smrg query whether a device supports blending for a given format. 8147ec681f3Smrg If this flag is set, surface creation may fail if blending is not supported 8157ec681f3Smrg for the specified format. If it is not set, a driver may choose to ignore 8167ec681f3Smrg blending on surfaces with formats that would require emulation. 8177ec681f3Smrg* ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to 8187ec681f3Smrg pipe_screen::flush_front_buffer must have this flag set. 8197ec681f3Smrg* ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment 8207ec681f3Smrg or vertex shader. 8217ec681f3Smrg* ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer. 8227ec681f3Smrg* ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer. 8237ec681f3Smrg* ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants. 8247ec681f3Smrg* ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer. 8257ec681f3Smrg* ``PIPE_BIND_CUSTOM``: 8267ec681f3Smrg* ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer. 8277ec681f3Smrg* ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another 8287ec681f3Smrg process. 8297ec681f3Smrg* ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global 8307ec681f3Smrg address space of a compute program. 8317ec681f3Smrg* ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound 8327ec681f3Smrg to a shader and can be used with load, store, and atomic instructions. 8337ec681f3Smrg* ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be 8347ec681f3Smrg bound to a shader and can be used with load, store, and atomic instructions. 8357ec681f3Smrg* ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be 8367ec681f3Smrg bound to the compute program as a shader resource. 8377ec681f3Smrg* ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the 8387ec681f3Smrg GPU command processor. It can contain, for example, the arguments to 8397ec681f3Smrg indirect draw calls. 8407ec681f3Smrg 8417ec681f3Smrg.. _pipe_usage: 8427ec681f3Smrg 8437ec681f3SmrgPIPE_USAGE_* 8447ec681f3Smrg^^^^^^^^^^^^ 8457ec681f3Smrg 8467ec681f3SmrgThe PIPE_USAGE enums are hints about the expected usage pattern of a resource. 8477ec681f3SmrgNote that drivers must always support read and write CPU access at any time 8487ec681f3Smrgno matter which hint they got. 8497ec681f3Smrg 8507ec681f3Smrg* ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access. 8517ec681f3Smrg* ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is 8527ec681f3Smrg not expected to be mapped or changed (even by the GPU) after the first upload. 8537ec681f3Smrg* ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is 8547ec681f3Smrg uploaded is expected to be used at least several times by the GPU. 8557ec681f3Smrg* ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is 8567ec681f3Smrg uploaded is expected to be used only once by the GPU. 8577ec681f3Smrg* ``PIPE_USAGE_STAGING``: Optimized for fast CPU access. 8587ec681f3Smrg 8597ec681f3Smrg 8607ec681f3SmrgMethods 8617ec681f3Smrg------- 8627ec681f3Smrg 8637ec681f3SmrgXXX to-do 8647ec681f3Smrg 8657ec681f3Smrgget_name 8667ec681f3Smrg^^^^^^^^ 8677ec681f3Smrg 8687ec681f3SmrgReturns an identifying name for the screen. 8697ec681f3Smrg 8707ec681f3SmrgThe returned string should remain valid and immutable for the lifetime of 8717ec681f3Smrgpipe_screen. 8727ec681f3Smrg 8737ec681f3Smrgget_vendor 8747ec681f3Smrg^^^^^^^^^^ 8757ec681f3Smrg 8767ec681f3SmrgReturns the screen vendor. 8777ec681f3Smrg 8787ec681f3SmrgThe returned string should remain valid and immutable for the lifetime of 8797ec681f3Smrgpipe_screen. 8807ec681f3Smrg 8817ec681f3Smrgget_device_vendor 8827ec681f3Smrg^^^^^^^^^^^^^^^^^ 8837ec681f3Smrg 8847ec681f3SmrgReturns the actual vendor of the device driving the screen 8857ec681f3Smrg(as opposed to the driver vendor). 8867ec681f3Smrg 8877ec681f3SmrgThe returned string should remain valid and immutable for the lifetime of 8887ec681f3Smrgpipe_screen. 8897ec681f3Smrg 8907ec681f3Smrg.. _get_param: 8917ec681f3Smrg 8927ec681f3Smrgget_param 8937ec681f3Smrg^^^^^^^^^ 8947ec681f3Smrg 8957ec681f3SmrgGet an integer/boolean screen parameter. 8967ec681f3Smrg 8977ec681f3Smrg**param** is one of the :ref:`PIPE_CAP` names. 8987ec681f3Smrg 8997ec681f3Smrg.. _get_paramf: 9007ec681f3Smrg 9017ec681f3Smrgget_paramf 9027ec681f3Smrg^^^^^^^^^^ 9037ec681f3Smrg 9047ec681f3SmrgGet a floating-point screen parameter. 9057ec681f3Smrg 9067ec681f3Smrg**param** is one of the :ref:`PIPE_CAPF` names. 9077ec681f3Smrg 9087ec681f3Smrgcontext_create 9097ec681f3Smrg^^^^^^^^^^^^^^ 9107ec681f3Smrg 9117ec681f3SmrgCreate a pipe_context. 9127ec681f3Smrg 9137ec681f3Smrg**priv** is private data of the caller, which may be put to various 9147ec681f3Smrgunspecified uses, typically to do with implementing swapbuffers 9157ec681f3Smrgand/or front-buffer rendering. 9167ec681f3Smrg 9177ec681f3Smrgis_format_supported 9187ec681f3Smrg^^^^^^^^^^^^^^^^^^^ 9197ec681f3Smrg 9207ec681f3SmrgDetermine if a resource in the given format can be used in a specific manner. 9217ec681f3Smrg 9227ec681f3Smrg**format** the resource format 9237ec681f3Smrg 9247ec681f3Smrg**target** one of the PIPE_TEXTURE_x flags 9257ec681f3Smrg 9267ec681f3Smrg**sample_count** the number of samples. 0 and 1 mean no multisampling, 9277ec681f3Smrgthe maximum allowed legal value is 32. 9287ec681f3Smrg 9297ec681f3Smrg**storage_sample_count** the number of storage samples. This must be <= 9307ec681f3Smrgsample_count. See the documentation of ``pipe_resource::nr_storage_samples``. 9317ec681f3Smrg 9327ec681f3Smrg**bindings** is a bitmask of :ref:`PIPE_BIND` flags. 9337ec681f3Smrg 9347ec681f3SmrgReturns TRUE if all usages can be satisfied. 9357ec681f3Smrg 9367ec681f3Smrg 9377ec681f3Smrgcan_create_resource 9387ec681f3Smrg^^^^^^^^^^^^^^^^^^^ 9397ec681f3Smrg 9407ec681f3SmrgCheck if a resource can actually be created (but don't actually allocate any 9417ec681f3Smrgmemory). This is used to implement OpenGL's proxy textures. Typically, a 9427ec681f3Smrgdriver will simply check if the total size of the given resource is less than 9437ec681f3Smrgsome limit. 9447ec681f3Smrg 9457ec681f3SmrgFor PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6. 9467ec681f3Smrg 9477ec681f3Smrg 9487ec681f3Smrg.. _resource_create: 9497ec681f3Smrg 9507ec681f3Smrgresource_create 9517ec681f3Smrg^^^^^^^^^^^^^^^ 9527ec681f3Smrg 9537ec681f3SmrgCreate a new resource from a template. 9547ec681f3SmrgThe following fields of the pipe_resource must be specified in the template: 9557ec681f3Smrg 9567ec681f3Smrg**target** one of the pipe_texture_target enums. 9577ec681f3SmrgNote that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different. 9587ec681f3SmrgModern APIs allow using buffers as shader resources. 9597ec681f3Smrg 9607ec681f3Smrg**format** one of the pipe_format enums. 9617ec681f3Smrg 9627ec681f3Smrg**width0** the width of the base mip level of the texture or size of the buffer. 9637ec681f3Smrg 9647ec681f3Smrg**height0** the height of the base mip level of the texture 9657ec681f3Smrg(1 for 1D or 1D array textures). 9667ec681f3Smrg 9677ec681f3Smrg**depth0** the depth of the base mip level of the texture 9687ec681f3Smrg(1 for everything else). 9697ec681f3Smrg 9707ec681f3Smrg**array_size** the array size for 1D and 2D array textures. 9717ec681f3SmrgFor cube maps this must be 6, for other textures 1. 9727ec681f3Smrg 9737ec681f3Smrg**last_level** the last mip map level present. 9747ec681f3Smrg 9757ec681f3Smrg**nr_samples**: Number of samples determining quality, driving the rasterizer, 9767ec681f3Smrgshading, and framebuffer. It is the number of samples seen by the whole 9777ec681f3Smrggraphics pipeline. 0 and 1 specify a resource which isn't multisampled. 9787ec681f3Smrg 9797ec681f3Smrg**nr_storage_samples**: Only color buffers can set this lower than nr_samples. 9807ec681f3SmrgMultiple samples within a pixel can have the same color. ``nr_storage_samples`` 9817ec681f3Smrgdetermines how many slots for different colors there are per pixel. 9827ec681f3SmrgIf there are not enough slots to store all sample colors, some samples will 9837ec681f3Smrghave an undefined color (called "undefined samples"). 9847ec681f3Smrg 9857ec681f3SmrgThe resolve blit behavior is driver-specific, but can be one of these two: 9867ec681f3Smrg 9877ec681f3Smrg1. Only defined samples will be averaged. Undefined samples will be ignored. 9887ec681f3Smrg2. Undefined samples will be approximated by looking at surrounding defined 9897ec681f3Smrg samples (even in different pixels). 9907ec681f3Smrg 9917ec681f3SmrgBlits and MSAA texturing: If the sample being fetched is undefined, one of 9927ec681f3Smrgthe defined samples is returned instead. 9937ec681f3Smrg 9947ec681f3SmrgSample shading (``set_min_samples``) will operate at a sample frequency that 9957ec681f3Smrgis at most ``nr_storage_samples``. Greater ``min_samples`` values will be 9967ec681f3Smrgreplaced by ``nr_storage_samples``. 9977ec681f3Smrg 9987ec681f3Smrg**usage** one of the :ref:`PIPE_USAGE` flags. 9997ec681f3Smrg 10007ec681f3Smrg**bind** bitmask of the :ref:`PIPE_BIND` flags. 10017ec681f3Smrg 10027ec681f3Smrg**flags** bitmask of PIPE_RESOURCE_FLAG flags. 10037ec681f3Smrg 10047ec681f3Smrg**next**: Pointer to the next plane for resources that consist of multiple 10057ec681f3Smrgmemory planes. 10067ec681f3Smrg 10077ec681f3SmrgAs a corollary, this mean resources for an image with multiple planes have 10087ec681f3Smrgto be created starting from the highest plane. 10097ec681f3Smrg 10107ec681f3Smrgresource_changed 10117ec681f3Smrg^^^^^^^^^^^^^^^^ 10127ec681f3Smrg 10137ec681f3SmrgMark a resource as changed so derived internal resources will be recreated 10147ec681f3Smrgon next use. 10157ec681f3Smrg 10167ec681f3SmrgWhen importing external images that can't be directly used as texture sampler 10177ec681f3Smrgsource, internal copies may have to be created that the hardware can sample 10187ec681f3Smrgfrom. When those resources are reimported, the image data may have changed, and 10197ec681f3Smrgthe previously derived internal resources must be invalidated to avoid sampling 10207ec681f3Smrgfrom old copies. 10217ec681f3Smrg 10227ec681f3Smrg 10237ec681f3Smrg 10247ec681f3Smrgresource_destroy 10257ec681f3Smrg^^^^^^^^^^^^^^^^ 10267ec681f3Smrg 10277ec681f3SmrgDestroy a resource. A resource is destroyed if it has no more references. 10287ec681f3Smrg 10297ec681f3Smrg 10307ec681f3Smrg 10317ec681f3Smrgget_timestamp 10327ec681f3Smrg^^^^^^^^^^^^^ 10337ec681f3Smrg 10347ec681f3SmrgQuery a timestamp in nanoseconds. The returned value should match 10357ec681f3SmrgPIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't 10367ec681f3Smrgwait for rendering to complete (which cannot be achieved with queries). 10377ec681f3Smrg 10387ec681f3Smrg 10397ec681f3Smrg 10407ec681f3Smrgget_driver_query_info 10417ec681f3Smrg^^^^^^^^^^^^^^^^^^^^^ 10427ec681f3Smrg 10437ec681f3SmrgReturn a driver-specific query. If the **info** parameter is NULL, 10447ec681f3Smrgthe number of available queries is returned. Otherwise, the driver 10457ec681f3Smrgquery at the specified **index** is returned in **info**. 10467ec681f3SmrgThe function returns non-zero on success. 10477ec681f3SmrgThe driver-specific query is described with the pipe_driver_query_info 10487ec681f3Smrgstructure. 10497ec681f3Smrg 10507ec681f3Smrgget_driver_query_group_info 10517ec681f3Smrg^^^^^^^^^^^^^^^^^^^^^^^^^^^ 10527ec681f3Smrg 10537ec681f3SmrgReturn a driver-specific query group. If the **info** parameter is NULL, 10547ec681f3Smrgthe number of available groups is returned. Otherwise, the driver 10557ec681f3Smrgquery group at the specified **index** is returned in **info**. 10567ec681f3SmrgThe function returns non-zero on success. 10577ec681f3SmrgThe driver-specific query group is described with the 10587ec681f3Smrgpipe_driver_query_group_info structure. 10597ec681f3Smrg 10607ec681f3Smrg 10617ec681f3Smrg 10627ec681f3Smrgget_disk_shader_cache 10637ec681f3Smrg^^^^^^^^^^^^^^^^^^^^^ 10647ec681f3Smrg 10657ec681f3SmrgReturns a pointer to a driver-specific on-disk shader cache. If the driver 10667ec681f3Smrgfailed to create the cache or does not support an on-disk shader cache NULL is 10677ec681f3Smrgreturned. The callback itself may also be NULL if the driver doesn't support 10687ec681f3Smrgan on-disk shader cache. 10697ec681f3Smrg 10707ec681f3Smrg 10717ec681f3Smrgis_dmabuf_modifier_supported 10727ec681f3Smrg^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 10737ec681f3Smrg 10747ec681f3SmrgQuery whether the driver supports a **modifier** in combination with a 10757ec681f3Smrg**format**, and whether it is only supported with "external" texture targets. 10767ec681f3SmrgIf the combination is supported in any fashion, true is returned. If the 10777ec681f3Smrg**external_only** parameter is not NULL, the bool it points to is set to 10787ec681f3Smrgfalse if non-external texture targets are supported with the specified modifier+ 10797ec681f3Smrgformat, or true if only external texture targets are supported. 10807ec681f3Smrg 10817ec681f3Smrg 10827ec681f3Smrgget_dmabuf_modifier_planes 10837ec681f3Smrg^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 10847ec681f3Smrg 10857ec681f3SmrgQuery the number of planes required by the image layout specified by the 10867ec681f3Smrg**modifier** and **format** parameters. The value returned includes both planes 10877ec681f3Smrgdictated by **format** and any additional planes required for driver-specific 10887ec681f3Smrgauxiliary data necessary for the layout defined by **modifier**. 10897ec681f3SmrgIf the proc is NULL, no auxiliary planes are required for any layout supported by 10907ec681f3Smrg**screen** and the number of planes can be derived directly from **format**. 10917ec681f3Smrg 10927ec681f3Smrg 10937ec681f3SmrgThread safety 10947ec681f3Smrg------------- 10957ec681f3Smrg 10967ec681f3SmrgScreen methods are required to be thread safe. While gallium rendering 10977ec681f3Smrgcontexts are not required to be thread safe, it is required to be safe to use 10987ec681f3Smrgdifferent contexts created with the same screen in different threads without 10997ec681f3Smrglocks. It is also required to be safe using screen methods in a thread, while 11007ec681f3Smrgusing one of its contexts in another (without locks). 1101