1/* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24#include "ac_debug.h" 25 26#ifdef HAVE_VALGRIND 27#include <memcheck.h> 28#include <valgrind.h> 29#define VG(x) x 30#else 31#define VG(x) ((void)0) 32#endif 33 34#include "sid.h" 35#include "sid_tables.h" 36#include "util/compiler.h" 37#include "util/memstream.h" 38#include "util/u_math.h" 39#include "util/u_memory.h" 40#include "util/u_string.h" 41 42#include <assert.h> 43#include <inttypes.h> 44 45DEBUG_GET_ONCE_BOOL_OPTION(color, "AMD_COLOR", true); 46 47/* Parsed IBs are difficult to read without colors. Use "less -R file" to 48 * read them, or use "aha -b -f file" to convert them to html. 49 */ 50#define COLOR_RESET "\033[0m" 51#define COLOR_RED "\033[31m" 52#define COLOR_GREEN "\033[1;32m" 53#define COLOR_YELLOW "\033[1;33m" 54#define COLOR_CYAN "\033[1;36m" 55 56#define O_COLOR_RESET (debug_get_option_color() ? COLOR_RESET : "") 57#define O_COLOR_RED (debug_get_option_color() ? COLOR_RED : "") 58#define O_COLOR_GREEN (debug_get_option_color() ? COLOR_GREEN : "") 59#define O_COLOR_YELLOW (debug_get_option_color() ? COLOR_YELLOW : "") 60#define O_COLOR_CYAN (debug_get_option_color() ? COLOR_CYAN : "") 61 62#define INDENT_PKT 8 63 64struct ac_ib_parser { 65 FILE *f; 66 uint32_t *ib; 67 unsigned num_dw; 68 const int *trace_ids; 69 unsigned trace_id_count; 70 enum chip_class chip_class; 71 ac_debug_addr_callback addr_callback; 72 void *addr_callback_data; 73 74 unsigned cur_dw; 75}; 76 77static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib); 78 79static void print_spaces(FILE *f, unsigned num) 80{ 81 fprintf(f, "%*s", num, ""); 82} 83 84static void print_value(FILE *file, uint32_t value, int bits) 85{ 86 /* Guess if it's int or float */ 87 if (value <= (1 << 15)) { 88 if (value <= 9) 89 fprintf(file, "%u\n", value); 90 else 91 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value); 92 } else { 93 float f = uif(value); 94 95 if (fabs(f) < 100000 && f * 10 == floor(f * 10)) 96 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value); 97 else 98 /* Don't print more leading zeros than there are bits. */ 99 fprintf(file, "0x%0*x\n", bits / 4, value); 100 } 101} 102 103static void print_named_value(FILE *file, const char *name, uint32_t value, int bits) 104{ 105 print_spaces(file, INDENT_PKT); 106 fprintf(file, "%s%s%s <- ", 107 O_COLOR_YELLOW, name, 108 O_COLOR_RESET); 109 print_value(file, value, bits); 110} 111 112static const struct si_reg *find_register(enum chip_class chip_class, unsigned offset) 113{ 114 const struct si_reg *table; 115 unsigned table_size; 116 117 switch (chip_class) { 118 case GFX10_3: 119 case GFX10: 120 table = gfx10_reg_table; 121 table_size = ARRAY_SIZE(gfx10_reg_table); 122 break; 123 case GFX9: 124 table = gfx9_reg_table; 125 table_size = ARRAY_SIZE(gfx9_reg_table); 126 break; 127 case GFX8: 128 table = gfx8_reg_table; 129 table_size = ARRAY_SIZE(gfx8_reg_table); 130 break; 131 case GFX7: 132 table = gfx7_reg_table; 133 table_size = ARRAY_SIZE(gfx7_reg_table); 134 break; 135 case GFX6: 136 table = gfx6_reg_table; 137 table_size = ARRAY_SIZE(gfx6_reg_table); 138 break; 139 default: 140 return NULL; 141 } 142 143 for (unsigned i = 0; i < table_size; i++) { 144 const struct si_reg *reg = &table[i]; 145 146 if (reg->offset == offset) 147 return reg; 148 } 149 150 return NULL; 151} 152 153const char *ac_get_register_name(enum chip_class chip_class, unsigned offset) 154{ 155 const struct si_reg *reg = find_register(chip_class, offset); 156 157 return reg ? sid_strings + reg->name_offset : "(no name)"; 158} 159 160void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset, uint32_t value, 161 uint32_t field_mask) 162{ 163 const struct si_reg *reg = find_register(chip_class, offset); 164 165 if (reg) { 166 const char *reg_name = sid_strings + reg->name_offset; 167 bool first_field = true; 168 169 print_spaces(file, INDENT_PKT); 170 fprintf(file, "%s%s%s <- ", 171 O_COLOR_YELLOW, reg_name, 172 O_COLOR_RESET); 173 174 if (!reg->num_fields) { 175 print_value(file, value, 32); 176 return; 177 } 178 179 for (unsigned f = 0; f < reg->num_fields; f++) { 180 const struct si_field *field = sid_fields_table + reg->fields_offset + f; 181 const int *values_offsets = sid_strings_offsets + field->values_offset; 182 uint32_t val = (value & field->mask) >> (ffs(field->mask) - 1); 183 184 if (!(field->mask & field_mask)) 185 continue; 186 187 /* Indent the field. */ 188 if (!first_field) 189 print_spaces(file, INDENT_PKT + strlen(reg_name) + 4); 190 191 /* Print the field. */ 192 fprintf(file, "%s = ", sid_strings + field->name_offset); 193 194 if (val < field->num_values && values_offsets[val] >= 0) 195 fprintf(file, "%s\n", sid_strings + values_offsets[val]); 196 else 197 print_value(file, val, util_bitcount(field->mask)); 198 199 first_field = false; 200 } 201 return; 202 } 203 204 print_spaces(file, INDENT_PKT); 205 fprintf(file, "%s0x%05x%s <- 0x%08x\n", 206 O_COLOR_YELLOW, offset, 207 O_COLOR_RESET, value); 208} 209 210static uint32_t ac_ib_get(struct ac_ib_parser *ib) 211{ 212 uint32_t v = 0; 213 214 if (ib->cur_dw < ib->num_dw) { 215 v = ib->ib[ib->cur_dw]; 216#ifdef HAVE_VALGRIND 217 /* Help figure out where garbage data is written to IBs. 218 * 219 * Arguably we should do this already when the IBs are written, 220 * see RADEON_VALGRIND. The problem is that client-requests to 221 * Valgrind have an overhead even when Valgrind isn't running, 222 * and radeon_emit is performance sensitive... 223 */ 224 if (VALGRIND_CHECK_VALUE_IS_DEFINED(v)) 225 fprintf(ib->f, "%sValgrind: The next DWORD is garbage%s\n", 226 debug_get_option_color() ? COLOR_RED : "", O_COLOR_RESET); 227#endif 228 fprintf(ib->f, "\n\035#%08x ", v); 229 } else { 230 fprintf(ib->f, "\n\035#???????? "); 231 } 232 233 ib->cur_dw++; 234 return v; 235} 236 237static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset, 238 struct ac_ib_parser *ib) 239{ 240 unsigned reg_dw = ac_ib_get(ib); 241 unsigned reg = ((reg_dw & 0xFFFF) << 2) + reg_offset; 242 unsigned index = reg_dw >> 28; 243 int i; 244 245 if (index != 0) { 246 print_spaces(f, INDENT_PKT); 247 fprintf(f, "INDEX = %u\n", index); 248 } 249 250 for (i = 0; i < count; i++) 251 ac_dump_reg(f, ib->chip_class, reg + i * 4, ac_ib_get(ib), ~0); 252} 253 254static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib, 255 int *current_trace_id) 256{ 257 unsigned first_dw = ib->cur_dw; 258 int count = PKT_COUNT_G(header); 259 unsigned op = PKT3_IT_OPCODE_G(header); 260 const char *predicate = PKT3_PREDICATE(header) ? "(predicate)" : ""; 261 int i; 262 263 /* Print the name first. */ 264 for (i = 0; i < ARRAY_SIZE(packet3_table); i++) 265 if (packet3_table[i].op == op) 266 break; 267 268 if (i < ARRAY_SIZE(packet3_table)) { 269 const char *name = sid_strings + packet3_table[i].name_offset; 270 271 if (op == PKT3_SET_CONTEXT_REG || op == PKT3_SET_CONFIG_REG || op == PKT3_SET_UCONFIG_REG || 272 op == PKT3_SET_UCONFIG_REG_INDEX || op == PKT3_SET_SH_REG) 273 fprintf(f, "%s%s%s%s:\n", O_COLOR_CYAN, name, predicate, O_COLOR_RESET); 274 else 275 fprintf(f, "%s%s%s%s:\n", O_COLOR_GREEN, name, predicate, O_COLOR_RESET); 276 } else 277 fprintf(f, "%sPKT3_UNKNOWN 0x%x%s%s:\n", O_COLOR_RED, op, predicate, O_COLOR_RESET); 278 279 /* Print the contents. */ 280 switch (op) { 281 case PKT3_SET_CONTEXT_REG: 282 ac_parse_set_reg_packet(f, count, SI_CONTEXT_REG_OFFSET, ib); 283 break; 284 case PKT3_SET_CONFIG_REG: 285 ac_parse_set_reg_packet(f, count, SI_CONFIG_REG_OFFSET, ib); 286 break; 287 case PKT3_SET_UCONFIG_REG: 288 case PKT3_SET_UCONFIG_REG_INDEX: 289 ac_parse_set_reg_packet(f, count, CIK_UCONFIG_REG_OFFSET, ib); 290 break; 291 case PKT3_SET_SH_REG: 292 ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib); 293 break; 294 case PKT3_ACQUIRE_MEM: 295 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0); 296 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0); 297 ac_dump_reg(f, ib->chip_class, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0); 298 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0); 299 ac_dump_reg(f, ib->chip_class, R_0301E4_CP_COHER_BASE_HI, ac_ib_get(ib), ~0); 300 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16); 301 if (ib->chip_class >= GFX10) 302 ac_dump_reg(f, ib->chip_class, R_586_GCR_CNTL, ac_ib_get(ib), ~0); 303 break; 304 case PKT3_SURFACE_SYNC: 305 if (ib->chip_class >= GFX7) { 306 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0); 307 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0); 308 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0); 309 } else { 310 ac_dump_reg(f, ib->chip_class, R_0085F0_CP_COHER_CNTL, ac_ib_get(ib), ~0); 311 ac_dump_reg(f, ib->chip_class, R_0085F4_CP_COHER_SIZE, ac_ib_get(ib), ~0); 312 ac_dump_reg(f, ib->chip_class, R_0085F8_CP_COHER_BASE, ac_ib_get(ib), ~0); 313 } 314 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16); 315 break; 316 case PKT3_EVENT_WRITE: { 317 uint32_t event_dw = ac_ib_get(ib); 318 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw, 319 S_028A90_EVENT_TYPE(~0)); 320 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4); 321 print_named_value(f, "INV_L2", (event_dw >> 20) & 0x1, 1); 322 if (count > 0) { 323 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32); 324 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 16); 325 } 326 break; 327 } 328 case PKT3_EVENT_WRITE_EOP: { 329 uint32_t event_dw = ac_ib_get(ib); 330 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw, 331 S_028A90_EVENT_TYPE(~0)); 332 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4); 333 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1); 334 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1); 335 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1); 336 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1); 337 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1); 338 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32); 339 uint32_t addr_hi_dw = ac_ib_get(ib); 340 print_named_value(f, "ADDRESS_HI", addr_hi_dw, 16); 341 print_named_value(f, "DST_SEL", (addr_hi_dw >> 16) & 0x3, 2); 342 print_named_value(f, "INT_SEL", (addr_hi_dw >> 24) & 0x7, 3); 343 print_named_value(f, "DATA_SEL", addr_hi_dw >> 29, 3); 344 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32); 345 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32); 346 break; 347 } 348 case PKT3_RELEASE_MEM: { 349 uint32_t event_dw = ac_ib_get(ib); 350 if (ib->chip_class >= GFX10) { 351 ac_dump_reg(f, ib->chip_class, R_490_RELEASE_MEM_OP, event_dw, ~0u); 352 } else { 353 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw, 354 S_028A90_EVENT_TYPE(~0)); 355 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4); 356 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1); 357 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1); 358 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1); 359 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1); 360 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1); 361 print_named_value(f, "TC_NC_ACTION_ENA", (event_dw >> 19) & 0x1, 1); 362 print_named_value(f, "TC_WC_ACTION_ENA", (event_dw >> 20) & 0x1, 1); 363 print_named_value(f, "TC_MD_ACTION_ENA", (event_dw >> 21) & 0x1, 1); 364 } 365 uint32_t sel_dw = ac_ib_get(ib); 366 print_named_value(f, "DST_SEL", (sel_dw >> 16) & 0x3, 2); 367 print_named_value(f, "INT_SEL", (sel_dw >> 24) & 0x7, 3); 368 print_named_value(f, "DATA_SEL", sel_dw >> 29, 3); 369 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32); 370 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32); 371 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32); 372 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32); 373 print_named_value(f, "CTXID", ac_ib_get(ib), 32); 374 break; 375 } 376 case PKT3_WAIT_REG_MEM: 377 print_named_value(f, "OP", ac_ib_get(ib), 32); 378 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32); 379 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32); 380 print_named_value(f, "REF", ac_ib_get(ib), 32); 381 print_named_value(f, "MASK", ac_ib_get(ib), 32); 382 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16); 383 break; 384 case PKT3_DRAW_INDEX_AUTO: 385 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0); 386 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0); 387 break; 388 case PKT3_DRAW_INDEX_2: 389 ac_dump_reg(f, ib->chip_class, R_028A78_VGT_DMA_MAX_SIZE, ac_ib_get(ib), ~0); 390 ac_dump_reg(f, ib->chip_class, R_0287E8_VGT_DMA_BASE, ac_ib_get(ib), ~0); 391 ac_dump_reg(f, ib->chip_class, R_0287E4_VGT_DMA_BASE_HI, ac_ib_get(ib), ~0); 392 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0); 393 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0); 394 break; 395 case PKT3_INDEX_TYPE: 396 ac_dump_reg(f, ib->chip_class, R_028A7C_VGT_DMA_INDEX_TYPE, ac_ib_get(ib), ~0); 397 break; 398 case PKT3_NUM_INSTANCES: 399 ac_dump_reg(f, ib->chip_class, R_030934_VGT_NUM_INSTANCES, ac_ib_get(ib), ~0); 400 break; 401 case PKT3_WRITE_DATA: 402 ac_dump_reg(f, ib->chip_class, R_370_CONTROL, ac_ib_get(ib), ~0); 403 ac_dump_reg(f, ib->chip_class, R_371_DST_ADDR_LO, ac_ib_get(ib), ~0); 404 ac_dump_reg(f, ib->chip_class, R_372_DST_ADDR_HI, ac_ib_get(ib), ~0); 405 /* The payload is written automatically */ 406 break; 407 case PKT3_CP_DMA: 408 ac_dump_reg(f, ib->chip_class, R_410_CP_DMA_WORD0, ac_ib_get(ib), ~0); 409 ac_dump_reg(f, ib->chip_class, R_411_CP_DMA_WORD1, ac_ib_get(ib), ~0); 410 ac_dump_reg(f, ib->chip_class, R_412_CP_DMA_WORD2, ac_ib_get(ib), ~0); 411 ac_dump_reg(f, ib->chip_class, R_413_CP_DMA_WORD3, ac_ib_get(ib), ~0); 412 ac_dump_reg(f, ib->chip_class, R_415_COMMAND, ac_ib_get(ib), ~0); 413 break; 414 case PKT3_DMA_DATA: 415 ac_dump_reg(f, ib->chip_class, R_500_DMA_DATA_WORD0, ac_ib_get(ib), ~0); 416 ac_dump_reg(f, ib->chip_class, R_501_SRC_ADDR_LO, ac_ib_get(ib), ~0); 417 ac_dump_reg(f, ib->chip_class, R_502_SRC_ADDR_HI, ac_ib_get(ib), ~0); 418 ac_dump_reg(f, ib->chip_class, R_503_DST_ADDR_LO, ac_ib_get(ib), ~0); 419 ac_dump_reg(f, ib->chip_class, R_504_DST_ADDR_HI, ac_ib_get(ib), ~0); 420 ac_dump_reg(f, ib->chip_class, R_415_COMMAND, ac_ib_get(ib), ~0); 421 break; 422 case PKT3_INDIRECT_BUFFER_SI: 423 case PKT3_INDIRECT_BUFFER_CONST: 424 case PKT3_INDIRECT_BUFFER_CIK: { 425 uint32_t base_lo_dw = ac_ib_get(ib); 426 ac_dump_reg(f, ib->chip_class, R_3F0_IB_BASE_LO, base_lo_dw, ~0); 427 uint32_t base_hi_dw = ac_ib_get(ib); 428 ac_dump_reg(f, ib->chip_class, R_3F1_IB_BASE_HI, base_hi_dw, ~0); 429 uint32_t control_dw = ac_ib_get(ib); 430 ac_dump_reg(f, ib->chip_class, R_3F2_IB_CONTROL, control_dw, ~0); 431 432 if (!ib->addr_callback) 433 break; 434 435 uint64_t addr = ((uint64_t)base_hi_dw << 32) | base_lo_dw; 436 void *data = ib->addr_callback(ib->addr_callback_data, addr); 437 if (!data) 438 break; 439 440 if (G_3F2_CHAIN(control_dw)) { 441 ib->ib = data; 442 ib->num_dw = G_3F2_IB_SIZE(control_dw); 443 ib->cur_dw = 0; 444 return; 445 } 446 447 struct ac_ib_parser ib_recurse; 448 memcpy(&ib_recurse, ib, sizeof(ib_recurse)); 449 ib_recurse.ib = data; 450 ib_recurse.num_dw = G_3F2_IB_SIZE(control_dw); 451 ib_recurse.cur_dw = 0; 452 if (ib_recurse.trace_id_count) { 453 if (*current_trace_id == *ib->trace_ids) { 454 ++ib_recurse.trace_ids; 455 --ib_recurse.trace_id_count; 456 } else { 457 ib_recurse.trace_id_count = 0; 458 } 459 } 460 461 fprintf(f, "\n\035>------------------ nested begin ------------------\n"); 462 ac_do_parse_ib(f, &ib_recurse); 463 fprintf(f, "\n\035<------------------- nested end -------------------\n"); 464 break; 465 } 466 case PKT3_CLEAR_STATE: 467 case PKT3_INCREMENT_DE_COUNTER: 468 case PKT3_PFP_SYNC_ME: 469 break; 470 case PKT3_NOP: 471 if (header == PKT3_NOP_PAD) { 472 count = -1; /* One dword NOP. */ 473 } else if (count == 0 && ib->cur_dw < ib->num_dw && AC_IS_TRACE_POINT(ib->ib[ib->cur_dw])) { 474 unsigned packet_id = AC_GET_TRACE_POINT_ID(ib->ib[ib->cur_dw]); 475 476 print_spaces(f, INDENT_PKT); 477 fprintf(f, "%sTrace point ID: %u%s\n", O_COLOR_RED, packet_id, O_COLOR_RESET); 478 479 if (!ib->trace_id_count) 480 break; /* tracing was disabled */ 481 482 *current_trace_id = packet_id; 483 484 print_spaces(f, INDENT_PKT); 485 if (packet_id < *ib->trace_ids) { 486 fprintf(f, "%sThis trace point was reached by the CP.%s\n", 487 O_COLOR_RED, O_COLOR_RESET); 488 } else if (packet_id == *ib->trace_ids) { 489 fprintf(f, "%s!!!!! This is the last trace point that " 490 "was reached by the CP !!!!!%s\n", 491 O_COLOR_RED, O_COLOR_RESET); 492 } else if (packet_id + 1 == *ib->trace_ids) { 493 fprintf(f, "%s!!!!! This is the first trace point that " 494 "was NOT been reached by the CP !!!!!%s\n", 495 O_COLOR_RED, O_COLOR_RESET); 496 } else { 497 fprintf(f, "%s!!!!! This trace point was NOT reached " 498 "by the CP !!!!!%s\n", 499 O_COLOR_RED, O_COLOR_RESET); 500 } 501 break; 502 } 503 break; 504 } 505 506 /* print additional dwords */ 507 while (ib->cur_dw <= first_dw + count) 508 ac_ib_get(ib); 509 510 if (ib->cur_dw > first_dw + count + 1) 511 fprintf(f, "%s !!!!! count in header too low !!!!!%s\n", 512 O_COLOR_RED, O_COLOR_RESET); 513} 514 515/** 516 * Parse and print an IB into a file. 517 */ 518static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib) 519{ 520 int current_trace_id = -1; 521 522 while (ib->cur_dw < ib->num_dw) { 523 uint32_t header = ac_ib_get(ib); 524 unsigned type = PKT_TYPE_G(header); 525 526 switch (type) { 527 case 3: 528 ac_parse_packet3(f, header, ib, ¤t_trace_id); 529 break; 530 case 2: 531 /* type-2 nop */ 532 if (header == 0x80000000) { 533 fprintf(f, "%sNOP (type 2)%s\n", 534 O_COLOR_GREEN, O_COLOR_RESET); 535 break; 536 } 537 FALLTHROUGH; 538 default: 539 fprintf(f, "Unknown packet type %i\n", type); 540 break; 541 } 542 } 543} 544 545static void format_ib_output(FILE *f, char *out) 546{ 547 unsigned depth = 0; 548 549 for (;;) { 550 char op = 0; 551 552 if (out[0] == '\n' && out[1] == '\035') 553 out++; 554 if (out[0] == '\035') { 555 op = out[1]; 556 out += 2; 557 } 558 559 if (op == '<') 560 depth--; 561 562 unsigned indent = 4 * depth; 563 if (op != '#') 564 indent += 9; 565 566 if (indent) 567 print_spaces(f, indent); 568 569 char *end = strchrnul(out, '\n'); 570 fwrite(out, end - out, 1, f); 571 fputc('\n', f); /* always end with a new line */ 572 if (!*end) 573 break; 574 575 out = end + 1; 576 577 if (op == '>') 578 depth++; 579 } 580} 581 582/** 583 * Parse and print an IB into a file. 584 * 585 * \param f file 586 * \param ib_ptr IB 587 * \param num_dw size of the IB 588 * \param chip_class chip class 589 * \param trace_ids the last trace IDs that are known to have been reached 590 * and executed by the CP, typically read from a buffer 591 * \param trace_id_count The number of entries in the trace_ids array. 592 * \param addr_callback Get a mapped pointer of the IB at a given address. Can 593 * be NULL. 594 * \param addr_callback_data user data for addr_callback 595 */ 596void ac_parse_ib_chunk(FILE *f, uint32_t *ib_ptr, int num_dw, const int *trace_ids, 597 unsigned trace_id_count, enum chip_class chip_class, 598 ac_debug_addr_callback addr_callback, void *addr_callback_data) 599{ 600 struct ac_ib_parser ib = {0}; 601 ib.ib = ib_ptr; 602 ib.num_dw = num_dw; 603 ib.trace_ids = trace_ids; 604 ib.trace_id_count = trace_id_count; 605 ib.chip_class = chip_class; 606 ib.addr_callback = addr_callback; 607 ib.addr_callback_data = addr_callback_data; 608 609 char *out; 610 size_t outsize; 611 struct u_memstream mem; 612 u_memstream_open(&mem, &out, &outsize); 613 FILE *const memf = u_memstream_get(&mem); 614 ib.f = memf; 615 ac_do_parse_ib(memf, &ib); 616 u_memstream_close(&mem); 617 618 if (out) { 619 format_ib_output(f, out); 620 free(out); 621 } 622 623 if (ib.cur_dw > ib.num_dw) { 624 printf("\nPacket ends after the end of IB.\n"); 625 exit(1); 626 } 627} 628 629/** 630 * Parse and print an IB into a file. 631 * 632 * \param f file 633 * \param ib IB 634 * \param num_dw size of the IB 635 * \param chip_class chip class 636 * \param trace_ids the last trace IDs that are known to have been reached 637 * and executed by the CP, typically read from a buffer 638 * \param trace_id_count The number of entries in the trace_ids array. 639 * \param addr_callback Get a mapped pointer of the IB at a given address. Can 640 * be NULL. 641 * \param addr_callback_data user data for addr_callback 642 */ 643void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids, unsigned trace_id_count, 644 const char *name, enum chip_class chip_class, ac_debug_addr_callback addr_callback, 645 void *addr_callback_data) 646{ 647 fprintf(f, "------------------ %s begin ------------------\n", name); 648 649 ac_parse_ib_chunk(f, ib, num_dw, trace_ids, trace_id_count, chip_class, addr_callback, 650 addr_callback_data); 651 652 fprintf(f, "------------------- %s end -------------------\n\n", name); 653} 654 655/** 656 * Parse dmesg and return TRUE if a VM fault has been detected. 657 * 658 * \param chip_class chip class 659 * \param old_dmesg_timestamp previous dmesg timestamp parsed at init time 660 * \param out_addr detected VM fault addr 661 */ 662bool ac_vm_fault_occured(enum chip_class chip_class, uint64_t *old_dmesg_timestamp, 663 uint64_t *out_addr) 664{ 665#ifdef _WIN32 666 return false; 667#else 668 char line[2000]; 669 unsigned sec, usec; 670 int progress = 0; 671 uint64_t dmesg_timestamp = 0; 672 bool fault = false; 673 674 FILE *p = popen("dmesg", "r"); 675 if (!p) 676 return false; 677 678 while (fgets(line, sizeof(line), p)) { 679 char *msg, len; 680 681 if (!line[0] || line[0] == '\n') 682 continue; 683 684 /* Get the timestamp. */ 685 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) { 686 static bool hit = false; 687 if (!hit) { 688 fprintf(stderr, "%s: failed to parse line '%s'\n", __func__, line); 689 hit = true; 690 } 691 continue; 692 } 693 dmesg_timestamp = sec * 1000000ull + usec; 694 695 /* If just updating the timestamp. */ 696 if (!out_addr) 697 continue; 698 699 /* Process messages only if the timestamp is newer. */ 700 if (dmesg_timestamp <= *old_dmesg_timestamp) 701 continue; 702 703 /* Only process the first VM fault. */ 704 if (fault) 705 continue; 706 707 /* Remove trailing \n */ 708 len = strlen(line); 709 if (len && line[len - 1] == '\n') 710 line[len - 1] = 0; 711 712 /* Get the message part. */ 713 msg = strchr(line, ']'); 714 if (!msg) 715 continue; 716 msg++; 717 718 const char *header_line, *addr_line_prefix, *addr_line_format; 719 720 if (chip_class >= GFX9) { 721 /* Match this: 722 * ..: [gfxhub] VMC page fault (src_id:0 ring:158 vm_id:2 pas_id:0) 723 * ..: at page 0x0000000219f8f000 from 27 724 * ..: VM_L2_PROTECTION_FAULT_STATUS:0x0020113C 725 */ 726 header_line = "VMC page fault"; 727 addr_line_prefix = " at page"; 728 addr_line_format = "%" PRIx64; 729 } else { 730 header_line = "GPU fault detected:"; 731 addr_line_prefix = "VM_CONTEXT1_PROTECTION_FAULT_ADDR"; 732 addr_line_format = "%" PRIX64; 733 } 734 735 switch (progress) { 736 case 0: 737 if (strstr(msg, header_line)) 738 progress = 1; 739 break; 740 case 1: 741 msg = strstr(msg, addr_line_prefix); 742 if (msg) { 743 msg = strstr(msg, "0x"); 744 if (msg) { 745 msg += 2; 746 if (sscanf(msg, addr_line_format, out_addr) == 1) 747 fault = true; 748 } 749 } 750 progress = 0; 751 break; 752 default: 753 progress = 0; 754 } 755 } 756 pclose(p); 757 758 if (dmesg_timestamp > *old_dmesg_timestamp) 759 *old_dmesg_timestamp = dmesg_timestamp; 760 761 return fault; 762#endif 763} 764 765static int compare_wave(const void *p1, const void *p2) 766{ 767 struct ac_wave_info *w1 = (struct ac_wave_info *)p1; 768 struct ac_wave_info *w2 = (struct ac_wave_info *)p2; 769 770 /* Sort waves according to PC and then SE, SH, CU, etc. */ 771 if (w1->pc < w2->pc) 772 return -1; 773 if (w1->pc > w2->pc) 774 return 1; 775 if (w1->se < w2->se) 776 return -1; 777 if (w1->se > w2->se) 778 return 1; 779 if (w1->sh < w2->sh) 780 return -1; 781 if (w1->sh > w2->sh) 782 return 1; 783 if (w1->cu < w2->cu) 784 return -1; 785 if (w1->cu > w2->cu) 786 return 1; 787 if (w1->simd < w2->simd) 788 return -1; 789 if (w1->simd > w2->simd) 790 return 1; 791 if (w1->wave < w2->wave) 792 return -1; 793 if (w1->wave > w2->wave) 794 return 1; 795 796 return 0; 797} 798 799/* Return wave information. "waves" should be a large enough array. */ 800unsigned ac_get_wave_info(enum chip_class chip_class, 801 struct ac_wave_info waves[AC_MAX_WAVES_PER_CHIP]) 802{ 803#ifdef _WIN32 804 return 0; 805#else 806 char line[2000], cmd[128]; 807 unsigned num_waves = 0; 808 809 sprintf(cmd, "umr -O halt_waves -wa %s", chip_class >= GFX10 ? "gfx_0.0.0" : "gfx"); 810 811 FILE *p = popen(cmd, "r"); 812 if (!p) 813 return 0; 814 815 if (!fgets(line, sizeof(line), p) || strncmp(line, "SE", 2) != 0) { 816 pclose(p); 817 return 0; 818 } 819 820 while (fgets(line, sizeof(line), p)) { 821 struct ac_wave_info *w; 822 uint32_t pc_hi, pc_lo, exec_hi, exec_lo; 823 824 assert(num_waves < AC_MAX_WAVES_PER_CHIP); 825 w = &waves[num_waves]; 826 827 if (sscanf(line, "%u %u %u %u %u %x %x %x %x %x %x %x", &w->se, &w->sh, &w->cu, &w->simd, 828 &w->wave, &w->status, &pc_hi, &pc_lo, &w->inst_dw0, &w->inst_dw1, &exec_hi, 829 &exec_lo) == 12) { 830 w->pc = ((uint64_t)pc_hi << 32) | pc_lo; 831 w->exec = ((uint64_t)exec_hi << 32) | exec_lo; 832 w->matched = false; 833 num_waves++; 834 } 835 } 836 837 qsort(waves, num_waves, sizeof(struct ac_wave_info), compare_wave); 838 839 pclose(p); 840 return num_waves; 841#endif 842} 843