101e04c3fSmrg/* 201e04c3fSmrg * Copyright 2003 VMware, Inc. 301e04c3fSmrg * Copyright © 2006 Intel Corporation 401e04c3fSmrg * Copyright © 2017 Broadcom 501e04c3fSmrg * 601e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 701e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 801e04c3fSmrg * to deal in the Software without restriction, including without limitation 901e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1001e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the 1101e04c3fSmrg * Software is furnished to do so, subject to the following conditions: 1201e04c3fSmrg * 1301e04c3fSmrg * The above copyright notice and this permission notice (including the next 1401e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1501e04c3fSmrg * Software. 1601e04c3fSmrg * 1701e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1801e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1901e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 2001e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2101e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 2201e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 2301e04c3fSmrg * IN THE SOFTWARE. 2401e04c3fSmrg */ 2501e04c3fSmrg 2601e04c3fSmrg/** 2701e04c3fSmrg * \file v3d_debug.c 2801e04c3fSmrg * 2901e04c3fSmrg * Support for the V3D_DEBUG environment variable, along with other 3001e04c3fSmrg * miscellaneous debugging code. 3101e04c3fSmrg */ 3201e04c3fSmrg 3301e04c3fSmrg#include <stdlib.h> 3401e04c3fSmrg 3501e04c3fSmrg#include "common/v3d_debug.h" 3601e04c3fSmrg#include "util/macros.h" 377ec681f3Smrg#include "util/u_debug.h" 3801e04c3fSmrg#include "c11/threads.h" 3901e04c3fSmrg 4001e04c3fSmrguint32_t V3D_DEBUG = 0; 4101e04c3fSmrg 427ec681f3Smrgstatic const struct debug_named_value debug_control[] = { 437ec681f3Smrg { "cl", V3D_DEBUG_CL, 447ec681f3Smrg "Dump command list during creation" }, 457ec681f3Smrg { "cl_nobin", V3D_DEBUG_CL_NO_BIN, 467ec681f3Smrg "Dump command listduring creation, excluding binary resources" }, 477ec681f3Smrg { "clif", V3D_DEBUG_CLIF, 487ec681f3Smrg "Dump command list (CLIF format) during creation", }, 497ec681f3Smrg { "qpu", V3D_DEBUG_QPU, 507ec681f3Smrg "Dump generated QPU instructions" }, 517ec681f3Smrg { "vir", V3D_DEBUG_VIR, 527ec681f3Smrg "Dump VIR during program compile" }, 537ec681f3Smrg { "nir", V3D_DEBUG_NIR, 547ec681f3Smrg "Dump NIR during program compile" }, 557ec681f3Smrg { "tgsi", V3D_DEBUG_TGSI, 567ec681f3Smrg "Dump TGSI during program compile" }, 577ec681f3Smrg { "shaderdb", V3D_DEBUG_SHADERDB, 587ec681f3Smrg "Dump program compile information for shader-db analysis" }, 597ec681f3Smrg { "surface", V3D_DEBUG_SURFACE, 607ec681f3Smrg "Print resource layout information" }, 617ec681f3Smrg { "perf", V3D_DEBUG_PERF, 627ec681f3Smrg "Print during runtime performance-related events" }, 637ec681f3Smrg { "norast", V3D_DEBUG_NORAST, 647ec681f3Smrg "Skip actual hardware execution of commands" }, 657ec681f3Smrg { "fs", V3D_DEBUG_FS, 667ec681f3Smrg "Dump fragment shaders" }, 677ec681f3Smrg { "gs", V3D_DEBUG_GS, 687ec681f3Smrg "Dump geometry shaders" }, 697ec681f3Smrg { "vs", V3D_DEBUG_VS, 707ec681f3Smrg "Dump vertex shaders" }, 717ec681f3Smrg { "cs", V3D_DEBUG_CS, 727ec681f3Smrg "Dump computer shaders" }, 737ec681f3Smrg { "always_flush", V3D_DEBUG_ALWAYS_FLUSH, 747ec681f3Smrg "Flush after each draw call" }, 757ec681f3Smrg { "precompile", V3D_DEBUG_PRECOMPILE, 767ec681f3Smrg "Precompiles shader variant at shader state creation time" }, 777ec681f3Smrg { "ra", V3D_DEBUG_RA, 787ec681f3Smrg "Dump register allocation failures" }, 797ec681f3Smrg { "dump_spirv", V3D_DEBUG_DUMP_SPIRV, 807ec681f3Smrg "Dump SPIR-V code" }, 817ec681f3Smrg { "tmu32", V3D_DEBUG_TMU_32BIT, 827ec681f3Smrg "Force 32-bit precision on all TMU operations" }, 837ec681f3Smrg /* This can lead to incorrect behavior for applications that do 847ec681f3Smrg * require full 32-bit precision, but can improve performance 857ec681f3Smrg * for those that don't. 867ec681f3Smrg */ 877ec681f3Smrg { "tmu16", V3D_DEBUG_TMU_16BIT, 887ec681f3Smrg "Force 16-bit precision on all TMU operations" }, 897ec681f3Smrg { "noloopunroll", V3D_DEBUG_NO_LOOP_UNROLL, 907ec681f3Smrg "Disable loop unrolling" }, 917ec681f3Smrg { NULL } 9201e04c3fSmrg}; 9301e04c3fSmrg 947ec681f3SmrgDEBUG_GET_ONCE_FLAGS_OPTION(v3d_debug, "V3D_DEBUG", debug_control, 0) 957ec681f3Smrg 9601e04c3fSmrguint32_t 9701e04c3fSmrgv3d_debug_flag_for_shader_stage(gl_shader_stage stage) 9801e04c3fSmrg{ 9901e04c3fSmrg uint32_t flags[] = { 10001e04c3fSmrg [MESA_SHADER_VERTEX] = V3D_DEBUG_VS, 10101e04c3fSmrg [MESA_SHADER_TESS_CTRL] = 0, 10201e04c3fSmrg [MESA_SHADER_TESS_EVAL] = 0, 1037ec681f3Smrg [MESA_SHADER_GEOMETRY] = V3D_DEBUG_GS, 10401e04c3fSmrg [MESA_SHADER_FRAGMENT] = V3D_DEBUG_FS, 10501e04c3fSmrg [MESA_SHADER_COMPUTE] = V3D_DEBUG_CS, 10601e04c3fSmrg }; 10701e04c3fSmrg STATIC_ASSERT(MESA_SHADER_STAGES == 6); 10801e04c3fSmrg return flags[stage]; 10901e04c3fSmrg} 11001e04c3fSmrg 11101e04c3fSmrgvoid 11201e04c3fSmrgv3d_process_debug_variable(void) 11301e04c3fSmrg{ 1147ec681f3Smrg V3D_DEBUG = debug_get_option_v3d_debug(); 11501e04c3fSmrg 1167ec681f3Smrg if (V3D_DEBUG & V3D_DEBUG_SHADERDB) 1177ec681f3Smrg V3D_DEBUG |= V3D_DEBUG_NORAST; 11801e04c3fSmrg} 119