101e04c3fSmrg/* 201e04c3fSmrg * Copyright © 2018 Intel Corporation 301e04c3fSmrg * 401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 501e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 601e04c3fSmrg * to deal in the Software without restriction, including without limitation 701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the 901e04c3fSmrg * Software is furnished to do so, subject to the following conditions: 1001e04c3fSmrg * 1101e04c3fSmrg * The above copyright notice and this permission notice (including the next 1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1301e04c3fSmrg * Software. 1401e04c3fSmrg * 1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 2101e04c3fSmrg * IN THE SOFTWARE. 2201e04c3fSmrg */ 2301e04c3fSmrg 2401e04c3fSmrg#ifndef NIR_XFB_INFO_H 2501e04c3fSmrg#define NIR_XFB_INFO_H 2601e04c3fSmrg 2701e04c3fSmrg#include "nir.h" 2801e04c3fSmrg 2901e04c3fSmrg#define NIR_MAX_XFB_BUFFERS 4 3001e04c3fSmrg#define NIR_MAX_XFB_STREAMS 4 3101e04c3fSmrg 327e102996Smayatypedef struct { 337e102996Smaya uint16_t stride; 347e102996Smaya uint16_t varying_count; 357e102996Smaya} nir_xfb_buffer_info; 367e102996Smaya 3701e04c3fSmrgtypedef struct { 3801e04c3fSmrg uint8_t buffer; 3901e04c3fSmrg uint16_t offset; 4001e04c3fSmrg uint8_t location; 4101e04c3fSmrg uint8_t component_mask; 427e102996Smaya uint8_t component_offset; 4301e04c3fSmrg} nir_xfb_output_info; 4401e04c3fSmrg 4501e04c3fSmrgtypedef struct { 467e102996Smaya const struct glsl_type *type; 477e102996Smaya uint8_t buffer; 487e102996Smaya uint16_t offset; 497e102996Smaya} nir_xfb_varying_info; 507e102996Smaya 517e102996Smayatypedef struct nir_xfb_info { 5201e04c3fSmrg uint8_t buffers_written; 5301e04c3fSmrg uint8_t streams_written; 5401e04c3fSmrg 557e102996Smaya nir_xfb_buffer_info buffers[NIR_MAX_XFB_BUFFERS]; 5601e04c3fSmrg uint8_t buffer_to_stream[NIR_MAX_XFB_STREAMS]; 5701e04c3fSmrg 5801e04c3fSmrg uint16_t output_count; 5901e04c3fSmrg nir_xfb_output_info outputs[0]; 6001e04c3fSmrg} nir_xfb_info; 6101e04c3fSmrg 627e102996Smayatypedef struct nir_xfb_varyings_info { 637e102996Smaya uint16_t varying_count; 647e102996Smaya nir_xfb_varying_info varyings[0]; 657e102996Smaya} nir_xfb_varyings_info; 667e102996Smaya 6701e04c3fSmrgstatic inline size_t 6801e04c3fSmrgnir_xfb_info_size(uint16_t output_count) 6901e04c3fSmrg{ 7001e04c3fSmrg return sizeof(nir_xfb_info) + sizeof(nir_xfb_output_info) * output_count; 7101e04c3fSmrg} 7201e04c3fSmrg 7301e04c3fSmrgnir_xfb_info * 7401e04c3fSmrgnir_gather_xfb_info(const nir_shader *shader, void *mem_ctx); 7501e04c3fSmrg 767e102996Smayanir_xfb_info * 777e102996Smayanir_gather_xfb_info_with_varyings(const nir_shader *shader, 787e102996Smaya void *mem_ctx, 797e102996Smaya nir_xfb_varyings_info **varyings_info); 8001e04c3fSmrg#endif /* NIR_XFB_INFO_H */ 81