101e04c3fSmrg/* 201e04c3fSmrg * Copyright © 2015 Intel Corporation 301e04c3fSmrg * 401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 501e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 601e04c3fSmrg * to deal in the Software without restriction, including without limitation 701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the 901e04c3fSmrg * Software is furnished to do so, subject to the following conditions: 1001e04c3fSmrg * 1101e04c3fSmrg * The above copyright notice and this permission notice (including the next 1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1301e04c3fSmrg * Software. 1401e04c3fSmrg * 1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 2101e04c3fSmrg * IN THE SOFTWARE. 2201e04c3fSmrg * 2301e04c3fSmrg * Authors: 2401e04c3fSmrg * Jason Ekstrand (jason@jlekstrand.net) 2501e04c3fSmrg * 2601e04c3fSmrg */ 2701e04c3fSmrg 2801e04c3fSmrg#ifndef _NIR_SPIRV_H_ 2901e04c3fSmrg#define _NIR_SPIRV_H_ 3001e04c3fSmrg 317ec681f3Smrg#include "util/disk_cache.h" 3201e04c3fSmrg#include "compiler/nir/nir.h" 3301e04c3fSmrg#include "compiler/shader_info.h" 3401e04c3fSmrg 3501e04c3fSmrg#ifdef __cplusplus 3601e04c3fSmrgextern "C" { 3701e04c3fSmrg#endif 3801e04c3fSmrg 3901e04c3fSmrgstruct nir_spirv_specialization { 4001e04c3fSmrg uint32_t id; 417ec681f3Smrg nir_const_value value; 4201e04c3fSmrg bool defined_on_module; 4301e04c3fSmrg}; 4401e04c3fSmrg 4501e04c3fSmrgenum nir_spirv_debug_level { 467ec681f3Smrg NIR_SPIRV_DEBUG_LEVEL_INVALID = -1, 4701e04c3fSmrg NIR_SPIRV_DEBUG_LEVEL_INFO, 4801e04c3fSmrg NIR_SPIRV_DEBUG_LEVEL_WARNING, 4901e04c3fSmrg NIR_SPIRV_DEBUG_LEVEL_ERROR, 5001e04c3fSmrg}; 5101e04c3fSmrg 527e102996Smayaenum nir_spirv_execution_environment { 537e102996Smaya NIR_SPIRV_VULKAN = 0, 547e102996Smaya NIR_SPIRV_OPENCL, 557e102996Smaya NIR_SPIRV_OPENGL, 567e102996Smaya}; 577e102996Smaya 5801e04c3fSmrgstruct spirv_to_nir_options { 597e102996Smaya enum nir_spirv_execution_environment environment; 607e102996Smaya 617ec681f3Smrg /* Whether to keep ViewIndex as an input instead of rewriting to a sysval. 6201e04c3fSmrg */ 637ec681f3Smrg bool view_index_is_input; 6401e04c3fSmrg 657ec681f3Smrg /* Create a nir library. */ 667ec681f3Smrg bool create_library; 677ec681f3Smrg 687ec681f3Smrg /* Whether to use nir_intrinsic_deref_buffer_array_length intrinsic instead 697ec681f3Smrg * of nir_intrinsic_get_ssbo_size to lower OpArrayLength. 707ec681f3Smrg */ 717ec681f3Smrg bool use_deref_buffer_array_length; 727ec681f3Smrg 737ec681f3Smrg /* Initial value for shader_info::float_controls_execution_mode, 747ec681f3Smrg * indicates hardware requirements rather than shader author intent 757ec681f3Smrg */ 767ec681f3Smrg uint16_t float_controls_execution_mode; 777e102996Smaya 7801e04c3fSmrg struct spirv_supported_capabilities caps; 7901e04c3fSmrg 807ec681f3Smrg /* Address format for various kinds of pointers. */ 817ec681f3Smrg nir_address_format ubo_addr_format; 827ec681f3Smrg nir_address_format ssbo_addr_format; 837ec681f3Smrg nir_address_format phys_ssbo_addr_format; 847ec681f3Smrg nir_address_format push_const_addr_format; 857ec681f3Smrg nir_address_format shared_addr_format; 867ec681f3Smrg nir_address_format global_addr_format; 877ec681f3Smrg nir_address_format temp_addr_format; 887ec681f3Smrg nir_address_format constant_addr_format; 897ec681f3Smrg 907ec681f3Smrg const nir_shader *clc_shader; 917e102996Smaya 9201e04c3fSmrg struct { 9301e04c3fSmrg void (*func)(void *private_data, 9401e04c3fSmrg enum nir_spirv_debug_level level, 9501e04c3fSmrg size_t spirv_offset, 9601e04c3fSmrg const char *message); 9701e04c3fSmrg void *private_data; 9801e04c3fSmrg } debug; 9901e04c3fSmrg}; 10001e04c3fSmrg 10101e04c3fSmrgbool gl_spirv_validation(const uint32_t *words, size_t word_count, 10201e04c3fSmrg struct nir_spirv_specialization *spec, unsigned num_spec, 10301e04c3fSmrg gl_shader_stage stage, const char *entry_point_name); 10401e04c3fSmrg 1057ec681f3Smrgnir_shader *spirv_to_nir(const uint32_t *words, size_t word_count, 1067ec681f3Smrg struct nir_spirv_specialization *specializations, 1077ec681f3Smrg unsigned num_specializations, 1087ec681f3Smrg gl_shader_stage stage, const char *entry_point_name, 1097ec681f3Smrg const struct spirv_to_nir_options *options, 1107ec681f3Smrg const nir_shader_compiler_options *nir_options); 1117ec681f3Smrg 1127ec681f3Smrgbool nir_can_find_libclc(unsigned ptr_bit_size); 1137ec681f3Smrg 1147ec681f3Smrgnir_shader * 1157ec681f3Smrgnir_load_libclc_shader(unsigned ptr_bit_size, 1167ec681f3Smrg struct disk_cache *disk_cache, 1177ec681f3Smrg const struct spirv_to_nir_options *spirv_options, 1187ec681f3Smrg const nir_shader_compiler_options *nir_options); 1197ec681f3Smrg 1207ec681f3Smrgbool nir_lower_libclc(nir_shader *shader, const nir_shader *clc_shader); 12101e04c3fSmrg 12201e04c3fSmrg#ifdef __cplusplus 12301e04c3fSmrg} 12401e04c3fSmrg#endif 12501e04c3fSmrg 12601e04c3fSmrg#endif /* _NIR_SPIRV_H_ */ 127