101e04c3fSmrg/* 201e04c3fSmrg * Copyright © 2015 Intel Corporation 301e04c3fSmrg * 401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 501e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 601e04c3fSmrg * to deal in the Software without restriction, including without limitation 701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the 901e04c3fSmrg * Software is furnished to do so, subject to the following conditions: 1001e04c3fSmrg * 1101e04c3fSmrg * The above copyright notice and this permission notice (including the next 1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1301e04c3fSmrg * Software. 1401e04c3fSmrg * 1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 2101e04c3fSmrg * IN THE SOFTWARE. 2201e04c3fSmrg * 2301e04c3fSmrg * Authors: 2401e04c3fSmrg * Jason Ekstrand (jason@jlekstrand.net) 2501e04c3fSmrg * 2601e04c3fSmrg */ 2701e04c3fSmrg 2801e04c3fSmrg#include <math.h> 2901e04c3fSmrg 3001e04c3fSmrg#include "nir/nir_builtin_builder.h" 3101e04c3fSmrg 3201e04c3fSmrg#include "vtn_private.h" 3301e04c3fSmrg#include "GLSL.std.450.h" 3401e04c3fSmrg 3501e04c3fSmrg#define M_PIf ((float) M_PI) 3601e04c3fSmrg#define M_PI_2f ((float) M_PI_2) 3701e04c3fSmrg#define M_PI_4f ((float) M_PI_4) 3801e04c3fSmrg 3901e04c3fSmrgstatic nir_ssa_def * 4001e04c3fSmrgbuild_mat2_det(nir_builder *b, nir_ssa_def *col[2]) 4101e04c3fSmrg{ 4201e04c3fSmrg unsigned swiz[2] = {1, 0 }; 437ec681f3Smrg nir_ssa_def *p = nir_fmul(b, col[0], nir_swizzle(b, col[1], swiz, 2)); 4401e04c3fSmrg return nir_fsub(b, nir_channel(b, p, 0), nir_channel(b, p, 1)); 4501e04c3fSmrg} 4601e04c3fSmrg 4701e04c3fSmrgstatic nir_ssa_def * 4801e04c3fSmrgbuild_mat3_det(nir_builder *b, nir_ssa_def *col[3]) 4901e04c3fSmrg{ 5001e04c3fSmrg unsigned yzx[3] = {1, 2, 0 }; 5101e04c3fSmrg unsigned zxy[3] = {2, 0, 1 }; 5201e04c3fSmrg 5301e04c3fSmrg nir_ssa_def *prod0 = 5401e04c3fSmrg nir_fmul(b, col[0], 557ec681f3Smrg nir_fmul(b, nir_swizzle(b, col[1], yzx, 3), 567ec681f3Smrg nir_swizzle(b, col[2], zxy, 3))); 5701e04c3fSmrg nir_ssa_def *prod1 = 5801e04c3fSmrg nir_fmul(b, col[0], 597ec681f3Smrg nir_fmul(b, nir_swizzle(b, col[1], zxy, 3), 607ec681f3Smrg nir_swizzle(b, col[2], yzx, 3))); 6101e04c3fSmrg 6201e04c3fSmrg nir_ssa_def *diff = nir_fsub(b, prod0, prod1); 6301e04c3fSmrg 6401e04c3fSmrg return nir_fadd(b, nir_channel(b, diff, 0), 6501e04c3fSmrg nir_fadd(b, nir_channel(b, diff, 1), 6601e04c3fSmrg nir_channel(b, diff, 2))); 6701e04c3fSmrg} 6801e04c3fSmrg 6901e04c3fSmrgstatic nir_ssa_def * 7001e04c3fSmrgbuild_mat4_det(nir_builder *b, nir_ssa_def **col) 7101e04c3fSmrg{ 7201e04c3fSmrg nir_ssa_def *subdet[4]; 7301e04c3fSmrg for (unsigned i = 0; i < 4; i++) { 7401e04c3fSmrg unsigned swiz[3]; 7501e04c3fSmrg for (unsigned j = 0; j < 3; j++) 7601e04c3fSmrg swiz[j] = j + (j >= i); 7701e04c3fSmrg 7801e04c3fSmrg nir_ssa_def *subcol[3]; 797ec681f3Smrg subcol[0] = nir_swizzle(b, col[1], swiz, 3); 807ec681f3Smrg subcol[1] = nir_swizzle(b, col[2], swiz, 3); 817ec681f3Smrg subcol[2] = nir_swizzle(b, col[3], swiz, 3); 8201e04c3fSmrg 8301e04c3fSmrg subdet[i] = build_mat3_det(b, subcol); 8401e04c3fSmrg } 8501e04c3fSmrg 8601e04c3fSmrg nir_ssa_def *prod = nir_fmul(b, col[0], nir_vec(b, subdet, 4)); 8701e04c3fSmrg 8801e04c3fSmrg return nir_fadd(b, nir_fsub(b, nir_channel(b, prod, 0), 8901e04c3fSmrg nir_channel(b, prod, 1)), 9001e04c3fSmrg nir_fsub(b, nir_channel(b, prod, 2), 9101e04c3fSmrg nir_channel(b, prod, 3))); 9201e04c3fSmrg} 9301e04c3fSmrg 9401e04c3fSmrgstatic nir_ssa_def * 9501e04c3fSmrgbuild_mat_det(struct vtn_builder *b, struct vtn_ssa_value *src) 9601e04c3fSmrg{ 9701e04c3fSmrg unsigned size = glsl_get_vector_elements(src->type); 9801e04c3fSmrg 9901e04c3fSmrg nir_ssa_def *cols[4]; 10001e04c3fSmrg for (unsigned i = 0; i < size; i++) 10101e04c3fSmrg cols[i] = src->elems[i]->def; 10201e04c3fSmrg 10301e04c3fSmrg switch(size) { 10401e04c3fSmrg case 2: return build_mat2_det(&b->nb, cols); 10501e04c3fSmrg case 3: return build_mat3_det(&b->nb, cols); 10601e04c3fSmrg case 4: return build_mat4_det(&b->nb, cols); 10701e04c3fSmrg default: 10801e04c3fSmrg vtn_fail("Invalid matrix size"); 10901e04c3fSmrg } 11001e04c3fSmrg} 11101e04c3fSmrg 11201e04c3fSmrg/* Computes the determinate of the submatrix given by taking src and 11301e04c3fSmrg * removing the specified row and column. 11401e04c3fSmrg */ 11501e04c3fSmrgstatic nir_ssa_def * 11601e04c3fSmrgbuild_mat_subdet(struct nir_builder *b, struct vtn_ssa_value *src, 11701e04c3fSmrg unsigned size, unsigned row, unsigned col) 11801e04c3fSmrg{ 11901e04c3fSmrg assert(row < size && col < size); 12001e04c3fSmrg if (size == 2) { 12101e04c3fSmrg return nir_channel(b, src->elems[1 - col]->def, 1 - row); 12201e04c3fSmrg } else { 12301e04c3fSmrg /* Swizzle to get all but the specified row */ 1247ec681f3Smrg unsigned swiz[NIR_MAX_VEC_COMPONENTS] = {0}; 12501e04c3fSmrg for (unsigned j = 0; j < 3; j++) 12601e04c3fSmrg swiz[j] = j + (j >= row); 12701e04c3fSmrg 12801e04c3fSmrg /* Grab all but the specified column */ 12901e04c3fSmrg nir_ssa_def *subcol[3]; 13001e04c3fSmrg for (unsigned j = 0; j < size; j++) { 13101e04c3fSmrg if (j != col) { 13201e04c3fSmrg subcol[j - (j > col)] = nir_swizzle(b, src->elems[j]->def, 1337ec681f3Smrg swiz, size - 1); 13401e04c3fSmrg } 13501e04c3fSmrg } 13601e04c3fSmrg 13701e04c3fSmrg if (size == 3) { 13801e04c3fSmrg return build_mat2_det(b, subcol); 13901e04c3fSmrg } else { 14001e04c3fSmrg assert(size == 4); 14101e04c3fSmrg return build_mat3_det(b, subcol); 14201e04c3fSmrg } 14301e04c3fSmrg } 14401e04c3fSmrg} 14501e04c3fSmrg 14601e04c3fSmrgstatic struct vtn_ssa_value * 14701e04c3fSmrgmatrix_inverse(struct vtn_builder *b, struct vtn_ssa_value *src) 14801e04c3fSmrg{ 14901e04c3fSmrg nir_ssa_def *adj_col[4]; 15001e04c3fSmrg unsigned size = glsl_get_vector_elements(src->type); 15101e04c3fSmrg 15201e04c3fSmrg /* Build up an adjugate matrix */ 15301e04c3fSmrg for (unsigned c = 0; c < size; c++) { 15401e04c3fSmrg nir_ssa_def *elem[4]; 15501e04c3fSmrg for (unsigned r = 0; r < size; r++) { 15601e04c3fSmrg elem[r] = build_mat_subdet(&b->nb, src, size, c, r); 15701e04c3fSmrg 15801e04c3fSmrg if ((r + c) % 2) 15901e04c3fSmrg elem[r] = nir_fneg(&b->nb, elem[r]); 16001e04c3fSmrg } 16101e04c3fSmrg 16201e04c3fSmrg adj_col[c] = nir_vec(&b->nb, elem, size); 16301e04c3fSmrg } 16401e04c3fSmrg 16501e04c3fSmrg nir_ssa_def *det_inv = nir_frcp(&b->nb, build_mat_det(b, src)); 16601e04c3fSmrg 16701e04c3fSmrg struct vtn_ssa_value *val = vtn_create_ssa_value(b, src->type); 16801e04c3fSmrg for (unsigned i = 0; i < size; i++) 16901e04c3fSmrg val->elems[i]->def = nir_fmul(&b->nb, adj_col[i], det_inv); 17001e04c3fSmrg 17101e04c3fSmrg return val; 17201e04c3fSmrg} 17301e04c3fSmrg 17401e04c3fSmrg/** 1757ec681f3Smrg * Approximate asin(x) by the piecewise formula: 1767ec681f3Smrg * for |x| < 0.5, asin~(x) = x * (1 + x²(pS0 + x²(pS1 + x²*pS2)) / (1 + x²*qS1)) 1777ec681f3Smrg * for |x| ≥ 0.5, asin~(x) = sign(x) * (π/2 - sqrt(1 - |x|) * (π/2 + |x|(π/4 - 1 + |x|(p0 + |x|p1)))) 17801e04c3fSmrg * 1797ec681f3Smrg * The latter is correct to first order at x=0 and x=±1 regardless of the p 18001e04c3fSmrg * coefficients but can be made second-order correct at both ends by selecting 18101e04c3fSmrg * the fit coefficients appropriately. Different p coefficients can be used 18201e04c3fSmrg * in the asin and acos implementation to minimize some relative error metric 18301e04c3fSmrg * in each case. 18401e04c3fSmrg */ 18501e04c3fSmrgstatic nir_ssa_def * 1867ec681f3Smrgbuild_asin(nir_builder *b, nir_ssa_def *x, float p0, float p1, bool piecewise) 18701e04c3fSmrg{ 1887e102996Smaya if (x->bit_size == 16) { 1897e102996Smaya /* The polynomial approximation isn't precise enough to meet half-float 1907e102996Smaya * precision requirements. Alternatively, we could implement this using 1917e102996Smaya * the formula: 1927e102996Smaya * 1937e102996Smaya * asin(x) = atan2(x, sqrt(1 - x*x)) 1947e102996Smaya * 1957e102996Smaya * But that is very expensive, so instead we just do the polynomial 1967e102996Smaya * approximation in 32-bit math and then we convert the result back to 1977e102996Smaya * 16-bit. 1987e102996Smaya */ 1997ec681f3Smrg return nir_f2f16(b, build_asin(b, nir_f2f32(b, x), p0, p1, piecewise)); 2007e102996Smaya } 2017e102996Smaya nir_ssa_def *one = nir_imm_floatN_t(b, 1.0f, x->bit_size); 2027ec681f3Smrg nir_ssa_def *half = nir_imm_floatN_t(b, 0.5f, x->bit_size); 20301e04c3fSmrg nir_ssa_def *abs_x = nir_fabs(b, x); 2047e102996Smaya 2057ec681f3Smrg nir_ssa_def *p0_plus_xp1 = nir_ffma_imm12(b, abs_x, p1, p0); 2067e102996Smaya 2077e102996Smaya nir_ssa_def *expr_tail = 2087ec681f3Smrg nir_ffma_imm2(b, abs_x, 2097ec681f3Smrg nir_ffma_imm2(b, abs_x, p0_plus_xp1, M_PI_4f - 1.0f), 2107ec681f3Smrg M_PI_2f); 2117ec681f3Smrg 2127ec681f3Smrg nir_ssa_def *result0 = nir_fmul(b, nir_fsign(b, x), 2137ec681f3Smrg nir_a_minus_bc(b, nir_imm_floatN_t(b, M_PI_2f, x->bit_size), 2147ec681f3Smrg nir_fsqrt(b, nir_fsub(b, one, abs_x)), 2157ec681f3Smrg expr_tail)); 2167ec681f3Smrg if (piecewise) { 2177ec681f3Smrg /* approximation for |x| < 0.5 */ 2187ec681f3Smrg const float pS0 = 1.6666586697e-01f; 2197ec681f3Smrg const float pS1 = -4.2743422091e-02f; 2207ec681f3Smrg const float pS2 = -8.6563630030e-03f; 2217ec681f3Smrg const float qS1 = -7.0662963390e-01f; 2227ec681f3Smrg 2237ec681f3Smrg nir_ssa_def *x2 = nir_fmul(b, x, x); 2247ec681f3Smrg nir_ssa_def *p = nir_fmul(b, 2257ec681f3Smrg x2, 2267ec681f3Smrg nir_ffma_imm2(b, x2, 2277ec681f3Smrg nir_ffma_imm12(b, x2, pS2, pS1), 2287ec681f3Smrg pS0)); 2297ec681f3Smrg 2307ec681f3Smrg nir_ssa_def *q = nir_ffma_imm1(b, x2, qS1, one); 2317ec681f3Smrg nir_ssa_def *result1 = nir_ffma(b, x, nir_fdiv(b, p, q), x); 2327ec681f3Smrg return nir_bcsel(b, nir_flt(b, abs_x, half), result1, result0); 2337ec681f3Smrg } else { 2347ec681f3Smrg return result0; 2357ec681f3Smrg } 23601e04c3fSmrg} 23701e04c3fSmrg 23801e04c3fSmrgstatic nir_op 23901e04c3fSmrgvtn_nir_alu_op_for_spirv_glsl_opcode(struct vtn_builder *b, 2407ec681f3Smrg enum GLSLstd450 opcode, 2417ec681f3Smrg unsigned execution_mode, 2427ec681f3Smrg bool *exact) 24301e04c3fSmrg{ 2447ec681f3Smrg *exact = false; 24501e04c3fSmrg switch (opcode) { 24601e04c3fSmrg case GLSLstd450Round: return nir_op_fround_even; 24701e04c3fSmrg case GLSLstd450RoundEven: return nir_op_fround_even; 24801e04c3fSmrg case GLSLstd450Trunc: return nir_op_ftrunc; 24901e04c3fSmrg case GLSLstd450FAbs: return nir_op_fabs; 25001e04c3fSmrg case GLSLstd450SAbs: return nir_op_iabs; 25101e04c3fSmrg case GLSLstd450FSign: return nir_op_fsign; 25201e04c3fSmrg case GLSLstd450SSign: return nir_op_isign; 25301e04c3fSmrg case GLSLstd450Floor: return nir_op_ffloor; 25401e04c3fSmrg case GLSLstd450Ceil: return nir_op_fceil; 25501e04c3fSmrg case GLSLstd450Fract: return nir_op_ffract; 25601e04c3fSmrg case GLSLstd450Sin: return nir_op_fsin; 25701e04c3fSmrg case GLSLstd450Cos: return nir_op_fcos; 25801e04c3fSmrg case GLSLstd450Pow: return nir_op_fpow; 25901e04c3fSmrg case GLSLstd450Exp2: return nir_op_fexp2; 26001e04c3fSmrg case GLSLstd450Log2: return nir_op_flog2; 26101e04c3fSmrg case GLSLstd450Sqrt: return nir_op_fsqrt; 26201e04c3fSmrg case GLSLstd450InverseSqrt: return nir_op_frsq; 2637ec681f3Smrg case GLSLstd450NMin: *exact = true; return nir_op_fmin; 26401e04c3fSmrg case GLSLstd450FMin: return nir_op_fmin; 26501e04c3fSmrg case GLSLstd450UMin: return nir_op_umin; 26601e04c3fSmrg case GLSLstd450SMin: return nir_op_imin; 2677ec681f3Smrg case GLSLstd450NMax: *exact = true; return nir_op_fmax; 26801e04c3fSmrg case GLSLstd450FMax: return nir_op_fmax; 26901e04c3fSmrg case GLSLstd450UMax: return nir_op_umax; 27001e04c3fSmrg case GLSLstd450SMax: return nir_op_imax; 27101e04c3fSmrg case GLSLstd450FMix: return nir_op_flrp; 27201e04c3fSmrg case GLSLstd450Fma: return nir_op_ffma; 27301e04c3fSmrg case GLSLstd450Ldexp: return nir_op_ldexp; 27401e04c3fSmrg case GLSLstd450FindILsb: return nir_op_find_lsb; 27501e04c3fSmrg case GLSLstd450FindSMsb: return nir_op_ifind_msb; 27601e04c3fSmrg case GLSLstd450FindUMsb: return nir_op_ufind_msb; 27701e04c3fSmrg 27801e04c3fSmrg /* Packing/Unpacking functions */ 27901e04c3fSmrg case GLSLstd450PackSnorm4x8: return nir_op_pack_snorm_4x8; 28001e04c3fSmrg case GLSLstd450PackUnorm4x8: return nir_op_pack_unorm_4x8; 28101e04c3fSmrg case GLSLstd450PackSnorm2x16: return nir_op_pack_snorm_2x16; 28201e04c3fSmrg case GLSLstd450PackUnorm2x16: return nir_op_pack_unorm_2x16; 28301e04c3fSmrg case GLSLstd450PackHalf2x16: return nir_op_pack_half_2x16; 28401e04c3fSmrg case GLSLstd450PackDouble2x32: return nir_op_pack_64_2x32; 28501e04c3fSmrg case GLSLstd450UnpackSnorm4x8: return nir_op_unpack_snorm_4x8; 28601e04c3fSmrg case GLSLstd450UnpackUnorm4x8: return nir_op_unpack_unorm_4x8; 28701e04c3fSmrg case GLSLstd450UnpackSnorm2x16: return nir_op_unpack_snorm_2x16; 28801e04c3fSmrg case GLSLstd450UnpackUnorm2x16: return nir_op_unpack_unorm_2x16; 2897ec681f3Smrg case GLSLstd450UnpackHalf2x16: 2907ec681f3Smrg if (execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) 2917ec681f3Smrg return nir_op_unpack_half_2x16_flush_to_zero; 2927ec681f3Smrg else 2937ec681f3Smrg return nir_op_unpack_half_2x16; 29401e04c3fSmrg case GLSLstd450UnpackDouble2x32: return nir_op_unpack_64_2x32; 29501e04c3fSmrg 29601e04c3fSmrg default: 29701e04c3fSmrg vtn_fail("No NIR equivalent"); 29801e04c3fSmrg } 29901e04c3fSmrg} 30001e04c3fSmrg 30101e04c3fSmrg#define NIR_IMM_FP(n, v) (nir_imm_floatN_t(n, v, src[0]->bit_size)) 30201e04c3fSmrg 30301e04c3fSmrgstatic void 30401e04c3fSmrghandle_glsl450_alu(struct vtn_builder *b, enum GLSLstd450 entrypoint, 30501e04c3fSmrg const uint32_t *w, unsigned count) 30601e04c3fSmrg{ 30701e04c3fSmrg struct nir_builder *nb = &b->nb; 3087ec681f3Smrg const struct glsl_type *dest_type = vtn_get_type(b, w[1])->type; 30901e04c3fSmrg 31001e04c3fSmrg /* Collect the various SSA sources */ 31101e04c3fSmrg unsigned num_inputs = count - 5; 31201e04c3fSmrg nir_ssa_def *src[3] = { NULL, }; 31301e04c3fSmrg for (unsigned i = 0; i < num_inputs; i++) { 31401e04c3fSmrg /* These are handled specially below */ 31501e04c3fSmrg if (vtn_untyped_value(b, w[i + 5])->value_type == vtn_value_type_pointer) 31601e04c3fSmrg continue; 31701e04c3fSmrg 3187ec681f3Smrg src[i] = vtn_get_nir_ssa(b, w[i + 5]); 31901e04c3fSmrg } 32001e04c3fSmrg 3217ec681f3Smrg struct vtn_ssa_value *dest = vtn_create_ssa_value(b, dest_type); 3227ec681f3Smrg vtn_handle_no_contraction(b, vtn_untyped_value(b, w[2])); 32301e04c3fSmrg switch (entrypoint) { 32401e04c3fSmrg case GLSLstd450Radians: 3257ec681f3Smrg dest->def = nir_radians(nb, src[0]); 3267ec681f3Smrg break; 32701e04c3fSmrg case GLSLstd450Degrees: 3287ec681f3Smrg dest->def = nir_degrees(nb, src[0]); 3297ec681f3Smrg break; 33001e04c3fSmrg case GLSLstd450Tan: 3317ec681f3Smrg dest->def = nir_ftan(nb, src[0]); 3327ec681f3Smrg break; 33301e04c3fSmrg 33401e04c3fSmrg case GLSLstd450Modf: { 3357ec681f3Smrg nir_ssa_def *inf = nir_imm_floatN_t(&b->nb, INFINITY, src[0]->bit_size); 3367ec681f3Smrg nir_ssa_def *sign_bit = 3377ec681f3Smrg nir_imm_intN_t(&b->nb, (uint64_t)1 << (src[0]->bit_size - 1), 3387ec681f3Smrg src[0]->bit_size); 33901e04c3fSmrg nir_ssa_def *sign = nir_fsign(nb, src[0]); 34001e04c3fSmrg nir_ssa_def *abs = nir_fabs(nb, src[0]); 3417ec681f3Smrg 3427ec681f3Smrg /* NaN input should produce a NaN results, and ±Inf input should provide 3437ec681f3Smrg * ±0 result. The fmul(sign(x), ffract(x)) calculation will already 3447ec681f3Smrg * produce the expected NaN. To get ±0, directly compare for equality 3457ec681f3Smrg * with Inf instead of using fisfinite (which is false for NaN). 3467ec681f3Smrg */ 3477ec681f3Smrg dest->def = nir_bcsel(nb, 3487ec681f3Smrg nir_ieq(nb, abs, inf), 3497ec681f3Smrg nir_iand(nb, src[0], sign_bit), 3507ec681f3Smrg nir_fmul(nb, sign, nir_ffract(nb, abs))); 3517ec681f3Smrg 3527ec681f3Smrg struct vtn_pointer *i_ptr = vtn_value(b, w[6], vtn_value_type_pointer)->pointer; 3537ec681f3Smrg struct vtn_ssa_value *whole = vtn_create_ssa_value(b, i_ptr->type->type); 3547ec681f3Smrg whole->def = nir_fmul(nb, sign, nir_ffloor(nb, abs)); 3557ec681f3Smrg vtn_variable_store(b, whole, i_ptr, 0); 3567ec681f3Smrg break; 35701e04c3fSmrg } 35801e04c3fSmrg 35901e04c3fSmrg case GLSLstd450ModfStruct: { 3607ec681f3Smrg nir_ssa_def *inf = nir_imm_floatN_t(&b->nb, INFINITY, src[0]->bit_size); 3617ec681f3Smrg nir_ssa_def *sign_bit = 3627ec681f3Smrg nir_imm_intN_t(&b->nb, (uint64_t)1 << (src[0]->bit_size - 1), 3637ec681f3Smrg src[0]->bit_size); 36401e04c3fSmrg nir_ssa_def *sign = nir_fsign(nb, src[0]); 36501e04c3fSmrg nir_ssa_def *abs = nir_fabs(nb, src[0]); 3667ec681f3Smrg vtn_assert(glsl_type_is_struct_or_ifc(dest_type)); 3677ec681f3Smrg 3687ec681f3Smrg /* See GLSLstd450Modf for explanation of the Inf and NaN handling. */ 3697ec681f3Smrg dest->elems[0]->def = nir_bcsel(nb, 3707ec681f3Smrg nir_ieq(nb, abs, inf), 3717ec681f3Smrg nir_iand(nb, src[0], sign_bit), 3727ec681f3Smrg nir_fmul(nb, sign, nir_ffract(nb, abs))); 3737ec681f3Smrg dest->elems[1]->def = nir_fmul(nb, sign, nir_ffloor(nb, abs)); 3747ec681f3Smrg break; 37501e04c3fSmrg } 37601e04c3fSmrg 3777ec681f3Smrg case GLSLstd450Step: { 3787ec681f3Smrg /* The SPIR-V Extended Instructions for GLSL spec says: 3797ec681f3Smrg * 3807ec681f3Smrg * Result is 0.0 if x < edge; otherwise result is 1.0. 3817ec681f3Smrg * 3827ec681f3Smrg * Here src[1] is x, and src[0] is edge. The direct implementation is 3837ec681f3Smrg * 3847ec681f3Smrg * bcsel(src[1] < src[0], 0.0, 1.0) 3857ec681f3Smrg * 3867ec681f3Smrg * This is effectively b2f(!(src1 < src0)). Previously this was 3877ec681f3Smrg * implemented using sge(src1, src0), but that produces incorrect 3887ec681f3Smrg * results for NaN. Instead, we use the identity b2f(!x) = 1 - b2f(x). 3897ec681f3Smrg */ 3907ec681f3Smrg const bool exact = nb->exact; 3917ec681f3Smrg nb->exact = true; 3927ec681f3Smrg 3937ec681f3Smrg nir_ssa_def *cmp = nir_slt(nb, src[1], src[0]); 3947ec681f3Smrg 3957ec681f3Smrg nb->exact = exact; 3967ec681f3Smrg dest->def = nir_fsub(nb, nir_imm_floatN_t(nb, 1.0f, cmp->bit_size), cmp); 3977ec681f3Smrg break; 3987ec681f3Smrg } 39901e04c3fSmrg 40001e04c3fSmrg case GLSLstd450Length: 4017ec681f3Smrg dest->def = nir_fast_length(nb, src[0]); 4027ec681f3Smrg break; 40301e04c3fSmrg case GLSLstd450Distance: 4047ec681f3Smrg dest->def = nir_fast_distance(nb, src[0], src[1]); 4057ec681f3Smrg break; 40601e04c3fSmrg case GLSLstd450Normalize: 4077ec681f3Smrg dest->def = nir_fast_normalize(nb, src[0]); 4087ec681f3Smrg break; 40901e04c3fSmrg 41001e04c3fSmrg case GLSLstd450Exp: 4117ec681f3Smrg dest->def = nir_fexp(nb, src[0]); 4127ec681f3Smrg break; 41301e04c3fSmrg 41401e04c3fSmrg case GLSLstd450Log: 4157ec681f3Smrg dest->def = nir_flog(nb, src[0]); 4167ec681f3Smrg break; 41701e04c3fSmrg 41801e04c3fSmrg case GLSLstd450FClamp: 4197ec681f3Smrg dest->def = nir_fclamp(nb, src[0], src[1], src[2]); 4207ec681f3Smrg break; 42101e04c3fSmrg case GLSLstd450NClamp: 4227ec681f3Smrg nb->exact = true; 4237ec681f3Smrg dest->def = nir_fclamp(nb, src[0], src[1], src[2]); 4247ec681f3Smrg nb->exact = false; 4257ec681f3Smrg break; 42601e04c3fSmrg case GLSLstd450UClamp: 4277ec681f3Smrg dest->def = nir_uclamp(nb, src[0], src[1], src[2]); 4287ec681f3Smrg break; 42901e04c3fSmrg case GLSLstd450SClamp: 4307ec681f3Smrg dest->def = nir_iclamp(nb, src[0], src[1], src[2]); 4317ec681f3Smrg break; 43201e04c3fSmrg 43301e04c3fSmrg case GLSLstd450Cross: { 4347ec681f3Smrg dest->def = nir_cross3(nb, src[0], src[1]); 4357ec681f3Smrg break; 43601e04c3fSmrg } 43701e04c3fSmrg 43801e04c3fSmrg case GLSLstd450SmoothStep: { 4397ec681f3Smrg dest->def = nir_smoothstep(nb, src[0], src[1], src[2]); 4407ec681f3Smrg break; 44101e04c3fSmrg } 44201e04c3fSmrg 44301e04c3fSmrg case GLSLstd450FaceForward: 4447ec681f3Smrg dest->def = 44501e04c3fSmrg nir_bcsel(nb, nir_flt(nb, nir_fdot(nb, src[2], src[1]), 44601e04c3fSmrg NIR_IMM_FP(nb, 0.0)), 44701e04c3fSmrg src[0], nir_fneg(nb, src[0])); 4487ec681f3Smrg break; 44901e04c3fSmrg 45001e04c3fSmrg case GLSLstd450Reflect: 45101e04c3fSmrg /* I - 2 * dot(N, I) * N */ 4527ec681f3Smrg dest->def = 4537ec681f3Smrg nir_a_minus_bc(nb, src[0], 4547ec681f3Smrg src[1], 4557ec681f3Smrg nir_fmul(nb, nir_fdot(nb, src[0], src[1]), 4567ec681f3Smrg NIR_IMM_FP(nb, 2.0))); 4577ec681f3Smrg break; 45801e04c3fSmrg 45901e04c3fSmrg case GLSLstd450Refract: { 46001e04c3fSmrg nir_ssa_def *I = src[0]; 46101e04c3fSmrg nir_ssa_def *N = src[1]; 46201e04c3fSmrg nir_ssa_def *eta = src[2]; 46301e04c3fSmrg nir_ssa_def *n_dot_i = nir_fdot(nb, N, I); 46401e04c3fSmrg nir_ssa_def *one = NIR_IMM_FP(nb, 1.0); 46501e04c3fSmrg nir_ssa_def *zero = NIR_IMM_FP(nb, 0.0); 46601e04c3fSmrg /* According to the SPIR-V and GLSL specs, eta is always a float 46701e04c3fSmrg * regardless of the type of the other operands. However in practice it 46801e04c3fSmrg * seems that if you try to pass it a float then glslang will just 46901e04c3fSmrg * promote it to a double and generate invalid SPIR-V. In order to 47001e04c3fSmrg * support a hypothetical fixed version of glslang we’ll promote eta to 47101e04c3fSmrg * double if the other operands are double also. 47201e04c3fSmrg */ 47301e04c3fSmrg if (I->bit_size != eta->bit_size) { 47401e04c3fSmrg nir_op conversion_op = 47501e04c3fSmrg nir_type_conversion_op(nir_type_float | eta->bit_size, 47601e04c3fSmrg nir_type_float | I->bit_size, 47701e04c3fSmrg nir_rounding_mode_undef); 47801e04c3fSmrg eta = nir_build_alu(nb, conversion_op, eta, NULL, NULL, NULL); 47901e04c3fSmrg } 48001e04c3fSmrg /* k = 1.0 - eta * eta * (1.0 - dot(N, I) * dot(N, I)) */ 48101e04c3fSmrg nir_ssa_def *k = 4827ec681f3Smrg nir_a_minus_bc(nb, one, eta, 4837ec681f3Smrg nir_fmul(nb, eta, nir_a_minus_bc(nb, one, n_dot_i, n_dot_i))); 48401e04c3fSmrg nir_ssa_def *result = 4857ec681f3Smrg nir_a_minus_bc(nb, nir_fmul(nb, eta, I), 4867ec681f3Smrg nir_ffma(nb, eta, n_dot_i, nir_fsqrt(nb, k)), 4877ec681f3Smrg N); 48801e04c3fSmrg /* XXX: bcsel, or if statement? */ 4897ec681f3Smrg dest->def = nir_bcsel(nb, nir_flt(nb, k, zero), zero, result); 4907ec681f3Smrg break; 49101e04c3fSmrg } 49201e04c3fSmrg 49301e04c3fSmrg case GLSLstd450Sinh: 49401e04c3fSmrg /* 0.5 * (e^x - e^(-x)) */ 4957ec681f3Smrg dest->def = 4967ec681f3Smrg nir_fmul_imm(nb, nir_fsub(nb, nir_fexp(nb, src[0]), 4977ec681f3Smrg nir_fexp(nb, nir_fneg(nb, src[0]))), 4987e102996Smaya 0.5f); 4997ec681f3Smrg break; 50001e04c3fSmrg 50101e04c3fSmrg case GLSLstd450Cosh: 50201e04c3fSmrg /* 0.5 * (e^x + e^(-x)) */ 5037ec681f3Smrg dest->def = 5047ec681f3Smrg nir_fmul_imm(nb, nir_fadd(nb, nir_fexp(nb, src[0]), 5057ec681f3Smrg nir_fexp(nb, nir_fneg(nb, src[0]))), 5067e102996Smaya 0.5f); 5077ec681f3Smrg break; 50801e04c3fSmrg 50901e04c3fSmrg case GLSLstd450Tanh: { 5107ec681f3Smrg /* tanh(x) := (e^x - e^(-x)) / (e^x + e^(-x)) 51101e04c3fSmrg * 5127ec681f3Smrg * We clamp x to [-10, +10] to avoid precision problems. When x > 10, 5137ec681f3Smrg * e^x dominates the sum, e^(-x) is lost and tanh(x) is 1.0 for 32 bit 5147ec681f3Smrg * floating point. 5157e102996Smaya * 5167ec681f3Smrg * For 16-bit precision this we clamp x to [-4.2, +4.2]. 51701e04c3fSmrg */ 5187e102996Smaya const uint32_t bit_size = src[0]->bit_size; 5197e102996Smaya const double clamped_x = bit_size > 16 ? 10.0 : 4.2; 5207ec681f3Smrg nir_ssa_def *x = nir_fclamp(nb, src[0], 5217ec681f3Smrg nir_imm_floatN_t(nb, -clamped_x, bit_size), 5227ec681f3Smrg nir_imm_floatN_t(nb, clamped_x, bit_size)); 5237ec681f3Smrg 5247ec681f3Smrg /* The clamping will filter out NaN values causing an incorrect result. 5257ec681f3Smrg * The comparison is carefully structured to get NaN result for NaN and 5267ec681f3Smrg * get -0 for -0. 5277ec681f3Smrg * 5287ec681f3Smrg * result = abs(s) > 0.0 ? ... : s; 5297ec681f3Smrg */ 5307ec681f3Smrg const bool exact = nb->exact; 5317ec681f3Smrg 5327ec681f3Smrg nb->exact = true; 5337ec681f3Smrg nir_ssa_def *is_regular = nir_flt(nb, 5347ec681f3Smrg nir_imm_floatN_t(nb, 0, bit_size), 5357ec681f3Smrg nir_fabs(nb, src[0])); 5367ec681f3Smrg 5377ec681f3Smrg /* The extra 1.0*s ensures that subnormal inputs are flushed to zero 5387ec681f3Smrg * when that is selected by the shader. 5397ec681f3Smrg */ 5407ec681f3Smrg nir_ssa_def *flushed = nir_fmul(nb, 5417ec681f3Smrg src[0], 5427ec681f3Smrg nir_imm_floatN_t(nb, 1.0, bit_size)); 5437ec681f3Smrg nb->exact = exact; 5447ec681f3Smrg 5457ec681f3Smrg dest->def = nir_bcsel(nb, 5467ec681f3Smrg is_regular, 5477ec681f3Smrg nir_fdiv(nb, nir_fsub(nb, nir_fexp(nb, x), 5487ec681f3Smrg nir_fexp(nb, nir_fneg(nb, x))), 5497ec681f3Smrg nir_fadd(nb, nir_fexp(nb, x), 5507ec681f3Smrg nir_fexp(nb, nir_fneg(nb, x)))), 5517ec681f3Smrg flushed); 5527ec681f3Smrg break; 55301e04c3fSmrg } 55401e04c3fSmrg 55501e04c3fSmrg case GLSLstd450Asinh: 5567ec681f3Smrg dest->def = nir_fmul(nb, nir_fsign(nb, src[0]), 5577ec681f3Smrg nir_flog(nb, nir_fadd(nb, nir_fabs(nb, src[0]), 5587ec681f3Smrg nir_fsqrt(nb, nir_ffma_imm2(nb, src[0], src[0], 1.0f))))); 5597ec681f3Smrg break; 56001e04c3fSmrg case GLSLstd450Acosh: 5617ec681f3Smrg dest->def = nir_flog(nb, nir_fadd(nb, src[0], 5627ec681f3Smrg nir_fsqrt(nb, nir_ffma_imm2(nb, src[0], src[0], -1.0f)))); 5637ec681f3Smrg break; 56401e04c3fSmrg case GLSLstd450Atanh: { 5657e102996Smaya nir_ssa_def *one = nir_imm_floatN_t(nb, 1.0, src[0]->bit_size); 5667ec681f3Smrg dest->def = 5677ec681f3Smrg nir_fmul_imm(nb, nir_flog(nb, nir_fdiv(nb, nir_fadd(nb, src[0], one), 5687ec681f3Smrg nir_fsub(nb, one, src[0]))), 5697e102996Smaya 0.5f); 5707ec681f3Smrg break; 57101e04c3fSmrg } 57201e04c3fSmrg 57301e04c3fSmrg case GLSLstd450Asin: 5747ec681f3Smrg dest->def = build_asin(nb, src[0], 0.086566724, -0.03102955, true); 5757ec681f3Smrg break; 57601e04c3fSmrg 57701e04c3fSmrg case GLSLstd450Acos: 5787ec681f3Smrg dest->def = 5797e102996Smaya nir_fsub(nb, nir_imm_floatN_t(nb, M_PI_2f, src[0]->bit_size), 5807ec681f3Smrg build_asin(nb, src[0], 0.08132463, -0.02363318, false)); 5817ec681f3Smrg break; 58201e04c3fSmrg 58301e04c3fSmrg case GLSLstd450Atan: 5847ec681f3Smrg dest->def = nir_atan(nb, src[0]); 5857ec681f3Smrg break; 58601e04c3fSmrg 58701e04c3fSmrg case GLSLstd450Atan2: 5887ec681f3Smrg dest->def = nir_atan2(nb, src[0], src[1]); 5897ec681f3Smrg break; 59001e04c3fSmrg 59101e04c3fSmrg case GLSLstd450Frexp: { 5927ec681f3Smrg dest->def = nir_frexp_sig(nb, src[0]); 5937ec681f3Smrg 5947ec681f3Smrg struct vtn_pointer *i_ptr = vtn_value(b, w[6], vtn_value_type_pointer)->pointer; 5957ec681f3Smrg struct vtn_ssa_value *exp = vtn_create_ssa_value(b, i_ptr->type->type); 5967ec681f3Smrg exp->def = nir_frexp_exp(nb, src[0]); 5977ec681f3Smrg vtn_variable_store(b, exp, i_ptr, 0); 5987ec681f3Smrg break; 59901e04c3fSmrg } 60001e04c3fSmrg 60101e04c3fSmrg case GLSLstd450FrexpStruct: { 6027ec681f3Smrg vtn_assert(glsl_type_is_struct_or_ifc(dest_type)); 6037ec681f3Smrg dest->elems[0]->def = nir_frexp_sig(nb, src[0]); 6047ec681f3Smrg dest->elems[1]->def = nir_frexp_exp(nb, src[0]); 6057ec681f3Smrg break; 60601e04c3fSmrg } 60701e04c3fSmrg 6087ec681f3Smrg default: { 6097ec681f3Smrg unsigned execution_mode = 6107ec681f3Smrg b->shader->info.float_controls_execution_mode; 6117ec681f3Smrg bool exact; 6127ec681f3Smrg nir_op op = vtn_nir_alu_op_for_spirv_glsl_opcode(b, entrypoint, execution_mode, &exact); 6137ec681f3Smrg /* don't override explicit decoration */ 6147ec681f3Smrg b->nb.exact |= exact; 6157ec681f3Smrg dest->def = nir_build_alu(&b->nb, op, src[0], src[1], src[2], NULL); 6167ec681f3Smrg break; 6177ec681f3Smrg } 61801e04c3fSmrg } 6197ec681f3Smrg b->nb.exact = false; 6207ec681f3Smrg 6217ec681f3Smrg vtn_push_ssa_value(b, w[2], dest); 62201e04c3fSmrg} 62301e04c3fSmrg 62401e04c3fSmrgstatic void 62501e04c3fSmrghandle_glsl450_interpolation(struct vtn_builder *b, enum GLSLstd450 opcode, 62601e04c3fSmrg const uint32_t *w, unsigned count) 62701e04c3fSmrg{ 62801e04c3fSmrg nir_intrinsic_op op; 62901e04c3fSmrg switch (opcode) { 63001e04c3fSmrg case GLSLstd450InterpolateAtCentroid: 63101e04c3fSmrg op = nir_intrinsic_interp_deref_at_centroid; 63201e04c3fSmrg break; 63301e04c3fSmrg case GLSLstd450InterpolateAtSample: 63401e04c3fSmrg op = nir_intrinsic_interp_deref_at_sample; 63501e04c3fSmrg break; 63601e04c3fSmrg case GLSLstd450InterpolateAtOffset: 63701e04c3fSmrg op = nir_intrinsic_interp_deref_at_offset; 63801e04c3fSmrg break; 63901e04c3fSmrg default: 64001e04c3fSmrg vtn_fail("Invalid opcode"); 64101e04c3fSmrg } 64201e04c3fSmrg 64301e04c3fSmrg nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(b->nb.shader, op); 64401e04c3fSmrg 64501e04c3fSmrg struct vtn_pointer *ptr = 64601e04c3fSmrg vtn_value(b, w[5], vtn_value_type_pointer)->pointer; 64701e04c3fSmrg nir_deref_instr *deref = vtn_pointer_to_deref(b, ptr); 64801e04c3fSmrg 64901e04c3fSmrg /* If the value we are interpolating has an index into a vector then 65001e04c3fSmrg * interpolate the vector and index the result of that instead. This is 65101e04c3fSmrg * necessary because the index will get generated as a series of nir_bcsel 65201e04c3fSmrg * instructions so it would no longer be an input variable. 65301e04c3fSmrg */ 65401e04c3fSmrg const bool vec_array_deref = deref->deref_type == nir_deref_type_array && 65501e04c3fSmrg glsl_type_is_vector(nir_deref_instr_parent(deref)->type); 65601e04c3fSmrg 65701e04c3fSmrg nir_deref_instr *vec_deref = NULL; 65801e04c3fSmrg if (vec_array_deref) { 65901e04c3fSmrg vec_deref = deref; 66001e04c3fSmrg deref = nir_deref_instr_parent(deref); 66101e04c3fSmrg } 66201e04c3fSmrg intrin->src[0] = nir_src_for_ssa(&deref->dest.ssa); 66301e04c3fSmrg 66401e04c3fSmrg switch (opcode) { 66501e04c3fSmrg case GLSLstd450InterpolateAtCentroid: 66601e04c3fSmrg break; 66701e04c3fSmrg case GLSLstd450InterpolateAtSample: 66801e04c3fSmrg case GLSLstd450InterpolateAtOffset: 6697ec681f3Smrg intrin->src[1] = nir_src_for_ssa(vtn_get_nir_ssa(b, w[6])); 67001e04c3fSmrg break; 67101e04c3fSmrg default: 67201e04c3fSmrg vtn_fail("Invalid opcode"); 67301e04c3fSmrg } 67401e04c3fSmrg 67501e04c3fSmrg intrin->num_components = glsl_get_vector_elements(deref->type); 67601e04c3fSmrg nir_ssa_dest_init(&intrin->instr, &intrin->dest, 67701e04c3fSmrg glsl_get_vector_elements(deref->type), 67801e04c3fSmrg glsl_get_bit_size(deref->type), NULL); 67901e04c3fSmrg 68001e04c3fSmrg nir_builder_instr_insert(&b->nb, &intrin->instr); 68101e04c3fSmrg 6827ec681f3Smrg nir_ssa_def *def = &intrin->dest.ssa; 6837ec681f3Smrg if (vec_array_deref) 6847ec681f3Smrg def = nir_vector_extract(&b->nb, def, vec_deref->arr.index.ssa); 6857ec681f3Smrg 6867ec681f3Smrg vtn_push_nir_ssa(b, w[2], def); 68701e04c3fSmrg} 68801e04c3fSmrg 68901e04c3fSmrgbool 69001e04c3fSmrgvtn_handle_glsl450_instruction(struct vtn_builder *b, SpvOp ext_opcode, 69101e04c3fSmrg const uint32_t *w, unsigned count) 69201e04c3fSmrg{ 69301e04c3fSmrg switch ((enum GLSLstd450)ext_opcode) { 69401e04c3fSmrg case GLSLstd450Determinant: { 6957ec681f3Smrg vtn_push_nir_ssa(b, w[2], build_mat_det(b, vtn_ssa_value(b, w[5]))); 69601e04c3fSmrg break; 69701e04c3fSmrg } 69801e04c3fSmrg 69901e04c3fSmrg case GLSLstd450MatrixInverse: { 7007ec681f3Smrg vtn_push_ssa_value(b, w[2], matrix_inverse(b, vtn_ssa_value(b, w[5]))); 70101e04c3fSmrg break; 70201e04c3fSmrg } 70301e04c3fSmrg 70401e04c3fSmrg case GLSLstd450InterpolateAtCentroid: 70501e04c3fSmrg case GLSLstd450InterpolateAtSample: 70601e04c3fSmrg case GLSLstd450InterpolateAtOffset: 7077e102996Smaya handle_glsl450_interpolation(b, (enum GLSLstd450)ext_opcode, w, count); 70801e04c3fSmrg break; 70901e04c3fSmrg 71001e04c3fSmrg default: 71101e04c3fSmrg handle_glsl450_alu(b, (enum GLSLstd450)ext_opcode, w, count); 71201e04c3fSmrg } 71301e04c3fSmrg 71401e04c3fSmrg return true; 71501e04c3fSmrg} 716