1/*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *    Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27#include "etnaviv_blend.h"
28
29#include "etnaviv_context.h"
30#include "etnaviv_screen.h"
31#include "etnaviv_translate.h"
32#include "hw/common.xml.h"
33#include "pipe/p_defines.h"
34#include "util/u_memory.h"
35#include "util/half_float.h"
36
37void *
38etna_blend_state_create(struct pipe_context *pctx,
39                        const struct pipe_blend_state *so)
40{
41   struct etna_context *ctx = etna_context(pctx);
42   const struct pipe_rt_blend_state *rt0 = &so->rt[0];
43   struct etna_blend_state *co = CALLOC_STRUCT(etna_blend_state);
44   bool alpha_enable, logicop_enable;
45
46   /* pipe_blend_func happens to match the hardware. */
47   STATIC_ASSERT(PIPE_BLEND_ADD == BLEND_EQ_ADD);
48   STATIC_ASSERT(PIPE_BLEND_SUBTRACT == BLEND_EQ_SUBTRACT);
49   STATIC_ASSERT(PIPE_BLEND_REVERSE_SUBTRACT == BLEND_EQ_REVERSE_SUBTRACT);
50   STATIC_ASSERT(PIPE_BLEND_MIN == BLEND_EQ_MIN);
51   STATIC_ASSERT(PIPE_BLEND_MAX == BLEND_EQ_MAX);
52
53   if (!co)
54      return NULL;
55
56   co->base = *so;
57
58   /* Enable blending if
59    * - blend enabled in blend state
60    * - NOT source factor is ONE and destination factor ZERO and eq is ADD for
61    *   both rgb and alpha (which mean that blending is effectively disabled)
62    */
63   alpha_enable = rt0->blend_enable &&
64                 !(rt0->rgb_src_factor == PIPE_BLENDFACTOR_ONE &&
65                   rt0->rgb_dst_factor == PIPE_BLENDFACTOR_ZERO &&
66                   rt0->rgb_func == PIPE_BLEND_ADD &&
67                   rt0->alpha_src_factor == PIPE_BLENDFACTOR_ONE &&
68                   rt0->alpha_dst_factor == PIPE_BLENDFACTOR_ZERO &&
69                   rt0->alpha_func == PIPE_BLEND_ADD);
70
71   /* Enable separate alpha if
72    * - Blending enabled (see above)
73    * - NOT source/destination factor and eq is same for both rgb and alpha
74    *   (which would effectively that mean alpha is not separate), and
75    */
76   bool separate_alpha = alpha_enable &&
77                         !(rt0->rgb_src_factor == rt0->alpha_src_factor &&
78                           rt0->rgb_dst_factor == rt0->alpha_dst_factor &&
79                           rt0->rgb_func == rt0->alpha_func);
80
81   if (alpha_enable) {
82      co->PE_ALPHA_CONFIG =
83         VIVS_PE_ALPHA_CONFIG_BLEND_ENABLE_COLOR |
84         COND(separate_alpha, VIVS_PE_ALPHA_CONFIG_BLEND_SEPARATE_ALPHA) |
85         VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR(translate_blend_factor(rt0->rgb_src_factor)) |
86         VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA(translate_blend_factor(rt0->alpha_src_factor)) |
87         VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR(translate_blend_factor(rt0->rgb_dst_factor)) |
88         VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA(translate_blend_factor(rt0->alpha_dst_factor)) |
89         VIVS_PE_ALPHA_CONFIG_EQ_COLOR(rt0->rgb_func) |
90         VIVS_PE_ALPHA_CONFIG_EQ_ALPHA(rt0->alpha_func);
91   } else {
92      co->PE_ALPHA_CONFIG = 0;
93   }
94
95   logicop_enable = so->logicop_enable &&
96                    VIV_FEATURE(ctx->screen, chipMinorFeatures2, LOGIC_OP);
97
98   co->PE_LOGIC_OP =
99         VIVS_PE_LOGIC_OP_OP(logicop_enable ? so->logicop_func : LOGIC_OP_COPY) |
100         VIVS_PE_LOGIC_OP_DITHER_MODE(3) | /* TODO: related to dithering, sometimes 2 */
101         0x000E4000 /* ??? */;
102
103   co->fo_allowed = !alpha_enable && !logicop_enable;
104
105   /* independent_blend_enable not needed: only one rt supported */
106   /* XXX alpha_to_coverage / alpha_to_one? */
107   /* Set dither registers based on dither status. These registers set the
108    * dither pattern,
109    * for now, set the same values as the blob.
110    */
111   if (so->dither) {
112      co->PE_DITHER[0] = 0x6e4ca280;
113      co->PE_DITHER[1] = 0x5d7f91b3;
114   } else {
115      co->PE_DITHER[0] = 0xffffffff;
116      co->PE_DITHER[1] = 0xffffffff;
117   }
118
119   return co;
120}
121
122bool
123etna_update_blend(struct etna_context *ctx)
124{
125   struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
126   struct pipe_blend_state *pblend = ctx->blend;
127   struct etna_blend_state *blend = etna_blend_state(pblend);
128   const struct pipe_rt_blend_state *rt0 = &pblend->rt[0];
129   const struct util_format_description *desc;
130   uint32_t colormask;
131
132   if (pfb->cbufs[0] &&
133       translate_pe_format_rb_swap(pfb->cbufs[0]->format)) {
134      colormask = rt0->colormask & (PIPE_MASK_A | PIPE_MASK_G);
135      if (rt0->colormask & PIPE_MASK_R)
136         colormask |= PIPE_MASK_B;
137      if (rt0->colormask & PIPE_MASK_B)
138         colormask |= PIPE_MASK_R;
139   } else {
140      colormask = rt0->colormask;
141   }
142
143   /* If the complete render target is written, set full_overwrite:
144    * - The color mask covers all channels of the render target
145    * - No blending or logicop is used
146    */
147   if (pfb->cbufs[0])
148      desc = util_format_description(pfb->cbufs[0]->format);
149   bool full_overwrite = !pfb->cbufs[0] || ((blend->fo_allowed &&
150                         util_format_colormask_full(desc, colormask)));
151   blend->PE_COLOR_FORMAT =
152            VIVS_PE_COLOR_FORMAT_COMPONENTS(colormask) |
153            COND(full_overwrite, VIVS_PE_COLOR_FORMAT_OVERWRITE);
154
155   return true;
156}
157
158void
159etna_set_blend_color(struct pipe_context *pctx, const struct pipe_blend_color *bc)
160{
161   struct etna_context *ctx = etna_context(pctx);
162   struct compiled_blend_color *cs = &ctx->blend_color;
163
164   memcpy(cs->color, bc->color, sizeof(float) * 4);
165
166   ctx->dirty |= ETNA_DIRTY_BLEND_COLOR;
167}
168
169bool
170etna_update_blend_color(struct etna_context *ctx)
171{
172   struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
173   struct compiled_blend_color *cs = &ctx->blend_color;
174   bool rb_swap = (pfb->cbufs[0] && translate_pe_format_rb_swap(pfb->cbufs[0]->format));
175
176   cs->PE_ALPHA_BLEND_COLOR =
177      VIVS_PE_ALPHA_BLEND_COLOR_R(etna_cfloat_to_uint8(cs->color[rb_swap ? 2 : 0])) |
178      VIVS_PE_ALPHA_BLEND_COLOR_G(etna_cfloat_to_uint8(cs->color[1])) |
179      VIVS_PE_ALPHA_BLEND_COLOR_B(etna_cfloat_to_uint8(cs->color[rb_swap ? 0 : 2])) |
180      VIVS_PE_ALPHA_BLEND_COLOR_A(etna_cfloat_to_uint8(cs->color[3]));
181
182   cs->PE_ALPHA_COLOR_EXT0 =
183      VIVS_PE_ALPHA_COLOR_EXT0_B(_mesa_float_to_half(cs->color[rb_swap ? 2 : 0])) |
184      VIVS_PE_ALPHA_COLOR_EXT0_G(_mesa_float_to_half(cs->color[1]));
185   cs->PE_ALPHA_COLOR_EXT1 =
186      VIVS_PE_ALPHA_COLOR_EXT1_R(_mesa_float_to_half(cs->color[rb_swap ? 0 : 2])) |
187      VIVS_PE_ALPHA_COLOR_EXT1_A(_mesa_float_to_half(cs->color[3]));
188
189   return true;
190}
191