17ec681f3Smrg/*
27ec681f3Smrg * Copyright © 2021 Google, Inc.
37ec681f3Smrg *
47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
57ec681f3Smrg * copy of this software and associated documentation files (the "Software"),
67ec681f3Smrg * to deal in the Software without restriction, including without limitation
77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the
97ec681f3Smrg * Software is furnished to do so, subject to the following conditions:
107ec681f3Smrg *
117ec681f3Smrg * The above copyright notice and this permission notice (including the next
127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the
137ec681f3Smrg * Software.
147ec681f3Smrg *
157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
207ec681f3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
217ec681f3Smrg * SOFTWARE.
227ec681f3Smrg */
237ec681f3Smrg
247ec681f3Smrg#ifndef FREEDRENO_PERFETTO_H_
257ec681f3Smrg#define FREEDRENO_PERFETTO_H_
267ec681f3Smrg
277ec681f3Smrg#ifdef __cplusplus
287ec681f3Smrgextern "C" {
297ec681f3Smrg#endif
307ec681f3Smrg
317ec681f3Smrg#ifdef HAVE_PERFETTO
327ec681f3Smrg
337ec681f3Smrg/**
347ec681f3Smrg * Render-stage id's
357ec681f3Smrg */
367ec681f3Smrgenum fd_stage_id {
377ec681f3Smrg   SURFACE_STAGE_ID, /* Surface is a sort of meta-stage for render-target info */
387ec681f3Smrg   BINNING_STAGE_ID,
397ec681f3Smrg   GMEM_STAGE_ID,
407ec681f3Smrg   BYPASS_STAGE_ID,
417ec681f3Smrg   BLIT_STAGE_ID,
427ec681f3Smrg   COMPUTE_STAGE_ID,
437ec681f3Smrg   CLEAR_RESTORE_STAGE_ID,
447ec681f3Smrg   RESOLVE_STAGE_ID,
457ec681f3Smrg   // TODO add the rest
467ec681f3Smrg
477ec681f3Smrg   NUM_STAGES
487ec681f3Smrg};
497ec681f3Smrg
507ec681f3Smrgstatic const struct {
517ec681f3Smrg   const char *name;
527ec681f3Smrg   const char *desc;
537ec681f3Smrg} stages[] = {
547ec681f3Smrg   [SURFACE_STAGE_ID] = {"Surface"},
557ec681f3Smrg   [BINNING_STAGE_ID] = {"Binning", "Perform Visibility pass and determine target bins"},
567ec681f3Smrg   [GMEM_STAGE_ID]    = {"Render", "Rendering to GMEM"},
577ec681f3Smrg   [BYPASS_STAGE_ID]  = {"Render", "Rendering to system memory"},
587ec681f3Smrg   [BLIT_STAGE_ID]    = {"Blit", "Performing a Blit operation"},
597ec681f3Smrg   [COMPUTE_STAGE_ID] = {"Compute", "Compute job"},
607ec681f3Smrg   [CLEAR_RESTORE_STAGE_ID] = {"Clear/Restore", "Clear (sysmem) or per-tile clear or restore (GMEM)"},
617ec681f3Smrg   [RESOLVE_STAGE_ID] = {"Resolve", "Per tile resolve (GMEM to system memory"},
627ec681f3Smrg   // TODO add the rest
637ec681f3Smrg};
647ec681f3Smrg
657ec681f3Smrg/**
667ec681f3Smrg * Queue-id's
677ec681f3Smrg */
687ec681f3Smrgenum {
697ec681f3Smrg   DEFAULT_HW_QUEUE_ID,
707ec681f3Smrg};
717ec681f3Smrg
727ec681f3Smrgstatic const struct {
737ec681f3Smrg   const char *name;
747ec681f3Smrg   const char *desc;
757ec681f3Smrg} queues[] = {
767ec681f3Smrg   [DEFAULT_HW_QUEUE_ID] = {"GPU Queue 0", "Default Adreno Hardware Queue"},
777ec681f3Smrg};
787ec681f3Smrg
797ec681f3Smrg/**
807ec681f3Smrg * The u_trace tracepoints which are used to capture GPU timestamps and
817ec681f3Smrg * trigger perfetto events tend to come in begin/end pairs (ie. start
827ec681f3Smrg * and end of binning pass, etc), but perfetto wants one event for the
837ec681f3Smrg * whole pass.  So we need to buffer up some state at the "begin" trae
847ec681f3Smrg * callback, and then emit the perfetto event at the "end" event based
857ec681f3Smrg * on previously recorded timestamp/data.  This struct is where we can
867ec681f3Smrg * accumulate that state.
877ec681f3Smrg */
887ec681f3Smrgstruct fd_perfetto_state {
897ec681f3Smrg   uint64_t start_ts[NUM_STAGES];
907ec681f3Smrg
917ec681f3Smrg   /*
927ec681f3Smrg    * Surface state for the renderpass:
937ec681f3Smrg    */
947ec681f3Smrg   uint32_t submit_id;
957ec681f3Smrg   enum pipe_format cbuf0_format : 16;
967ec681f3Smrg   enum pipe_format zs_format : 16;
977ec681f3Smrg   uint16_t width;
987ec681f3Smrg   uint16_t height;
997ec681f3Smrg   uint8_t mrts;
1007ec681f3Smrg   uint8_t samples;
1017ec681f3Smrg   uint16_t nbins;
1027ec681f3Smrg   uint16_t binw;
1037ec681f3Smrg   uint16_t binh;
1047ec681f3Smrg   // TODO # of draws and possibly estimated cost might be useful addition..
1057ec681f3Smrg};
1067ec681f3Smrg
1077ec681f3Smrgvoid fd_perfetto_init(void);
1087ec681f3Smrg
1097ec681f3Smrgstruct fd_context;
1107ec681f3Smrgvoid fd_perfetto_submit(struct fd_context *ctx);
1117ec681f3Smrg
1127ec681f3Smrg#endif
1137ec681f3Smrg
1147ec681f3Smrg#ifdef __cplusplus
1157ec681f3Smrg}
1167ec681f3Smrg#endif
1177ec681f3Smrg
1187ec681f3Smrg#endif /* FREEDRENO_PERFETTO_H_ */
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