1/**************************************************************************
2 *
3 * Copyright 2007 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28/* Authors:  Keith Whitwell <keithw@vmware.com>
29 */
30
31#include "compiler/nir/nir_builder.h"
32#include "draw/draw_context.h"
33#include "nir/nir_to_tgsi.h"
34#include "tgsi/tgsi_parse.h"
35#include "util/u_helpers.h"
36#include "util/u_inlines.h"
37#include "util/u_math.h"
38#include "util/u_memory.h"
39#include "util/u_transfer.h"
40#include "nir.h"
41
42#include "i915_context.h"
43#include "i915_fpc.h"
44#include "i915_reg.h"
45#include "i915_resource.h"
46#include "i915_state.h"
47#include "i915_state_inlines.h"
48
49/* The i915 (and related graphics cores) do not support GL_CLAMP.  The
50 * Intel drivers for "other operating systems" implement GL_CLAMP as
51 * GL_CLAMP_TO_EDGE, so the same is done here.
52 */
53static unsigned
54translate_wrap_mode(unsigned wrap)
55{
56   switch (wrap) {
57   case PIPE_TEX_WRAP_REPEAT:
58      return TEXCOORDMODE_WRAP;
59   case PIPE_TEX_WRAP_CLAMP:
60      return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
61   case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
62      return TEXCOORDMODE_CLAMP_EDGE;
63   case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
64      return TEXCOORDMODE_CLAMP_BORDER;
65   case PIPE_TEX_WRAP_MIRROR_REPEAT:
66      return TEXCOORDMODE_MIRROR;
67   default:
68      return TEXCOORDMODE_WRAP;
69   }
70}
71
72static unsigned
73translate_img_filter(unsigned filter)
74{
75   switch (filter) {
76   case PIPE_TEX_FILTER_NEAREST:
77      return FILTER_NEAREST;
78   case PIPE_TEX_FILTER_LINEAR:
79      return FILTER_LINEAR;
80   default:
81      assert(0);
82      return FILTER_NEAREST;
83   }
84}
85
86static unsigned
87translate_mip_filter(unsigned filter)
88{
89   switch (filter) {
90   case PIPE_TEX_MIPFILTER_NONE:
91      return MIPFILTER_NONE;
92   case PIPE_TEX_MIPFILTER_NEAREST:
93      return MIPFILTER_NEAREST;
94   case PIPE_TEX_MIPFILTER_LINEAR:
95      return MIPFILTER_LINEAR;
96   default:
97      assert(0);
98      return MIPFILTER_NONE;
99   }
100}
101
102static uint32_t
103i915_remap_lis6_blend_dst_alpha(uint32_t lis6, uint32_t normal, uint32_t inv)
104{
105   uint32_t src = (lis6 >> S6_CBUF_SRC_BLEND_FACT_SHIFT) & BLENDFACT_MASK;
106   lis6 &= ~SRC_BLND_FACT(BLENDFACT_MASK);
107   if (src == BLENDFACT_DST_ALPHA)
108      src = normal;
109   else if (src == BLENDFACT_INV_DST_ALPHA)
110      src = inv;
111   lis6 |= SRC_BLND_FACT(src);
112
113   uint32_t dst = (lis6 >> S6_CBUF_DST_BLEND_FACT_SHIFT) & BLENDFACT_MASK;
114   lis6 &= ~DST_BLND_FACT(BLENDFACT_MASK);
115   if (dst == BLENDFACT_DST_ALPHA)
116      dst = normal;
117   else if (dst == BLENDFACT_INV_DST_ALPHA)
118      dst = inv;
119   lis6 |= DST_BLND_FACT(dst);
120
121   return lis6;
122}
123
124static uint32_t
125i915_remap_iab_blend_dst_alpha(uint32_t iab, uint32_t normal, uint32_t inv)
126{
127   uint32_t src = (iab >> IAB_SRC_FACTOR_SHIFT) & BLENDFACT_MASK;
128   iab &= ~SRC_BLND_FACT(BLENDFACT_MASK);
129   if (src == BLENDFACT_DST_ALPHA)
130      src = normal;
131   else if (src == BLENDFACT_INV_DST_ALPHA)
132      src = inv;
133   iab |= SRC_ABLND_FACT(src);
134
135   uint32_t dst = (iab >> IAB_DST_FACTOR_SHIFT) & BLENDFACT_MASK;
136   iab &= ~DST_BLND_FACT(BLENDFACT_MASK);
137   if (dst == BLENDFACT_DST_ALPHA)
138      dst = normal;
139   else if (dst == BLENDFACT_INV_DST_ALPHA)
140      dst = inv;
141   iab |= DST_ABLND_FACT(dst);
142
143   return iab;
144}
145
146/* None of this state is actually used for anything yet.
147 */
148static void *
149i915_create_blend_state(struct pipe_context *pipe,
150                        const struct pipe_blend_state *blend)
151{
152   struct i915_blend_state *cso_data = CALLOC_STRUCT(i915_blend_state);
153
154   {
155      unsigned eqRGB = blend->rt[0].rgb_func;
156      unsigned srcRGB = blend->rt[0].rgb_src_factor;
157      unsigned dstRGB = blend->rt[0].rgb_dst_factor;
158
159      unsigned eqA = blend->rt[0].alpha_func;
160      unsigned srcA = blend->rt[0].alpha_src_factor;
161      unsigned dstA = blend->rt[0].alpha_dst_factor;
162
163      /* Special handling for MIN/MAX filter modes handled at
164       * frontend level.
165       */
166
167      if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
168
169         cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
170                          IAB_MODIFY_ENABLE | IAB_ENABLE | IAB_MODIFY_FUNC |
171                          IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR |
172                          SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
173                          DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
174                          (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
175      } else {
176         cso_data->iab =
177            (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | 0);
178      }
179   }
180
181   cso_data->modes4 |=
182      (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC |
183       LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
184
185   if (blend->logicop_enable)
186      cso_data->LIS5 |= S5_LOGICOP_ENABLE;
187
188   if (blend->dither)
189      cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
190
191   /* We potentially do some fixup at emission for non-BGRA targets */
192   if ((blend->rt[0].colormask & PIPE_MASK_R) == 0)
193      cso_data->LIS5 |= S5_WRITEDISABLE_RED;
194
195   if ((blend->rt[0].colormask & PIPE_MASK_G) == 0)
196      cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
197
198   if ((blend->rt[0].colormask & PIPE_MASK_B) == 0)
199      cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
200
201   if ((blend->rt[0].colormask & PIPE_MASK_A) == 0)
202      cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA;
203
204   if (blend->rt[0].blend_enable) {
205      unsigned funcRGB = blend->rt[0].rgb_func;
206      unsigned srcRGB = blend->rt[0].rgb_src_factor;
207      unsigned dstRGB = blend->rt[0].rgb_dst_factor;
208
209      cso_data->LIS6 |=
210         (S6_CBUF_BLEND_ENABLE |
211          SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
212          DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
213          (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
214   }
215
216   cso_data->LIS6_alpha_in_g = i915_remap_lis6_blend_dst_alpha(
217      cso_data->LIS6, BLENDFACT_DST_COLR, BLENDFACT_INV_DST_COLR);
218   cso_data->LIS6_alpha_is_x = i915_remap_lis6_blend_dst_alpha(
219      cso_data->LIS6, BLENDFACT_ONE, BLENDFACT_ZERO);
220
221   cso_data->iab_alpha_in_g = i915_remap_iab_blend_dst_alpha(
222      cso_data->iab, BLENDFACT_DST_COLR, BLENDFACT_INV_DST_COLR);
223   cso_data->iab_alpha_is_x = i915_remap_iab_blend_dst_alpha(
224      cso_data->iab, BLENDFACT_ONE, BLENDFACT_ZERO);
225
226   return cso_data;
227}
228
229static void
230i915_bind_blend_state(struct pipe_context *pipe, void *blend)
231{
232   struct i915_context *i915 = i915_context(pipe);
233
234   if (i915->blend == blend)
235      return;
236
237   i915->blend = (struct i915_blend_state *)blend;
238
239   i915->dirty |= I915_NEW_BLEND;
240}
241
242static void
243i915_delete_blend_state(struct pipe_context *pipe, void *blend)
244{
245   FREE(blend);
246}
247
248static void
249i915_set_blend_color(struct pipe_context *pipe,
250                     const struct pipe_blend_color *blend_color)
251{
252   struct i915_context *i915 = i915_context(pipe);
253
254   if (!blend_color)
255      return;
256
257   i915->blend_color = *blend_color;
258
259   i915->dirty |= I915_NEW_BLEND;
260}
261
262static void
263i915_set_stencil_ref(struct pipe_context *pipe,
264                     const struct pipe_stencil_ref stencil_ref)
265{
266   struct i915_context *i915 = i915_context(pipe);
267
268   i915->stencil_ref = stencil_ref;
269
270   i915->dirty |= I915_NEW_DEPTH_STENCIL;
271}
272
273static void *
274i915_create_sampler_state(struct pipe_context *pipe,
275                          const struct pipe_sampler_state *sampler)
276{
277   struct i915_sampler_state *cso = CALLOC_STRUCT(i915_sampler_state);
278   const unsigned ws = sampler->wrap_s;
279   const unsigned wt = sampler->wrap_t;
280   const unsigned wr = sampler->wrap_r;
281   unsigned minFilt, magFilt;
282   unsigned mipFilt;
283
284   cso->templ = *sampler;
285
286   mipFilt = translate_mip_filter(sampler->min_mip_filter);
287   minFilt = translate_img_filter(sampler->min_img_filter);
288   magFilt = translate_img_filter(sampler->mag_img_filter);
289
290   if (sampler->max_anisotropy > 1)
291      minFilt = magFilt = FILTER_ANISOTROPIC;
292
293   if (sampler->max_anisotropy > 2) {
294      cso->state[0] |= SS2_MAX_ANISO_4;
295   }
296
297   {
298      int b = (int)(sampler->lod_bias * 16.0);
299      b = CLAMP(b, -256, 255);
300      cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
301   }
302
303   /* Shadow:
304    */
305   if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
306      cso->state[0] |= (SS2_SHADOW_ENABLE | i915_translate_shadow_compare_func(
307                                               sampler->compare_func));
308
309      minFilt = FILTER_4X4_FLAT;
310      magFilt = FILTER_4X4_FLAT;
311   }
312
313   cso->state[0] |=
314      ((minFilt << SS2_MIN_FILTER_SHIFT) | (mipFilt << SS2_MIP_FILTER_SHIFT) |
315       (magFilt << SS2_MAG_FILTER_SHIFT));
316
317   cso->state[1] |= ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
318                     (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
319                     (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
320
321   if (sampler->normalized_coords)
322      cso->state[1] |= SS3_NORMALIZED_COORDS;
323
324   {
325      int minlod = (int)(16.0 * sampler->min_lod);
326      int maxlod = (int)(16.0 * sampler->max_lod);
327      minlod = CLAMP(minlod, 0, 16 * 11);
328      maxlod = CLAMP(maxlod, 0, 16 * 11);
329
330      if (minlod > maxlod)
331         maxlod = minlod;
332
333      cso->minlod = minlod;
334      cso->maxlod = maxlod;
335   }
336
337   {
338      ubyte r = float_to_ubyte(sampler->border_color.f[0]);
339      ubyte g = float_to_ubyte(sampler->border_color.f[1]);
340      ubyte b = float_to_ubyte(sampler->border_color.f[2]);
341      ubyte a = float_to_ubyte(sampler->border_color.f[3]);
342      cso->state[2] = I915PACKCOLOR8888(r, g, b, a);
343   }
344   return cso;
345}
346
347static void
348i915_bind_sampler_states(struct pipe_context *pipe,
349                         enum pipe_shader_type shader, unsigned start,
350                         unsigned num, void **samplers)
351{
352   if (shader != PIPE_SHADER_FRAGMENT) {
353      assert(num == 0);
354      return;
355   }
356
357   struct i915_context *i915 = i915_context(pipe);
358   unsigned i;
359
360   /* Check for no-op */
361   if (num == i915->num_samplers &&
362       !memcmp(i915->fragment_sampler + start, samplers, num * sizeof(void *)))
363      return;
364
365   for (i = 0; i < num; ++i)
366      i915->fragment_sampler[i + start] = samplers[i];
367
368   /* find highest non-null samplers[] entry */
369   {
370      unsigned j = MAX2(i915->num_samplers, start + num);
371      while (j > 0 && i915->fragment_sampler[j - 1] == NULL)
372         j--;
373      i915->num_samplers = j;
374   }
375
376   i915->dirty |= I915_NEW_SAMPLER;
377}
378
379static void
380i915_delete_sampler_state(struct pipe_context *pipe, void *sampler)
381{
382   FREE(sampler);
383}
384
385/** XXX move someday?  Or consolidate all these simple state setters
386 * into one file.
387 */
388
389static uint32_t
390i915_get_modes4_stencil(const struct pipe_stencil_state *stencil)
391{
392   int testmask = stencil->valuemask & 0xff;
393   int writemask = stencil->writemask & 0xff;
394
395   return (_3DSTATE_MODES_4_CMD | ENABLE_STENCIL_TEST_MASK |
396           STENCIL_TEST_MASK(testmask) | ENABLE_STENCIL_WRITE_MASK |
397           STENCIL_WRITE_MASK(writemask));
398}
399
400static uint32_t
401i915_get_lis5_stencil(const struct pipe_stencil_state *stencil)
402{
403   int test = i915_translate_compare_func(stencil->func);
404   int fop = i915_translate_stencil_op(stencil->fail_op);
405   int dfop = i915_translate_stencil_op(stencil->zfail_op);
406   int dpop = i915_translate_stencil_op(stencil->zpass_op);
407
408   return (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE |
409           (test << S5_STENCIL_TEST_FUNC_SHIFT) |
410           (fop << S5_STENCIL_FAIL_SHIFT) |
411           (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
412           (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
413}
414
415static uint32_t
416i915_get_bfo(const struct pipe_stencil_state *stencil)
417{
418   int test = i915_translate_compare_func(stencil->func);
419   int fop = i915_translate_stencil_op(stencil->fail_op);
420   int dfop = i915_translate_stencil_op(stencil->zfail_op);
421   int dpop = i915_translate_stencil_op(stencil->zpass_op);
422
423   return (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_FUNCS |
424           BFO_ENABLE_STENCIL_TWO_SIDE | BFO_ENABLE_STENCIL_REF |
425           BFO_STENCIL_TWO_SIDE | (test << BFO_STENCIL_TEST_SHIFT) |
426           (fop << BFO_STENCIL_FAIL_SHIFT) |
427           (dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
428           (dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
429}
430
431static uint32_t
432i915_get_bfm(const struct pipe_stencil_state *stencil)
433{
434   return (_3DSTATE_BACKFACE_STENCIL_MASKS | BFM_ENABLE_STENCIL_TEST_MASK |
435           BFM_ENABLE_STENCIL_WRITE_MASK |
436           ((stencil->valuemask & 0xff) << BFM_STENCIL_TEST_MASK_SHIFT) |
437           ((stencil->writemask & 0xff) << BFM_STENCIL_WRITE_MASK_SHIFT));
438}
439
440static void *
441i915_create_depth_stencil_state(
442   struct pipe_context *pipe,
443   const struct pipe_depth_stencil_alpha_state *depth_stencil)
444{
445   struct i915_depth_stencil_state *cso =
446      CALLOC_STRUCT(i915_depth_stencil_state);
447
448   cso->stencil_modes4_cw = i915_get_modes4_stencil(&depth_stencil->stencil[0]);
449   cso->stencil_modes4_ccw =
450      i915_get_modes4_stencil(&depth_stencil->stencil[1]);
451
452   if (depth_stencil->stencil[0].enabled) {
453      cso->stencil_LIS5_cw = i915_get_lis5_stencil(&depth_stencil->stencil[0]);
454   }
455
456   if (depth_stencil->stencil[1].enabled) {
457      cso->bfo_cw[0] = i915_get_bfo(&depth_stencil->stencil[1]);
458      cso->bfo_cw[1] = i915_get_bfm(&depth_stencil->stencil[1]);
459
460      /* Precompute the backface stencil settings if front winding order is
461       * reversed -- HW doesn't have a bit to flip it for us.
462       */
463      cso->stencil_LIS5_ccw = i915_get_lis5_stencil(&depth_stencil->stencil[1]);
464      cso->bfo_ccw[0] = i915_get_bfo(&depth_stencil->stencil[0]);
465      cso->bfo_ccw[1] = i915_get_bfm(&depth_stencil->stencil[0]);
466   } else {
467      /* This actually disables two-side stencil: The bit set is a
468       * modify-enable bit to indicate we are changing the two-side
469       * setting.  Then there is a symbolic zero to show that we are
470       * setting the flag to zero/off.
471       */
472      cso->bfo_cw[0] = cso->bfo_ccw[0] =
473         (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0);
474      cso->bfo_cw[1] = cso->bfo_ccw[1] = 0;
475
476      cso->stencil_LIS5_ccw = cso->stencil_LIS5_cw;
477   }
478
479   if (depth_stencil->depth_enabled) {
480      int func = i915_translate_compare_func(depth_stencil->depth_func);
481
482      cso->depth_LIS6 |=
483         (S6_DEPTH_TEST_ENABLE | (func << S6_DEPTH_TEST_FUNC_SHIFT));
484
485      if (depth_stencil->depth_writemask)
486         cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
487   }
488
489   if (depth_stencil->alpha_enabled) {
490      int test = i915_translate_compare_func(depth_stencil->alpha_func);
491      ubyte refByte = float_to_ubyte(depth_stencil->alpha_ref_value);
492
493      cso->depth_LIS6 |=
494         (S6_ALPHA_TEST_ENABLE | (test << S6_ALPHA_TEST_FUNC_SHIFT) |
495          (((unsigned)refByte) << S6_ALPHA_REF_SHIFT));
496   }
497
498   return cso;
499}
500
501static void
502i915_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
503{
504   struct i915_context *i915 = i915_context(pipe);
505
506   if (i915->depth_stencil == depth_stencil)
507      return;
508
509   i915->depth_stencil = (const struct i915_depth_stencil_state *)depth_stencil;
510
511   i915->dirty |= I915_NEW_DEPTH_STENCIL;
512}
513
514static void
515i915_delete_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
516{
517   FREE(depth_stencil);
518}
519
520static void
521i915_set_scissor_states(struct pipe_context *pipe, unsigned start_slot,
522                        unsigned num_scissors,
523                        const struct pipe_scissor_state *scissor)
524{
525   struct i915_context *i915 = i915_context(pipe);
526
527   memcpy(&i915->scissor, scissor, sizeof(*scissor));
528   i915->dirty |= I915_NEW_SCISSOR;
529}
530
531static void
532i915_set_polygon_stipple(struct pipe_context *pipe,
533                         const struct pipe_poly_stipple *stipple)
534{
535}
536
537static void *
538i915_create_fs_state(struct pipe_context *pipe,
539                     const struct pipe_shader_state *templ)
540{
541   struct i915_context *i915 = i915_context(pipe);
542   struct i915_fragment_shader *ifs = CALLOC_STRUCT(i915_fragment_shader);
543   if (!ifs)
544      return NULL;
545
546   ifs->draw_data = draw_create_fragment_shader(i915->draw, templ);
547
548   if (templ->type == PIPE_SHADER_IR_NIR) {
549      nir_shader *s = templ->ir.nir;
550
551      NIR_PASS_V(s, i915_nir_lower_sincos);
552
553      ifs->state.tokens = nir_to_tgsi(s, pipe->screen);
554   } else {
555      assert(templ->type == PIPE_SHADER_IR_TGSI);
556      /* we need to keep a local copy of the tokens */
557      ifs->state.tokens = tgsi_dup_tokens(templ->tokens);
558   }
559
560   ifs->state.type = PIPE_SHADER_IR_TGSI;
561
562   tgsi_scan_shader(ifs->state.tokens, &ifs->info);
563
564   /* The shader's compiled to i915 instructions here */
565   i915_translate_fragment_program(i915, ifs);
566
567   return ifs;
568}
569
570static void
571i915_bind_fs_state(struct pipe_context *pipe, void *shader)
572{
573   struct i915_context *i915 = i915_context(pipe);
574
575   if (i915->fs == shader)
576      return;
577
578   i915->fs = (struct i915_fragment_shader *)shader;
579
580   draw_bind_fragment_shader(i915->draw,
581                             (i915->fs ? i915->fs->draw_data : NULL));
582
583   /* Tell draw if we need to do point sprites so we can get PNTC. */
584   if (i915->fs)
585      draw_wide_point_sprites(i915->draw, i915->fs->reads_pntc);
586
587   i915->dirty |= I915_NEW_FS;
588}
589
590static void
591i915_delete_fs_state(struct pipe_context *pipe, void *shader)
592{
593   struct i915_fragment_shader *ifs = (struct i915_fragment_shader *)shader;
594
595   FREE(ifs->program);
596   ifs->program = NULL;
597   FREE((struct tgsi_token *)ifs->state.tokens);
598   ifs->state.tokens = NULL;
599
600   ifs->program_len = 0;
601
602   FREE(ifs);
603}
604
605static void *
606i915_create_vs_state(struct pipe_context *pipe,
607                     const struct pipe_shader_state *templ)
608{
609   struct i915_context *i915 = i915_context(pipe);
610
611   struct pipe_shader_state from_nir = { PIPE_SHADER_IR_TGSI };
612   if (templ->type == PIPE_SHADER_IR_NIR) {
613      nir_shader *s = templ->ir.nir;
614
615      NIR_PASS_V(s, nir_lower_point_size, 1.0, 255.0);
616
617      /* The gallivm draw path doesn't support non-native-integers NIR shaders,
618       * st/mesa does native-integers for the screen as a whole rather than
619       * per-stage, and i915 FS can't do native integers.  So, convert to TGSI,
620       * where the draw path *does* support non-native-integers.
621       */
622      from_nir.tokens = nir_to_tgsi(s, pipe->screen);
623      templ = &from_nir;
624   }
625
626   return draw_create_vertex_shader(i915->draw, templ);
627}
628
629static void
630i915_bind_vs_state(struct pipe_context *pipe, void *shader)
631{
632   struct i915_context *i915 = i915_context(pipe);
633
634   if (i915->vs == shader)
635      return;
636
637   i915->vs = shader;
638
639   /* just pass-through to draw module */
640   draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *)shader);
641
642   i915->dirty |= I915_NEW_VS;
643}
644
645static void
646i915_delete_vs_state(struct pipe_context *pipe, void *shader)
647{
648   struct i915_context *i915 = i915_context(pipe);
649
650   /* just pass-through to draw module */
651   draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *)shader);
652}
653
654static void
655i915_set_constant_buffer(struct pipe_context *pipe,
656                         enum pipe_shader_type shader, uint32_t index,
657                         bool take_ownership,
658                         const struct pipe_constant_buffer *cb)
659{
660   struct i915_context *i915 = i915_context(pipe);
661   struct pipe_resource *buf = cb ? cb->buffer : NULL;
662   unsigned new_num = 0;
663   bool diff = true;
664
665   /* XXX don't support geom shaders now */
666   if (shader == PIPE_SHADER_GEOMETRY)
667      return;
668
669   if (cb && cb->user_buffer) {
670      buf = i915_user_buffer_create(pipe->screen, (void *)cb->user_buffer,
671                                    cb->buffer_size, PIPE_BIND_CONSTANT_BUFFER);
672   }
673
674   /* if we have a new buffer compare it with the old one */
675   if (buf) {
676      struct i915_buffer *ibuf = i915_buffer(buf);
677      struct pipe_resource *old_buf = i915->constants[shader];
678      struct i915_buffer *old = old_buf ? i915_buffer(old_buf) : NULL;
679      unsigned old_num = i915->current.num_user_constants[shader];
680
681      new_num = ibuf->b.width0 / 4 * sizeof(float);
682
683      if (old_num == new_num) {
684         if (old_num == 0)
685            diff = false;
686#if 0
687         /* XXX no point in running this code since st/mesa only uses user buffers */
688         /* Can't compare the buffer data since they are userbuffers */
689         else if (old && old->free_on_destroy)
690            diff = memcmp(old->data, ibuf->data, ibuf->b.width0);
691#else
692         (void)old;
693#endif
694      }
695   } else {
696      diff = i915->current.num_user_constants[shader] != 0;
697   }
698
699   if (take_ownership) {
700      pipe_resource_reference(&i915->constants[shader], NULL);
701      i915->constants[shader] = buf;
702   } else {
703      pipe_resource_reference(&i915->constants[shader], buf);
704   }
705   i915->current.num_user_constants[shader] = new_num;
706
707   if (diff)
708      i915->dirty |= shader == PIPE_SHADER_VERTEX ? I915_NEW_VS_CONSTANTS
709                                                  : I915_NEW_FS_CONSTANTS;
710
711   if (cb && cb->user_buffer) {
712      pipe_resource_reference(&buf, NULL);
713   }
714}
715
716static void
717i915_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
718                       unsigned start, unsigned num,
719                       unsigned unbind_num_trailing_slots,
720                       bool take_ownership,
721                       struct pipe_sampler_view **views)
722{
723   if (shader != PIPE_SHADER_FRAGMENT) {
724      /* No support for VS samplers, because it would mean accessing the
725       * write-combined maps of the textures, which is very slow.  VS samplers
726       * are not a required feature of GL2.1 or GLES2.
727       */
728      assert(num == 0);
729      return;
730   }
731   struct i915_context *i915 = i915_context(pipe);
732   uint32_t i;
733
734   assert(num <= PIPE_MAX_SAMPLERS);
735
736   /* Check for no-op */
737   if (views && num == i915->num_fragment_sampler_views &&
738       !memcmp(i915->fragment_sampler_views, views,
739               num * sizeof(struct pipe_sampler_view *))) {
740      if (take_ownership) {
741         for (unsigned i = 0; i < num; i++) {
742            struct pipe_sampler_view *view = views[i];
743            pipe_sampler_view_reference(&view, NULL);
744         }
745      }
746      return;
747   }
748
749   for (i = 0; i < num; i++) {
750      if (take_ownership) {
751         pipe_sampler_view_reference(&i915->fragment_sampler_views[i], NULL);
752         i915->fragment_sampler_views[i] = views[i];
753      } else {
754         pipe_sampler_view_reference(&i915->fragment_sampler_views[i], views[i]);
755      }
756   }
757
758   for (i = num; i < i915->num_fragment_sampler_views; i++)
759      pipe_sampler_view_reference(&i915->fragment_sampler_views[i], NULL);
760
761   i915->num_fragment_sampler_views = num;
762
763   i915->dirty |= I915_NEW_SAMPLER_VIEW;
764}
765
766struct pipe_sampler_view *
767i915_create_sampler_view_custom(struct pipe_context *pipe,
768                                struct pipe_resource *texture,
769                                const struct pipe_sampler_view *templ,
770                                unsigned width0, unsigned height0)
771{
772   struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
773
774   if (view) {
775      *view = *templ;
776      view->reference.count = 1;
777      view->texture = NULL;
778      pipe_resource_reference(&view->texture, texture);
779      view->context = pipe;
780   }
781
782   return view;
783}
784
785static struct pipe_sampler_view *
786i915_create_sampler_view(struct pipe_context *pipe,
787                         struct pipe_resource *texture,
788                         const struct pipe_sampler_view *templ)
789{
790   struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
791
792   if (view) {
793      *view = *templ;
794      view->reference.count = 1;
795      view->texture = NULL;
796      pipe_resource_reference(&view->texture, texture);
797      view->context = pipe;
798   }
799
800   return view;
801}
802
803static void
804i915_sampler_view_destroy(struct pipe_context *pipe,
805                          struct pipe_sampler_view *view)
806{
807   pipe_resource_reference(&view->texture, NULL);
808   FREE(view);
809}
810
811static void
812i915_set_framebuffer_state(struct pipe_context *pipe,
813                           const struct pipe_framebuffer_state *fb)
814{
815   struct i915_context *i915 = i915_context(pipe);
816
817   i915->framebuffer.width = fb->width;
818   i915->framebuffer.height = fb->height;
819   i915->framebuffer.nr_cbufs = fb->nr_cbufs;
820   if (fb->nr_cbufs) {
821      pipe_surface_reference(&i915->framebuffer.cbufs[0], fb->cbufs[0]);
822
823      struct i915_surface *surf = i915_surface(i915->framebuffer.cbufs[0]);
824      if (i915->current.fixup_swizzle != surf->oc_swizzle) {
825         i915->current.fixup_swizzle = surf->oc_swizzle;
826         memcpy(i915->current.color_swizzle, surf->color_swizzle,
827                sizeof(surf->color_swizzle));
828         i915->dirty |= I915_NEW_COLOR_SWIZZLE;
829      }
830   } else {
831      pipe_surface_reference(&i915->framebuffer.cbufs[0], NULL);
832   }
833   pipe_surface_reference(&i915->framebuffer.zsbuf, fb->zsbuf);
834   if (fb->zsbuf)
835      draw_set_zs_format(i915->draw, fb->zsbuf->format);
836
837   i915->dirty |= I915_NEW_FRAMEBUFFER;
838}
839
840static void
841i915_set_clip_state(struct pipe_context *pipe,
842                    const struct pipe_clip_state *clip)
843{
844   struct i915_context *i915 = i915_context(pipe);
845
846   i915->clip = *clip;
847
848   draw_set_clip_state(i915->draw, clip);
849
850   i915->dirty |= I915_NEW_CLIP;
851}
852
853/* Called when gallium frontends notice changes to the viewport
854 * matrix:
855 */
856static void
857i915_set_viewport_states(struct pipe_context *pipe, unsigned start_slot,
858                         unsigned num_viewports,
859                         const struct pipe_viewport_state *viewport)
860{
861   struct i915_context *i915 = i915_context(pipe);
862
863   i915->viewport = *viewport; /* struct copy */
864
865   /* pass the viewport info to the draw module */
866   draw_set_viewport_states(i915->draw, start_slot, num_viewports,
867                            &i915->viewport);
868
869   i915->dirty |= I915_NEW_VIEWPORT;
870}
871
872static void *
873i915_create_rasterizer_state(struct pipe_context *pipe,
874                             const struct pipe_rasterizer_state *rasterizer)
875{
876   struct i915_rasterizer_state *cso = CALLOC_STRUCT(i915_rasterizer_state);
877
878   cso->templ = *rasterizer;
879   cso->light_twoside = rasterizer->light_twoside;
880   cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE;
881   cso->ds[1].f = rasterizer->offset_scale;
882   if (rasterizer->poly_stipple_enable) {
883      cso->st |= ST1_ENABLE;
884   }
885
886   if (rasterizer->scissor)
887      cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT;
888   else
889      cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT;
890
891   switch (rasterizer->cull_face) {
892   case PIPE_FACE_NONE:
893      cso->LIS4 |= S4_CULLMODE_NONE;
894      break;
895   case PIPE_FACE_FRONT:
896      if (rasterizer->front_ccw)
897         cso->LIS4 |= S4_CULLMODE_CCW;
898      else
899         cso->LIS4 |= S4_CULLMODE_CW;
900      break;
901   case PIPE_FACE_BACK:
902      if (rasterizer->front_ccw)
903         cso->LIS4 |= S4_CULLMODE_CW;
904      else
905         cso->LIS4 |= S4_CULLMODE_CCW;
906      break;
907   case PIPE_FACE_FRONT_AND_BACK:
908      cso->LIS4 |= S4_CULLMODE_BOTH;
909      break;
910   }
911
912   {
913      int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf);
914
915      cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
916
917      if (rasterizer->line_smooth)
918         cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
919   }
920
921   {
922      int point_size = CLAMP((int)rasterizer->point_size, 1, 0xff);
923
924      cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
925   }
926
927   if (rasterizer->flatshade) {
928      cso->LIS4 |=
929         (S4_FLATSHADE_ALPHA | S4_FLATSHADE_COLOR | S4_FLATSHADE_SPECULAR);
930   }
931
932   if (!rasterizer->flatshade_first)
933      cso->LIS6 |= (2 << S6_TRISTRIP_PV_SHIFT);
934
935   cso->LIS7 = fui(rasterizer->offset_units);
936
937   return cso;
938}
939
940static void
941i915_bind_rasterizer_state(struct pipe_context *pipe, void *raster)
942{
943   struct i915_context *i915 = i915_context(pipe);
944
945   if (i915->rasterizer == raster)
946      return;
947
948   i915->rasterizer = (struct i915_rasterizer_state *)raster;
949
950   /* pass-through to draw module */
951   draw_set_rasterizer_state(
952      i915->draw, (i915->rasterizer ? &(i915->rasterizer->templ) : NULL),
953      raster);
954
955   i915->dirty |= I915_NEW_RASTERIZER;
956}
957
958static void
959i915_delete_rasterizer_state(struct pipe_context *pipe, void *raster)
960{
961   FREE(raster);
962}
963
964static void
965i915_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot,
966                        unsigned count, unsigned unbind_num_trailing_slots,
967                        bool take_ownership,
968                        const struct pipe_vertex_buffer *buffers)
969{
970   struct i915_context *i915 = i915_context(pipe);
971   struct draw_context *draw = i915->draw;
972
973   util_set_vertex_buffers_count(i915->vertex_buffers, &i915->nr_vertex_buffers,
974                                 buffers, start_slot, count,
975                                 unbind_num_trailing_slots, take_ownership);
976
977   /* pass-through to draw module */
978   draw_set_vertex_buffers(draw, start_slot, count, unbind_num_trailing_slots,
979                           buffers);
980}
981
982static void *
983i915_create_vertex_elements_state(struct pipe_context *pipe, unsigned count,
984                                  const struct pipe_vertex_element *attribs)
985{
986   struct i915_velems_state *velems;
987   assert(count <= PIPE_MAX_ATTRIBS);
988   velems =
989      (struct i915_velems_state *)MALLOC(sizeof(struct i915_velems_state));
990   if (velems) {
991      velems->count = count;
992      memcpy(velems->velem, attribs, sizeof(*attribs) * count);
993   }
994   return velems;
995}
996
997static void
998i915_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
999{
1000   struct i915_context *i915 = i915_context(pipe);
1001   struct i915_velems_state *i915_velems = (struct i915_velems_state *)velems;
1002
1003   if (i915->velems == velems)
1004      return;
1005
1006   i915->velems = velems;
1007
1008   /* pass-through to draw module */
1009   if (i915_velems) {
1010      draw_set_vertex_elements(i915->draw, i915_velems->count,
1011                               i915_velems->velem);
1012   }
1013}
1014
1015static void
1016i915_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
1017{
1018   FREE(velems);
1019}
1020
1021static void
1022i915_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
1023{
1024}
1025
1026void
1027i915_init_state_functions(struct i915_context *i915)
1028{
1029   i915->base.create_blend_state = i915_create_blend_state;
1030   i915->base.bind_blend_state = i915_bind_blend_state;
1031   i915->base.delete_blend_state = i915_delete_blend_state;
1032
1033   i915->base.create_sampler_state = i915_create_sampler_state;
1034   i915->base.bind_sampler_states = i915_bind_sampler_states;
1035   i915->base.delete_sampler_state = i915_delete_sampler_state;
1036
1037   i915->base.create_depth_stencil_alpha_state =
1038      i915_create_depth_stencil_state;
1039   i915->base.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
1040   i915->base.delete_depth_stencil_alpha_state =
1041      i915_delete_depth_stencil_state;
1042
1043   i915->base.create_rasterizer_state = i915_create_rasterizer_state;
1044   i915->base.bind_rasterizer_state = i915_bind_rasterizer_state;
1045   i915->base.delete_rasterizer_state = i915_delete_rasterizer_state;
1046   i915->base.create_fs_state = i915_create_fs_state;
1047   i915->base.bind_fs_state = i915_bind_fs_state;
1048   i915->base.delete_fs_state = i915_delete_fs_state;
1049   i915->base.create_vs_state = i915_create_vs_state;
1050   i915->base.bind_vs_state = i915_bind_vs_state;
1051   i915->base.delete_vs_state = i915_delete_vs_state;
1052   i915->base.create_vertex_elements_state = i915_create_vertex_elements_state;
1053   i915->base.bind_vertex_elements_state = i915_bind_vertex_elements_state;
1054   i915->base.delete_vertex_elements_state = i915_delete_vertex_elements_state;
1055
1056   i915->base.set_blend_color = i915_set_blend_color;
1057   i915->base.set_stencil_ref = i915_set_stencil_ref;
1058   i915->base.set_clip_state = i915_set_clip_state;
1059   i915->base.set_sample_mask = i915_set_sample_mask;
1060   i915->base.set_constant_buffer = i915_set_constant_buffer;
1061   i915->base.set_framebuffer_state = i915_set_framebuffer_state;
1062
1063   i915->base.set_polygon_stipple = i915_set_polygon_stipple;
1064   i915->base.set_scissor_states = i915_set_scissor_states;
1065   i915->base.set_sampler_views = i915_set_sampler_views;
1066   i915->base.create_sampler_view = i915_create_sampler_view;
1067   i915->base.sampler_view_destroy = i915_sampler_view_destroy;
1068   i915->base.set_viewport_states = i915_set_viewport_states;
1069   i915->base.set_vertex_buffers = i915_set_vertex_buffers;
1070}
1071