iris_screen.h revision 7ec681f3 
1/*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#ifndef IRIS_SCREEN_H
24#define IRIS_SCREEN_H
25
26#include "pipe/p_screen.h"
27#include "frontend/drm_driver.h"
28#include "util/disk_cache.h"
29#include "util/slab.h"
30#include "util/u_screen.h"
31#include "intel/dev/intel_device_info.h"
32#include "intel/isl/isl.h"
33#include "iris_bufmgr.h"
34#include "iris_binder.h"
35#include "iris_measure.h"
36#include "iris_resource.h"
37
38struct intel_l3_config;
39struct brw_vue_map;
40struct iris_vs_prog_key;
41struct iris_tcs_prog_key;
42struct iris_tes_prog_key;
43struct iris_gs_prog_key;
44struct iris_fs_prog_key;
45struct iris_cs_prog_key;
46enum iris_program_cache_id;
47
48#define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x))
49#define WRITE_ONCE(x, v) *(volatile __typeof__(x) *)&(x) = (v)
50
51#define IRIS_MAX_TEXTURE_SAMPLERS 32
52#define IRIS_MAX_SOL_BUFFERS 4
53#define IRIS_MAP_BUFFER_ALIGNMENT 64
54
55/**
56 * Virtual table for generation-specific (genxml) function calls.
57 */
58struct iris_vtable {
59   void (*destroy_state)(struct iris_context *ice);
60   void (*init_render_context)(struct iris_batch *batch);
61   void (*init_compute_context)(struct iris_batch *batch);
62   void (*upload_render_state)(struct iris_context *ice,
63                               struct iris_batch *batch,
64                               const struct pipe_draw_info *draw,
65                               unsigned drawid_offset,
66                               const struct pipe_draw_indirect_info *indirect,
67                               const struct pipe_draw_start_count_bias *sc);
68   void (*update_surface_base_address)(struct iris_batch *batch,
69                                       struct iris_binder *binder);
70   void (*upload_compute_state)(struct iris_context *ice,
71                                struct iris_batch *batch,
72                                const struct pipe_grid_info *grid);
73   void (*rebind_buffer)(struct iris_context *ice,
74                         struct iris_resource *res);
75   void (*load_register_reg32)(struct iris_batch *batch, uint32_t dst,
76                               uint32_t src);
77   void (*load_register_reg64)(struct iris_batch *batch, uint32_t dst,
78                               uint32_t src);
79   void (*load_register_imm32)(struct iris_batch *batch, uint32_t reg,
80                               uint32_t val);
81   void (*load_register_imm64)(struct iris_batch *batch, uint32_t reg,
82                               uint64_t val);
83   void (*load_register_mem32)(struct iris_batch *batch, uint32_t reg,
84                               struct iris_bo *bo, uint32_t offset);
85   void (*load_register_mem64)(struct iris_batch *batch, uint32_t reg,
86                               struct iris_bo *bo, uint32_t offset);
87   void (*store_register_mem32)(struct iris_batch *batch, uint32_t reg,
88                                struct iris_bo *bo, uint32_t offset,
89                                bool predicated);
90   void (*store_register_mem64)(struct iris_batch *batch, uint32_t reg,
91                                struct iris_bo *bo, uint32_t offset,
92                                bool predicated);
93   void (*store_data_imm32)(struct iris_batch *batch,
94                            struct iris_bo *bo, uint32_t offset,
95                            uint32_t value);
96   void (*store_data_imm64)(struct iris_batch *batch,
97                            struct iris_bo *bo, uint32_t offset,
98                            uint64_t value);
99   void (*copy_mem_mem)(struct iris_batch *batch,
100                        struct iris_bo *dst_bo, uint32_t dst_offset,
101                        struct iris_bo *src_bo, uint32_t src_offset,
102                        unsigned bytes);
103   void (*emit_raw_pipe_control)(struct iris_batch *batch,
104                                 const char *reason, uint32_t flags,
105                                 struct iris_bo *bo, uint32_t offset,
106                                 uint64_t imm);
107
108   void (*emit_mi_report_perf_count)(struct iris_batch *batch,
109                                     struct iris_bo *bo,
110                                     uint32_t offset_in_bytes,
111                                     uint32_t report_id);
112
113   unsigned (*derived_program_state_size)(enum iris_program_cache_id id);
114   void (*store_derived_program_state)(const struct intel_device_info *devinfo,
115                                       enum iris_program_cache_id cache_id,
116                                       struct iris_compiled_shader *shader);
117   uint32_t *(*create_so_decl_list)(const struct pipe_stream_output_info *sol,
118                                    const struct brw_vue_map *vue_map);
119   void (*populate_vs_key)(const struct iris_context *ice,
120                           const struct shader_info *info,
121                           gl_shader_stage last_stage,
122                           struct iris_vs_prog_key *key);
123   void (*populate_tcs_key)(const struct iris_context *ice,
124                            struct iris_tcs_prog_key *key);
125   void (*populate_tes_key)(const struct iris_context *ice,
126                            const struct shader_info *info,
127                            gl_shader_stage last_stage,
128                            struct iris_tes_prog_key *key);
129   void (*populate_gs_key)(const struct iris_context *ice,
130                           const struct shader_info *info,
131                           gl_shader_stage last_stage,
132                           struct iris_gs_prog_key *key);
133   void (*populate_fs_key)(const struct iris_context *ice,
134                           const struct shader_info *info,
135                           struct iris_fs_prog_key *key);
136   void (*populate_cs_key)(const struct iris_context *ice,
137                           struct iris_cs_prog_key *key);
138   void (*lost_genx_state)(struct iris_context *ice, struct iris_batch *batch);
139};
140
141struct iris_address {
142   struct iris_bo *bo;
143   uint64_t offset;
144   enum iris_domain access;
145};
146
147struct iris_screen {
148   struct pipe_screen base;
149
150   uint32_t refcount;
151
152   /** Global slab allocator for iris_transfer_map objects */
153   struct slab_parent_pool transfer_pool;
154
155   /** drm device file descriptor, shared with bufmgr, do not close. */
156   int fd;
157
158   /**
159    * drm device file descriptor to used for window system integration, owned
160    * by iris_screen, can be a different DRM instance than fd.
161    */
162   int winsys_fd;
163
164   /** PCI ID for our GPU device */
165   int pci_id;
166
167   struct iris_vtable vtbl;
168
169   /** Global program_string_id counter (see get_program_string_id()) */
170   unsigned program_id;
171
172   /** Precompile shaders at link time?  (Can be disabled for debugging.) */
173   bool precompile;
174
175   /** driconf options and application workarounds */
176   struct {
177      /** Dual color blend by location instead of index (for broken apps) */
178      bool dual_color_blend_by_location;
179      bool disable_throttling;
180      bool always_flush_cache;
181      bool sync_compile;
182   } driconf;
183
184   /** Does the kernel support various features (KERNEL_HAS_* bitfield)? */
185   unsigned kernel_features;
186#define KERNEL_HAS_WAIT_FOR_SUBMIT (1<<0)
187
188   uint64_t aperture_bytes;
189
190   /**
191    * Last sequence number allocated by the cache tracking mechanism.
192    *
193    * These are used for synchronization and are expected to identify a single
194    * section of a batch, so they should be monotonically increasing and
195    * unique across a single pipe_screen.
196    */
197   uint64_t last_seqno;
198
199   struct intel_device_info devinfo;
200   struct isl_device isl_dev;
201   struct iris_bufmgr *bufmgr;
202   struct brw_compiler *compiler;
203   struct intel_perf_config *perf_cfg;
204
205   const struct intel_l3_config *l3_config_3d;
206   const struct intel_l3_config *l3_config_cs;
207
208   /**
209    * A buffer containing a marker + description of the driver. This buffer is
210    * added to all execbufs syscalls so that we can identify the driver that
211    * generated a hang by looking at the content of the buffer in the error
212    * state. It is also used for hardware workarounds that require scratch
213    * writes or reads from some unimportant memory. To avoid overriding the
214    * debug data, use the workaround_address field for workarounds.
215    */
216   struct iris_bo *workaround_bo;
217   struct iris_address workaround_address;
218
219   struct util_queue shader_compiler_queue;
220
221   struct disk_cache *disk_cache;
222
223   struct intel_measure_device measure;
224
225   /** Every screen on a bufmgr has an unique ID assigned by the bufmgr. */
226   int id;
227};
228
229struct pipe_screen *
230iris_screen_create(int fd, const struct pipe_screen_config *config);
231
232void iris_screen_destroy(struct iris_screen *screen);
233
234UNUSED static inline struct pipe_screen *
235iris_pscreen_ref(struct pipe_screen *pscreen)
236{
237   struct iris_screen *screen = (struct iris_screen *) pscreen;
238
239   p_atomic_inc(&screen->refcount);
240   return pscreen;
241}
242
243UNUSED static inline void
244iris_pscreen_unref(struct pipe_screen *pscreen)
245{
246   struct iris_screen *screen = (struct iris_screen *) pscreen;
247
248   if (p_atomic_dec_zero(&screen->refcount))
249      iris_screen_destroy(screen);
250}
251
252bool
253iris_is_format_supported(struct pipe_screen *pscreen,
254                         enum pipe_format format,
255                         enum pipe_texture_target target,
256                         unsigned sample_count,
257                         unsigned storage_sample_count,
258                         unsigned usage);
259
260void iris_disk_cache_init(struct iris_screen *screen);
261
262#endif
263