14a49301eSmrg#ifndef __NOUVEAU_SCREEN_H__
24a49301eSmrg#define __NOUVEAU_SCREEN_H__
34a49301eSmrg
43464ebd5Sriastradh#include "pipe/p_screen.h"
501e04c3fSmrg#include "util/disk_cache.h"
69f464c52Smaya#include "util/u_atomic.h"
73464ebd5Sriastradh#include "util/u_memory.h"
8af69d88dSmrg
97ec681f3Smrg#ifndef NDEBUG
10af69d88dSmrg# define NOUVEAU_ENABLE_DRIVER_STATISTICS
11af69d88dSmrg#endif
12af69d88dSmrg
133464ebd5Sriastradhtypedef uint32_t u32;
14af69d88dSmrgtypedef uint16_t u16;
15af69d88dSmrg
16af69d88dSmrgextern int nouveau_mesa_debug;
173464ebd5Sriastradh
183464ebd5Sriastradhstruct nouveau_bo;
193464ebd5Sriastradh
209f464c52Smaya#define NOUVEAU_SHADER_CACHE_FLAGS_IR_TGSI 0 << 0
219f464c52Smaya#define NOUVEAU_SHADER_CACHE_FLAGS_IR_NIR  1 << 0
229f464c52Smaya
234a49301eSmrgstruct nouveau_screen {
2401e04c3fSmrg   struct pipe_screen base;
2501e04c3fSmrg   struct nouveau_drm *drm;
2601e04c3fSmrg   struct nouveau_device *device;
2701e04c3fSmrg   struct nouveau_object *channel;
2801e04c3fSmrg   struct nouveau_client *client;
2901e04c3fSmrg   struct nouveau_pushbuf *pushbuf;
3001e04c3fSmrg
317ec681f3Smrg   char chipset_name[8];
327ec681f3Smrg
3301e04c3fSmrg   int refcount;
3401e04c3fSmrg
3501e04c3fSmrg   unsigned transfer_pushbuf_threshold;
3601e04c3fSmrg
3701e04c3fSmrg   unsigned vidmem_bindings; /* PIPE_BIND_* where VRAM placement is desired */
3801e04c3fSmrg   unsigned sysmem_bindings; /* PIPE_BIND_* where GART placement is desired */
3901e04c3fSmrg   unsigned lowmem_bindings; /* PIPE_BIND_* that require an address < 4 GiB */
4001e04c3fSmrg   /*
4101e04c3fSmrg    * For bindings with (vidmem & sysmem) bits set, PIPE_USAGE_* decides
4201e04c3fSmrg    * placement.
4301e04c3fSmrg    */
4401e04c3fSmrg
4501e04c3fSmrg   uint16_t class_3d;
4601e04c3fSmrg
4701e04c3fSmrg   struct {
4801e04c3fSmrg      struct nouveau_fence *head;
4901e04c3fSmrg      struct nouveau_fence *tail;
5001e04c3fSmrg      struct nouveau_fence *current;
5101e04c3fSmrg      u32 sequence;
5201e04c3fSmrg      u32 sequence_ack;
5301e04c3fSmrg      void (*emit)(struct pipe_screen *, u32 *sequence);
5401e04c3fSmrg      u32  (*update)(struct pipe_screen *);
5501e04c3fSmrg   } fence;
5601e04c3fSmrg
5701e04c3fSmrg   struct nouveau_mman *mm_VRAM;
5801e04c3fSmrg   struct nouveau_mman *mm_GART;
5901e04c3fSmrg
6001e04c3fSmrg   int64_t cpu_gpu_time_delta;
6101e04c3fSmrg
6201e04c3fSmrg   bool hint_buf_keep_sysmem_copy;
637ec681f3Smrg   bool tegra_sector_layout;
6401e04c3fSmrg
6501e04c3fSmrg   unsigned vram_domain;
6601e04c3fSmrg
6701e04c3fSmrg   struct {
6801e04c3fSmrg      unsigned profiles_checked;
6901e04c3fSmrg      unsigned profiles_present;
7001e04c3fSmrg   } firmware_info;
7101e04c3fSmrg
7201e04c3fSmrg   struct disk_cache *disk_shader_cache;
73af69d88dSmrg
749f464c52Smaya   bool prefer_nir;
757ec681f3Smrg   bool force_enable_cl;
767ec681f3Smrg   bool has_svm;
777ec681f3Smrg   void *svm_cutout;
787ec681f3Smrg   size_t svm_cutout_size;
799f464c52Smaya
80af69d88dSmrg#ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
81af69d88dSmrg   union {
82af69d88dSmrg      uint64_t v[29];
83af69d88dSmrg      struct {
84af69d88dSmrg         uint64_t tex_obj_current_count;
85af69d88dSmrg         uint64_t tex_obj_current_bytes;
86af69d88dSmrg         uint64_t buf_obj_current_count;
87af69d88dSmrg         uint64_t buf_obj_current_bytes_vid;
88af69d88dSmrg         uint64_t buf_obj_current_bytes_sys;
89af69d88dSmrg         uint64_t tex_transfers_rd;
90af69d88dSmrg         uint64_t tex_transfers_wr;
91af69d88dSmrg         uint64_t tex_copy_count;
92af69d88dSmrg         uint64_t tex_blit_count;
93af69d88dSmrg         uint64_t tex_cache_flush_count;
94af69d88dSmrg         uint64_t buf_transfers_rd;
95af69d88dSmrg         uint64_t buf_transfers_wr;
96af69d88dSmrg         uint64_t buf_read_bytes_staging_vid;
97af69d88dSmrg         uint64_t buf_write_bytes_direct;
98af69d88dSmrg         uint64_t buf_write_bytes_staging_vid;
99af69d88dSmrg         uint64_t buf_write_bytes_staging_sys;
100af69d88dSmrg         uint64_t buf_copy_bytes;
101af69d88dSmrg         uint64_t buf_non_kernel_fence_sync_count;
102af69d88dSmrg         uint64_t any_non_kernel_fence_sync_count;
103af69d88dSmrg         uint64_t query_sync_count;
104af69d88dSmrg         uint64_t gpu_serialize_count;
105af69d88dSmrg         uint64_t draw_calls_array;
106af69d88dSmrg         uint64_t draw_calls_indexed;
107af69d88dSmrg         uint64_t draw_calls_fallback_count;
108af69d88dSmrg         uint64_t user_buffer_upload_bytes;
109af69d88dSmrg         uint64_t constbuf_upload_count;
110af69d88dSmrg         uint64_t constbuf_upload_bytes;
111af69d88dSmrg         uint64_t pushbuf_count;
112af69d88dSmrg         uint64_t resource_validate_count;
113af69d88dSmrg      } named;
114af69d88dSmrg   } stats;
115af69d88dSmrg#endif
1164a49301eSmrg};
1174a49301eSmrg
11801e04c3fSmrg#define NV_VRAM_DOMAIN(screen) ((screen)->vram_domain)
11901e04c3fSmrg
120af69d88dSmrg#ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
121af69d88dSmrg# define NOUVEAU_DRV_STAT(s, n, v) do {         \
1229f464c52Smaya      p_atomic_add(&(s)->stats.named.n, (v));   \
123af69d88dSmrg   } while(0)
1249f464c52Smaya# define NOUVEAU_DRV_STAT_RES(r, n, v) do {                                \
1259f464c52Smaya      p_atomic_add(&nouveau_screen((r)->base.screen)->stats.named.n, v);   \
126af69d88dSmrg   } while(0)
127af69d88dSmrg# define NOUVEAU_DRV_STAT_IFD(x) x
128af69d88dSmrg#else
129af69d88dSmrg# define NOUVEAU_DRV_STAT(s, n, v)     do { } while(0)
130af69d88dSmrg# define NOUVEAU_DRV_STAT_RES(r, n, v) do { } while(0)
131af69d88dSmrg# define NOUVEAU_DRV_STAT_IFD(x)
132af69d88dSmrg#endif
133af69d88dSmrg
13401e04c3fSmrgstatic inline struct nouveau_screen *
1354a49301eSmrgnouveau_screen(struct pipe_screen *pscreen)
1364a49301eSmrg{
13701e04c3fSmrg   return (struct nouveau_screen *)pscreen;
1384a49301eSmrg}
1394a49301eSmrg
14001e04c3fSmrgbool nouveau_drm_screen_unref(struct nouveau_screen *screen);
1413464ebd5Sriastradh
14201e04c3fSmrgbool
1433464ebd5Sriastradhnouveau_screen_bo_get_handle(struct pipe_screen *pscreen,
14401e04c3fSmrg                             struct nouveau_bo *bo,
14501e04c3fSmrg                             unsigned stride,
14601e04c3fSmrg                             struct winsys_handle *whandle);
1473464ebd5Sriastradhstruct nouveau_bo *
1483464ebd5Sriastradhnouveau_screen_bo_from_handle(struct pipe_screen *pscreen,
14901e04c3fSmrg                              struct winsys_handle *whandle,
15001e04c3fSmrg                              unsigned *out_stride);
1513464ebd5Sriastradh
1524a49301eSmrg
1534a49301eSmrgint nouveau_screen_init(struct nouveau_screen *, struct nouveau_device *);
1544a49301eSmrgvoid nouveau_screen_fini(struct nouveau_screen *);
1554a49301eSmrg
156af69d88dSmrgvoid nouveau_screen_init_vdec(struct nouveau_screen *);
1573464ebd5Sriastradh
1584a49301eSmrg#endif
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