14a49301eSmrg/*
24a49301eSmrg * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
33464ebd5Sriastradh * Copyright 2010 Marek Olšák <maraeo@gmail.com>
44a49301eSmrg *
54a49301eSmrg * Permission is hereby granted, free of charge, to any person obtaining a
64a49301eSmrg * copy of this software and associated documentation files (the "Software"),
74a49301eSmrg * to deal in the Software without restriction, including without limitation
84a49301eSmrg * on the rights to use, copy, modify, merge, publish, distribute, sub
94a49301eSmrg * license, and/or sell copies of the Software, and to permit persons to whom
104a49301eSmrg * the Software is furnished to do so, subject to the following conditions:
114a49301eSmrg *
124a49301eSmrg * The above copyright notice and this permission notice (including the next
134a49301eSmrg * paragraph) shall be included in all copies or substantial portions of the
144a49301eSmrg * Software.
154a49301eSmrg *
164a49301eSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
174a49301eSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
184a49301eSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
194a49301eSmrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
204a49301eSmrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
214a49301eSmrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
224a49301eSmrg * USE OR OTHER DEALINGS IN THE SOFTWARE. */
234a49301eSmrg
247ec681f3Smrg#include "util/format/u_format.h"
257ec681f3Smrg#include "util/format/u_format_s3tc.h"
2601e04c3fSmrg#include "util/u_screen.h"
274a49301eSmrg#include "util/u_memory.h"
2801e04c3fSmrg#include "util/os_time.h"
29af69d88dSmrg#include "vl/vl_decoder.h"
30af69d88dSmrg#include "vl/vl_video_buffer.h"
314a49301eSmrg
324a49301eSmrg#include "r300_context.h"
334a49301eSmrg#include "r300_texture.h"
343464ebd5Sriastradh#include "r300_screen_buffer.h"
353464ebd5Sriastradh#include "r300_state_inlines.h"
363464ebd5Sriastradh#include "r300_public.h"
37cdc920a0Smrg
383464ebd5Sriastradh#include "draw/draw_context.h"
394a49301eSmrg
404a49301eSmrg/* Return the identifier behind whom the brave coders responsible for this
414a49301eSmrg * amalgamation of code, sweat, and duct tape, routinely obscure their names.
424a49301eSmrg *
434a49301eSmrg * ...I should have just put "Corbin Simpson", but I'm not that cool.
444a49301eSmrg *
454a49301eSmrg * (Or egotistical. Yet.) */
464a49301eSmrgstatic const char* r300_get_vendor(struct pipe_screen* pscreen)
474a49301eSmrg{
484a49301eSmrg    return "X.Org R300 Project";
494a49301eSmrg}
504a49301eSmrg
5101e04c3fSmrgstatic const char* r300_get_device_vendor(struct pipe_screen* pscreen)
5201e04c3fSmrg{
5301e04c3fSmrg    return "ATI";
5401e04c3fSmrg}
5501e04c3fSmrg
564a49301eSmrgstatic const char* chip_families[] = {
57af69d88dSmrg    "unknown",
583464ebd5Sriastradh    "ATI R300",
593464ebd5Sriastradh    "ATI R350",
603464ebd5Sriastradh    "ATI RV350",
613464ebd5Sriastradh    "ATI RV370",
623464ebd5Sriastradh    "ATI RV380",
633464ebd5Sriastradh    "ATI RS400",
643464ebd5Sriastradh    "ATI RC410",
653464ebd5Sriastradh    "ATI RS480",
663464ebd5Sriastradh    "ATI R420",
673464ebd5Sriastradh    "ATI R423",
683464ebd5Sriastradh    "ATI R430",
693464ebd5Sriastradh    "ATI R480",
703464ebd5Sriastradh    "ATI R481",
713464ebd5Sriastradh    "ATI RV410",
723464ebd5Sriastradh    "ATI RS600",
733464ebd5Sriastradh    "ATI RS690",
743464ebd5Sriastradh    "ATI RS740",
753464ebd5Sriastradh    "ATI RV515",
763464ebd5Sriastradh    "ATI R520",
773464ebd5Sriastradh    "ATI RV530",
783464ebd5Sriastradh    "ATI R580",
793464ebd5Sriastradh    "ATI RV560",
803464ebd5Sriastradh    "ATI RV570"
814a49301eSmrg};
824a49301eSmrg
837ec681f3Smrgstatic const char* r300_get_family_name(struct r300_screen* r300screen)
847ec681f3Smrg{
857ec681f3Smrg    return chip_families[r300screen->caps.family];
867ec681f3Smrg}
877ec681f3Smrg
884a49301eSmrgstatic const char* r300_get_name(struct pipe_screen* pscreen)
894a49301eSmrg{
904a49301eSmrg    struct r300_screen* r300screen = r300_screen(pscreen);
914a49301eSmrg
927ec681f3Smrg    return r300_get_family_name(r300screen);
937ec681f3Smrg}
947ec681f3Smrg
957ec681f3Smrgstatic void r300_disk_cache_create(struct r300_screen* r300screen)
967ec681f3Smrg{
977ec681f3Smrg    struct mesa_sha1 ctx;
987ec681f3Smrg    unsigned char sha1[20];
997ec681f3Smrg    char cache_id[20 * 2 + 1];
1007ec681f3Smrg
1017ec681f3Smrg    _mesa_sha1_init(&ctx);
1027ec681f3Smrg    if (!disk_cache_get_function_identifier(r300_disk_cache_create,
1037ec681f3Smrg                                            &ctx))
1047ec681f3Smrg        return;
1057ec681f3Smrg
1067ec681f3Smrg    _mesa_sha1_final(&ctx, sha1);
1077ec681f3Smrg    disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
1087ec681f3Smrg
1097ec681f3Smrg    r300screen->disk_shader_cache =
1107ec681f3Smrg                    disk_cache_create(r300_get_family_name(r300screen),
1117ec681f3Smrg                                      cache_id,
1127ec681f3Smrg                                      r300screen->debug);
1137ec681f3Smrg}
1147ec681f3Smrg
1157ec681f3Smrgstatic struct disk_cache* r300_get_disk_shader_cache(struct pipe_screen* pscreen)
1167ec681f3Smrg{
1177ec681f3Smrg	struct r300_screen* r300screen = r300_screen(pscreen);
1187ec681f3Smrg	return r300screen->disk_shader_cache;
1194a49301eSmrg}
1204a49301eSmrg
1213464ebd5Sriastradhstatic int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
1224a49301eSmrg{
1234a49301eSmrg    struct r300_screen* r300screen = r300_screen(pscreen);
1243464ebd5Sriastradh    boolean is_r500 = r300screen->caps.is_r500;
1254a49301eSmrg
1264a49301eSmrg    switch (param) {
1273464ebd5Sriastradh        /* Supported features (boolean caps). */
1284a49301eSmrg        case PIPE_CAP_NPOT_TEXTURES:
129af69d88dSmrg        case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
13001e04c3fSmrg        case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
1314a49301eSmrg        case PIPE_CAP_ANISOTROPIC_FILTER:
1324a49301eSmrg        case PIPE_CAP_POINT_SPRITE:
1334a49301eSmrg        case PIPE_CAP_OCCLUSION_QUERY:
1344a49301eSmrg        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
13501e04c3fSmrg        case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
1364a49301eSmrg        case PIPE_CAP_BLEND_EQUATION_SEPARATE:
1373464ebd5Sriastradh        case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
1383464ebd5Sriastradh        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
1393464ebd5Sriastradh        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
140af69d88dSmrg        case PIPE_CAP_CONDITIONAL_RENDER:
141af69d88dSmrg        case PIPE_CAP_TEXTURE_BARRIER:
142af69d88dSmrg        case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
143af69d88dSmrg        case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
144af69d88dSmrg        case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
14501e04c3fSmrg        case PIPE_CAP_CLIP_HALFZ:
14601e04c3fSmrg        case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
1474a49301eSmrg            return 1;
1483464ebd5Sriastradh
149af69d88dSmrg        case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
150af69d88dSmrg            return R300_BUFFER_ALIGNMENT;
151af69d88dSmrg
152af69d88dSmrg        case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
153af69d88dSmrg            return 16;
154af69d88dSmrg
155af69d88dSmrg        case PIPE_CAP_GLSL_FEATURE_LEVEL:
15601e04c3fSmrg        case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
157af69d88dSmrg            return 120;
158af69d88dSmrg
1593464ebd5Sriastradh        /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
1603464ebd5Sriastradh        case PIPE_CAP_TEXTURE_SWIZZLE:
16101e04c3fSmrg            return r300screen->caps.dxtc_swizzle;
1623464ebd5Sriastradh
163af69d88dSmrg        /* We don't support color clamping on r500, so that we can use color
1647ec681f3Smrg         * interpolators for generic varyings. */
165af69d88dSmrg        case PIPE_CAP_VERTEX_COLOR_CLAMPED:
166af69d88dSmrg            return !is_r500;
167af69d88dSmrg
1683464ebd5Sriastradh        /* Supported on r500 only. */
169af69d88dSmrg        case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
1703464ebd5Sriastradh        case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
1717ec681f3Smrg        case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
1727ec681f3Smrg        case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
1737ec681f3Smrg        case PIPE_CAP_VERTEX_SHADER_SATURATE:
1743464ebd5Sriastradh            return is_r500 ? 1 : 0;
1753464ebd5Sriastradh
17601e04c3fSmrg        case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
1777ec681f3Smrg            return 0;
1787ec681f3Smrg        case PIPE_CAP_SHAREABLE_SHADERS:
179cdc920a0Smrg            return 0;
1803464ebd5Sriastradh
18101e04c3fSmrg        case PIPE_CAP_MAX_GS_INVOCATIONS:
18201e04c3fSmrg            return 32;
18301e04c3fSmrg       case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
18401e04c3fSmrg            return 1 << 27;
18501e04c3fSmrg
1863464ebd5Sriastradh        /* SWTCL-only features. */
1873464ebd5Sriastradh        case PIPE_CAP_PRIMITIVE_RESTART:
1887ec681f3Smrg        case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
189af69d88dSmrg        case PIPE_CAP_USER_VERTEX_BUFFERS:
19001e04c3fSmrg        case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
1913464ebd5Sriastradh            return !r300screen->caps.has_tcl;
1923464ebd5Sriastradh
193af69d88dSmrg        /* HWTCL-only features / limitations. */
194af69d88dSmrg        case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
195af69d88dSmrg        case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
196af69d88dSmrg        case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
197af69d88dSmrg            return r300screen->caps.has_tcl;
198af69d88dSmrg
1993464ebd5Sriastradh        /* Texturing. */
2007ec681f3Smrg        case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
2017ec681f3Smrg            return is_r500 ? 4096 : 2048;
2023464ebd5Sriastradh        case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
2033464ebd5Sriastradh        case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
2043464ebd5Sriastradh            /* 13 == 4096, 12 == 2048 */
2053464ebd5Sriastradh            return is_r500 ? 13 : 12;
2063464ebd5Sriastradh
2073464ebd5Sriastradh        /* Render targets. */
2083464ebd5Sriastradh        case PIPE_CAP_MAX_RENDER_TARGETS:
2093464ebd5Sriastradh            return 4;
21001e04c3fSmrg        case PIPE_CAP_ENDIANNESS:
211af69d88dSmrg            return PIPE_ENDIAN_LITTLE;
2123464ebd5Sriastradh
213af69d88dSmrg        case PIPE_CAP_MAX_VIEWPORTS:
214af69d88dSmrg            return 1;
215af69d88dSmrg
21601e04c3fSmrg        case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
21701e04c3fSmrg            return 2048;
21801e04c3fSmrg
2199f464c52Smaya        case PIPE_CAP_MAX_VARYINGS:
2209f464c52Smaya            return 10;
2219f464c52Smaya
222af69d88dSmrg        case PIPE_CAP_VENDOR_ID:
223af69d88dSmrg                return 0x1002;
224af69d88dSmrg        case PIPE_CAP_DEVICE_ID:
225af69d88dSmrg                return r300screen->info.pci_id;
226af69d88dSmrg        case PIPE_CAP_ACCELERATED:
227af69d88dSmrg                return 1;
228af69d88dSmrg        case PIPE_CAP_VIDEO_MEMORY:
229af69d88dSmrg                return r300screen->info.vram_size >> 20;
230af69d88dSmrg        case PIPE_CAP_UMA:
231af69d88dSmrg                return 0;
23201e04c3fSmrg        case PIPE_CAP_PCI_GROUP:
23301e04c3fSmrg            return r300screen->info.pci_domain;
23401e04c3fSmrg        case PIPE_CAP_PCI_BUS:
23501e04c3fSmrg            return r300screen->info.pci_bus;
23601e04c3fSmrg        case PIPE_CAP_PCI_DEVICE:
23701e04c3fSmrg            return r300screen->info.pci_dev;
23801e04c3fSmrg        case PIPE_CAP_PCI_FUNCTION:
23901e04c3fSmrg            return r300screen->info.pci_func;
24001e04c3fSmrg        default:
24101e04c3fSmrg            return u_pipe_screen_get_param_defaults(pscreen, param);
2424a49301eSmrg    }
2434a49301eSmrg}
2444a49301eSmrg
24501e04c3fSmrgstatic int r300_get_shader_param(struct pipe_screen *pscreen,
24601e04c3fSmrg                                 enum pipe_shader_type shader,
24701e04c3fSmrg                                 enum pipe_shader_cap param)
2483464ebd5Sriastradh{
2493464ebd5Sriastradh   struct r300_screen* r300screen = r300_screen(pscreen);
2503464ebd5Sriastradh   boolean is_r400 = r300screen->caps.is_r400;
2513464ebd5Sriastradh   boolean is_r500 = r300screen->caps.is_r500;
2523464ebd5Sriastradh
253af69d88dSmrg   switch (shader) {
2543464ebd5Sriastradh    case PIPE_SHADER_FRAGMENT:
2553464ebd5Sriastradh        switch (param)
2563464ebd5Sriastradh        {
2573464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
2583464ebd5Sriastradh            return is_r500 || is_r400 ? 512 : 96;
2593464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
2603464ebd5Sriastradh            return is_r500 || is_r400 ? 512 : 64;
2613464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
2623464ebd5Sriastradh            return is_r500 || is_r400 ? 512 : 32;
2633464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
2643464ebd5Sriastradh            return is_r500 ? 511 : 4;
2653464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
2663464ebd5Sriastradh            return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
2673464ebd5Sriastradh            /* Fragment shader limits. */
2683464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_INPUTS:
2693464ebd5Sriastradh            /* 2 colors + 8 texcoords are always supported
2703464ebd5Sriastradh             * (minus fog and wpos).
2713464ebd5Sriastradh             *
2723464ebd5Sriastradh             * R500 has the ability to turn 3rd and 4th color into
2733464ebd5Sriastradh             * additional texcoords but there is no two-sided color
2743464ebd5Sriastradh             * selection then. However the facing bit can be used instead. */
2753464ebd5Sriastradh            return 10;
27601e04c3fSmrg        case PIPE_SHADER_CAP_MAX_OUTPUTS:
27701e04c3fSmrg            return 4;
278af69d88dSmrg        case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
279af69d88dSmrg            return (is_r500 ? 256 : 32) * sizeof(float[4]);
2803464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
28101e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
2823464ebd5Sriastradh            return 1;
2833464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_TEMPS:
2843464ebd5Sriastradh            return is_r500 ? 128 : is_r400 ? 64 : 32;
285af69d88dSmrg        case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
286af69d88dSmrg        case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
287af69d88dSmrg           return r300screen->caps.num_tex_units;
2883464ebd5Sriastradh        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
289af69d88dSmrg        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
2903464ebd5Sriastradh        case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
2913464ebd5Sriastradh        case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
2923464ebd5Sriastradh        case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
2933464ebd5Sriastradh        case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
2943464ebd5Sriastradh        case PIPE_SHADER_CAP_SUBROUTINES:
295af69d88dSmrg        case PIPE_SHADER_CAP_INTEGERS:
29601e04c3fSmrg        case PIPE_SHADER_CAP_INT64_ATOMICS:
29701e04c3fSmrg        case PIPE_SHADER_CAP_FP16:
2987ec681f3Smrg        case PIPE_SHADER_CAP_FP16_DERIVATIVES:
2997ec681f3Smrg        case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
3007ec681f3Smrg        case PIPE_SHADER_CAP_INT16:
3017ec681f3Smrg        case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
30201e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
30301e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
30401e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
30501e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
30601e04c3fSmrg        case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
30701e04c3fSmrg        case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
30801e04c3fSmrg        case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
30901e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
31001e04c3fSmrg        case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
31101e04c3fSmrg        case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
3123464ebd5Sriastradh            return 0;
31301e04c3fSmrg        case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
31401e04c3fSmrg            return 32;
315af69d88dSmrg        case PIPE_SHADER_CAP_PREFERRED_IR:
316af69d88dSmrg            return PIPE_SHADER_IR_TGSI;
31701e04c3fSmrg        case PIPE_SHADER_CAP_SUPPORTED_IRS:
3187ec681f3Smrg            return 1 << PIPE_SHADER_IR_TGSI;
3193464ebd5Sriastradh        }
3203464ebd5Sriastradh        break;
3213464ebd5Sriastradh    case PIPE_SHADER_VERTEX:
322af69d88dSmrg        switch (param)
323af69d88dSmrg        {
324af69d88dSmrg        case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
325af69d88dSmrg        case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
326af69d88dSmrg        case PIPE_SHADER_CAP_SUBROUTINES:
327af69d88dSmrg            return 0;
328af69d88dSmrg        default:;
329af69d88dSmrg        }
330af69d88dSmrg
3313464ebd5Sriastradh        if (!r300screen->caps.has_tcl) {
3327ec681f3Smrg            switch (param) {
3337ec681f3Smrg            case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
3347ec681f3Smrg            case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
3357ec681f3Smrg                return 0;
3367ec681f3Smrg            default:
3377ec681f3Smrg                return draw_get_shader_param(shader, param);
3387ec681f3Smrg            }
3393464ebd5Sriastradh        }
3403464ebd5Sriastradh
3413464ebd5Sriastradh        switch (param)
3423464ebd5Sriastradh        {
3433464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
3443464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
3453464ebd5Sriastradh            return is_r500 ? 1024 : 256;
3463464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
3473464ebd5Sriastradh            return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
3483464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_INPUTS:
3493464ebd5Sriastradh            return 16;
35001e04c3fSmrg        case PIPE_SHADER_CAP_MAX_OUTPUTS:
35101e04c3fSmrg            return 10;
352af69d88dSmrg        case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
353af69d88dSmrg            return 256 * sizeof(float[4]);
3543464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
3553464ebd5Sriastradh            return 1;
3563464ebd5Sriastradh        case PIPE_SHADER_CAP_MAX_TEMPS:
3573464ebd5Sriastradh            return 32;
358af69d88dSmrg        case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
35901e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
360af69d88dSmrg            return 1;
361af69d88dSmrg        case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
362af69d88dSmrg        case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
3633464ebd5Sriastradh        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
364af69d88dSmrg        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
3653464ebd5Sriastradh        case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
3663464ebd5Sriastradh        case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
3673464ebd5Sriastradh        case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
3683464ebd5Sriastradh        case PIPE_SHADER_CAP_SUBROUTINES:
369af69d88dSmrg        case PIPE_SHADER_CAP_INTEGERS:
37001e04c3fSmrg        case PIPE_SHADER_CAP_FP16:
3717ec681f3Smrg        case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
3727ec681f3Smrg        case PIPE_SHADER_CAP_FP16_DERIVATIVES:
3737ec681f3Smrg        case PIPE_SHADER_CAP_INT16:
3747ec681f3Smrg        case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
37501e04c3fSmrg        case PIPE_SHADER_CAP_INT64_ATOMICS:
376af69d88dSmrg        case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
377af69d88dSmrg        case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
37801e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
37901e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
38001e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
38101e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
38201e04c3fSmrg        case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
38301e04c3fSmrg        case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
38401e04c3fSmrg        case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
38501e04c3fSmrg        case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
38601e04c3fSmrg        case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
38701e04c3fSmrg        case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
3883464ebd5Sriastradh            return 0;
38901e04c3fSmrg        case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
39001e04c3fSmrg            return 32;
391af69d88dSmrg        case PIPE_SHADER_CAP_PREFERRED_IR:
392af69d88dSmrg            return PIPE_SHADER_IR_TGSI;
39301e04c3fSmrg        case PIPE_SHADER_CAP_SUPPORTED_IRS:
3947ec681f3Smrg            return 1 << PIPE_SHADER_IR_TGSI;
3953464ebd5Sriastradh        }
3963464ebd5Sriastradh        break;
39701e04c3fSmrg    default:
39801e04c3fSmrg        ; /* nothing */
3993464ebd5Sriastradh    }
4003464ebd5Sriastradh    return 0;
4013464ebd5Sriastradh}
4023464ebd5Sriastradh
403af69d88dSmrgstatic float r300_get_paramf(struct pipe_screen* pscreen,
404af69d88dSmrg                             enum pipe_capf param)
4054a49301eSmrg{
4064a49301eSmrg    struct r300_screen* r300screen = r300_screen(pscreen);
4074a49301eSmrg
4084a49301eSmrg    switch (param) {
409af69d88dSmrg        case PIPE_CAPF_MAX_LINE_WIDTH:
410af69d88dSmrg        case PIPE_CAPF_MAX_LINE_WIDTH_AA:
411af69d88dSmrg        case PIPE_CAPF_MAX_POINT_WIDTH:
412af69d88dSmrg        case PIPE_CAPF_MAX_POINT_WIDTH_AA:
4134a49301eSmrg            /* The maximum dimensions of the colorbuffer are our practical
4144a49301eSmrg             * rendering limits. 2048 pixels should be enough for anybody. */
4153464ebd5Sriastradh            if (r300screen->caps.is_r500) {
4164a49301eSmrg                return 4096.0f;
4173464ebd5Sriastradh            } else if (r300screen->caps.is_r400) {
418cdc920a0Smrg                return 4021.0f;
4194a49301eSmrg            } else {
420cdc920a0Smrg                return 2560.0f;
4214a49301eSmrg            }
422af69d88dSmrg        case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
4234a49301eSmrg            return 16.0f;
424af69d88dSmrg        case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
4254a49301eSmrg            return 16.0f;
42601e04c3fSmrg        case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
42701e04c3fSmrg        case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
42801e04c3fSmrg        case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
4293464ebd5Sriastradh            return 0.0f;
4304a49301eSmrg        default:
4313464ebd5Sriastradh            debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
4323464ebd5Sriastradh                         param);
4334a49301eSmrg            return 0.0f;
4344a49301eSmrg    }
4354a49301eSmrg}
4364a49301eSmrg
437af69d88dSmrgstatic int r300_get_video_param(struct pipe_screen *screen,
438af69d88dSmrg				enum pipe_video_profile profile,
439af69d88dSmrg				enum pipe_video_entrypoint entrypoint,
440af69d88dSmrg				enum pipe_video_cap param)
441af69d88dSmrg{
442af69d88dSmrg   switch (param) {
443af69d88dSmrg      case PIPE_VIDEO_CAP_SUPPORTED:
444af69d88dSmrg         return vl_profile_supported(screen, profile, entrypoint);
445af69d88dSmrg      case PIPE_VIDEO_CAP_NPOT_TEXTURES:
446af69d88dSmrg         return 0;
447af69d88dSmrg      case PIPE_VIDEO_CAP_MAX_WIDTH:
448af69d88dSmrg      case PIPE_VIDEO_CAP_MAX_HEIGHT:
449af69d88dSmrg         return vl_video_buffer_max_size(screen);
450af69d88dSmrg      case PIPE_VIDEO_CAP_PREFERED_FORMAT:
451af69d88dSmrg         return PIPE_FORMAT_NV12;
452af69d88dSmrg      case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
453af69d88dSmrg         return false;
454af69d88dSmrg      case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
455af69d88dSmrg         return false;
456af69d88dSmrg      case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
457af69d88dSmrg         return true;
458af69d88dSmrg      case PIPE_VIDEO_CAP_MAX_LEVEL:
459af69d88dSmrg         return vl_level_supported(screen, profile);
460af69d88dSmrg      default:
461af69d88dSmrg         return 0;
462af69d88dSmrg   }
463af69d88dSmrg}
464af69d88dSmrg
465af69d88dSmrg/**
466af69d88dSmrg * Whether the format matches:
467af69d88dSmrg *   PIPE_FORMAT_?10?10?10?2_UNORM
468af69d88dSmrg */
46901e04c3fSmrgstatic inline boolean
470af69d88dSmrgutil_format_is_rgba1010102_variant(const struct util_format_description *desc)
471af69d88dSmrg{
472af69d88dSmrg   static const unsigned size[4] = {10, 10, 10, 2};
473af69d88dSmrg   unsigned chan;
474af69d88dSmrg
475af69d88dSmrg   if (desc->block.width != 1 ||
476af69d88dSmrg       desc->block.height != 1 ||
477af69d88dSmrg       desc->block.bits != 32)
478af69d88dSmrg      return FALSE;
479af69d88dSmrg
480af69d88dSmrg   for (chan = 0; chan < 4; ++chan) {
481af69d88dSmrg      if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
482af69d88dSmrg         desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
483af69d88dSmrg         return FALSE;
484af69d88dSmrg      if (desc->channel[chan].size != size[chan])
485af69d88dSmrg         return FALSE;
486af69d88dSmrg   }
487af69d88dSmrg
488af69d88dSmrg   return TRUE;
489af69d88dSmrg}
490af69d88dSmrg
49101e04c3fSmrgstatic bool r300_is_blending_supported(struct r300_screen *rscreen,
49201e04c3fSmrg                                       enum pipe_format format)
49301e04c3fSmrg{
49401e04c3fSmrg    int c;
49501e04c3fSmrg    const struct util_format_description *desc =
49601e04c3fSmrg        util_format_description(format);
49701e04c3fSmrg
49801e04c3fSmrg    if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
49901e04c3fSmrg        return false;
50001e04c3fSmrg
50101e04c3fSmrg    c = util_format_get_first_non_void_channel(format);
50201e04c3fSmrg
50301e04c3fSmrg    /* RGBA16F */
50401e04c3fSmrg    if (rscreen->caps.is_r500 &&
50501e04c3fSmrg        desc->nr_channels == 4 &&
50601e04c3fSmrg        desc->channel[c].size == 16 &&
50701e04c3fSmrg        desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
50801e04c3fSmrg        return true;
50901e04c3fSmrg
51001e04c3fSmrg    if (desc->channel[c].normalized &&
51101e04c3fSmrg        desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
51201e04c3fSmrg        desc->channel[c].size >= 4 &&
51301e04c3fSmrg        desc->channel[c].size <= 10) {
51401e04c3fSmrg        /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
51501e04c3fSmrg        if (desc->nr_channels >= 3)
51601e04c3fSmrg            return true;
51701e04c3fSmrg
51801e04c3fSmrg        if (format == PIPE_FORMAT_R8G8_UNORM)
51901e04c3fSmrg            return true;
52001e04c3fSmrg
52101e04c3fSmrg        /* R8, I8, L8, A8 */
52201e04c3fSmrg        if (desc->nr_channels == 1)
52301e04c3fSmrg            return true;
52401e04c3fSmrg    }
52501e04c3fSmrg
52601e04c3fSmrg    return false;
52701e04c3fSmrg}
52801e04c3fSmrg
5297ec681f3Smrgstatic bool r300_is_format_supported(struct pipe_screen* screen,
5307ec681f3Smrg                                     enum pipe_format format,
5317ec681f3Smrg                                     enum pipe_texture_target target,
5327ec681f3Smrg                                     unsigned sample_count,
5337ec681f3Smrg                                     unsigned storage_sample_count,
5347ec681f3Smrg                                     unsigned usage)
5354a49301eSmrg{
5364a49301eSmrg    uint32_t retval = 0;
5373464ebd5Sriastradh    boolean is_r500 = r300_screen(screen)->caps.is_r500;
5383464ebd5Sriastradh    boolean is_r400 = r300_screen(screen)->caps.is_r400;
5393464ebd5Sriastradh    boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
5403464ebd5Sriastradh                              format == PIPE_FORMAT_R10G10B10X2_SNORM ||
5413464ebd5Sriastradh                              format == PIPE_FORMAT_B10G10R10A2_UNORM ||
542af69d88dSmrg                              format == PIPE_FORMAT_B10G10R10X2_UNORM ||
5433464ebd5Sriastradh                              format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
5443464ebd5Sriastradh    boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
5453464ebd5Sriastradh                       format == PIPE_FORMAT_RGTC1_SNORM ||
5463464ebd5Sriastradh                       format == PIPE_FORMAT_LATC1_UNORM ||
5473464ebd5Sriastradh                       format == PIPE_FORMAT_LATC1_SNORM;
5483464ebd5Sriastradh    boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
5493464ebd5Sriastradh                       format == PIPE_FORMAT_RGTC2_SNORM ||
5503464ebd5Sriastradh                       format == PIPE_FORMAT_LATC2_UNORM ||
5513464ebd5Sriastradh                       format == PIPE_FORMAT_LATC2_SNORM;
5523464ebd5Sriastradh    boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
5533464ebd5Sriastradh                            format == PIPE_FORMAT_R16G16_FLOAT ||
5543464ebd5Sriastradh                            format == PIPE_FORMAT_R16G16B16_FLOAT ||
555af69d88dSmrg                            format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
556af69d88dSmrg                            format == PIPE_FORMAT_R16G16B16X16_FLOAT;
557af69d88dSmrg    const struct util_format_description *desc;
5583464ebd5Sriastradh
55901e04c3fSmrg    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
56001e04c3fSmrg        return false;
5613464ebd5Sriastradh
5623464ebd5Sriastradh    /* Check multisampling support. */
5633464ebd5Sriastradh    switch (sample_count) {
5643464ebd5Sriastradh        case 0:
5653464ebd5Sriastradh        case 1:
5663464ebd5Sriastradh            break;
5673464ebd5Sriastradh        case 2:
5683464ebd5Sriastradh        case 4:
5693464ebd5Sriastradh        case 6:
570af69d88dSmrg            /* No texturing and scanout. */
571af69d88dSmrg            if (usage & (PIPE_BIND_SAMPLER_VIEW |
572af69d88dSmrg                         PIPE_BIND_DISPLAY_TARGET |
573af69d88dSmrg                         PIPE_BIND_SCANOUT)) {
5747ec681f3Smrg                return false;
575af69d88dSmrg            }
576af69d88dSmrg
577af69d88dSmrg            desc = util_format_description(format);
578af69d88dSmrg
579af69d88dSmrg            if (is_r500) {
580af69d88dSmrg                /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
581af69d88dSmrg                if (!util_format_is_depth_or_stencil(format) &&
582af69d88dSmrg                    !util_format_is_rgba8_variant(desc) &&
583af69d88dSmrg                    !util_format_is_rgba1010102_variant(desc) &&
584af69d88dSmrg                    format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
585af69d88dSmrg                    format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
5867ec681f3Smrg                    return false;
587af69d88dSmrg                }
588af69d88dSmrg            } else {
589af69d88dSmrg                /* Only allow depth/stencil, RGBA8. */
590af69d88dSmrg                if (!util_format_is_depth_or_stencil(format) &&
591af69d88dSmrg                    !util_format_is_rgba8_variant(desc)) {
5927ec681f3Smrg                    return false;
593af69d88dSmrg                }
594af69d88dSmrg            }
5953464ebd5Sriastradh            break;
5963464ebd5Sriastradh        default:
5977ec681f3Smrg            return false;
5984a49301eSmrg    }
5994a49301eSmrg
600cdc920a0Smrg    /* Check sampler format support. */
6013464ebd5Sriastradh    if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
602af69d88dSmrg        /* these two are broken for an unknown reason */
603af69d88dSmrg        format != PIPE_FORMAT_R8G8B8X8_SNORM &&
604af69d88dSmrg        format != PIPE_FORMAT_R16G16B16X16_SNORM &&
6053464ebd5Sriastradh        /* ATI1N is r5xx-only. */
6063464ebd5Sriastradh        (is_r500 || !is_ati1n) &&
6073464ebd5Sriastradh        /* ATI2N is supported on r4xx-r5xx. */
6083464ebd5Sriastradh        (is_r400 || is_r500 || !is_ati2n) &&
609cdc920a0Smrg        r300_is_sampler_format_supported(format)) {
6103464ebd5Sriastradh        retval |= PIPE_BIND_SAMPLER_VIEW;
611cdc920a0Smrg    }
6124a49301eSmrg
613cdc920a0Smrg    /* Check colorbuffer format support. */
6143464ebd5Sriastradh    if ((usage & (PIPE_BIND_RENDER_TARGET |
6153464ebd5Sriastradh                  PIPE_BIND_DISPLAY_TARGET |
6163464ebd5Sriastradh                  PIPE_BIND_SCANOUT |
61701e04c3fSmrg                  PIPE_BIND_SHARED |
61801e04c3fSmrg                  PIPE_BIND_BLENDABLE)) &&
619cdc920a0Smrg        /* 2101010 cannot be rendered to on non-r5xx. */
62001e04c3fSmrg        (!is_color2101010 || is_r500) &&
621cdc920a0Smrg        r300_is_colorbuffer_format_supported(format)) {
622cdc920a0Smrg        retval |= usage &
6233464ebd5Sriastradh            (PIPE_BIND_RENDER_TARGET |
6243464ebd5Sriastradh             PIPE_BIND_DISPLAY_TARGET |
6253464ebd5Sriastradh             PIPE_BIND_SCANOUT |
6263464ebd5Sriastradh             PIPE_BIND_SHARED);
62701e04c3fSmrg
62801e04c3fSmrg        if (r300_is_blending_supported(r300_screen(screen), format)) {
62901e04c3fSmrg            retval |= usage & PIPE_BIND_BLENDABLE;
63001e04c3fSmrg        }
631cdc920a0Smrg    }
6324a49301eSmrg
633cdc920a0Smrg    /* Check depth-stencil format support. */
6343464ebd5Sriastradh    if (usage & PIPE_BIND_DEPTH_STENCIL &&
635cdc920a0Smrg        r300_is_zs_format_supported(format)) {
6363464ebd5Sriastradh        retval |= PIPE_BIND_DEPTH_STENCIL;
6373464ebd5Sriastradh    }
6383464ebd5Sriastradh
6393464ebd5Sriastradh    /* Check vertex buffer format support. */
640af69d88dSmrg    if (usage & PIPE_BIND_VERTEX_BUFFER) {
641af69d88dSmrg        if (r300_screen(screen)->caps.has_tcl) {
642af69d88dSmrg            /* Half float is supported on >= R400. */
643af69d88dSmrg            if ((is_r400 || is_r500 || !is_half_float) &&
644af69d88dSmrg                r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
645af69d88dSmrg                retval |= PIPE_BIND_VERTEX_BUFFER;
646af69d88dSmrg            }
647af69d88dSmrg        } else {
648af69d88dSmrg            /* SW TCL */
649af69d88dSmrg            if (!util_format_is_pure_integer(format)) {
650af69d88dSmrg                retval |= PIPE_BIND_VERTEX_BUFFER;
651af69d88dSmrg            }
652af69d88dSmrg        }
6534a49301eSmrg    }
6544a49301eSmrg
6557ec681f3Smrg    if (usage & PIPE_BIND_INDEX_BUFFER) {
6567ec681f3Smrg       if (format == PIPE_FORMAT_R8_UINT ||
6577ec681f3Smrg           format == PIPE_FORMAT_R16_UINT ||
6587ec681f3Smrg           format == PIPE_FORMAT_R32_UINT)
6597ec681f3Smrg          retval |= PIPE_BIND_INDEX_BUFFER;
6607ec681f3Smrg    }
6617ec681f3Smrg
662cdc920a0Smrg    return retval == usage;
6634a49301eSmrg}
6644a49301eSmrg
6653464ebd5Sriastradhstatic void r300_destroy_screen(struct pipe_screen* pscreen)
6664a49301eSmrg{
6673464ebd5Sriastradh    struct r300_screen* r300screen = r300_screen(pscreen);
6683464ebd5Sriastradh    struct radeon_winsys *rws = radeon_winsys(pscreen);
6693464ebd5Sriastradh
670af69d88dSmrg    if (rws && !rws->unref(rws))
671af69d88dSmrg      return;
672af69d88dSmrg
67301e04c3fSmrg    mtx_destroy(&r300screen->cmask_mutex);
67401e04c3fSmrg    slab_destroy_parent(&r300screen->pool_transfers);
6753464ebd5Sriastradh
6767ec681f3Smrg    disk_cache_destroy(r300screen->disk_shader_cache);
6777ec681f3Smrg
6783464ebd5Sriastradh    if (rws)
6793464ebd5Sriastradh      rws->destroy(rws);
6803464ebd5Sriastradh
6813464ebd5Sriastradh    FREE(r300screen);
6824a49301eSmrg}
6834a49301eSmrg
6843464ebd5Sriastradhstatic void r300_fence_reference(struct pipe_screen *screen,
6853464ebd5Sriastradh                                 struct pipe_fence_handle **ptr,
6863464ebd5Sriastradh                                 struct pipe_fence_handle *fence)
6874a49301eSmrg{
688af69d88dSmrg    struct radeon_winsys *rws = r300_screen(screen)->rws;
689af69d88dSmrg
690af69d88dSmrg    rws->fence_reference(ptr, fence);
6914a49301eSmrg}
6924a49301eSmrg
6937ec681f3Smrgstatic bool r300_fence_finish(struct pipe_screen *screen,
6947ec681f3Smrg                              struct pipe_context *ctx,
6957ec681f3Smrg                              struct pipe_fence_handle *fence,
6967ec681f3Smrg                              uint64_t timeout)
6974a49301eSmrg{
6983464ebd5Sriastradh    struct radeon_winsys *rws = r300_screen(screen)->rws;
6993464ebd5Sriastradh
700af69d88dSmrg    return rws->fence_wait(rws, fence, timeout);
7014a49301eSmrg}
7024a49301eSmrg
70301e04c3fSmrgstruct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
70401e04c3fSmrg                                       const struct pipe_screen_config *config)
7054a49301eSmrg{
7063464ebd5Sriastradh    struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
7074a49301eSmrg
7083464ebd5Sriastradh    if (!r300screen) {
709cdc920a0Smrg        FREE(r300screen);
7104a49301eSmrg        return NULL;
711cdc920a0Smrg    }
7124a49301eSmrg
7137ec681f3Smrg    rws->query_info(rws, &r300screen->info, false, false);
7144a49301eSmrg
715cdc920a0Smrg    r300_init_debug(r300screen);
716af69d88dSmrg    r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
7174a49301eSmrg
7183464ebd5Sriastradh    if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
7193464ebd5Sriastradh        r300screen->caps.zmask_ram = 0;
7203464ebd5Sriastradh    if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
7213464ebd5Sriastradh        r300screen->caps.hiz_ram = 0;
7223464ebd5Sriastradh
7233464ebd5Sriastradh    r300screen->rws = rws;
7244a49301eSmrg    r300screen->screen.destroy = r300_destroy_screen;
7254a49301eSmrg    r300screen->screen.get_name = r300_get_name;
7264a49301eSmrg    r300screen->screen.get_vendor = r300_get_vendor;
72701e04c3fSmrg    r300screen->screen.get_device_vendor = r300_get_device_vendor;
7287ec681f3Smrg    r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;
7294a49301eSmrg    r300screen->screen.get_param = r300_get_param;
7303464ebd5Sriastradh    r300screen->screen.get_shader_param = r300_get_shader_param;
7314a49301eSmrg    r300screen->screen.get_paramf = r300_get_paramf;
732af69d88dSmrg    r300screen->screen.get_video_param = r300_get_video_param;
7334a49301eSmrg    r300screen->screen.is_format_supported = r300_is_format_supported;
734af69d88dSmrg    r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
735cdc920a0Smrg    r300screen->screen.context_create = r300_create_context;
7363464ebd5Sriastradh    r300screen->screen.fence_reference = r300_fence_reference;
7373464ebd5Sriastradh    r300screen->screen.fence_finish = r300_fence_finish;
7383464ebd5Sriastradh
7393464ebd5Sriastradh    r300_init_screen_resource_functions(r300screen);
7403464ebd5Sriastradh
7417ec681f3Smrg    r300_disk_cache_create(r300screen);
7427ec681f3Smrg
74301e04c3fSmrg    slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
74401e04c3fSmrg
74501e04c3fSmrg    (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
7464a49301eSmrg
7474a49301eSmrg    return &r300screen->screen;
7484a49301eSmrg}
749