1af69d88dSmrg/*
2af69d88dSmrg * Copyright 2012 Vadim Girlin <vadimgirlin@gmail.com>
3af69d88dSmrg *
4af69d88dSmrg * Permission is hereby granted, free of charge, to any person obtaining a
5af69d88dSmrg * copy of this software and associated documentation files (the "Software"),
6af69d88dSmrg * to deal in the Software without restriction, including without limitation
7af69d88dSmrg * on the rights to use, copy, modify, merge, publish, distribute, sub
8af69d88dSmrg * license, and/or sell copies of the Software, and to permit persons to whom
9af69d88dSmrg * the Software is furnished to do so, subject to the following conditions:
10af69d88dSmrg *
11af69d88dSmrg * The above copyright notice and this permission notice (including the next
12af69d88dSmrg * paragraph) shall be included in all copies or substantial portions of the
13af69d88dSmrg * Software.
14af69d88dSmrg *
15af69d88dSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16af69d88dSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17af69d88dSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18af69d88dSmrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19af69d88dSmrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20af69d88dSmrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21af69d88dSmrg * USE OR OTHER DEALINGS IN THE SOFTWARE.
22af69d88dSmrg *
23af69d88dSmrg * Authors:
24af69d88dSmrg *      Vadim Girlin
25af69d88dSmrg */
26af69d88dSmrg
27af69d88dSmrg#ifndef R600_ISA_H_
28af69d88dSmrg#define R600_ISA_H_
29af69d88dSmrg
30af69d88dSmrg#include "util/u_debug.h"
31af69d88dSmrg
327e995a2eSmrg#ifdef __cplusplus
337e995a2eSmrgextern "C" {
347e995a2eSmrg#endif
357e995a2eSmrg
36af69d88dSmrg/* ALU flags */
37af69d88dSmrgenum alu_op_flags
38af69d88dSmrg{
391463c08dSmrg	AF_NONE = 0,
40af69d88dSmrg	AF_V		= (1<<0),    /* allowed in vector slots */
41af69d88dSmrg
42af69d88dSmrg	/* allowed in scalar(trans) slot (slots xyz on cayman, may be replicated
43af69d88dSmrg	 * to w) */
44af69d88dSmrg	AF_S		= (1<<1),
45af69d88dSmrg
46af69d88dSmrg	AF_4SLOT	= (1<<2),            /* uses four vector slots (e.g. DOT4) */
47af69d88dSmrg	AF_4V		= (AF_V | AF_4SLOT),
48af69d88dSmrg	AF_VS		= (AF_V | AF_S),     /* allowed in any slot */
49af69d88dSmrg
501463c08dSmrg	AF_2SLOT = (1 << 3),
511463c08dSmrg	AF_2V    = AF_V | AF_2SLOT, /* XY or ZW */
521463c08dSmrg
53af69d88dSmrg	AF_KILL		= (1<<4),
54af69d88dSmrg	AF_PRED		= (1<<5),
55af69d88dSmrg	AF_SET		= (1<<6),
56af69d88dSmrg
57af69d88dSmrg	/* e.g. MUL_PREV instructions, allowed in x/y, depends on z/w */
58af69d88dSmrg	AF_PREV_INTERLEAVE	= (1<<7),
59af69d88dSmrg
60af69d88dSmrg	AF_MOVA		= (1<<8),    /* all MOVA instructions */
611463c08dSmrg
62af69d88dSmrg	AF_IEEE		= (1<<10),
63af69d88dSmrg
64af69d88dSmrg	AF_DST_TYPE_MASK = (3<<11),
65af69d88dSmrg	AF_FLOAT_DST	= 0,
66af69d88dSmrg	AF_INT_DST		= (1<<11),
67af69d88dSmrg	AF_UINT_DST		= (3<<11),
68af69d88dSmrg
69af69d88dSmrg	/* DP instructions, 2-slot pairs */
70af69d88dSmrg	AF_64		= (1<<13),
71af69d88dSmrg	/* 24 bit instructions */
72af69d88dSmrg	AF_24		= (1<<14),
73af69d88dSmrg	/* DX10 variants */
74af69d88dSmrg	AF_DX10		= (1<<15),
75af69d88dSmrg
76af69d88dSmrg	/* result is replicated to all channels (only if AF_4V is also set -
77af69d88dSmrg	 * for special handling of MULLO_INT on CM) */
78af69d88dSmrg	AF_REPL		= (1<<16),
79af69d88dSmrg
80af69d88dSmrg	/* interpolation instructions */
81af69d88dSmrg	AF_INTERP	= (1<<17),
82af69d88dSmrg
83af69d88dSmrg	/* LDS instructions */
84af69d88dSmrg	AF_LDS		= (1<<20),
85af69d88dSmrg
86af69d88dSmrg	/* e.g. DOT - depends on the next slot in the same group (x<=y/y<=z/z<=w) */
87af69d88dSmrg	AF_PREV_NEXT	= (1<<21),
88af69d88dSmrg
89af69d88dSmrg	/* int<->flt conversions */
90af69d88dSmrg	AF_CVT = (1<<22),
91af69d88dSmrg
92af69d88dSmrg	/* commutative operation on src0 and src1 ( a op b = b op a),
93af69d88dSmrg	 * includes MULADDs (considering the MUL part on src0 and src1 only) */
94af69d88dSmrg	AF_M_COMM = (1 << 23),
95af69d88dSmrg
96af69d88dSmrg	/* associative operation ((a op b) op c) == (a op (b op c)),
97af69d88dSmrg	 * includes MULADDs (considering the MUL part on src0 and src1 only) */
98af69d88dSmrg	AF_M_ASSOC = (1 << 24),
99af69d88dSmrg
100af69d88dSmrg	AF_PRED_PUSH = (1 << 25),
101af69d88dSmrg
102af69d88dSmrg	AF_ANY_PRED = (AF_PRED | AF_PRED_PUSH),
103af69d88dSmrg
104af69d88dSmrg	AF_CMOV = (1 << 26),
105af69d88dSmrg
106af69d88dSmrg	// for SETcc, PREDSETcc, ... - type of comparison
107af69d88dSmrg	AF_CMP_TYPE_MASK = (3 << 27),
108af69d88dSmrg	AF_FLOAT_CMP = 0,
109af69d88dSmrg	AF_INT_CMP = (1 << 27),
110af69d88dSmrg	AF_UINT_CMP = (3 << 27),
111af69d88dSmrg
112af69d88dSmrg	/* condition codes - 3 bits */
113af69d88dSmrg	AF_CC_SHIFT = 29,
1141463c08dSmrg
1157e995a2eSmrg	AF_CC_MASK	= (7U << AF_CC_SHIFT),
1167e995a2eSmrg	AF_CC_E		= (0U << AF_CC_SHIFT),
1177e995a2eSmrg	AF_CC_GT	= (1U << AF_CC_SHIFT),
1187e995a2eSmrg	AF_CC_GE	= (2U << AF_CC_SHIFT),
1197e995a2eSmrg	AF_CC_NE	= (3U << AF_CC_SHIFT),
1207e995a2eSmrg	AF_CC_LT	= (4U << AF_CC_SHIFT),
1217e995a2eSmrg	AF_CC_LE	= (5U << AF_CC_SHIFT),
122af69d88dSmrg};
123af69d88dSmrg
1247e995a2eSmrg/* flags for FETCH instructions (TEX/VTX/GDS) */
125af69d88dSmrgenum fetch_op_flags
126af69d88dSmrg{
127af69d88dSmrg	FF_GDS		= (1<<0),
128af69d88dSmrg	FF_TEX		= (1<<1),
129af69d88dSmrg
130af69d88dSmrg	FF_SETGRAD	= (1<<2),
131af69d88dSmrg	FF_GETGRAD	= (1<<3),
132af69d88dSmrg	FF_USEGRAD	= (1<<4),
133af69d88dSmrg
134af69d88dSmrg	FF_VTX		= (1<<5),
135af69d88dSmrg	FF_MEM		= (1<<6),
136af69d88dSmrg
137af69d88dSmrg	FF_SET_TEXTURE_OFFSETS = (1<<7),
138af69d88dSmrg	FF_USE_TEXTURE_OFFSETS = (1<<8),
139af69d88dSmrg};
140af69d88dSmrg
141af69d88dSmrg/* flags for CF instructions */
142af69d88dSmrgenum cf_op_flags
143af69d88dSmrg{
144af69d88dSmrg	CF_CLAUSE	= (1<<0), 	/* execute clause (alu/fetch ...) */
145af69d88dSmrg	CF_ACK		= (1<<1),	/* acked versions of some instructions */
146af69d88dSmrg	CF_ALU		= (1<<2),	/* alu clause execution */
147af69d88dSmrg	CF_ALU_EXT	= (1<<3),	/* ALU_EXTENDED */
148af69d88dSmrg	CF_EXP		= (1<<4),	/* export (CF_ALLOC_EXPORT_WORD1_SWIZ) */
149af69d88dSmrg	CF_BRANCH	= (1<<5),   /* branch instructions */
150af69d88dSmrg	CF_LOOP		= (1<<6),   /* loop instructions */
151af69d88dSmrg	CF_CALL		= (1<<7),   /* call instructions */
152af69d88dSmrg	CF_MEM		= (1<<8),	/* export_mem (CF_ALLOC_EXPORT_WORD1_BUF) */
153af69d88dSmrg	CF_FETCH	= (1<<9),	/* fetch clause */
154af69d88dSmrg
155af69d88dSmrg	CF_UNCOND	= (1<<10),	/* COND = ACTIVE required */
156af69d88dSmrg	CF_EMIT		= (1<<11),
157af69d88dSmrg	CF_STRM		= (1<<12),	/* MEM_STREAM* */
158af69d88dSmrg
159af69d88dSmrg	CF_RAT		= (1<<13),  /* MEM_RAT* */
160af69d88dSmrg
161af69d88dSmrg	CF_LOOP_START = (1<<14)
162af69d88dSmrg};
163af69d88dSmrg
164af69d88dSmrg/* ALU instruction info */
165af69d88dSmrgstruct alu_op_info
166af69d88dSmrg{
167af69d88dSmrg	/* instruction name */
168af69d88dSmrg	const char	*name;
169af69d88dSmrg	/* number of source operands */
170af69d88dSmrg	int	src_count;
171af69d88dSmrg	/* opcodes, [0] - for r6xx/r7xx, [1] - for evergreen/cayman
172af69d88dSmrg	 * (-1) if instruction doesn't exist (more precise info in "slots") */
173af69d88dSmrg	int opcode[2];
174af69d88dSmrg	/* slots for r6xx, r7xx, evergreen, cayman
175af69d88dSmrg	 * (0 if instruction doesn't exist for chip class) */
176af69d88dSmrg	int	slots[4];
177af69d88dSmrg	/* flags (mostly autogenerated from instruction name) */
1787e995a2eSmrg	unsigned int flags;
179af69d88dSmrg};
180af69d88dSmrg
181af69d88dSmrg/* FETCH instruction info */
182af69d88dSmrgstruct fetch_op_info
183af69d88dSmrg{
184af69d88dSmrg	const char * name;
185af69d88dSmrg	/* for every chip class */
186af69d88dSmrg	int opcode[4];
187af69d88dSmrg	int flags;
188af69d88dSmrg};
189af69d88dSmrg
190af69d88dSmrg/* CF instruction info */
191af69d88dSmrgstruct cf_op_info
192af69d88dSmrg{
193af69d88dSmrg	const char * name;
194af69d88dSmrg	/* for every chip class */
195af69d88dSmrg	int opcode[4];
196af69d88dSmrg	int flags;
197af69d88dSmrg};
198af69d88dSmrg
199af69d88dSmrg
200af69d88dSmrg#define ALU_OP2_ADD                             0
201af69d88dSmrg#define ALU_OP2_MUL                             1
202af69d88dSmrg#define ALU_OP2_MUL_IEEE                        2
203af69d88dSmrg#define ALU_OP2_MAX                             3
204af69d88dSmrg#define ALU_OP2_MIN                             4
205af69d88dSmrg#define ALU_OP2_MAX_DX10                        5
206af69d88dSmrg#define ALU_OP2_MIN_DX10                        6
207af69d88dSmrg#define ALU_OP2_SETE                            7
208af69d88dSmrg#define ALU_OP2_SETGT                           8
209af69d88dSmrg#define ALU_OP2_SETGE                           9
210af69d88dSmrg#define ALU_OP2_SETNE                          10
211af69d88dSmrg#define ALU_OP2_SETE_DX10                      11
212af69d88dSmrg#define ALU_OP2_SETGT_DX10                     12
213af69d88dSmrg#define ALU_OP2_SETGE_DX10                     13
214af69d88dSmrg#define ALU_OP2_SETNE_DX10                     14
215af69d88dSmrg#define ALU_OP1_FRACT                          15
216af69d88dSmrg#define ALU_OP1_TRUNC                          16
217af69d88dSmrg#define ALU_OP1_CEIL                           17
218af69d88dSmrg#define ALU_OP1_RNDNE                          18
219af69d88dSmrg#define ALU_OP1_FLOOR                          19
220af69d88dSmrg#define ALU_OP2_ASHR_INT                       20
221af69d88dSmrg#define ALU_OP2_LSHR_INT                       21
222af69d88dSmrg#define ALU_OP2_LSHL_INT                       22
223af69d88dSmrg#define ALU_OP1_MOV                            23
224af69d88dSmrg#define ALU_OP0_NOP                            24
225af69d88dSmrg#define ALU_OP2_PRED_SETGT_UINT                25
226af69d88dSmrg#define ALU_OP2_PRED_SETGE_UINT                26
227af69d88dSmrg#define ALU_OP2_PRED_SETE                      27
228af69d88dSmrg#define ALU_OP2_PRED_SETGT                     28
229af69d88dSmrg#define ALU_OP2_PRED_SETGE                     29
230af69d88dSmrg#define ALU_OP2_PRED_SETNE                     30
231af69d88dSmrg#define ALU_OP1_PRED_SET_INV                   31
232af69d88dSmrg#define ALU_OP2_PRED_SET_POP                   32
233af69d88dSmrg#define ALU_OP0_PRED_SET_CLR                   33
234af69d88dSmrg#define ALU_OP1_PRED_SET_RESTORE               34
235af69d88dSmrg#define ALU_OP2_PRED_SETE_PUSH                 35
236af69d88dSmrg#define ALU_OP2_PRED_SETGT_PUSH                36
237af69d88dSmrg#define ALU_OP2_PRED_SETGE_PUSH                37
238af69d88dSmrg#define ALU_OP2_PRED_SETNE_PUSH                38
239af69d88dSmrg#define ALU_OP2_KILLE                          39
240af69d88dSmrg#define ALU_OP2_KILLGT                         40
241af69d88dSmrg#define ALU_OP2_KILLGE                         41
242af69d88dSmrg#define ALU_OP2_KILLNE                         42
243af69d88dSmrg#define ALU_OP2_AND_INT                        43
244af69d88dSmrg#define ALU_OP2_OR_INT                         44
245af69d88dSmrg#define ALU_OP2_XOR_INT                        45
246af69d88dSmrg#define ALU_OP1_NOT_INT                        46
247af69d88dSmrg#define ALU_OP2_ADD_INT                        47
248af69d88dSmrg#define ALU_OP2_SUB_INT                        48
249af69d88dSmrg#define ALU_OP2_MAX_INT                        49
250af69d88dSmrg#define ALU_OP2_MIN_INT                        50
251af69d88dSmrg#define ALU_OP2_MAX_UINT                       51
252af69d88dSmrg#define ALU_OP2_MIN_UINT                       52
253af69d88dSmrg#define ALU_OP2_SETE_INT                       53
254af69d88dSmrg#define ALU_OP2_SETGT_INT                      54
255af69d88dSmrg#define ALU_OP2_SETGE_INT                      55
256af69d88dSmrg#define ALU_OP2_SETNE_INT                      56
257af69d88dSmrg#define ALU_OP2_SETGT_UINT                     57
258af69d88dSmrg#define ALU_OP2_SETGE_UINT                     58
259af69d88dSmrg#define ALU_OP2_KILLGT_UINT                    59
260af69d88dSmrg#define ALU_OP2_KILLGE_UINT                    60
261af69d88dSmrg#define ALU_OP2_PRED_SETE_INT                  61
262af69d88dSmrg#define ALU_OP2_PRED_SETGT_INT                 62
263af69d88dSmrg#define ALU_OP2_PRED_SETGE_INT                 63
264af69d88dSmrg#define ALU_OP2_PRED_SETNE_INT                 64
265af69d88dSmrg#define ALU_OP2_KILLE_INT                      65
266af69d88dSmrg#define ALU_OP2_KILLGT_INT                     66
267af69d88dSmrg#define ALU_OP2_KILLGE_INT                     67
268af69d88dSmrg#define ALU_OP2_KILLNE_INT                     68
269af69d88dSmrg#define ALU_OP2_PRED_SETE_PUSH_INT             69
270af69d88dSmrg#define ALU_OP2_PRED_SETGT_PUSH_INT            70
271af69d88dSmrg#define ALU_OP2_PRED_SETGE_PUSH_INT            71
272af69d88dSmrg#define ALU_OP2_PRED_SETNE_PUSH_INT            72
273af69d88dSmrg#define ALU_OP2_PRED_SETLT_PUSH_INT            73
274af69d88dSmrg#define ALU_OP2_PRED_SETLE_PUSH_INT            74
275af69d88dSmrg#define ALU_OP1_FLT_TO_INT                     75
276af69d88dSmrg#define ALU_OP1_BFREV_INT                      76
277af69d88dSmrg#define ALU_OP2_ADDC_UINT                      77
278af69d88dSmrg#define ALU_OP2_SUBB_UINT                      78
279af69d88dSmrg#define ALU_OP0_GROUP_BARRIER                  79
280af69d88dSmrg#define ALU_OP0_GROUP_SEQ_BEGIN                80
281af69d88dSmrg#define ALU_OP0_GROUP_SEQ_END                  81
282af69d88dSmrg#define ALU_OP2_SET_MODE                       82
283af69d88dSmrg#define ALU_OP0_SET_CF_IDX0                    83
284af69d88dSmrg#define ALU_OP0_SET_CF_IDX1                    84
285af69d88dSmrg#define ALU_OP2_SET_LDS_SIZE                   85
286af69d88dSmrg#define ALU_OP2_MUL_INT24                      86
287af69d88dSmrg#define ALU_OP2_MULHI_INT24                    87
288af69d88dSmrg#define ALU_OP1_FLT_TO_INT_TRUNC               88
289af69d88dSmrg#define ALU_OP1_EXP_IEEE                       89
290af69d88dSmrg#define ALU_OP1_LOG_CLAMPED                    90
291af69d88dSmrg#define ALU_OP1_LOG_IEEE                       91
292af69d88dSmrg#define ALU_OP1_RECIP_CLAMPED                  92
293af69d88dSmrg#define ALU_OP1_RECIP_FF                       93
294af69d88dSmrg#define ALU_OP1_RECIP_IEEE                     94
295af69d88dSmrg#define ALU_OP1_RECIPSQRT_CLAMPED              95
296af69d88dSmrg#define ALU_OP1_RECIPSQRT_FF                   96
297af69d88dSmrg#define ALU_OP1_RECIPSQRT_IEEE                 97
298af69d88dSmrg#define ALU_OP1_SQRT_IEEE                      98
299af69d88dSmrg#define ALU_OP1_SIN                            99
300af69d88dSmrg#define ALU_OP1_COS                           100
301af69d88dSmrg#define ALU_OP2_MULLO_INT                     101
302af69d88dSmrg#define ALU_OP2_MULHI_INT                     102
303af69d88dSmrg#define ALU_OP2_MULLO_UINT                    103
304af69d88dSmrg#define ALU_OP2_MULHI_UINT                    104
305af69d88dSmrg#define ALU_OP1_RECIP_INT                     105
306af69d88dSmrg#define ALU_OP1_RECIP_UINT                    106
307af69d88dSmrg#define ALU_OP2_RECIP_64                      107
308af69d88dSmrg#define ALU_OP2_RECIP_CLAMPED_64              108
309af69d88dSmrg#define ALU_OP2_RECIPSQRT_64                  109
310af69d88dSmrg#define ALU_OP2_RECIPSQRT_CLAMPED_64          110
311af69d88dSmrg#define ALU_OP2_SQRT_64                       111
312af69d88dSmrg#define ALU_OP1_FLT_TO_UINT                   112
313af69d88dSmrg#define ALU_OP1_INT_TO_FLT                    113
314af69d88dSmrg#define ALU_OP1_UINT_TO_FLT                   114
315af69d88dSmrg#define ALU_OP2_BFM_INT                       115
316af69d88dSmrg#define ALU_OP1_FLT32_TO_FLT16                116
317af69d88dSmrg#define ALU_OP1_FLT16_TO_FLT32                117
318af69d88dSmrg#define ALU_OP1_UBYTE0_FLT                    118
319af69d88dSmrg#define ALU_OP1_UBYTE1_FLT                    119
320af69d88dSmrg#define ALU_OP1_UBYTE2_FLT                    120
321af69d88dSmrg#define ALU_OP1_UBYTE3_FLT                    121
322af69d88dSmrg#define ALU_OP1_BCNT_INT                      122
323af69d88dSmrg#define ALU_OP1_FFBH_UINT                     123
324af69d88dSmrg#define ALU_OP1_FFBL_INT                      124
325af69d88dSmrg#define ALU_OP1_FFBH_INT                      125
326af69d88dSmrg#define ALU_OP1_FLT_TO_UINT4                  126
327af69d88dSmrg#define ALU_OP2_DOT_IEEE                      127
328af69d88dSmrg#define ALU_OP1_FLT_TO_INT_RPI                128
329af69d88dSmrg#define ALU_OP1_FLT_TO_INT_FLOOR              129
330af69d88dSmrg#define ALU_OP2_MULHI_UINT24                  130
331af69d88dSmrg#define ALU_OP1_MBCNT_32HI_INT                131
332af69d88dSmrg#define ALU_OP1_OFFSET_TO_FLT                 132
333af69d88dSmrg#define ALU_OP2_MUL_UINT24                    133
334af69d88dSmrg#define ALU_OP1_BCNT_ACCUM_PREV_INT           134
335af69d88dSmrg#define ALU_OP1_MBCNT_32LO_ACCUM_PREV_INT     135
336af69d88dSmrg#define ALU_OP2_SETE_64                       136
337af69d88dSmrg#define ALU_OP2_SETNE_64                      137
338af69d88dSmrg#define ALU_OP2_SETGT_64                      138
339af69d88dSmrg#define ALU_OP2_SETGE_64                      139
340af69d88dSmrg#define ALU_OP2_MIN_64                        140
341af69d88dSmrg#define ALU_OP2_MAX_64                        141
342af69d88dSmrg#define ALU_OP2_DOT4                          142
343af69d88dSmrg#define ALU_OP2_DOT4_IEEE                     143
344af69d88dSmrg#define ALU_OP2_CUBE                          144
345af69d88dSmrg#define ALU_OP1_MAX4                          145
346af69d88dSmrg#define ALU_OP1_FREXP_64                      146
347af69d88dSmrg#define ALU_OP2_LDEXP_64                      147
348af69d88dSmrg#define ALU_OP1_FRACT_64                      148
349af69d88dSmrg#define ALU_OP2_PRED_SETGT_64                 149
350af69d88dSmrg#define ALU_OP2_PRED_SETE_64                  150
351af69d88dSmrg#define ALU_OP2_PRED_SETGE_64                 151
352af69d88dSmrg#define ALU_OP2_MUL_64                        152
353af69d88dSmrg#define ALU_OP2_ADD_64                        153
354af69d88dSmrg#define ALU_OP1_MOVA_INT                      154
355af69d88dSmrg#define ALU_OP1_FLT64_TO_FLT32                155
356af69d88dSmrg#define ALU_OP1_FLT32_TO_FLT64                156
357af69d88dSmrg#define ALU_OP2_SAD_ACCUM_PREV_UINT           157
358af69d88dSmrg#define ALU_OP2_DOT                           158
359af69d88dSmrg#define ALU_OP1_MUL_PREV                      159
360af69d88dSmrg#define ALU_OP1_MUL_IEEE_PREV                 160
361af69d88dSmrg#define ALU_OP1_ADD_PREV                      161
362af69d88dSmrg#define ALU_OP2_MULADD_PREV                   162
363af69d88dSmrg#define ALU_OP2_MULADD_IEEE_PREV              163
364af69d88dSmrg#define ALU_OP2_INTERP_XY                     164
365af69d88dSmrg#define ALU_OP2_INTERP_ZW                     165
366af69d88dSmrg#define ALU_OP2_INTERP_X                      166
367af69d88dSmrg#define ALU_OP2_INTERP_Z                      167
368af69d88dSmrg#define ALU_OP1_STORE_FLAGS                   168
369af69d88dSmrg#define ALU_OP1_LOAD_STORE_FLAGS              169
370af69d88dSmrg#define ALU_OP2_LDS_1A                        170
371af69d88dSmrg#define ALU_OP2_LDS_1A1D                      171
372af69d88dSmrg#define ALU_OP2_LDS_2A                        172
373af69d88dSmrg#define ALU_OP1_INTERP_LOAD_P0                173
374af69d88dSmrg#define ALU_OP1_INTERP_LOAD_P10               174
375af69d88dSmrg#define ALU_OP1_INTERP_LOAD_P20               175
376af69d88dSmrg#define ALU_OP3_BFE_UINT                      176
377af69d88dSmrg#define ALU_OP3_BFE_INT                       177
378af69d88dSmrg#define ALU_OP3_BFI_INT                       178
379af69d88dSmrg#define ALU_OP3_FMA                           179
380af69d88dSmrg#define ALU_OP3_MULADD_INT24                  180
381af69d88dSmrg#define ALU_OP3_CNDNE_64                      181
382af69d88dSmrg#define ALU_OP3_FMA_64                        182
383af69d88dSmrg#define ALU_OP3_LERP_UINT                     183
384af69d88dSmrg#define ALU_OP3_BIT_ALIGN_INT                 184
385af69d88dSmrg#define ALU_OP3_BYTE_ALIGN_INT                185
386af69d88dSmrg#define ALU_OP3_SAD_ACCUM_UINT                186
387af69d88dSmrg#define ALU_OP3_SAD_ACCUM_HI_UINT             187
388af69d88dSmrg#define ALU_OP3_MULADD_UINT24                 188
389af69d88dSmrg#define ALU_OP3_LDS_IDX_OP                    189
390af69d88dSmrg#define ALU_OP3_MULADD                        190
391af69d88dSmrg#define ALU_OP3_MULADD_M2                     191
392af69d88dSmrg#define ALU_OP3_MULADD_M4                     192
393af69d88dSmrg#define ALU_OP3_MULADD_D2                     193
394af69d88dSmrg#define ALU_OP3_MULADD_IEEE                   194
395af69d88dSmrg#define ALU_OP3_CNDE                          195
396af69d88dSmrg#define ALU_OP3_CNDGT                         196
397af69d88dSmrg#define ALU_OP3_CNDGE                         197
398af69d88dSmrg#define ALU_OP3_CNDE_INT                      198
399af69d88dSmrg#define ALU_OP3_CNDGT_INT                     199
400af69d88dSmrg#define ALU_OP3_CNDGE_INT                     200
401af69d88dSmrg#define ALU_OP3_MUL_LIT                       201
402af69d88dSmrg#define ALU_OP1_MOVA                          202
403af69d88dSmrg#define ALU_OP1_MOVA_FLOOR                    203
404af69d88dSmrg#define ALU_OP1_MOVA_GPR_INT                  204
405af69d88dSmrg#define ALU_OP3_MULADD_64                     205
406af69d88dSmrg#define ALU_OP3_MULADD_64_M2                  206
407af69d88dSmrg#define ALU_OP3_MULADD_64_M4                  207
408af69d88dSmrg#define ALU_OP3_MULADD_64_D2                  208
409af69d88dSmrg#define ALU_OP3_MUL_LIT_M2                    209
410af69d88dSmrg#define ALU_OP3_MUL_LIT_M4                    210
411af69d88dSmrg#define ALU_OP3_MUL_LIT_D2                    211
412af69d88dSmrg#define ALU_OP3_MULADD_IEEE_M2                212
413af69d88dSmrg#define ALU_OP3_MULADD_IEEE_M4                213
414af69d88dSmrg#define ALU_OP3_MULADD_IEEE_D2                214
415af69d88dSmrg
416af69d88dSmrg#define LDS_OP2_LDS_ADD                       215
417af69d88dSmrg#define LDS_OP2_LDS_SUB                       216
418af69d88dSmrg#define LDS_OP2_LDS_RSUB                      217
419af69d88dSmrg#define LDS_OP2_LDS_INC                       218
420af69d88dSmrg#define LDS_OP2_LDS_DEC                       219
421af69d88dSmrg#define LDS_OP2_LDS_MIN_INT                   220
422af69d88dSmrg#define LDS_OP2_LDS_MAX_INT                   221
423af69d88dSmrg#define LDS_OP2_LDS_MIN_UINT                  222
424af69d88dSmrg#define LDS_OP2_LDS_MAX_UINT                  223
425af69d88dSmrg#define LDS_OP2_LDS_AND                       224
426af69d88dSmrg#define LDS_OP2_LDS_OR                        225
427af69d88dSmrg#define LDS_OP2_LDS_XOR                       226
428af69d88dSmrg#define LDS_OP3_LDS_MSKOR                     227
429af69d88dSmrg#define LDS_OP2_LDS_WRITE                     228
430af69d88dSmrg#define LDS_OP3_LDS_WRITE_REL                 229
431af69d88dSmrg#define LDS_OP3_LDS_WRITE2                    230
432af69d88dSmrg#define LDS_OP3_LDS_CMP_STORE                 231
433af69d88dSmrg#define LDS_OP3_LDS_CMP_STORE_SPF             232
434af69d88dSmrg#define LDS_OP2_LDS_BYTE_WRITE                233
435af69d88dSmrg#define LDS_OP2_LDS_SHORT_WRITE               234
436af69d88dSmrg#define LDS_OP2_LDS_ADD_RET                   235
437af69d88dSmrg#define LDS_OP2_LDS_SUB_RET                   236
438af69d88dSmrg#define LDS_OP2_LDS_RSUB_RET                  237
439af69d88dSmrg#define LDS_OP2_LDS_INC_RET                   238
440af69d88dSmrg#define LDS_OP2_LDS_DEC_RET                   239
441af69d88dSmrg#define LDS_OP2_LDS_MIN_INT_RET               240
442af69d88dSmrg#define LDS_OP2_LDS_MAX_INT_RET               241
443af69d88dSmrg#define LDS_OP2_LDS_MIN_UINT_RET              242
444af69d88dSmrg#define LDS_OP2_LDS_MAX_UINT_RET              243
445af69d88dSmrg#define LDS_OP2_LDS_AND_RET                   244
446af69d88dSmrg#define LDS_OP2_LDS_OR_RET                    245
447af69d88dSmrg#define LDS_OP2_LDS_XOR_RET                   246
448af69d88dSmrg#define LDS_OP3_LDS_MSKOR_RET                 247
449af69d88dSmrg#define LDS_OP2_LDS_XCHG_RET                  248
450af69d88dSmrg#define LDS_OP3_LDS_XCHG_REL_RET              249
451af69d88dSmrg#define LDS_OP3_LDS_XCHG2_RET                 250
452af69d88dSmrg#define LDS_OP3_LDS_CMP_XCHG_RET              251
453af69d88dSmrg#define LDS_OP3_LDS_CMP_XCHG_SPF_RET          252
454af69d88dSmrg#define LDS_OP1_LDS_READ_RET                  253
455af69d88dSmrg#define LDS_OP1_LDS_READ_REL_RET              254
456af69d88dSmrg#define LDS_OP2_LDS_READ2_RET                 255
457af69d88dSmrg#define LDS_OP3_LDS_READWRITE_RET             256
458af69d88dSmrg#define LDS_OP1_LDS_BYTE_READ_RET             257
459af69d88dSmrg#define LDS_OP1_LDS_UBYTE_READ_RET            258
460af69d88dSmrg#define LDS_OP1_LDS_SHORT_READ_RET            259
461af69d88dSmrg#define LDS_OP1_LDS_USHORT_READ_RET           260
462af69d88dSmrg
463af69d88dSmrg#define FETCH_OP_VFETCH                           0
464af69d88dSmrg#define FETCH_OP_SEMFETCH                         1
465af69d88dSmrg#define FETCH_OP_READ_SCRATCH                     2
466af69d88dSmrg#define FETCH_OP_READ_REDUCT                      3
467af69d88dSmrg#define FETCH_OP_READ_MEM                         4
468af69d88dSmrg#define FETCH_OP_DS_LOCAL_WRITE                   5
469af69d88dSmrg#define FETCH_OP_DS_LOCAL_READ                    6
470af69d88dSmrg#define FETCH_OP_GDS_ADD                          7
471af69d88dSmrg#define FETCH_OP_GDS_SUB                          8
472af69d88dSmrg#define FETCH_OP_GDS_RSUB                         9
473af69d88dSmrg#define FETCH_OP_GDS_INC                         10
474af69d88dSmrg#define FETCH_OP_GDS_DEC                         11
475af69d88dSmrg#define FETCH_OP_GDS_MIN_INT                     12
476af69d88dSmrg#define FETCH_OP_GDS_MAX_INT                     13
477af69d88dSmrg#define FETCH_OP_GDS_MIN_UINT                    14
478af69d88dSmrg#define FETCH_OP_GDS_MAX_UINT                    15
479af69d88dSmrg#define FETCH_OP_GDS_AND                         16
480af69d88dSmrg#define FETCH_OP_GDS_OR                          17
481af69d88dSmrg#define FETCH_OP_GDS_XOR                         18
482af69d88dSmrg#define FETCH_OP_GDS_MSKOR                       19
483af69d88dSmrg#define FETCH_OP_GDS_WRITE                       20
484af69d88dSmrg#define FETCH_OP_GDS_WRITE_REL                   21
485af69d88dSmrg#define FETCH_OP_GDS_WRITE2                      22
486af69d88dSmrg#define FETCH_OP_GDS_CMP_STORE                   23
487af69d88dSmrg#define FETCH_OP_GDS_CMP_STORE_SPF               24
488af69d88dSmrg#define FETCH_OP_GDS_BYTE_WRITE                  25
489af69d88dSmrg#define FETCH_OP_GDS_SHORT_WRITE                 26
490af69d88dSmrg#define FETCH_OP_GDS_ADD_RET                     27
491af69d88dSmrg#define FETCH_OP_GDS_SUB_RET                     28
492af69d88dSmrg#define FETCH_OP_GDS_RSUB_RET                    29
493af69d88dSmrg#define FETCH_OP_GDS_INC_RET                     30
494af69d88dSmrg#define FETCH_OP_GDS_DEC_RET                     31
495af69d88dSmrg#define FETCH_OP_GDS_MIN_INT_RET                 32
496af69d88dSmrg#define FETCH_OP_GDS_MAX_INT_RET                 33
497af69d88dSmrg#define FETCH_OP_GDS_MIN_UINT_RET                34
498af69d88dSmrg#define FETCH_OP_GDS_MAX_UINT_RET                35
499af69d88dSmrg#define FETCH_OP_GDS_AND_RET                     36
500af69d88dSmrg#define FETCH_OP_GDS_OR_RET                      37
501af69d88dSmrg#define FETCH_OP_GDS_XOR_RET                     38
502af69d88dSmrg#define FETCH_OP_GDS_MSKOR_RET                   39
503af69d88dSmrg#define FETCH_OP_GDS_XCHG_RET                    40
504af69d88dSmrg#define FETCH_OP_GDS_XCHG_REL_RET                41
505af69d88dSmrg#define FETCH_OP_GDS_XCHG2_RET                   42
506af69d88dSmrg#define FETCH_OP_GDS_CMP_XCHG_RET                43
507af69d88dSmrg#define FETCH_OP_GDS_CMP_XCHG_SPF_RET            44
508af69d88dSmrg#define FETCH_OP_GDS_READ_RET                    45
509af69d88dSmrg#define FETCH_OP_GDS_READ_REL_RET                46
510af69d88dSmrg#define FETCH_OP_GDS_READ2_RET                   47
511af69d88dSmrg#define FETCH_OP_GDS_READWRITE_RET               48
512af69d88dSmrg#define FETCH_OP_GDS_BYTE_READ_RET               49
513af69d88dSmrg#define FETCH_OP_GDS_UBYTE_READ_RET              50
514af69d88dSmrg#define FETCH_OP_GDS_SHORT_READ_RET              51
515af69d88dSmrg#define FETCH_OP_GDS_USHORT_READ_RET             52
516af69d88dSmrg#define FETCH_OP_GDS_ATOMIC_ORDERED_ALLOC        53
517af69d88dSmrg#define FETCH_OP_TF_WRITE                        54
518af69d88dSmrg#define FETCH_OP_DS_GLOBAL_WRITE                 55
519af69d88dSmrg#define FETCH_OP_DS_GLOBAL_READ                  56
520af69d88dSmrg#define FETCH_OP_LD                              57
521af69d88dSmrg#define FETCH_OP_LDFPTR                          58
522af69d88dSmrg#define FETCH_OP_GET_TEXTURE_RESINFO             59
523af69d88dSmrg#define FETCH_OP_GET_NUMBER_OF_SAMPLES           60
524af69d88dSmrg#define FETCH_OP_GET_LOD                         61
525af69d88dSmrg#define FETCH_OP_GET_GRADIENTS_H                 62
526af69d88dSmrg#define FETCH_OP_GET_GRADIENTS_V                 63
527af69d88dSmrg#define FETCH_OP_GET_GRADIENTS_H_FINE            64
528af69d88dSmrg#define FETCH_OP_GET_GRADIENTS_V_FINE            65
529af69d88dSmrg#define FETCH_OP_GET_LERP                        66
530af69d88dSmrg#define FETCH_OP_SET_TEXTURE_OFFSETS             67
531af69d88dSmrg#define FETCH_OP_KEEP_GRADIENTS                  68
532af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_H                 69
533af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_V                 70
534af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_H_COARSE          71
535af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_V_COARSE          72
536af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_H_PACKED_FINE     73
537af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_V_PACKED_FINE     74
538af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_H_PACKED_COARSE   75
539af69d88dSmrg#define FETCH_OP_SET_GRADIENTS_V_PACKED_COARSE   76
540af69d88dSmrg#define FETCH_OP_PASS                            77
541af69d88dSmrg#define FETCH_OP_PASS1                           78
542af69d88dSmrg#define FETCH_OP_PASS2                           79
543af69d88dSmrg#define FETCH_OP_PASS3                           80
544af69d88dSmrg#define FETCH_OP_SET_CUBEMAP_INDEX               81
545af69d88dSmrg#define FETCH_OP_GET_BUFFER_RESINFO              82
546af69d88dSmrg#define FETCH_OP_FETCH4                          83
547af69d88dSmrg#define FETCH_OP_SAMPLE                          84
548af69d88dSmrg#define FETCH_OP_SAMPLE_L                        85
549af69d88dSmrg#define FETCH_OP_SAMPLE_LB                       86
550af69d88dSmrg#define FETCH_OP_SAMPLE_LZ                       87
551af69d88dSmrg#define FETCH_OP_SAMPLE_G                        88
552af69d88dSmrg#define FETCH_OP_SAMPLE_G_L                      89
553af69d88dSmrg#define FETCH_OP_GATHER4                         90
554af69d88dSmrg#define FETCH_OP_SAMPLE_G_LB                     91
555af69d88dSmrg#define FETCH_OP_SAMPLE_G_LZ                     92
556af69d88dSmrg#define FETCH_OP_GATHER4_O                       93
557af69d88dSmrg#define FETCH_OP_SAMPLE_C                        94
558af69d88dSmrg#define FETCH_OP_SAMPLE_C_L                      95
559af69d88dSmrg#define FETCH_OP_SAMPLE_C_LB                     96
560af69d88dSmrg#define FETCH_OP_SAMPLE_C_LZ                     97
561af69d88dSmrg#define FETCH_OP_SAMPLE_C_G                      98
562af69d88dSmrg#define FETCH_OP_SAMPLE_C_G_L                    99
563af69d88dSmrg#define FETCH_OP_GATHER4_C                      100
564af69d88dSmrg#define FETCH_OP_SAMPLE_C_G_LB                  101
565af69d88dSmrg#define FETCH_OP_SAMPLE_C_G_LZ                  102
566af69d88dSmrg#define FETCH_OP_GATHER4_C_O                    103
567af69d88dSmrg
568af69d88dSmrg#define CF_OP_NOP                           0
569af69d88dSmrg#define CF_OP_TEX                           1
570af69d88dSmrg#define CF_OP_VTX                           2
571af69d88dSmrg#define CF_OP_VTX_TC                        3
572af69d88dSmrg#define CF_OP_GDS                           4
573af69d88dSmrg#define CF_OP_LOOP_START                    5
574af69d88dSmrg#define CF_OP_LOOP_END                      6
575af69d88dSmrg#define CF_OP_LOOP_START_DX10               7
576af69d88dSmrg#define CF_OP_LOOP_START_NO_AL              8
577af69d88dSmrg#define CF_OP_LOOP_CONTINUE                 9
578af69d88dSmrg#define CF_OP_LOOP_BREAK                   10
579af69d88dSmrg#define CF_OP_JUMP                         11
580af69d88dSmrg#define CF_OP_PUSH                         12
581af69d88dSmrg#define CF_OP_PUSH_ELSE                    13
582af69d88dSmrg#define CF_OP_ELSE                         14
583af69d88dSmrg#define CF_OP_POP                          15
584af69d88dSmrg#define CF_OP_POP_JUMP                     16
585af69d88dSmrg#define CF_OP_POP_PUSH                     17
586af69d88dSmrg#define CF_OP_POP_PUSH_ELSE                18
587af69d88dSmrg#define CF_OP_CALL                         19
588af69d88dSmrg#define CF_OP_CALL_FS                      20
589af69d88dSmrg#define CF_OP_RET                          21
590af69d88dSmrg#define CF_OP_EMIT_VERTEX                  22
591af69d88dSmrg#define CF_OP_EMIT_CUT_VERTEX              23
592af69d88dSmrg#define CF_OP_CUT_VERTEX                   24
593af69d88dSmrg#define CF_OP_KILL                         25
594af69d88dSmrg#define CF_OP_END_PROGRAM                  26
595af69d88dSmrg#define CF_OP_WAIT_ACK                     27
596af69d88dSmrg#define CF_OP_TEX_ACK                      28
597af69d88dSmrg#define CF_OP_VTX_ACK                      29
598af69d88dSmrg#define CF_OP_VTX_TC_ACK                   30
599af69d88dSmrg#define CF_OP_JUMPTABLE                    31
600af69d88dSmrg#define CF_OP_WAVE_SYNC                    32
601af69d88dSmrg#define CF_OP_HALT                         33
602af69d88dSmrg#define CF_OP_CF_END                       34
603af69d88dSmrg#define CF_OP_LDS_DEALLOC                  35
604af69d88dSmrg#define CF_OP_PUSH_WQM                     36
605af69d88dSmrg#define CF_OP_POP_WQM                      37
606af69d88dSmrg#define CF_OP_ELSE_WQM                     38
607af69d88dSmrg#define CF_OP_JUMP_ANY                     39
608af69d88dSmrg#define CF_OP_REACTIVATE                   40
609af69d88dSmrg#define CF_OP_REACTIVATE_WQM               41
610af69d88dSmrg#define CF_OP_INTERRUPT                    42
611af69d88dSmrg#define CF_OP_INTERRUPT_AND_SLEEP          43
612af69d88dSmrg#define CF_OP_SET_PRIORITY                 44
613af69d88dSmrg#define CF_OP_MEM_STREAM0_BUF0             45
614af69d88dSmrg#define CF_OP_MEM_STREAM0_BUF1             46
615af69d88dSmrg#define CF_OP_MEM_STREAM0_BUF2             47
616af69d88dSmrg#define CF_OP_MEM_STREAM0_BUF3             48
617af69d88dSmrg#define CF_OP_MEM_STREAM1_BUF0             49
618af69d88dSmrg#define CF_OP_MEM_STREAM1_BUF1             50
619af69d88dSmrg#define CF_OP_MEM_STREAM1_BUF2             51
620af69d88dSmrg#define CF_OP_MEM_STREAM1_BUF3             52
621af69d88dSmrg#define CF_OP_MEM_STREAM2_BUF0             53
622af69d88dSmrg#define CF_OP_MEM_STREAM2_BUF1             54
623af69d88dSmrg#define CF_OP_MEM_STREAM2_BUF2             55
624af69d88dSmrg#define CF_OP_MEM_STREAM2_BUF3             56
625af69d88dSmrg#define CF_OP_MEM_STREAM3_BUF0             57
626af69d88dSmrg#define CF_OP_MEM_STREAM3_BUF1             58
627af69d88dSmrg#define CF_OP_MEM_STREAM3_BUF2             59
628af69d88dSmrg#define CF_OP_MEM_STREAM3_BUF3             60
629af69d88dSmrg#define CF_OP_MEM_STREAM0                  61
630af69d88dSmrg#define CF_OP_MEM_STREAM1                  62
631af69d88dSmrg#define CF_OP_MEM_STREAM2                  63
632af69d88dSmrg#define CF_OP_MEM_STREAM3                  64
633af69d88dSmrg#define CF_OP_MEM_SCRATCH                  65
634af69d88dSmrg#define CF_OP_MEM_REDUCT                   66
635af69d88dSmrg#define CF_OP_MEM_RING                     67
636af69d88dSmrg#define CF_OP_EXPORT                       68
637af69d88dSmrg#define CF_OP_EXPORT_DONE                  69
638af69d88dSmrg#define CF_OP_MEM_EXPORT                   70
639af69d88dSmrg#define CF_OP_MEM_RAT                      71
640af69d88dSmrg#define CF_OP_MEM_RAT_NOCACHE              72
641af69d88dSmrg#define CF_OP_MEM_RING1                    73
642af69d88dSmrg#define CF_OP_MEM_RING2                    74
643af69d88dSmrg#define CF_OP_MEM_RING3                    75
644af69d88dSmrg#define CF_OP_MEM_MEM_COMBINED             76
645af69d88dSmrg#define CF_OP_MEM_RAT_COMBINED_NOCACHE     77
646af69d88dSmrg#define CF_OP_MEM_RAT_COMBINED             78
647af69d88dSmrg#define CF_OP_EXPORT_DONE_END              79
648af69d88dSmrg#define CF_OP_ALU                          80
649af69d88dSmrg#define CF_OP_ALU_PUSH_BEFORE              81
650af69d88dSmrg#define CF_OP_ALU_POP_AFTER                82
651af69d88dSmrg#define CF_OP_ALU_POP2_AFTER               83
652af69d88dSmrg#define CF_OP_ALU_EXT                      84
653af69d88dSmrg#define CF_OP_ALU_CONTINUE                 85
654af69d88dSmrg#define CF_OP_ALU_BREAK                    86
6557e995a2eSmrg#define CF_OP_ALU_VALID_PIXEL_MODE         87
6567e995a2eSmrg#define CF_OP_ALU_ELSE_AFTER               88
657af69d88dSmrg
658af69d88dSmrg/* CF_NATIVE means that r600_bytecode_cf contains pre-encoded native data */
6597e995a2eSmrg#define CF_NATIVE                          89
660af69d88dSmrg
661af69d88dSmrgenum r600_chip_class {
662af69d88dSmrg	ISA_CC_R600,
663af69d88dSmrg	ISA_CC_R700,
664af69d88dSmrg	ISA_CC_EVERGREEN,
665af69d88dSmrg	ISA_CC_CAYMAN
666af69d88dSmrg};
667af69d88dSmrg
668af69d88dSmrgstruct r600_isa {
669af69d88dSmrg	enum r600_chip_class hw_class;
670af69d88dSmrg
671af69d88dSmrg	/* these arrays provide reverse mapping - opcode => table_index,
672af69d88dSmrg	 * typically we don't need such lookup, unless we are decoding the native
673af69d88dSmrg	 * bytecode (e.g. when reading the bytestream from llvm backend) */
674af69d88dSmrg	unsigned *alu_op2_map;
675af69d88dSmrg	unsigned *alu_op3_map;
676af69d88dSmrg	unsigned *fetch_map;
677af69d88dSmrg	unsigned *cf_map;
678af69d88dSmrg};
679af69d88dSmrg
680af69d88dSmrgstruct r600_context;
681af69d88dSmrg
682af69d88dSmrgint r600_isa_init(struct r600_context *ctx, struct r600_isa *isa);
683af69d88dSmrgint r600_isa_destroy(struct r600_isa *isa);
684af69d88dSmrg
6857e995a2eSmrgextern const struct alu_op_info r600_alu_op_table[];
686af69d88dSmrg
6877e995a2eSmrgunsigned
6887e995a2eSmrgr600_alu_op_table_size(void);
689af69d88dSmrg
6907e995a2eSmrgconst struct alu_op_info *
6917e995a2eSmrgr600_isa_alu(unsigned op);
692af69d88dSmrg
6937e995a2eSmrgconst struct fetch_op_info *
6947e995a2eSmrgr600_isa_fetch(unsigned op);
6957e995a2eSmrg
6967e995a2eSmrgconst struct cf_op_info *
6977e995a2eSmrgr600_isa_cf(unsigned op);
698af69d88dSmrg
699af69d88dSmrgstatic inline unsigned
700af69d88dSmrgr600_isa_alu_opcode(enum r600_chip_class chip_class, unsigned op) {
701af69d88dSmrg	int opc =  r600_isa_alu(op)->opcode[chip_class >> 1];
702af69d88dSmrg	assert(opc != -1);
703af69d88dSmrg	return opc;
704af69d88dSmrg}
705af69d88dSmrg
706af69d88dSmrgstatic inline unsigned
707af69d88dSmrgr600_isa_alu_slots(enum r600_chip_class chip_class, unsigned op) {
708af69d88dSmrg	unsigned slots = r600_isa_alu(op)->slots[chip_class];
709af69d88dSmrg	assert(slots != 0);
710af69d88dSmrg	return slots;
711af69d88dSmrg}
712af69d88dSmrg
713af69d88dSmrgstatic inline unsigned
714af69d88dSmrgr600_isa_fetch_opcode(enum r600_chip_class chip_class, unsigned op) {
715af69d88dSmrg	int opc = r600_isa_fetch(op)->opcode[chip_class];
716af69d88dSmrg	assert(opc != -1);
717af69d88dSmrg	return opc;
718af69d88dSmrg}
719af69d88dSmrg
720af69d88dSmrgstatic inline unsigned
721af69d88dSmrgr600_isa_cf_opcode(enum r600_chip_class chip_class, unsigned op) {
722af69d88dSmrg	int opc = r600_isa_cf(op)->opcode[chip_class];
723af69d88dSmrg	assert(opc != -1);
724af69d88dSmrg	return opc;
725af69d88dSmrg}
726af69d88dSmrg
727af69d88dSmrgstatic inline unsigned
728af69d88dSmrgr600_isa_alu_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_op3) {
729af69d88dSmrg	unsigned op;
730af69d88dSmrg	if (is_op3) {
731af69d88dSmrg		assert(isa->alu_op3_map);
732af69d88dSmrg		op = isa->alu_op3_map[opcode];
733af69d88dSmrg	} else {
734af69d88dSmrg		assert(isa->alu_op2_map);
735af69d88dSmrg		op = isa->alu_op2_map[opcode];
736af69d88dSmrg	}
737af69d88dSmrg	assert(op);
738af69d88dSmrg	return op - 1;
739af69d88dSmrg}
740af69d88dSmrg
741af69d88dSmrgstatic inline unsigned
742af69d88dSmrgr600_isa_fetch_by_opcode(struct r600_isa* isa, unsigned opcode) {
743af69d88dSmrg	unsigned op;
744af69d88dSmrg	assert(isa->fetch_map);
745af69d88dSmrg	op = isa->fetch_map[opcode];
746af69d88dSmrg	assert(op);
747af69d88dSmrg	return op - 1;
748af69d88dSmrg}
749af69d88dSmrg
750af69d88dSmrgstatic inline unsigned
751af69d88dSmrgr600_isa_cf_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_alu) {
752af69d88dSmrg	unsigned op;
753af69d88dSmrg	assert(isa->cf_map);
754af69d88dSmrg	/* using offset for CF_ALU_xxx opcodes because they overlap with other
755af69d88dSmrg	 * CF opcodes (they use different encoding in hw) */
756af69d88dSmrg	op = isa->cf_map[is_alu ? opcode + 0x80 : opcode];
757af69d88dSmrg	assert(op);
758af69d88dSmrg	return op - 1;
759af69d88dSmrg}
760af69d88dSmrg
7617e995a2eSmrg#ifdef __cplusplus
7627e995a2eSmrg} /* extern "C" */
7637e995a2eSmrg#endif
7647e995a2eSmrg
765af69d88dSmrg#endif /* R600_ISA_H_ */
766