1/********************************************************** 2 * Copyright 1998-2017 VMware, Inc. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person 5 * obtaining a copy of this software and associated documentation 6 * files (the "Software"), to deal in the Software without 7 * restriction, including without limitation the rights to use, copy, 8 * modify, merge, publish, distribute, sublicense, and/or sell copies 9 * of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be 13 * included in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 * 24 **********************************************************/ 25 26/* 27 * svga3d_cmd.h -- 28 * 29 * SVGA 3d hardware cmd definitions 30 */ 31 32#ifndef _SVGA3D_CMD_H_ 33#define _SVGA3D_CMD_H_ 34 35#define INCLUDE_ALLOW_MODULE 36#define INCLUDE_ALLOW_USERLEVEL 37#define INCLUDE_ALLOW_VMCORE 38 39#include "includeCheck.h" 40#include "svga3d_types.h" 41#include "svga3d_limits.h" 42 43/* 44 * Identifiers for commands in the command FIFO. 45 * 46 * IDs between 1000 and 1039 (inclusive) were used by obsolete versions of 47 * the SVGA3D protocol and remain reserved; they should not be used in the 48 * future. 49 * 50 * IDs between 1040 and 2999 (inclusive) are available for use by the 51 * current SVGA3D protocol. 52 * 53 * FIFO clients other than SVGA3D should stay below 1000, or at 3000 54 * and up. 55 */ 56 57typedef enum { 58 SVGA_3D_CMD_LEGACY_BASE = 1000, 59 SVGA_3D_CMD_BASE = 1040, 60 61 SVGA_3D_CMD_SURFACE_DEFINE = 1040, 62 SVGA_3D_CMD_SURFACE_DESTROY = 1041, 63 SVGA_3D_CMD_SURFACE_COPY = 1042, 64 SVGA_3D_CMD_SURFACE_STRETCHBLT = 1043, 65 SVGA_3D_CMD_SURFACE_DMA = 1044, 66 SVGA_3D_CMD_CONTEXT_DEFINE = 1045, 67 SVGA_3D_CMD_CONTEXT_DESTROY = 1046, 68 SVGA_3D_CMD_SETTRANSFORM = 1047, 69 SVGA_3D_CMD_SETZRANGE = 1048, 70 SVGA_3D_CMD_SETRENDERSTATE = 1049, 71 SVGA_3D_CMD_SETRENDERTARGET = 1050, 72 SVGA_3D_CMD_SETTEXTURESTATE = 1051, 73 SVGA_3D_CMD_SETMATERIAL = 1052, 74 SVGA_3D_CMD_SETLIGHTDATA = 1053, 75 SVGA_3D_CMD_SETLIGHTENABLED = 1054, 76 SVGA_3D_CMD_SETVIEWPORT = 1055, 77 SVGA_3D_CMD_SETCLIPPLANE = 1056, 78 SVGA_3D_CMD_CLEAR = 1057, 79 SVGA_3D_CMD_PRESENT = 1058, 80 SVGA_3D_CMD_SHADER_DEFINE = 1059, 81 SVGA_3D_CMD_SHADER_DESTROY = 1060, 82 SVGA_3D_CMD_SET_SHADER = 1061, 83 SVGA_3D_CMD_SET_SHADER_CONST = 1062, 84 SVGA_3D_CMD_DRAW_PRIMITIVES = 1063, 85 SVGA_3D_CMD_SETSCISSORRECT = 1064, 86 SVGA_3D_CMD_BEGIN_QUERY = 1065, 87 SVGA_3D_CMD_END_QUERY = 1066, 88 SVGA_3D_CMD_WAIT_FOR_QUERY = 1067, 89 SVGA_3D_CMD_PRESENT_READBACK = 1068, 90 SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN = 1069, 91 SVGA_3D_CMD_SURFACE_DEFINE_V2 = 1070, 92 SVGA_3D_CMD_GENERATE_MIPMAPS = 1071, 93 SVGA_3D_CMD_DEAD4 = 1072, 94 SVGA_3D_CMD_DEAD5 = 1073, 95 SVGA_3D_CMD_DEAD6 = 1074, 96 SVGA_3D_CMD_DEAD7 = 1075, 97 SVGA_3D_CMD_DEAD8 = 1076, 98 SVGA_3D_CMD_DEAD9 = 1077, 99 SVGA_3D_CMD_DEAD10 = 1078, 100 SVGA_3D_CMD_DEAD11 = 1079, 101 SVGA_3D_CMD_ACTIVATE_SURFACE = 1080, 102 SVGA_3D_CMD_DEACTIVATE_SURFACE = 1081, 103 SVGA_3D_CMD_SCREEN_DMA = 1082, 104 SVGA_3D_CMD_DEAD1 = 1083, 105 SVGA_3D_CMD_DEAD2 = 1084, 106 107 SVGA_3D_CMD_DEAD12 = 1085, 108 SVGA_3D_CMD_DEAD13 = 1086, 109 SVGA_3D_CMD_DEAD14 = 1087, 110 SVGA_3D_CMD_DEAD15 = 1088, 111 SVGA_3D_CMD_DEAD16 = 1089, 112 SVGA_3D_CMD_DEAD17 = 1090, 113 114 SVGA_3D_CMD_SET_OTABLE_BASE = 1091, 115 SVGA_3D_CMD_READBACK_OTABLE = 1092, 116 117 SVGA_3D_CMD_DEFINE_GB_MOB = 1093, 118 SVGA_3D_CMD_DESTROY_GB_MOB = 1094, 119 SVGA_3D_CMD_DEAD3 = 1095, 120 SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING = 1096, 121 122 SVGA_3D_CMD_DEFINE_GB_SURFACE = 1097, 123 SVGA_3D_CMD_DESTROY_GB_SURFACE = 1098, 124 SVGA_3D_CMD_BIND_GB_SURFACE = 1099, 125 SVGA_3D_CMD_COND_BIND_GB_SURFACE = 1100, 126 SVGA_3D_CMD_UPDATE_GB_IMAGE = 1101, 127 SVGA_3D_CMD_UPDATE_GB_SURFACE = 1102, 128 SVGA_3D_CMD_READBACK_GB_IMAGE = 1103, 129 SVGA_3D_CMD_READBACK_GB_SURFACE = 1104, 130 SVGA_3D_CMD_INVALIDATE_GB_IMAGE = 1105, 131 SVGA_3D_CMD_INVALIDATE_GB_SURFACE = 1106, 132 133 SVGA_3D_CMD_DEFINE_GB_CONTEXT = 1107, 134 SVGA_3D_CMD_DESTROY_GB_CONTEXT = 1108, 135 SVGA_3D_CMD_BIND_GB_CONTEXT = 1109, 136 SVGA_3D_CMD_READBACK_GB_CONTEXT = 1110, 137 SVGA_3D_CMD_INVALIDATE_GB_CONTEXT = 1111, 138 139 SVGA_3D_CMD_DEFINE_GB_SHADER = 1112, 140 SVGA_3D_CMD_DESTROY_GB_SHADER = 1113, 141 SVGA_3D_CMD_BIND_GB_SHADER = 1114, 142 143 SVGA_3D_CMD_SET_OTABLE_BASE64 = 1115, 144 145 SVGA_3D_CMD_BEGIN_GB_QUERY = 1116, 146 SVGA_3D_CMD_END_GB_QUERY = 1117, 147 SVGA_3D_CMD_WAIT_FOR_GB_QUERY = 1118, 148 149 SVGA_3D_CMD_NOP = 1119, 150 151 SVGA_3D_CMD_ENABLE_GART = 1120, 152 SVGA_3D_CMD_DISABLE_GART = 1121, 153 SVGA_3D_CMD_MAP_MOB_INTO_GART = 1122, 154 SVGA_3D_CMD_UNMAP_GART_RANGE = 1123, 155 156 SVGA_3D_CMD_DEFINE_GB_SCREENTARGET = 1124, 157 SVGA_3D_CMD_DESTROY_GB_SCREENTARGET = 1125, 158 SVGA_3D_CMD_BIND_GB_SCREENTARGET = 1126, 159 SVGA_3D_CMD_UPDATE_GB_SCREENTARGET = 1127, 160 161 SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL = 1128, 162 SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL = 1129, 163 164 SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE = 1130, 165 166 SVGA_3D_CMD_GB_SCREEN_DMA = 1131, 167 SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH = 1132, 168 SVGA_3D_CMD_GB_MOB_FENCE = 1133, 169 SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 = 1134, 170 SVGA_3D_CMD_DEFINE_GB_MOB64 = 1135, 171 SVGA_3D_CMD_REDEFINE_GB_MOB64 = 1136, 172 SVGA_3D_CMD_NOP_ERROR = 1137, 173 174 SVGA_3D_CMD_SET_VERTEX_STREAMS = 1138, 175 SVGA_3D_CMD_SET_VERTEX_DECLS = 1139, 176 SVGA_3D_CMD_SET_VERTEX_DIVISORS = 1140, 177 SVGA_3D_CMD_DRAW = 1141, 178 SVGA_3D_CMD_DRAW_INDEXED = 1142, 179 180 /* 181 * DX10 Commands 182 */ 183 SVGA_3D_CMD_DX_MIN = 1143, 184 SVGA_3D_CMD_DX_DEFINE_CONTEXT = 1143, 185 SVGA_3D_CMD_DX_DESTROY_CONTEXT = 1144, 186 SVGA_3D_CMD_DX_BIND_CONTEXT = 1145, 187 SVGA_3D_CMD_DX_READBACK_CONTEXT = 1146, 188 SVGA_3D_CMD_DX_INVALIDATE_CONTEXT = 1147, 189 SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER = 1148, 190 SVGA_3D_CMD_DX_SET_SHADER_RESOURCES = 1149, 191 SVGA_3D_CMD_DX_SET_SHADER = 1150, 192 SVGA_3D_CMD_DX_SET_SAMPLERS = 1151, 193 SVGA_3D_CMD_DX_DRAW = 1152, 194 SVGA_3D_CMD_DX_DRAW_INDEXED = 1153, 195 SVGA_3D_CMD_DX_DRAW_INSTANCED = 1154, 196 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED = 1155, 197 SVGA_3D_CMD_DX_DRAW_AUTO = 1156, 198 SVGA_3D_CMD_DX_SET_INPUT_LAYOUT = 1157, 199 SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS = 1158, 200 SVGA_3D_CMD_DX_SET_INDEX_BUFFER = 1159, 201 SVGA_3D_CMD_DX_SET_TOPOLOGY = 1160, 202 SVGA_3D_CMD_DX_SET_RENDERTARGETS = 1161, 203 SVGA_3D_CMD_DX_SET_BLEND_STATE = 1162, 204 SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE = 1163, 205 SVGA_3D_CMD_DX_SET_RASTERIZER_STATE = 1164, 206 SVGA_3D_CMD_DX_DEFINE_QUERY = 1165, 207 SVGA_3D_CMD_DX_DESTROY_QUERY = 1166, 208 SVGA_3D_CMD_DX_BIND_QUERY = 1167, 209 SVGA_3D_CMD_DX_SET_QUERY_OFFSET = 1168, 210 SVGA_3D_CMD_DX_BEGIN_QUERY = 1169, 211 SVGA_3D_CMD_DX_END_QUERY = 1170, 212 SVGA_3D_CMD_DX_READBACK_QUERY = 1171, 213 SVGA_3D_CMD_DX_SET_PREDICATION = 1172, 214 SVGA_3D_CMD_DX_SET_SOTARGETS = 1173, 215 SVGA_3D_CMD_DX_SET_VIEWPORTS = 1174, 216 SVGA_3D_CMD_DX_SET_SCISSORRECTS = 1175, 217 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW = 1176, 218 SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW = 1177, 219 SVGA_3D_CMD_DX_PRED_COPY_REGION = 1178, 220 SVGA_3D_CMD_DX_PRED_COPY = 1179, 221 SVGA_3D_CMD_DX_PRESENTBLT = 1180, 222 SVGA_3D_CMD_DX_GENMIPS = 1181, 223 SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE = 1182, 224 SVGA_3D_CMD_DX_READBACK_SUBRESOURCE = 1183, 225 SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE = 1184, 226 SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW = 1185, 227 SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW = 1186, 228 SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW = 1187, 229 SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW = 1188, 230 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW = 1189, 231 SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW = 1190, 232 SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT = 1191, 233 SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT = 1192, 234 SVGA_3D_CMD_DX_DEFINE_BLEND_STATE = 1193, 235 SVGA_3D_CMD_DX_DESTROY_BLEND_STATE = 1194, 236 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE = 1195, 237 SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE = 1196, 238 SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE = 1197, 239 SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE = 1198, 240 SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE = 1199, 241 SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE = 1200, 242 SVGA_3D_CMD_DX_DEFINE_SHADER = 1201, 243 SVGA_3D_CMD_DX_DESTROY_SHADER = 1202, 244 SVGA_3D_CMD_DX_BIND_SHADER = 1203, 245 SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT = 1204, 246 SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT = 1205, 247 SVGA_3D_CMD_DX_SET_STREAMOUTPUT = 1206, 248 SVGA_3D_CMD_DX_SET_COTABLE = 1207, 249 SVGA_3D_CMD_DX_READBACK_COTABLE = 1208, 250 SVGA_3D_CMD_DX_BUFFER_COPY = 1209, 251 SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER = 1210, 252 SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK = 1211, 253 SVGA_3D_CMD_DX_MOVE_QUERY = 1212, 254 SVGA_3D_CMD_DX_BIND_ALL_QUERY = 1213, 255 SVGA_3D_CMD_DX_READBACK_ALL_QUERY = 1214, 256 SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER = 1215, 257 SVGA_3D_CMD_DX_MOB_FENCE_64 = 1216, 258 SVGA_3D_CMD_DX_BIND_ALL_SHADER = 1217, 259 SVGA_3D_CMD_DX_HINT = 1218, 260 SVGA_3D_CMD_DX_BUFFER_UPDATE = 1219, 261 SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET = 1220, 262 SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET = 1221, 263 SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET = 1222, 264 SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET = 1223, 265 SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET = 1224, 266 SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET = 1225, 267 268 SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER = 1226, 269 SVGA_3D_CMD_DX_MAX = 1227, 270 271 SVGA_3D_CMD_SCREEN_COPY = 1227, 272 273 SVGA_3D_CMD_VIDEO_DEFINE_DECODER = 1228, 274 SVGA_3D_CMD_VIDEO_DESTROY_DECODER = 1229, 275 SVGA_3D_CMD_VIDEO_DEFINE_PROCESSOR = 1230, 276 SVGA_3D_CMD_VIDEO_DESTROY_PROCESSOR = 1231, 277 SVGA_3D_CMD_VIDEO_DECODE_FRAME = 1232, 278 SVGA_3D_CMD_VIDEO_PROCESS_FRAME = 1233, 279 SVGA_3D_CMD_VIDEO_BIND_DECODER_MOB = 1234, 280 SVGA_3D_CMD_VIDEO_READBACK_DECODER_MOB = 1235, 281 282 SVGA_3D_CMD_GROW_OTABLE = 1236, 283 SVGA_3D_CMD_DX_GROW_COTABLE = 1237, 284 SVGA_3D_CMD_INTRA_SURFACE_COPY = 1238, 285 286 SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 = 1239, 287 288 SVGA_3D_CMD_DX_RESOLVE_COPY = 1240, 289 SVGA_3D_CMD_DX_PRED_RESOLVE_COPY = 1241, 290 SVGA_3D_CMD_DX_PRED_CONVERT_REGION = 1242, 291 SVGA_3D_CMD_DX_PRED_CONVERT = 1243, 292 SVGA_3D_CMD_WHOLE_SURFACE_COPY = 1244, 293 294 SVGA_3D_CMD_DX_DEFINE_UA_VIEW = 1245, 295 SVGA_3D_CMD_DX_DESTROY_UA_VIEW = 1246, 296 SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT = 1247, 297 SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT = 1248, 298 SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT = 1249, 299 SVGA_3D_CMD_DX_SET_UA_VIEWS = 1250, 300 301 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT = 1251, 302 SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT = 1252, 303 SVGA_3D_CMD_DX_DISPATCH = 1253, 304 SVGA_3D_CMD_DX_DISPATCH_INDIRECT = 1254, 305 306 SVGA_3D_CMD_WRITE_ZERO_SURFACE = 1255, 307 SVGA_3D_CMD_HINT_ZERO_SURFACE = 1256, 308 SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER = 1257, 309 SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT = 1258, 310 311 SVGA_3D_CMD_LOGICOPS_BITBLT = 1259, 312 SVGA_3D_CMD_LOGICOPS_TRANSBLT = 1260, 313 SVGA_3D_CMD_LOGICOPS_STRETCHBLT = 1261, 314 SVGA_3D_CMD_LOGICOPS_COLORFILL = 1262, 315 SVGA_3D_CMD_LOGICOPS_ALPHABLEND = 1263, 316 SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND = 1264, 317 318 SVGA_3D_CMD_DX_COPY_COTABLE_INTO_MOB = 1265, 319 320 SVGA_3D_CMD_UPDATE_GB_SCREENTARGET_V2 = 1266, 321 SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 = 1267, 322 SVGA_3D_CMD_DX_SET_CS_UA_VIEWS = 1268, 323 SVGA_3D_CMD_DX_SET_MIN_LOD = 1269, 324 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW_BOX = 1270, 325 SVGA_3D_CMD_DX_CLEAR_UA_VIEW_BOX = 1271, 326 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2 = 1272, 327 SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB = 1273, 328 SVGA_3D_CMD_DX_SET_SHADER_IFACE = 1274, 329 SVGA_3D_CMD_DX_BIND_STREAMOUTPUT = 1275, 330 331 SVGA_3D_CMD_MAX = 1276, 332 SVGA_3D_CMD_FUTURE_MAX = 3000 333} SVGAFifo3dCmdId; 334 335/* 336 * FIFO command format definitions: 337 */ 338 339/* 340 * The data size header following cmdNum for every 3d command 341 */ 342typedef 343#include "vmware_pack_begin.h" 344struct { 345 uint32 id; 346 uint32 size; 347} 348#include "vmware_pack_end.h" 349SVGA3dCmdHeader; 350 351typedef 352#include "vmware_pack_begin.h" 353struct { 354 uint32 numMipLevels; 355} 356#include "vmware_pack_end.h" 357SVGA3dSurfaceFace; 358 359typedef 360#include "vmware_pack_begin.h" 361struct { 362 uint32 sid; 363 SVGA3dSurface1Flags surfaceFlags; 364 SVGA3dSurfaceFormat format; 365 366 /* 367 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace 368 * structures must have the same value of numMipLevels field. 369 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the 370 * numMipLevels set to 0. 371 */ 372 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES]; 373 374 /* 375 * Followed by an SVGA3dSize structure for each mip level in each face. 376 * 377 * A note on surface sizes: Sizes are always specified in pixels, 378 * even if the true surface size is not a multiple of the minimum 379 * block size of the surface's format. For example, a 3x3x1 DXT1 380 * compressed texture would actually be stored as a 4x4x1 image in 381 * memory. 382 */ 383} 384#include "vmware_pack_end.h" 385SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */ 386 387typedef 388#include "vmware_pack_begin.h" 389struct { 390 uint32 sid; 391 SVGA3dSurface1Flags surfaceFlags; 392 SVGA3dSurfaceFormat format; 393 394 /* 395 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace 396 * structures must have the same value of numMipLevels field. 397 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the 398 * numMipLevels set to 0. 399 */ 400 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES]; 401 uint32 multisampleCount; 402 SVGA3dTextureFilter autogenFilter; 403 404 /* 405 * Followed by an SVGA3dSize structure for each mip level in each face. 406 * 407 * A note on surface sizes: Sizes are always specified in pixels, 408 * even if the true surface size is not a multiple of the minimum 409 * block size of the surface's format. For example, a 3x3x1 DXT1 410 * compressed texture would actually be stored as a 4x4x1 image in 411 * memory. 412 */ 413} 414#include "vmware_pack_end.h" 415SVGA3dCmdDefineSurface_v2; /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */ 416 417typedef 418#include "vmware_pack_begin.h" 419struct { 420 uint32 sid; 421} 422#include "vmware_pack_end.h" 423SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */ 424 425typedef 426#include "vmware_pack_begin.h" 427struct { 428 uint32 cid; 429} 430#include "vmware_pack_end.h" 431SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */ 432 433typedef 434#include "vmware_pack_begin.h" 435struct { 436 uint32 cid; 437} 438#include "vmware_pack_end.h" 439SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */ 440 441typedef 442#include "vmware_pack_begin.h" 443struct { 444 uint32 cid; 445 SVGA3dClearFlag clearFlag; 446 uint32 color; 447 float depth; 448 uint32 stencil; 449 /* Followed by variable number of SVGA3dRect structures */ 450} 451#include "vmware_pack_end.h" 452SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */ 453 454typedef 455#include "vmware_pack_begin.h" 456struct { 457 SVGA3dLightType type; 458 SVGA3dBool inWorldSpace; 459 float diffuse[4]; 460 float specular[4]; 461 float ambient[4]; 462 float position[4]; 463 float direction[4]; 464 float range; 465 float falloff; 466 float attenuation0; 467 float attenuation1; 468 float attenuation2; 469 float theta; 470 float phi; 471} 472#include "vmware_pack_end.h" 473SVGA3dLightData; 474 475typedef 476#include "vmware_pack_begin.h" 477struct { 478 uint32 sid; 479 /* Followed by variable number of SVGA3dCopyRect structures */ 480} 481#include "vmware_pack_end.h" 482SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */ 483 484typedef 485#include "vmware_pack_begin.h" 486struct { 487 SVGA3dRenderStateName state; 488 union { 489 uint32 uintValue; 490 float floatValue; 491 }; 492} 493#include "vmware_pack_end.h" 494SVGA3dRenderState; 495 496typedef 497#include "vmware_pack_begin.h" 498struct { 499 uint32 cid; 500 /* Followed by variable number of SVGA3dRenderState structures */ 501} 502#include "vmware_pack_end.h" 503SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */ 504 505typedef 506#include "vmware_pack_begin.h" 507struct { 508 uint32 cid; 509 SVGA3dRenderTargetType type; 510 SVGA3dSurfaceImageId target; 511} 512#include "vmware_pack_end.h" 513SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */ 514 515typedef 516#include "vmware_pack_begin.h" 517struct { 518 SVGA3dSurfaceImageId src; 519 SVGA3dSurfaceImageId dest; 520 /* Followed by variable number of SVGA3dCopyBox structures */ 521} 522#include "vmware_pack_end.h" 523SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */ 524 525/* 526 * Perform a surface copy within the same image. 527 * The src/dest boxes are allowed to overlap. 528 */ 529typedef 530#include "vmware_pack_begin.h" 531struct { 532 SVGA3dSurfaceImageId surface; 533 SVGA3dCopyBox box; 534} 535#include "vmware_pack_end.h" 536SVGA3dCmdIntraSurfaceCopy; /* SVGA_3D_CMD_INTRA_SURFACE_COPY */ 537 538typedef 539#include "vmware_pack_begin.h" 540struct { 541 SVGA3dSurfaceImageId src; 542 SVGA3dSurfaceImageId dest; 543 SVGA3dBox boxSrc; 544 SVGA3dBox boxDest; 545 SVGA3dStretchBltMode mode; 546} 547#include "vmware_pack_end.h" 548SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */ 549 550typedef 551#include "vmware_pack_begin.h" 552struct { 553 /* 554 * If the discard flag is present in a surface DMA operation, the host may 555 * discard the contents of the current mipmap level and face of the target 556 * surface before applying the surface DMA contents. 557 */ 558 uint32 discard : 1; 559 560 /* 561 * If the unsynchronized flag is present, the host may perform this upload 562 * without syncing to pending reads on this surface. 563 */ 564 uint32 unsynchronized : 1; 565 566 /* 567 * Guests *MUST* set the reserved bits to 0 before submitting the command 568 * suffix as future flags may occupy these bits. 569 */ 570 uint32 reserved : 30; 571} 572#include "vmware_pack_end.h" 573SVGA3dSurfaceDMAFlags; 574 575typedef 576#include "vmware_pack_begin.h" 577struct { 578 SVGAGuestImage guest; 579 SVGA3dSurfaceImageId host; 580 SVGA3dTransferType transfer; 581 582 /* 583 * Followed by variable number of SVGA3dCopyBox structures. For consistency 584 * in all clipping logic and coordinate translation, we define the 585 * "source" in each copyBox as the guest image and the 586 * "destination" as the host image, regardless of transfer 587 * direction. 588 * 589 * For efficiency, the SVGA3D device is free to copy more data than 590 * specified. For example, it may round copy boxes outwards such 591 * that they lie on particular alignment boundaries. 592 */ 593} 594#include "vmware_pack_end.h" 595SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */ 596 597/* 598 * SVGA3dCmdSurfaceDMASuffix -- 599 * 600 * This is a command suffix that will appear after a SurfaceDMA command in 601 * the FIFO. It contains some extra information that hosts may use to 602 * optimize performance or protect the guest. This suffix exists to preserve 603 * backwards compatibility while also allowing for new functionality to be 604 * implemented. 605 */ 606 607typedef 608#include "vmware_pack_begin.h" 609struct { 610 uint32 suffixSize; 611 612 /* 613 * The maximum offset is used to determine the maximum offset from the 614 * guestPtr base address that will be accessed or written to during this 615 * surfaceDMA. If the suffix is supported, the host will respect this 616 * boundary while performing surface DMAs. 617 * 618 * Defaults to MAX_UINT32 619 */ 620 uint32 maximumOffset; 621 622 /* 623 * A set of flags that describes optimizations that the host may perform 624 * while performing this surface DMA operation. The guest should never rely 625 * on behaviour that is different when these flags are set for correctness. 626 * 627 * Defaults to 0 628 */ 629 SVGA3dSurfaceDMAFlags flags; 630} 631#include "vmware_pack_end.h" 632SVGA3dCmdSurfaceDMASuffix; 633 634/* 635 * SVGA_3D_CMD_DRAW_PRIMITIVES -- 636 * 637 * This command is the SVGA3D device's generic drawing entry point. 638 * It can draw multiple ranges of primitives, optionally using an 639 * index buffer, using an arbitrary collection of vertex buffers. 640 * 641 * Each SVGA3dVertexDecl defines a distinct vertex array to bind 642 * during this draw call. The declarations specify which surface 643 * the vertex data lives in, what that vertex data is used for, 644 * and how to interpret it. 645 * 646 * Each SVGA3dPrimitiveRange defines a collection of primitives 647 * to render using the same vertex arrays. An index buffer is 648 * optional. 649 */ 650 651typedef 652#include "vmware_pack_begin.h" 653struct { 654 /* 655 * A range hint is an optional specification for the range of indices 656 * in an SVGA3dArray that will be used. If 'last' is zero, it is assumed 657 * that the entire array will be used. 658 * 659 * These are only hints. The SVGA3D device may use them for 660 * performance optimization if possible, but it's also allowed to 661 * ignore these values. 662 */ 663 uint32 first; 664 uint32 last; 665} 666#include "vmware_pack_end.h" 667SVGA3dArrayRangeHint; 668 669typedef 670#include "vmware_pack_begin.h" 671struct { 672 /* 673 * Define the origin and shape of a vertex or index array. Both 674 * 'offset' and 'stride' are in bytes. The provided surface will be 675 * reinterpreted as a flat array of bytes in the same format used 676 * by surface DMA operations. To avoid unnecessary conversions, the 677 * surface should be created with the SVGA3D_BUFFER format. 678 * 679 * Index 0 in the array starts 'offset' bytes into the surface. 680 * Index 1 begins at byte 'offset + stride', etc. Array indices may 681 * not be negative. 682 */ 683 uint32 surfaceId; 684 uint32 offset; 685 uint32 stride; 686} 687#include "vmware_pack_end.h" 688SVGA3dArray; 689 690typedef 691#include "vmware_pack_begin.h" 692struct { 693 /* 694 * Describe a vertex array's data type, and define how it is to be 695 * used by the fixed function pipeline or the vertex shader. It 696 * isn't useful to have two VertexDecls with the same 697 * VertexArrayIdentity in one draw call. 698 */ 699 SVGA3dDeclType type; 700 SVGA3dDeclMethod method; 701 SVGA3dDeclUsage usage; 702 uint32 usageIndex; 703} 704#include "vmware_pack_end.h" 705SVGA3dVertexArrayIdentity; 706 707typedef 708#include "vmware_pack_begin.h" 709struct SVGA3dVertexDecl { 710 SVGA3dVertexArrayIdentity identity; 711 SVGA3dArray array; 712 SVGA3dArrayRangeHint rangeHint; 713} 714#include "vmware_pack_end.h" 715SVGA3dVertexDecl; 716 717typedef 718#include "vmware_pack_begin.h" 719struct SVGA3dPrimitiveRange { 720 /* 721 * Define a group of primitives to render, from sequential indices. 722 * 723 * The value of 'primitiveType' and 'primitiveCount' imply the 724 * total number of vertices that will be rendered. 725 */ 726 SVGA3dPrimitiveType primType; 727 uint32 primitiveCount; 728 729 /* 730 * Optional index buffer. If indexArray.surfaceId is 731 * SVGA3D_INVALID_ID, we render without an index buffer. Rendering 732 * without an index buffer is identical to rendering with an index 733 * buffer containing the sequence [0, 1, 2, 3, ...]. 734 * 735 * If an index buffer is in use, indexWidth specifies the width in 736 * bytes of each index value. It must be less than or equal to 737 * indexArray.stride. 738 * 739 * (Currently, the SVGA3D device requires index buffers to be tightly 740 * packed. In other words, indexWidth == indexArray.stride) 741 */ 742 SVGA3dArray indexArray; 743 uint32 indexWidth; 744 745 /* 746 * Optional index bias. This number is added to all indices from 747 * indexArray before they are used as vertex array indices. This 748 * can be used in multiple ways: 749 * 750 * - When not using an indexArray, this bias can be used to 751 * specify where in the vertex arrays to begin rendering. 752 * 753 * - A positive number here is equivalent to increasing the 754 * offset in each vertex array. 755 * 756 * - A negative number can be used to render using a small 757 * vertex array and an index buffer that contains large 758 * values. This may be used by some applications that 759 * crop a vertex buffer without modifying their index 760 * buffer. 761 * 762 * Note that rendering with a negative bias value may be slower and 763 * use more memory than rendering with a positive or zero bias. 764 */ 765 int32 indexBias; 766} 767#include "vmware_pack_end.h" 768SVGA3dPrimitiveRange; 769 770typedef 771#include "vmware_pack_begin.h" 772struct { 773 uint32 cid; 774 uint32 numVertexDecls; 775 uint32 numRanges; 776 777 /* 778 * There are two variable size arrays after the 779 * SVGA3dCmdDrawPrimitives structure. In order, 780 * they are: 781 * 782 * 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than 783 * SVGA3D_MAX_VERTEX_ARRAYS; 784 * 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than 785 * SVGA3D_MAX_DRAW_PRIMITIVE_RANGES; 786 * 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains 787 * the frequency divisor for the corresponding vertex decl). 788 */ 789} 790#include "vmware_pack_end.h" 791SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */ 792 793typedef 794#include "vmware_pack_begin.h" 795struct { 796 uint32 cid; 797 798 uint32 primitiveCount; // How many primitives to render 799 uint32 startVertexLocation; // Which vertex do we start rendering at. 800 801 uint8 primitiveType; // SVGA3dPrimitiveType 802 uint8 padding[3]; 803} 804#include "vmware_pack_end.h" 805SVGA3dCmdDraw; 806 807typedef 808#include "vmware_pack_begin.h" 809struct { 810 uint32 cid; 811 812 uint8 primitiveType; // SVGA3dPrimitiveType 813 814 uint32 indexBufferSid; // Valid index buffer sid. 815 uint32 indexBufferOffset; // Byte offset into the vertex buffer, almost 816 // always 0 for DX9 guests, non-zero for OpenGL 817 // guests. We can't represent non-multiple of 818 // stride offsets in D3D9Renderer... 819 uint8 indexBufferStride; // Allowable values = 1, 2, or 4 820 821 int32 baseVertexLocation; // Bias applied to the index when selecting a 822 // vertex from the streams, may be negative 823 824 uint32 primitiveCount; // How many primitives to render 825 uint32 pad0; 826 uint16 pad1; 827} 828#include "vmware_pack_end.h" 829SVGA3dCmdDrawIndexed; 830 831typedef 832#include "vmware_pack_begin.h" 833struct { 834 /* 835 * Describe a vertex array's data type, and define how it is to be 836 * used by the fixed function pipeline or the vertex shader. It 837 * isn't useful to have two VertexDecls with the same 838 * VertexArrayIdentity in one draw call. 839 */ 840 uint16 streamOffset; 841 uint8 stream; 842 uint8 type; // SVGA3dDeclType 843 uint8 method; // SVGA3dDeclMethod 844 uint8 usage; // SVGA3dDeclUsage 845 uint8 usageIndex; 846 uint8 padding; 847 848} 849#include "vmware_pack_end.h" 850SVGA3dVertexElement; 851 852/* 853 * Should the vertex element respect the stream value? The high bit of the 854 * stream should be set to indicate that the stream should be respected. If 855 * the high bit is not set, the stream will be ignored and replaced by the index 856 * of the position of the currently considered vertex element. 857 * 858 * All guests should set this bit and correctly specify the stream going 859 * forward. 860 */ 861#define SVGA3D_VERTEX_ELEMENT_RESPECT_STREAM (1 << 7) 862 863typedef 864#include "vmware_pack_begin.h" 865struct { 866 uint32 cid; 867 868 uint32 numElements; 869 870 /* 871 * Followed by numElements SVGA3dVertexElement structures. 872 * 873 * If numElements < SVGA3D_MAX_VERTEX_ARRAYS, the remaining elements 874 * are cleared and will not be used by following draws. 875 */ 876} 877#include "vmware_pack_end.h" 878SVGA3dCmdSetVertexDecls; 879 880typedef 881#include "vmware_pack_begin.h" 882struct { 883 uint32 sid; 884 uint32 stride; 885 uint32 offset; 886} 887#include "vmware_pack_end.h" 888SVGA3dVertexStream; 889 890typedef 891#include "vmware_pack_begin.h" 892struct { 893 uint32 cid; 894 895 uint32 numStreams; 896 /* 897 * Followed by numStream SVGA3dVertexStream structures. 898 * 899 * If numStreams < SVGA3D_MAX_VERTEX_ARRAYS, the remaining streams 900 * are cleared and will not be used by following draws. 901 */ 902} 903#include "vmware_pack_end.h" 904SVGA3dCmdSetVertexStreams; 905 906typedef 907#include "vmware_pack_begin.h" 908struct { 909 uint32 cid; 910 uint32 numDivisors; 911} 912#include "vmware_pack_end.h" 913SVGA3dCmdSetVertexDivisors; 914 915typedef 916#include "vmware_pack_begin.h" 917struct { 918 uint32 stage; 919 SVGA3dTextureStateName name; 920 union { 921 uint32 value; 922 float floatValue; 923 }; 924} 925#include "vmware_pack_end.h" 926SVGA3dTextureState; 927 928typedef 929#include "vmware_pack_begin.h" 930struct { 931 uint32 cid; 932 /* Followed by variable number of SVGA3dTextureState structures */ 933} 934#include "vmware_pack_end.h" 935SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */ 936 937typedef 938#include "vmware_pack_begin.h" 939struct { 940 uint32 cid; 941 SVGA3dTransformType type; 942 float matrix[16]; 943} 944#include "vmware_pack_end.h" 945SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */ 946 947typedef 948#include "vmware_pack_begin.h" 949struct { 950 float min; 951 float max; 952} 953#include "vmware_pack_end.h" 954SVGA3dZRange; 955 956typedef 957#include "vmware_pack_begin.h" 958struct { 959 uint32 cid; 960 SVGA3dZRange zRange; 961} 962#include "vmware_pack_end.h" 963SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */ 964 965typedef 966#include "vmware_pack_begin.h" 967struct { 968 float diffuse[4]; 969 float ambient[4]; 970 float specular[4]; 971 float emissive[4]; 972 float shininess; 973} 974#include "vmware_pack_end.h" 975SVGA3dMaterial; 976 977typedef 978#include "vmware_pack_begin.h" 979struct { 980 uint32 cid; 981 SVGA3dFace face; 982 SVGA3dMaterial material; 983} 984#include "vmware_pack_end.h" 985SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */ 986 987typedef 988#include "vmware_pack_begin.h" 989struct { 990 uint32 cid; 991 uint32 index; 992 SVGA3dLightData data; 993} 994#include "vmware_pack_end.h" 995SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */ 996 997typedef 998#include "vmware_pack_begin.h" 999struct { 1000 uint32 cid; 1001 uint32 index; 1002 uint32 enabled; 1003} 1004#include "vmware_pack_end.h" 1005SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */ 1006 1007typedef 1008#include "vmware_pack_begin.h" 1009struct { 1010 uint32 cid; 1011 SVGA3dRect rect; 1012} 1013#include "vmware_pack_end.h" 1014SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */ 1015 1016typedef 1017#include "vmware_pack_begin.h" 1018struct { 1019 uint32 cid; 1020 SVGA3dRect rect; 1021} 1022#include "vmware_pack_end.h" 1023SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */ 1024 1025typedef 1026#include "vmware_pack_begin.h" 1027struct { 1028 uint32 cid; 1029 uint32 index; 1030 float plane[4]; 1031} 1032#include "vmware_pack_end.h" 1033SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */ 1034 1035typedef 1036#include "vmware_pack_begin.h" 1037struct { 1038 uint32 cid; 1039 uint32 shid; 1040 SVGA3dShaderType type; 1041 /* Followed by variable number of DWORDs for shader bycode */ 1042} 1043#include "vmware_pack_end.h" 1044SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */ 1045 1046typedef 1047#include "vmware_pack_begin.h" 1048struct { 1049 uint32 cid; 1050 uint32 shid; 1051 SVGA3dShaderType type; 1052} 1053#include "vmware_pack_end.h" 1054SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */ 1055 1056typedef 1057#include "vmware_pack_begin.h" 1058struct { 1059 uint32 cid; 1060 uint32 reg; /* register number */ 1061 SVGA3dShaderType type; 1062 SVGA3dShaderConstType ctype; 1063 uint32 values[4]; 1064 1065 /* 1066 * Followed by a variable number of additional values. 1067 */ 1068} 1069#include "vmware_pack_end.h" 1070SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */ 1071 1072typedef 1073#include "vmware_pack_begin.h" 1074struct { 1075 uint32 cid; 1076 SVGA3dShaderType type; 1077 uint32 shid; 1078} 1079#include "vmware_pack_end.h" 1080SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */ 1081 1082typedef 1083#include "vmware_pack_begin.h" 1084struct { 1085 uint32 cid; 1086 SVGA3dQueryType type; 1087} 1088#include "vmware_pack_end.h" 1089SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */ 1090 1091typedef 1092#include "vmware_pack_begin.h" 1093struct { 1094 uint32 cid; 1095 SVGA3dQueryType type; 1096 SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */ 1097} 1098#include "vmware_pack_end.h" 1099SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */ 1100 1101 1102/* 1103 * SVGA3D_CMD_WAIT_FOR_QUERY -- 1104 * 1105 * Will read the SVGA3dQueryResult structure pointed to by guestResult, 1106 * and if the state member is set to anything else than 1107 * SVGA3D_QUERYSTATE_PENDING, this command will always be a no-op. 1108 * 1109 * Otherwise, in addition to the query explicitly waited for, 1110 * All queries with the same type and issued with the same cid, for which 1111 * an SVGA_3D_CMD_END_QUERY command has previously been sent, will 1112 * be finished after execution of this command. 1113 * 1114 * A query will be identified by the gmrId and offset of the guestResult 1115 * member. If the device can't find an SVGA_3D_CMD_END_QUERY that has 1116 * been sent previously with an identical gmrId and offset, it will 1117 * effectively end all queries with an identical type issued with the 1118 * same cid, and the SVGA3dQueryResult structure pointed to by 1119 * guestResult will not be written to. This property can be used to 1120 * implement a query barrier for a given cid and query type. 1121 */ 1122 1123typedef 1124#include "vmware_pack_begin.h" 1125struct { 1126 uint32 cid; /* Same parameters passed to END_QUERY */ 1127 SVGA3dQueryType type; 1128 SVGAGuestPtr guestResult; 1129} 1130#include "vmware_pack_end.h" 1131SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */ 1132 1133typedef 1134#include "vmware_pack_begin.h" 1135struct { 1136 uint32 totalSize; /* Set by guest before query is ended. */ 1137 SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */ 1138 union { /* Set by host on exit from PENDING state */ 1139 uint32 result32; 1140 uint32 queryCookie; /* May be used to identify which QueryGetData this 1141 result corresponds to. */ 1142 }; 1143} 1144#include "vmware_pack_end.h" 1145SVGA3dQueryResult; 1146 1147 1148/* 1149 * SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN -- 1150 * 1151 * This is a blit from an SVGA3D surface to a Screen Object. 1152 * This blit must be directed at a specific screen. 1153 * 1154 * The blit copies from a rectangular region of an SVGA3D surface 1155 * image to a rectangular region of a screen. 1156 * 1157 * This command takes an optional variable-length list of clipping 1158 * rectangles after the body of the command. If no rectangles are 1159 * specified, there is no clipping region. The entire destRect is 1160 * drawn to. If one or more rectangles are included, they describe 1161 * a clipping region. The clip rectangle coordinates are measured 1162 * relative to the top-left corner of destRect. 1163 * 1164 * The srcImage must be from mip=0 face=0. 1165 * 1166 * This supports scaling if the src and dest are of different sizes. 1167 * 1168 * Availability: 1169 * SVGA_FIFO_CAP_SCREEN_OBJECT 1170 */ 1171 1172typedef 1173#include "vmware_pack_begin.h" 1174struct { 1175 SVGA3dSurfaceImageId srcImage; 1176 SVGASignedRect srcRect; 1177 uint32 destScreenId; /* Screen Object ID */ 1178 SVGASignedRect destRect; 1179 /* Clipping: zero or more SVGASignedRects follow */ 1180} 1181#include "vmware_pack_end.h" 1182SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */ 1183 1184typedef 1185#include "vmware_pack_begin.h" 1186struct { 1187 uint32 sid; 1188 SVGA3dTextureFilter filter; 1189} 1190#include "vmware_pack_end.h" 1191SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */ 1192 1193typedef 1194#include "vmware_pack_begin.h" 1195struct { 1196 uint32 sid; 1197} 1198#include "vmware_pack_end.h" 1199SVGA3dCmdActivateSurface; /* SVGA_3D_CMD_ACTIVATE_SURFACE */ 1200 1201typedef 1202#include "vmware_pack_begin.h" 1203struct { 1204 uint32 sid; 1205} 1206#include "vmware_pack_end.h" 1207SVGA3dCmdDeactivateSurface; /* SVGA_3D_CMD_DEACTIVATE_SURFACE */ 1208 1209/* 1210 * Screen DMA command 1211 * 1212 * Available with SVGA_FIFO_CAP_SCREEN_OBJECT_2. The SVGA_CAP_3D device 1213 * cap bit is not required. 1214 * 1215 * - refBuffer and destBuffer are 32bit BGRX; refBuffer and destBuffer could 1216 * be different, but it is required that guest makes sure refBuffer has 1217 * exactly the same contents that were written to when last time screen DMA 1218 * command is received by host. 1219 * 1220 * - changemap is generated by lib/blit, and it has the changes from last 1221 * received screen DMA or more. 1222 */ 1223 1224typedef 1225#include "vmware_pack_begin.h" 1226struct SVGA3dCmdScreenDMA { 1227 uint32 screenId; 1228 SVGAGuestImage refBuffer; 1229 SVGAGuestImage destBuffer; 1230 SVGAGuestImage changeMap; 1231} 1232#include "vmware_pack_end.h" 1233SVGA3dCmdScreenDMA; /* SVGA_3D_CMD_SCREEN_DMA */ 1234 1235/* 1236 * Logic ops 1237 */ 1238 1239#define SVGA3D_LOTRANSBLT_HONORALPHA (0x01) 1240#define SVGA3D_LOSTRETCHBLT_MIRRORX (0x01) 1241#define SVGA3D_LOSTRETCHBLT_MIRRORY (0x02) 1242#define SVGA3D_LOALPHABLEND_SRCHASALPHA (0x01) 1243 1244typedef 1245#include "vmware_pack_begin.h" 1246struct SVGA3dCmdLogicOpsBitBlt { 1247 /* 1248 * All LogicOps surfaces are one-level 1249 * surfaces so mipmap & face should always 1250 * be zero. 1251 */ 1252 SVGA3dSurfaceImageId src; 1253 SVGA3dSurfaceImageId dst; 1254 SVGA3dLogicOp logicOp; 1255 /* Followed by variable number of SVGA3dCopyBox structures */ 1256} 1257#include "vmware_pack_end.h" 1258SVGA3dCmdLogicOpsBitBlt; /* SVGA_3D_CMD_LOGICOPS_BITBLT */ 1259 1260 1261typedef 1262#include "vmware_pack_begin.h" 1263struct SVGA3dCmdLogicOpsTransBlt { 1264 /* 1265 * All LogicOps surfaces are one-level 1266 * surfaces so mipmap & face should always 1267 * be zero. 1268 */ 1269 SVGA3dSurfaceImageId src; 1270 SVGA3dSurfaceImageId dst; 1271 uint32 color; 1272 uint32 flags; 1273 SVGA3dBox srcBox; 1274 SVGA3dBox dstBox; 1275} 1276#include "vmware_pack_end.h" 1277SVGA3dCmdLogicOpsTransBlt; /* SVGA_3D_CMD_LOGICOPS_TRANSBLT */ 1278 1279 1280typedef 1281#include "vmware_pack_begin.h" 1282struct SVGA3dCmdLogicOpsStretchBlt { 1283 /* 1284 * All LogicOps surfaces are one-level 1285 * surfaces so mipmap & face should always 1286 * be zero. 1287 */ 1288 SVGA3dSurfaceImageId src; 1289 SVGA3dSurfaceImageId dst; 1290 uint16 mode; 1291 uint16 flags; 1292 SVGA3dBox srcBox; 1293 SVGA3dBox dstBox; 1294} 1295#include "vmware_pack_end.h" 1296SVGA3dCmdLogicOpsStretchBlt; /* SVGA_3D_CMD_LOGICOPS_STRETCHBLT */ 1297 1298 1299typedef 1300#include "vmware_pack_begin.h" 1301struct SVGA3dCmdLogicOpsColorFill { 1302 /* 1303 * All LogicOps surfaces are one-level 1304 * surfaces so mipmap & face should always 1305 * be zero. 1306 */ 1307 SVGA3dSurfaceImageId dst; 1308 uint32 color; 1309 SVGA3dLogicOp logicOp; 1310 /* Followed by variable number of SVGA3dRect structures. */ 1311} 1312#include "vmware_pack_end.h" 1313SVGA3dCmdLogicOpsColorFill; /* SVGA_3D_CMD_LOGICOPS_COLORFILL */ 1314 1315 1316typedef 1317#include "vmware_pack_begin.h" 1318struct SVGA3dCmdLogicOpsAlphaBlend { 1319 /* 1320 * All LogicOps surfaces are one-level 1321 * surfaces so mipmap & face should always 1322 * be zero. 1323 */ 1324 SVGA3dSurfaceImageId src; 1325 SVGA3dSurfaceImageId dst; 1326 uint32 alphaVal; 1327 uint32 flags; 1328 SVGA3dBox srcBox; 1329 SVGA3dBox dstBox; 1330} 1331#include "vmware_pack_end.h" 1332SVGA3dCmdLogicOpsAlphaBlend; /* SVGA_3D_CMD_LOGICOPS_ALPHABLEND */ 1333 1334#define SVGA3D_CLEARTYPE_INVALID_GAMMA_INDEX 0xFFFFFFFF 1335 1336#define SVGA3D_CLEARTYPE_GAMMA_WIDTH 512 1337#define SVGA3D_CLEARTYPE_GAMMA_HEIGHT 16 1338 1339typedef 1340#include "vmware_pack_begin.h" 1341struct SVGA3dCmdLogicOpsClearTypeBlend { 1342 /* 1343 * All LogicOps surfaces are one-level 1344 * surfaces so mipmap & face should always 1345 * be zero. 1346 */ 1347 SVGA3dSurfaceImageId tmp; 1348 SVGA3dSurfaceImageId dst; 1349 SVGA3dSurfaceImageId gammaSurf; 1350 SVGA3dSurfaceImageId alphaSurf; 1351 uint32 gamma; 1352 uint32 color; 1353 uint32 color2; 1354 int32 alphaOffsetX; 1355 int32 alphaOffsetY; 1356 /* Followed by variable number of SVGA3dBox structures */ 1357} 1358#include "vmware_pack_end.h" 1359SVGA3dCmdLogicOpsClearTypeBlend; /* SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND */ 1360 1361 1362/* 1363 * Guest-backed objects definitions. 1364 */ 1365 1366typedef 1367#include "vmware_pack_begin.h" 1368struct { 1369 SVGAMobFormat ptDepth; 1370 uint32 sizeInBytes; 1371 PPN64 base; 1372} 1373#include "vmware_pack_end.h" 1374SVGAOTableMobEntry; 1375 1376typedef 1377#include "vmware_pack_begin.h" 1378struct { 1379 SVGA3dSurfaceFormat format; 1380 SVGA3dSurface1Flags surface1Flags; 1381 uint32 numMipLevels; 1382 uint32 multisampleCount; 1383 SVGA3dTextureFilter autogenFilter; 1384 SVGA3dSize size; 1385 SVGAMobId mobid; 1386 uint32 arraySize; 1387 uint32 mobPitch; 1388 SVGA3dSurface2Flags surface2Flags; 1389 uint8 multisamplePattern; 1390 uint8 pad0[3]; 1391 uint32 pad1[3]; 1392} 1393#include "vmware_pack_end.h" 1394SVGAOTableSurfaceEntry; 1395 1396typedef 1397#include "vmware_pack_begin.h" 1398struct { 1399 uint32 cid; 1400 SVGAMobId mobid; 1401} 1402#include "vmware_pack_end.h" 1403SVGAOTableContextEntry; 1404 1405typedef 1406#include "vmware_pack_begin.h" 1407struct { 1408 SVGA3dShaderType type; 1409 uint32 sizeInBytes; 1410 uint32 offsetInBytes; 1411 SVGAMobId mobid; 1412} 1413#include "vmware_pack_end.h" 1414SVGAOTableShaderEntry; 1415 1416#define SVGA_STFLAG_PRIMARY (1 << 0) 1417#define SVGA_STFLAG_RESERVED (1 << 1) /* Added with cap SVGA_CAP_HP_CMD_QUEUE */ 1418typedef uint32 SVGAScreenTargetFlags; 1419 1420typedef 1421#include "vmware_pack_begin.h" 1422struct { 1423 SVGA3dSurfaceImageId image; 1424 uint32 width; 1425 uint32 height; 1426 int32 xRoot; 1427 int32 yRoot; 1428 SVGAScreenTargetFlags flags; 1429 uint32 dpi; 1430 uint32 pad[7]; 1431} 1432#include "vmware_pack_end.h" 1433SVGAOTableScreenTargetEntry; 1434 1435typedef 1436#include "vmware_pack_begin.h" 1437struct { 1438 float value[4]; 1439} 1440#include "vmware_pack_end.h" 1441SVGA3dShaderConstFloat; 1442 1443typedef 1444#include "vmware_pack_begin.h" 1445struct { 1446 int32 value[4]; 1447} 1448#include "vmware_pack_end.h" 1449SVGA3dShaderConstInt; 1450 1451typedef 1452#include "vmware_pack_begin.h" 1453struct { 1454 uint32 value; 1455} 1456#include "vmware_pack_end.h" 1457SVGA3dShaderConstBool; 1458 1459typedef 1460#include "vmware_pack_begin.h" 1461struct { 1462 uint16 streamOffset; 1463 uint8 stream; 1464 uint8 type; 1465 uint8 methodUsage; 1466 uint8 usageIndex; 1467} 1468#include "vmware_pack_end.h" 1469SVGAGBVertexElement; 1470 1471typedef 1472#include "vmware_pack_begin.h" 1473struct { 1474 uint32 sid; 1475 uint16 stride; 1476 uint32 offset; 1477} 1478#include "vmware_pack_end.h" 1479SVGAGBVertexStream; 1480typedef 1481#include "vmware_pack_begin.h" 1482struct { 1483 SVGA3dRect viewport; 1484 SVGA3dRect scissorRect; 1485 SVGA3dZRange zRange; 1486 1487 SVGA3dSurfaceImageId renderTargets[SVGA3D_RT_MAX]; 1488 SVGAGBVertexElement decl1[4]; 1489 1490 uint32 renderStates[SVGA3D_RS_MAX]; 1491 SVGAGBVertexElement decl2[18]; 1492 uint32 pad0[2]; 1493 1494 struct { 1495 SVGA3dFace face; 1496 SVGA3dMaterial material; 1497 } material; 1498 1499 float clipPlanes[SVGA3D_NUM_CLIPPLANES][4]; 1500 float matrices[SVGA3D_TRANSFORM_MAX][16]; 1501 1502 SVGA3dBool lightEnabled[SVGA3D_NUM_LIGHTS]; 1503 SVGA3dLightData lightData[SVGA3D_NUM_LIGHTS]; 1504 1505 /* 1506 * Shaders currently bound 1507 */ 1508 uint32 shaders[SVGA3D_NUM_SHADERTYPE_PREDX]; 1509 SVGAGBVertexElement decl3[10]; 1510 uint32 pad1[3]; 1511 1512 uint32 occQueryActive; 1513 uint32 occQueryValue; 1514 1515 /* 1516 * Int/Bool Shader constants 1517 */ 1518 SVGA3dShaderConstInt pShaderIValues[SVGA3D_CONSTINTREG_MAX]; 1519 SVGA3dShaderConstInt vShaderIValues[SVGA3D_CONSTINTREG_MAX]; 1520 uint16 pShaderBValues; 1521 uint16 vShaderBValues; 1522 1523 1524 SVGAGBVertexStream streams[SVGA3D_MAX_VERTEX_ARRAYS]; 1525 SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS]; 1526 uint32 numVertexDecls; 1527 uint32 numVertexStreams; 1528 uint32 numVertexDivisors; 1529 uint32 pad2[30]; 1530 1531 /* 1532 * Texture Stages 1533 * 1534 * SVGA3D_TS_INVALID through SVGA3D_TS_CONSTANT are in the 1535 * textureStages array. 1536 * SVGA3D_TS_COLOR_KEY is in tsColorKey. 1537 */ 1538 uint32 tsColorKey[SVGA3D_NUM_TEXTURE_UNITS]; 1539 uint32 textureStages[SVGA3D_NUM_TEXTURE_UNITS][SVGA3D_TS_CONSTANT + 1]; 1540 uint32 tsColorKeyEnable[SVGA3D_NUM_TEXTURE_UNITS]; 1541 1542 /* 1543 * Float Shader constants. 1544 */ 1545 SVGA3dShaderConstFloat pShaderFValues[SVGA3D_CONSTREG_MAX]; 1546 SVGA3dShaderConstFloat vShaderFValues[SVGA3D_CONSTREG_MAX]; 1547} 1548#include "vmware_pack_end.h" 1549SVGAGBContextData; 1550#define SVGA3D_CONTEXT_DATA_SIZE (sizeof(SVGAGBContextData)) 1551 1552/* 1553 * SVGA3dCmdSetOTableBase -- 1554 * 1555 * This command allows the guest to specify the base PPN of the 1556 * specified object table. 1557 */ 1558 1559typedef 1560#include "vmware_pack_begin.h" 1561struct { 1562 SVGAOTableType type; 1563 PPN baseAddress; 1564 uint32 sizeInBytes; 1565 uint32 validSizeInBytes; 1566 SVGAMobFormat ptDepth; 1567} 1568#include "vmware_pack_end.h" 1569SVGA3dCmdSetOTableBase; /* SVGA_3D_CMD_SET_OTABLE_BASE */ 1570 1571typedef 1572#include "vmware_pack_begin.h" 1573struct { 1574 SVGAOTableType type; 1575 PPN64 baseAddress; 1576 uint32 sizeInBytes; 1577 uint32 validSizeInBytes; 1578 SVGAMobFormat ptDepth; 1579} 1580#include "vmware_pack_end.h" 1581SVGA3dCmdSetOTableBase64; /* SVGA_3D_CMD_SET_OTABLE_BASE64 */ 1582 1583/* 1584 * Guests using SVGA_3D_CMD_GROW_OTABLE are promising that 1585 * the new OTable contains the same contents as the old one, except possibly 1586 * for some new invalid entries at the end. 1587 * 1588 * (Otherwise, guests should use one of the SetOTableBase commands.) 1589 */ 1590typedef 1591#include "vmware_pack_begin.h" 1592struct { 1593 SVGAOTableType type; 1594 PPN64 baseAddress; 1595 uint32 sizeInBytes; 1596 uint32 validSizeInBytes; 1597 SVGAMobFormat ptDepth; 1598} 1599#include "vmware_pack_end.h" 1600SVGA3dCmdGrowOTable; /* SVGA_3D_CMD_GROW_OTABLE */ 1601 1602typedef 1603#include "vmware_pack_begin.h" 1604struct { 1605 SVGAOTableType type; 1606} 1607#include "vmware_pack_end.h" 1608SVGA3dCmdReadbackOTable; /* SVGA_3D_CMD_READBACK_OTABLE */ 1609 1610/* 1611 * Define a memory object (Mob) in the OTable. 1612 */ 1613 1614typedef 1615#include "vmware_pack_begin.h" 1616struct SVGA3dCmdDefineGBMob { 1617 SVGAMobId mobid; 1618 SVGAMobFormat ptDepth; 1619 PPN base; 1620 uint32 sizeInBytes; 1621} 1622#include "vmware_pack_end.h" 1623SVGA3dCmdDefineGBMob; /* SVGA_3D_CMD_DEFINE_GB_MOB */ 1624 1625 1626/* 1627 * Destroys an object in the OTable. 1628 */ 1629 1630typedef 1631#include "vmware_pack_begin.h" 1632struct SVGA3dCmdDestroyGBMob { 1633 SVGAMobId mobid; 1634} 1635#include "vmware_pack_end.h" 1636SVGA3dCmdDestroyGBMob; /* SVGA_3D_CMD_DESTROY_GB_MOB */ 1637 1638/* 1639 * Define a memory object (Mob) in the OTable with a PPN64 base. 1640 */ 1641 1642typedef 1643#include "vmware_pack_begin.h" 1644struct SVGA3dCmdDefineGBMob64 { 1645 SVGAMobId mobid; 1646 SVGAMobFormat ptDepth; 1647 PPN64 base; 1648 uint32 sizeInBytes; 1649} 1650#include "vmware_pack_end.h" 1651SVGA3dCmdDefineGBMob64; /* SVGA_3D_CMD_DEFINE_GB_MOB64 */ 1652 1653/* 1654 * Redefine an object in the OTable with PPN64 base. 1655 */ 1656 1657typedef 1658#include "vmware_pack_begin.h" 1659struct SVGA3dCmdRedefineGBMob64 { 1660 SVGAMobId mobid; 1661 SVGAMobFormat ptDepth; 1662 PPN64 base; 1663 uint32 sizeInBytes; 1664} 1665#include "vmware_pack_end.h" 1666SVGA3dCmdRedefineGBMob64; /* SVGA_3D_CMD_REDEFINE_GB_MOB64 */ 1667 1668/* 1669 * Notification that the page tables have been modified. 1670 */ 1671 1672typedef 1673#include "vmware_pack_begin.h" 1674struct SVGA3dCmdUpdateGBMobMapping { 1675 SVGAMobId mobid; 1676} 1677#include "vmware_pack_end.h" 1678SVGA3dCmdUpdateGBMobMapping; /* SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING */ 1679 1680/* 1681 * Define a guest-backed surface. 1682 */ 1683 1684typedef 1685#include "vmware_pack_begin.h" 1686struct SVGA3dCmdDefineGBSurface { 1687 uint32 sid; 1688 SVGA3dSurface1Flags surfaceFlags; 1689 SVGA3dSurfaceFormat format; 1690 uint32 numMipLevels; 1691 uint32 multisampleCount; 1692 SVGA3dTextureFilter autogenFilter; 1693 SVGA3dSize size; 1694} 1695#include "vmware_pack_end.h" 1696SVGA3dCmdDefineGBSurface; /* SVGA_3D_CMD_DEFINE_GB_SURFACE */ 1697 1698/* 1699 * Defines a guest-backed surface, adding the arraySize field. 1700 * 1701 * See also: 1702 * http://msdn.microsoft.com/en-us/library/ff541697%28v=VS.85%29.aspx 1703 */ 1704typedef 1705#include "vmware_pack_begin.h" 1706struct SVGA3dCmdDefineGBSurface_v2 { 1707 uint32 sid; 1708 SVGA3dSurface1Flags surfaceFlags; 1709 SVGA3dSurfaceFormat format; 1710 uint32 numMipLevels; 1711 uint32 multisampleCount; 1712 SVGA3dTextureFilter autogenFilter; 1713 SVGA3dSize size; 1714 uint32 arraySize; 1715 uint32 pad; 1716} 1717#include "vmware_pack_end.h" 1718SVGA3dCmdDefineGBSurface_v2; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 */ 1719 1720/* 1721 * Defines a guest-backed surface, adding the larger flags. 1722 */ 1723typedef 1724#include "vmware_pack_begin.h" 1725struct SVGA3dCmdDefineGBSurface_v3 { 1726 uint32 sid; 1727 SVGA3dSurfaceAllFlags surfaceFlags; 1728 SVGA3dSurfaceFormat format; 1729 uint32 numMipLevels; 1730 uint32 multisampleCount; 1731 SVGA3dMSPattern multisamplePattern; 1732 SVGA3dTextureFilter autogenFilter; 1733 SVGA3dSize size; 1734 uint32 arraySize; 1735} 1736#include "vmware_pack_end.h" 1737SVGA3dCmdDefineGBSurface_v3; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 */ 1738 1739/* 1740 * Destroy a guest-backed surface. 1741 */ 1742 1743typedef 1744#include "vmware_pack_begin.h" 1745struct SVGA3dCmdDestroyGBSurface { 1746 uint32 sid; 1747} 1748#include "vmware_pack_end.h" 1749SVGA3dCmdDestroyGBSurface; /* SVGA_3D_CMD_DESTROY_GB_SURFACE */ 1750 1751/* 1752 * Bind a guest-backed surface to a mob. 1753 */ 1754 1755typedef 1756#include "vmware_pack_begin.h" 1757struct SVGA3dCmdBindGBSurface { 1758 uint32 sid; 1759 SVGAMobId mobid; 1760} 1761#include "vmware_pack_end.h" 1762SVGA3dCmdBindGBSurface; /* SVGA_3D_CMD_BIND_GB_SURFACE */ 1763 1764typedef 1765#include "vmware_pack_begin.h" 1766struct SVGA3dCmdBindGBSurfaceWithPitch { 1767 uint32 sid; 1768 SVGAMobId mobid; 1769 uint32 baseLevelPitch; 1770} 1771#include "vmware_pack_end.h" 1772SVGA3dCmdBindGBSurfaceWithPitch; /* SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH */ 1773 1774/* 1775 * Conditionally bind a mob to a guest-backed surface if testMobid 1776 * matches the currently bound mob. Optionally issue a 1777 * readback/update on the surface while it is still bound to the old 1778 * mobid if the mobid is changed by this command. 1779 */ 1780 1781#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_READBACK (1 << 0) 1782#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_UPDATE (1 << 1) 1783 1784typedef 1785#include "vmware_pack_begin.h" 1786struct SVGA3dCmdCondBindGBSurface { 1787 uint32 sid; 1788 SVGAMobId testMobid; 1789 SVGAMobId mobid; 1790 uint32 flags; 1791} 1792#include "vmware_pack_end.h" 1793SVGA3dCmdCondBindGBSurface; /* SVGA_3D_CMD_COND_BIND_GB_SURFACE */ 1794 1795/* 1796 * Update an image in a guest-backed surface. 1797 * (Inform the device that the guest-contents have been updated.) 1798 */ 1799 1800typedef 1801#include "vmware_pack_begin.h" 1802struct SVGA3dCmdUpdateGBImage { 1803 SVGA3dSurfaceImageId image; 1804 SVGA3dBox box; 1805} 1806#include "vmware_pack_end.h" 1807SVGA3dCmdUpdateGBImage; /* SVGA_3D_CMD_UPDATE_GB_IMAGE */ 1808 1809/* 1810 * Update an entire guest-backed surface. 1811 * (Inform the device that the guest-contents have been updated.) 1812 */ 1813 1814typedef 1815#include "vmware_pack_begin.h" 1816struct SVGA3dCmdUpdateGBSurface { 1817 uint32 sid; 1818} 1819#include "vmware_pack_end.h" 1820SVGA3dCmdUpdateGBSurface; /* SVGA_3D_CMD_UPDATE_GB_SURFACE */ 1821 1822/* 1823 * Readback an image in a guest-backed surface. 1824 * (Request the device to flush the dirty contents into the guest.) 1825 */ 1826 1827typedef 1828#include "vmware_pack_begin.h" 1829struct SVGA3dCmdReadbackGBImage { 1830 SVGA3dSurfaceImageId image; 1831} 1832#include "vmware_pack_end.h" 1833SVGA3dCmdReadbackGBImage; /* SVGA_3D_CMD_READBACK_GB_IMAGE */ 1834 1835/* 1836 * Readback an entire guest-backed surface. 1837 * (Request the device to flush the dirty contents into the guest.) 1838 */ 1839 1840typedef 1841#include "vmware_pack_begin.h" 1842struct SVGA3dCmdReadbackGBSurface { 1843 uint32 sid; 1844} 1845#include "vmware_pack_end.h" 1846SVGA3dCmdReadbackGBSurface; /* SVGA_3D_CMD_READBACK_GB_SURFACE */ 1847 1848/* 1849 * Readback a sub rect of an image in a guest-backed surface. After 1850 * issuing this command the driver is required to issue an update call 1851 * of the same region before issuing any other commands that reference 1852 * this surface or rendering is not guaranteed. 1853 */ 1854 1855typedef 1856#include "vmware_pack_begin.h" 1857struct SVGA3dCmdReadbackGBImagePartial { 1858 SVGA3dSurfaceImageId image; 1859 SVGA3dBox box; 1860 uint32 invertBox; 1861} 1862#include "vmware_pack_end.h" 1863SVGA3dCmdReadbackGBImagePartial; /* SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL */ 1864 1865 1866/* 1867 * Invalidate an image in a guest-backed surface. 1868 * (Notify the device that the contents can be lost.) 1869 */ 1870 1871typedef 1872#include "vmware_pack_begin.h" 1873struct SVGA3dCmdInvalidateGBImage { 1874 SVGA3dSurfaceImageId image; 1875} 1876#include "vmware_pack_end.h" 1877SVGA3dCmdInvalidateGBImage; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE */ 1878 1879/* 1880 * Invalidate an entire guest-backed surface. 1881 * (Notify the device that the contents if all images can be lost.) 1882 */ 1883 1884typedef 1885#include "vmware_pack_begin.h" 1886struct SVGA3dCmdInvalidateGBSurface { 1887 uint32 sid; 1888} 1889#include "vmware_pack_end.h" 1890SVGA3dCmdInvalidateGBSurface; /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE */ 1891 1892/* 1893 * Invalidate a sub rect of an image in a guest-backed surface. After 1894 * issuing this command the driver is required to issue an update call 1895 * of the same region before issuing any other commands that reference 1896 * this surface or rendering is not guaranteed. 1897 */ 1898 1899typedef 1900#include "vmware_pack_begin.h" 1901struct SVGA3dCmdInvalidateGBImagePartial { 1902 SVGA3dSurfaceImageId image; 1903 SVGA3dBox box; 1904 uint32 invertBox; 1905} 1906#include "vmware_pack_end.h" 1907SVGA3dCmdInvalidateGBImagePartial; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL */ 1908 1909 1910/* 1911 * Define a guest-backed context. 1912 */ 1913 1914typedef 1915#include "vmware_pack_begin.h" 1916struct SVGA3dCmdDefineGBContext { 1917 uint32 cid; 1918} 1919#include "vmware_pack_end.h" 1920SVGA3dCmdDefineGBContext; /* SVGA_3D_CMD_DEFINE_GB_CONTEXT */ 1921 1922/* 1923 * Destroy a guest-backed context. 1924 */ 1925 1926typedef 1927#include "vmware_pack_begin.h" 1928struct SVGA3dCmdDestroyGBContext { 1929 uint32 cid; 1930} 1931#include "vmware_pack_end.h" 1932SVGA3dCmdDestroyGBContext; /* SVGA_3D_CMD_DESTROY_GB_CONTEXT */ 1933 1934/* 1935 * Bind a guest-backed context. 1936 * 1937 * validContents should be set to 0 for new contexts, 1938 * and 1 if this is an old context which is getting paged 1939 * back on to the device. 1940 * 1941 * For new contexts, it is recommended that the driver 1942 * issue commands to initialize all interesting state 1943 * prior to rendering. 1944 */ 1945 1946typedef 1947#include "vmware_pack_begin.h" 1948struct SVGA3dCmdBindGBContext { 1949 uint32 cid; 1950 SVGAMobId mobid; 1951 uint32 validContents; 1952} 1953#include "vmware_pack_end.h" 1954SVGA3dCmdBindGBContext; /* SVGA_3D_CMD_BIND_GB_CONTEXT */ 1955 1956/* 1957 * Readback a guest-backed context. 1958 * (Request that the device flush the contents back into guest memory.) 1959 */ 1960 1961typedef 1962#include "vmware_pack_begin.h" 1963struct SVGA3dCmdReadbackGBContext { 1964 uint32 cid; 1965} 1966#include "vmware_pack_end.h" 1967SVGA3dCmdReadbackGBContext; /* SVGA_3D_CMD_READBACK_GB_CONTEXT */ 1968 1969/* 1970 * Invalidate a guest-backed context. 1971 */ 1972typedef 1973#include "vmware_pack_begin.h" 1974struct SVGA3dCmdInvalidateGBContext { 1975 uint32 cid; 1976} 1977#include "vmware_pack_end.h" 1978SVGA3dCmdInvalidateGBContext; /* SVGA_3D_CMD_INVALIDATE_GB_CONTEXT */ 1979 1980/* 1981 * Define a guest-backed shader. 1982 */ 1983 1984typedef 1985#include "vmware_pack_begin.h" 1986struct SVGA3dCmdDefineGBShader { 1987 uint32 shid; 1988 SVGA3dShaderType type; 1989 uint32 sizeInBytes; 1990} 1991#include "vmware_pack_end.h" 1992SVGA3dCmdDefineGBShader; /* SVGA_3D_CMD_DEFINE_GB_SHADER */ 1993 1994/* 1995 * Bind a guest-backed shader. 1996 */ 1997 1998typedef 1999#include "vmware_pack_begin.h" 2000struct SVGA3dCmdBindGBShader { 2001 uint32 shid; 2002 SVGAMobId mobid; 2003 uint32 offsetInBytes; 2004} 2005#include "vmware_pack_end.h" 2006SVGA3dCmdBindGBShader; /* SVGA_3D_CMD_BIND_GB_SHADER */ 2007 2008/* 2009 * Destroy a guest-backed shader. 2010 */ 2011 2012typedef 2013#include "vmware_pack_begin.h" 2014struct SVGA3dCmdDestroyGBShader { 2015 uint32 shid; 2016} 2017#include "vmware_pack_end.h" 2018SVGA3dCmdDestroyGBShader; /* SVGA_3D_CMD_DESTROY_GB_SHADER */ 2019 2020typedef 2021#include "vmware_pack_begin.h" 2022struct { 2023 uint32 cid; 2024 uint32 regStart; 2025 SVGA3dShaderType shaderType; 2026 SVGA3dShaderConstType constType; 2027 2028 /* 2029 * Followed by a variable number of shader constants. 2030 * 2031 * Note that FLOAT and INT constants are 4-dwords in length, while 2032 * BOOL constants are 1-dword in length. 2033 */ 2034} 2035#include "vmware_pack_end.h" 2036SVGA3dCmdSetGBShaderConstInline; /* SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE */ 2037 2038 2039typedef 2040#include "vmware_pack_begin.h" 2041struct { 2042 uint32 cid; 2043 SVGA3dQueryType type; 2044} 2045#include "vmware_pack_end.h" 2046SVGA3dCmdBeginGBQuery; /* SVGA_3D_CMD_BEGIN_GB_QUERY */ 2047 2048typedef 2049#include "vmware_pack_begin.h" 2050struct { 2051 uint32 cid; 2052 SVGA3dQueryType type; 2053 SVGAMobId mobid; 2054 uint32 offset; 2055} 2056#include "vmware_pack_end.h" 2057SVGA3dCmdEndGBQuery; /* SVGA_3D_CMD_END_GB_QUERY */ 2058 2059 2060/* 2061 * SVGA_3D_CMD_WAIT_FOR_GB_QUERY -- 2062 * 2063 * The semantics of this command are identical to the 2064 * SVGA_3D_CMD_WAIT_FOR_QUERY except that the results are written 2065 * to a Mob instead of a GMR. 2066 */ 2067 2068typedef 2069#include "vmware_pack_begin.h" 2070struct { 2071 uint32 cid; 2072 SVGA3dQueryType type; 2073 SVGAMobId mobid; 2074 uint32 offset; 2075} 2076#include "vmware_pack_end.h" 2077SVGA3dCmdWaitForGBQuery; /* SVGA_3D_CMD_WAIT_FOR_GB_QUERY */ 2078 2079 2080typedef 2081#include "vmware_pack_begin.h" 2082struct { 2083 SVGAMobId mobid; 2084 uint32 mustBeZero; 2085 uint32 initialized; 2086} 2087#include "vmware_pack_end.h" 2088SVGA3dCmdEnableGart; /* SVGA_3D_CMD_ENABLE_GART */ 2089 2090typedef 2091#include "vmware_pack_begin.h" 2092struct { 2093 SVGAMobId mobid; 2094 uint32 gartOffset; 2095} 2096#include "vmware_pack_end.h" 2097SVGA3dCmdMapMobIntoGart; /* SVGA_3D_CMD_MAP_MOB_INTO_GART */ 2098 2099 2100typedef 2101#include "vmware_pack_begin.h" 2102struct { 2103 uint32 gartOffset; 2104 uint32 numPages; 2105} 2106#include "vmware_pack_end.h" 2107SVGA3dCmdUnmapGartRange; /* SVGA_3D_CMD_UNMAP_GART_RANGE */ 2108 2109 2110/* 2111 * Screen Targets 2112 */ 2113 2114typedef 2115#include "vmware_pack_begin.h" 2116struct { 2117 uint32 stid; 2118 uint32 width; 2119 uint32 height; 2120 int32 xRoot; 2121 int32 yRoot; 2122 SVGAScreenTargetFlags flags; 2123 2124 /* 2125 * The physical DPI that the guest expects this screen displayed at. 2126 * 2127 * Guests which are not DPI-aware should set this to zero. 2128 */ 2129 uint32 dpi; 2130} 2131#include "vmware_pack_end.h" 2132SVGA3dCmdDefineGBScreenTarget; /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */ 2133 2134typedef 2135#include "vmware_pack_begin.h" 2136struct { 2137 uint32 stid; 2138} 2139#include "vmware_pack_end.h" 2140SVGA3dCmdDestroyGBScreenTarget; /* SVGA_3D_CMD_DESTROY_GB_SCREENTARGET */ 2141 2142typedef 2143#include "vmware_pack_begin.h" 2144struct { 2145 uint32 stid; 2146 SVGA3dSurfaceImageId image; 2147} 2148#include "vmware_pack_end.h" 2149SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */ 2150 2151typedef 2152#include "vmware_pack_begin.h" 2153struct { 2154 uint32 stid; 2155 SVGA3dRect rect; 2156} 2157#include "vmware_pack_end.h" 2158SVGA3dCmdUpdateGBScreenTarget; /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */ 2159 2160typedef 2161#include "vmware_pack_begin.h" 2162struct SVGA3dCmdGBScreenDMA { 2163 uint32 screenId; 2164 uint32 dead; 2165 SVGAMobId destMobID; 2166 uint32 destPitch; 2167 SVGAMobId changeMapMobID; 2168} 2169#include "vmware_pack_end.h" 2170SVGA3dCmdGBScreenDMA; /* SVGA_3D_CMD_GB_SCREEN_DMA */ 2171 2172typedef 2173#include "vmware_pack_begin.h" 2174struct { 2175 uint32 value; 2176 uint32 mobId; 2177 uint32 mobOffset; 2178} 2179#include "vmware_pack_end.h" 2180SVGA3dCmdGBMobFence; /* SVGA_3D_CMD_GB_MOB_FENCE */ 2181 2182typedef 2183#include "vmware_pack_begin.h" 2184struct { 2185 uint32 stid; 2186 SVGA3dSurfaceImageId dest; 2187 2188 uint32 statusMobId; 2189 uint32 statusMobOffset; 2190 2191 /* Reserved fields */ 2192 uint32 mustBeInvalidId; 2193 uint32 mustBeZero; 2194} 2195#include "vmware_pack_end.h" 2196SVGA3dCmdScreenCopy; /* SVGA_3D_CMD_SCREEN_COPY */ 2197 2198#define SVGA_SCREEN_COPY_STATUS_FAILURE 0x00 2199#define SVGA_SCREEN_COPY_STATUS_SUCCESS 0x01 2200#define SVGA_SCREEN_COPY_STATUS_INVALID 0xFFFFFFFF 2201 2202#endif // _SVGA3D_CMD_H_ 2203