1/********************************************************** 2 * Copyright 2008-2009 VMware, Inc. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person 5 * obtaining a copy of this software and associated documentation 6 * files (the "Software"), to deal in the Software without 7 * restriction, including without limitation the rights to use, copy, 8 * modify, merge, publish, distribute, sublicense, and/or sell copies 9 * of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be 13 * included in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 * 24 **********************************************************/ 25 26#ifndef SVGA_CONTEXT_H 27#define SVGA_CONTEXT_H 28 29 30#include "pipe/p_context.h" 31#include "pipe/p_defines.h" 32#include "pipe/p_state.h" 33 34#include "util/os_time.h" 35 36#include "util/u_blitter.h" 37#include "util/list.h" 38 39#include "tgsi/tgsi_scan.h" 40 41#include "svga_screen.h" 42#include "svga_state.h" 43#include "svga_winsys.h" 44#include "svga_hw_reg.h" 45#include "svga3d_shaderdefs.h" 46#include "svga_debug.h" 47 48/** Non-GPU queries for gallium HUD */ 49enum svga_hud { 50/* per-frame counters */ 51 SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC, 52 SVGA_QUERY_NUM_FALLBACKS, 53 SVGA_QUERY_NUM_FLUSHES, 54 SVGA_QUERY_NUM_VALIDATIONS, 55 SVGA_QUERY_MAP_BUFFER_TIME, 56 SVGA_QUERY_NUM_BUFFERS_MAPPED, 57 SVGA_QUERY_NUM_TEXTURES_MAPPED, 58 SVGA_QUERY_NUM_BYTES_UPLOADED, 59 SVGA_QUERY_NUM_COMMAND_BUFFERS, 60 SVGA_QUERY_COMMAND_BUFFER_SIZE, 61 SVGA_QUERY_FLUSH_TIME, 62 SVGA_QUERY_SURFACE_WRITE_FLUSHES, 63 SVGA_QUERY_NUM_READBACKS, 64 SVGA_QUERY_NUM_RESOURCE_UPDATES, 65 SVGA_QUERY_NUM_BUFFER_UPLOADS, 66 SVGA_QUERY_NUM_CONST_BUF_UPDATES, 67 SVGA_QUERY_NUM_CONST_UPDATES, 68 SVGA_QUERY_NUM_SHADER_RELOCATIONS, 69 SVGA_QUERY_NUM_SURFACE_RELOCATIONS, 70 71/* running total counters */ 72 SVGA_QUERY_MEMORY_USED, 73 SVGA_QUERY_NUM_SHADERS, 74 SVGA_QUERY_NUM_RESOURCES, 75 SVGA_QUERY_NUM_STATE_OBJECTS, 76 SVGA_QUERY_NUM_SURFACE_VIEWS, 77 SVGA_QUERY_NUM_GENERATE_MIPMAP, 78 SVGA_QUERY_NUM_FAILED_ALLOCATIONS, 79 SVGA_QUERY_NUM_COMMANDS_PER_DRAW, 80 SVGA_QUERY_SHADER_MEM_USED, 81 82/*SVGA_QUERY_MAX has to be last because it is size of an array*/ 83 SVGA_QUERY_MAX 84}; 85 86/** 87 * Maximum supported number of constant buffers per shader 88 */ 89#define SVGA_MAX_CONST_BUFS 14 90 91/** 92 * Maximum constant buffer size that can be set in the 93 * DXSetSingleConstantBuffer command is 94 * DX10 constant buffer element count * 4 4-bytes components 95 */ 96#define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int)) 97 98#define CONST0_UPLOAD_ALIGNMENT 256 99 100struct draw_vertex_shader; 101struct draw_fragment_shader; 102struct svga_shader_variant; 103struct SVGACmdMemory; 104struct util_bitmask; 105 106 107struct svga_cache_context; 108struct svga_tracked_state; 109 110struct svga_blend_state { 111 unsigned need_white_fragments:1; 112 unsigned independent_blend_enable:1; 113 unsigned alpha_to_coverage:1; 114 unsigned alpha_to_one:1; 115 unsigned blend_color_alpha:1; /**< set blend color to alpha value */ 116 unsigned logicop_enabled:1; 117 unsigned logicop_mode:5; 118 119 /** Per-render target state */ 120 struct { 121 uint8_t writemask; 122 123 boolean blend_enable; 124 uint8_t srcblend; 125 uint8_t dstblend; 126 uint8_t blendeq; 127 128 boolean separate_alpha_blend_enable; 129 uint8_t srcblend_alpha; 130 uint8_t dstblend_alpha; 131 uint8_t blendeq_alpha; 132 } rt[PIPE_MAX_COLOR_BUFS]; 133 134 SVGA3dBlendStateId id; /**< vgpu10 */ 135}; 136 137struct svga_depth_stencil_state { 138 unsigned zfunc:8; 139 unsigned zenable:1; 140 unsigned zwriteenable:1; 141 142 unsigned alphatestenable:1; 143 unsigned alphafunc:8; 144 145 struct { 146 unsigned enabled:1; 147 unsigned func:8; 148 unsigned fail:8; 149 unsigned zfail:8; 150 unsigned pass:8; 151 } stencil[2]; 152 153 /* SVGA3D has one ref/mask/writemask triple shared between front & 154 * back face stencil. We really need two: 155 */ 156 unsigned stencil_mask:8; 157 unsigned stencil_writemask:8; 158 159 float alpharef; 160 161 SVGA3dDepthStencilStateId id; /**< vgpu10 */ 162}; 163 164#define SVGA_UNFILLED_DISABLE 0 165#define SVGA_UNFILLED_LINE 1 166#define SVGA_UNFILLED_POINT 2 167 168#define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS) 169#define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES) 170#define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES) 171 172struct svga_rasterizer_state { 173 struct pipe_rasterizer_state templ; /* needed for draw module */ 174 175 unsigned shademode:8; 176 unsigned cullmode:8; 177 unsigned scissortestenable:1; 178 unsigned multisampleantialias:1; 179 unsigned antialiasedlineenable:1; 180 unsigned lastpixel:1; 181 unsigned pointsprite:1; 182 183 unsigned linepattern; 184 185 float slopescaledepthbias; 186 float depthbias; 187 float pointsize; 188 float linewidth; 189 190 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */ 191 192 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */ 193 unsigned need_pipeline:16; 194 195 SVGA3dRasterizerStateId id; /**< vgpu10 */ 196 197 /** For debugging: */ 198 const char* need_pipeline_tris_str; 199 const char* need_pipeline_lines_str; 200 const char* need_pipeline_points_str; 201}; 202 203struct svga_sampler_state { 204 unsigned mipfilter; 205 unsigned magfilter; 206 unsigned minfilter; 207 unsigned aniso_level; 208 float lod_bias; 209 unsigned addressu; 210 unsigned addressv; 211 unsigned addressw; 212 unsigned bordercolor; 213 unsigned normalized_coords:1; 214 unsigned compare_mode:1; 215 unsigned compare_func:3; 216 217 unsigned min_lod; 218 unsigned view_min_lod; 219 unsigned view_max_lod; 220 221 SVGA3dSamplerId id[2]; 222}; 223 224 225struct svga_pipe_sampler_view 226{ 227 struct pipe_sampler_view base; 228 229 SVGA3dShaderResourceViewId id; 230}; 231 232 233static inline struct svga_pipe_sampler_view * 234svga_pipe_sampler_view(struct pipe_sampler_view *v) 235{ 236 return (struct svga_pipe_sampler_view *) v; 237} 238 239 240struct svga_velems_state { 241 unsigned count; 242 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; 243 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */ 244 245 /** Bitmasks indicating which attributes need format conversion */ 246 unsigned adjust_attrib_range; /**< range adjustment */ 247 unsigned attrib_is_pure_int; /**< pure int */ 248 unsigned adjust_attrib_w_1; /**< set w = 1 */ 249 unsigned adjust_attrib_itof; /**< int->float */ 250 unsigned adjust_attrib_utof; /**< uint->float */ 251 unsigned attrib_is_bgra; /**< R / B swizzling */ 252 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */ 253 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */ 254 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */ 255 256 boolean need_swvfetch; 257 258 SVGA3dElementLayoutId id; /**< VGPU10 */ 259}; 260 261struct svga_constant_buffer { 262 struct svga_winsys_surface *handle; 263 unsigned size; 264}; 265 266/* Use to calculate differences between state emitted to hardware and 267 * current driver-calculated state. 268 */ 269struct svga_state 270{ 271 const struct svga_blend_state *blend; 272 const struct svga_depth_stencil_state *depth; 273 const struct svga_rasterizer_state *rast; 274 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; 275 const struct svga_velems_state *velems; 276 277 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */ 278 struct svga_fragment_shader *fs; 279 struct svga_vertex_shader *vs; 280 struct svga_geometry_shader *user_gs; /* user-specified GS */ 281 struct svga_geometry_shader *gs; /* derived GS */ 282 /* derived tessellation control shader */ 283 struct svga_tcs_shader *tcs; 284 /* derived tessellation evaluation shader */ 285 struct svga_tes_shader *tes; 286 struct svga_compute_shader *cs; 287 288 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS]; 289 /** Constant buffers for each shader. 290 * The size should probably always match with that of 291 * svga_shader_emitter_v10.num_shader_consts. 292 */ 293 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS]; 294 295 struct pipe_framebuffer_state framebuffer; 296 float depthscale; 297 298 /* Hack to limit the number of different render targets between 299 * flushes. Helps avoid blowing out our surface cache in EXA. 300 */ 301 int nr_fbs; 302 303 struct pipe_poly_stipple poly_stipple; 304 struct pipe_scissor_state scissor[SVGA3D_DX_MAX_VIEWPORTS]; 305 struct pipe_blend_color blend_color; 306 struct pipe_stencil_ref stencil_ref; 307 struct pipe_clip_state clip; 308 struct pipe_viewport_state viewport[SVGA3D_DX_MAX_VIEWPORTS]; 309 310 unsigned num_samplers[PIPE_SHADER_TYPES]; 311 unsigned num_sampler_views[PIPE_SHADER_TYPES]; 312 unsigned num_vertex_buffers; 313 enum pipe_prim_type reduced_prim; 314 315 unsigned vertex_id_bias; 316 317 struct { 318 unsigned flag_1d; 319 unsigned flag_srgb; 320 } tex_flags; 321 322 unsigned sample_mask; 323 unsigned vertices_per_patch; 324 float default_tesslevels[6]; /* tessellation (outer[4] + inner[2]) levels */ 325 struct { 326 /* Determine the layout of the grid (in block units) to be used. */ 327 unsigned size[3]; 328 /* If DispatchIndirect is used, this will has grid size info*/ 329 struct pipe_resource *indirect; 330 } grid_info; 331}; 332 333struct svga_prescale { 334 float translate[4]; 335 float scale[4]; 336 boolean enabled; 337}; 338 339struct svga_depthrange { 340 float zmin; 341 float zmax; 342}; 343 344/* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR ) 345 */ 346struct svga_hw_clear_state 347{ 348 struct pipe_framebuffer_state framebuffer; 349 350 /* VGPU9 only */ 351 SVGA3dRect viewport; 352 struct svga_depthrange depthrange; 353 354 /* VGPU10 state */ 355 SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS]; 356 struct svga_prescale prescale[SVGA3D_DX_MAX_VIEWPORTS]; 357 struct pipe_scissor_state scissors[SVGA3D_DX_MAX_VIEWPORTS]; 358 unsigned num_prescale; 359 360 unsigned num_rendertargets; 361 struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS]; 362 struct pipe_surface *dsv; 363}; 364 365struct svga_hw_view_state 366{ 367 struct pipe_resource *texture; 368 struct svga_sampler_view *v; 369 unsigned min_lod; 370 unsigned max_lod; 371 boolean dirty; 372}; 373 374/* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW ) 375 */ 376struct svga_hw_draw_state 377{ 378 /** VGPU9 rasterization state */ 379 unsigned rs[SVGA3D_RS_MAX]; 380 /** VGPU9 texture sampler and bindings state */ 381 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX]; 382 383 /** VGPU9 texture views */ 384 unsigned num_views; 385 unsigned num_backed_views; /* views with backing copy of texture */ 386 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS]; 387 388 /** VGPU9 constant buffer values */ 389 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4]; 390 391 /** Currently bound shaders */ 392 struct svga_shader_variant *fs; 393 struct svga_shader_variant *vs; 394 struct svga_shader_variant *gs; 395 struct svga_shader_variant *tcs; 396 struct svga_shader_variant *tes; 397 struct svga_shader_variant *cs; 398 399 /** Currently bound constant buffer, per shader stage */ 400 struct pipe_resource *constbuf[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS]; 401 struct svga_constant_buffer constbufoffsets[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS]; 402 403 /** Bitmask of enabled constant buffers */ 404 unsigned enabled_constbufs[PIPE_SHADER_TYPES]; 405 406 /** 407 * These are used to reduce the number of times we call u_upload_unmap() 408 * while updating the zero-th/default VGPU10 constant buffer. 409 */ 410 struct pipe_resource *const0_buffer; 411 struct svga_winsys_surface *const0_handle; 412 413 /** VGPU10 HW state (used to prevent emitting redundant state) */ 414 SVGA3dDepthStencilStateId depth_stencil_id; 415 unsigned stencil_ref; 416 SVGA3dBlendStateId blend_id; 417 float blend_factor[4]; 418 unsigned blend_sample_mask; 419 SVGA3dRasterizerStateId rasterizer_id; 420 SVGA3dElementLayoutId layout_id; 421 SVGA3dPrimitiveType topology; 422 423 /** Vertex buffer state */ 424 SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS]; 425 struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS]; 426 unsigned num_vbuffers; 427 428 struct pipe_resource *ib; /**< index buffer for drawing */ 429 SVGA3dSurfaceFormat ib_format; 430 unsigned ib_offset; 431 432 unsigned num_samplers[PIPE_SHADER_TYPES]; 433 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; 434 435 unsigned num_sampler_views[PIPE_SHADER_TYPES]; 436 struct pipe_sampler_view 437 *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; 438 439 /* used for rebinding */ 440 unsigned default_constbuf_size[PIPE_SHADER_TYPES]; 441 442 boolean rasterizer_discard; /* set if rasterization is disabled */ 443 boolean has_backed_views; /* set if any of the rtv/dsv is a backed surface view */ 444}; 445 446 447/* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL ) 448 */ 449struct svga_sw_state 450{ 451 /* which parts we need */ 452 boolean need_swvfetch; 453 boolean need_pipeline; 454 boolean need_swtnl; 455 456 /* Flag to make sure that need sw is on while 457 * updating state within a swtnl call. 458 */ 459 boolean in_swtnl_draw; 460}; 461 462 463/* Queue some state updates (like rss) and submit them to hardware in 464 * a single packet. 465 */ 466struct svga_hw_queue; 467 468struct svga_query; 469struct svga_qmem_alloc_entry; 470 471struct svga_context 472{ 473 struct pipe_context pipe; 474 struct svga_winsys_context *swc; 475 struct blitter_context *blitter; 476 struct u_upload_mgr *const0_upload; 477 struct u_upload_mgr *tex_upload; 478 479 struct { 480 boolean no_swtnl; 481 boolean force_swtnl; 482 boolean use_min_mipmap; 483 484 /* incremented for each shader */ 485 unsigned shader_id; 486 487 boolean no_line_width; 488 boolean force_hw_line_stipple; 489 490 /** To report perf/conformance/etc issues to the gallium frontend */ 491 struct pipe_debug_callback callback; 492 } debug; 493 494 struct { 495 struct draw_context *draw; 496 struct vbuf_render *backend; 497 unsigned hw_prim; 498 boolean new_vbuf; 499 boolean new_vdecl; 500 } swtnl; 501 502 /* Bitmask of blend state objects IDs */ 503 struct util_bitmask *blend_object_id_bm; 504 505 /* Bitmask of depth/stencil state objects IDs */ 506 struct util_bitmask *ds_object_id_bm; 507 508 /* Bitmask of input element object IDs */ 509 struct util_bitmask *input_element_object_id_bm; 510 511 /* Bitmask of rasterizer object IDs */ 512 struct util_bitmask *rast_object_id_bm; 513 514 /* Bitmask of sampler state objects IDs */ 515 struct util_bitmask *sampler_object_id_bm; 516 517 /* Bitmask of sampler view IDs */ 518 struct util_bitmask *sampler_view_id_bm; 519 520 /* Bitmask of used shader IDs */ 521 struct util_bitmask *shader_id_bm; 522 523 /* Bitmask of used surface view IDs */ 524 struct util_bitmask *surface_view_id_bm; 525 526 /* Bitmask of used stream output IDs */ 527 struct util_bitmask *stream_output_id_bm; 528 529 /* Bitmask of used query IDs */ 530 struct util_bitmask *query_id_bm; 531 532 struct { 533 uint64_t dirty[SVGA_STATE_MAX]; 534 535 /** bitmasks of which const buffers are changed */ 536 unsigned dirty_constbufs[PIPE_SHADER_TYPES]; 537 538 unsigned texture_timestamp; 539 540 struct svga_sw_state sw; 541 struct svga_hw_draw_state hw_draw; 542 struct svga_hw_clear_state hw_clear; 543 } state; 544 545 struct svga_state curr; /* state from the gallium frontend */ 546 uint64_t dirty; /* statechanges since last update_state() */ 547 548 union { 549 struct { 550 unsigned rendertargets:1; 551 unsigned texture_samplers:1; 552 unsigned constbufs:1; 553 unsigned vs:1; 554 unsigned fs:1; 555 unsigned gs:1; 556 unsigned tcs:1; 557 unsigned tes:1; 558 unsigned cs:1; 559 unsigned query:1; 560 } flags; 561 unsigned val; 562 } rebind; 563 564 struct svga_hwtnl *hwtnl; 565 566 /** Queries states */ 567 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */ 568 unsigned gb_query_len; /**< gb query object size */ 569 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */ 570 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX]; 571 /**< query mem block mapping */ 572 struct svga_query *sq[SVGA_QUERY_MAX+12]; /**< queries currently in progress */ 573 /* The last 12 entries are for streamout 574 * queries for stream 0..3 575 */ 576 577 /** List of buffers with queued transfers */ 578 struct list_head dirty_buffers; 579 580 /** performance / info queries for HUD */ 581 struct { 582 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */ 583 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */ 584 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */ 585 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */ 586 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */ 587 uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */ 588 uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */ 589 uint64_t num_command_buffers; /**< SVGA_QUERY_NUM_COMMAND_BUFFERS */ 590 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */ 591 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */ 592 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */ 593 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */ 594 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */ 595 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */ 596 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */ 597 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */ 598 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */ 599 600 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */ 601 uint64_t num_blend_objects; 602 uint64_t num_depthstencil_objects; 603 uint64_t num_rasterizer_objects; 604 uint64_t num_sampler_objects; 605 uint64_t num_samplerview_objects; 606 uint64_t num_vertexelement_objects; 607 608 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */ 609 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */ 610 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */ 611 uint64_t shader_mem_used; /**< SVGA_QUERY_SHADER_MEM_USED */ 612 613 boolean uses_time; /**< os_time_get() calls needed? */ 614 } hud; 615 616 /** The currently bound stream output targets */ 617 boolean in_streamout; /* Set if streamout is active */ 618 unsigned num_so_targets; 619 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS]; 620 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS]; 621 struct svga_stream_output *current_so; 622 623 /** 624 * The following states are used in the workaround for auto draw with 625 * stream instancing. 626 */ 627 628 /* Last bound SO targets that can be used to get vertex count */ 629 struct pipe_stream_output_target *vcount_so_targets[SVGA3D_DX_MAX_SOTARGETS]; 630 unsigned vcount_buffer_stream; /* SO buffer to stream index mask */ 631 struct pipe_query *so_queries[4]; /* SO stat queries for each stream */ 632 633 /** A blend state with blending disabled, for falling back to when blending 634 * is illegal (e.g. an integer texture is bound) 635 */ 636 struct svga_blend_state *noop_blend; 637 638 struct { 639 struct pipe_resource *texture; 640 struct svga_pipe_sampler_view *sampler_view; 641 void *sampler; 642 } polygon_stipple; 643 644 /** Alternate rasterizer states created for point sprite */ 645 struct svga_rasterizer_state *rasterizer_no_cull[2]; 646 647 /** Depth stencil state created to disable depth stencil test */ 648 struct svga_depth_stencil_state *depthstencil_disable; 649 650 /** Current conditional rendering predicate */ 651 struct { 652 SVGA3dQueryId query_id; 653 boolean cond; 654 } pred; 655 656 boolean render_condition; 657 boolean disable_rasterizer; /* Set if to disable rasterization */ 658 uint8_t patch_vertices; 659 660 struct { 661 struct svga_tcs_shader *passthrough_tcs; 662 struct svga_vertex_shader *vs; 663 struct svga_tes_shader *tes; 664 unsigned vertices_per_patch; 665 boolean passthrough; 666 } tcs; 667 668}; 669 670/* A flag for each frontend state object: 671 */ 672#define SVGA_NEW_BLEND ((uint64_t) 0x1) 673#define SVGA_NEW_DEPTH_STENCIL_ALPHA ((uint64_t) 0x2) 674#define SVGA_NEW_RAST ((uint64_t) 0x4) 675#define SVGA_NEW_SAMPLER ((uint64_t) 0x8) 676#define SVGA_NEW_TEXTURE ((uint64_t) 0x10) 677#define SVGA_NEW_VBUFFER ((uint64_t) 0x20) 678#define SVGA_NEW_VELEMENT ((uint64_t) 0x40) 679#define SVGA_NEW_FS ((uint64_t) 0x80) 680#define SVGA_NEW_VS ((uint64_t) 0x100) 681#define SVGA_NEW_FS_CONST_BUFFER ((uint64_t) 0x200) 682#define SVGA_NEW_VS_CONST_BUFFER ((uint64_t) 0x400) 683#define SVGA_NEW_FRAME_BUFFER ((uint64_t) 0x800) 684#define SVGA_NEW_STIPPLE ((uint64_t) 0x1000) 685#define SVGA_NEW_SCISSOR ((uint64_t) 0x2000) 686#define SVGA_NEW_BLEND_COLOR ((uint64_t) 0x4000) 687#define SVGA_NEW_CLIP ((uint64_t) 0x8000) 688#define SVGA_NEW_VIEWPORT ((uint64_t) 0x10000) 689#define SVGA_NEW_PRESCALE ((uint64_t) 0x20000) 690#define SVGA_NEW_REDUCED_PRIMITIVE ((uint64_t) 0x40000) 691#define SVGA_NEW_TEXTURE_BINDING ((uint64_t) 0x80000) 692#define SVGA_NEW_NEED_PIPELINE ((uint64_t) 0x100000) 693#define SVGA_NEW_NEED_SWVFETCH ((uint64_t) 0x200000) 694#define SVGA_NEW_NEED_SWTNL ((uint64_t) 0x400000) 695#define SVGA_NEW_FS_VARIANT ((uint64_t) 0x800000) 696#define SVGA_NEW_VS_VARIANT ((uint64_t) 0x1000000) 697#define SVGA_NEW_TEXTURE_FLAGS ((uint64_t) 0x4000000) 698#define SVGA_NEW_STENCIL_REF ((uint64_t) 0x8000000) 699#define SVGA_NEW_GS ((uint64_t) 0x10000000) 700#define SVGA_NEW_GS_CONST_BUFFER ((uint64_t) 0x20000000) 701#define SVGA_NEW_GS_VARIANT ((uint64_t) 0x40000000) 702#define SVGA_NEW_TEXTURE_CONSTS ((uint64_t) 0x80000000) 703#define SVGA_NEW_TCS ((uint64_t) 0x100000000) 704#define SVGA_NEW_TES ((uint64_t) 0x200000000) 705#define SVGA_NEW_TCS_VARIANT ((uint64_t) 0x400000000) 706#define SVGA_NEW_TES_VARIANT ((uint64_t) 0x800000000) 707#define SVGA_NEW_TCS_CONST_BUFFER ((uint64_t) 0x1000000000) 708#define SVGA_NEW_TES_CONST_BUFFER ((uint64_t) 0x2000000000) 709#define SVGA_NEW_TCS_PARAM ((uint64_t) 0x4000000000) 710#define SVGA_NEW_FS_CONSTS ((uint64_t) 0x8000000000) 711#define SVGA_NEW_VS_CONSTS ((uint64_t) 0x10000000000) 712#define SVGA_NEW_GS_CONSTS ((uint64_t) 0x20000000000) 713#define SVGA_NEW_TCS_CONSTS ((uint64_t) 0x40000000000) 714#define SVGA_NEW_TES_CONSTS ((uint64_t) 0x800000000000) 715#define SVGA_NEW_ALL ((uint64_t) 0xFFFFFFFFFFFFFFFF) 716 717#define SVGA_NEW_CONST_BUFFER \ 718 (SVGA_NEW_FS_CONST_BUFFER | SVGA_NEW_VS_CONST_BUFFER | \ 719 SVGA_NEW_GS_CONST_BUFFER | \ 720 SVGA_NEW_TCS_CONST_BUFFER | SVGA_NEW_TES_CONST_BUFFER) 721 722 723void svga_init_state_functions( struct svga_context *svga ); 724void svga_init_flush_functions( struct svga_context *svga ); 725void svga_init_string_functions( struct svga_context *svga ); 726void svga_init_blit_functions(struct svga_context *svga); 727 728void svga_init_blend_functions( struct svga_context *svga ); 729void svga_init_depth_stencil_functions( struct svga_context *svga ); 730void svga_init_misc_functions( struct svga_context *svga ); 731void svga_init_rasterizer_functions( struct svga_context *svga ); 732void svga_init_sampler_functions( struct svga_context *svga ); 733void svga_init_cs_functions( struct svga_context *svga ); 734void svga_init_fs_functions( struct svga_context *svga ); 735void svga_init_vs_functions( struct svga_context *svga ); 736void svga_init_gs_functions( struct svga_context *svga ); 737void svga_init_ts_functions( struct svga_context *svga ); 738void svga_init_vertex_functions( struct svga_context *svga ); 739void svga_init_constbuffer_functions( struct svga_context *svga ); 740void svga_init_draw_functions( struct svga_context *svga ); 741void svga_init_query_functions( struct svga_context *svga ); 742void svga_init_surface_functions(struct svga_context *svga); 743void svga_init_stream_output_functions( struct svga_context *svga ); 744void svga_init_clear_functions( struct svga_context *svga ); 745 746void svga_cleanup_vertex_state( struct svga_context *svga ); 747void svga_cleanup_sampler_state( struct svga_context *svga ); 748void svga_cleanup_tss_binding( struct svga_context *svga ); 749void svga_cleanup_framebuffer( struct svga_context *svga ); 750void svga_cleanup_tcs_state( struct svga_context *svga ); 751 752void svga_context_flush( struct svga_context *svga, 753 struct pipe_fence_handle **pfence ); 754 755void svga_context_finish(struct svga_context *svga); 756 757void svga_hwtnl_flush_retry( struct svga_context *svga ); 758void svga_hwtnl_flush_buffer( struct svga_context *svga, 759 struct pipe_resource *buffer ); 760boolean svga_hwtnl_has_pending_prim(struct svga_hwtnl *); 761 762void svga_surfaces_flush(struct svga_context *svga); 763 764struct pipe_context * 765svga_context_create(struct pipe_screen *screen, 766 void *priv, unsigned flags); 767 768void svga_toggle_render_condition(struct svga_context *svga, 769 boolean render_condition_enabled, 770 boolean on); 771 772/*********************************************************************** 773 * Inline conversion functions. These are better-typed than the 774 * macros used previously: 775 */ 776static inline struct svga_context * 777svga_context( struct pipe_context *pipe ) 778{ 779 return (struct svga_context *)pipe; 780} 781 782static inline struct svga_winsys_screen * 783svga_sws(struct svga_context *svga) 784{ 785 return svga_screen(svga->pipe.screen)->sws; 786} 787 788static inline boolean 789svga_have_gb_objects(const struct svga_context *svga) 790{ 791 return svga_screen(svga->pipe.screen)->sws->have_gb_objects; 792} 793 794static inline boolean 795svga_have_gb_dma(const struct svga_context *svga) 796{ 797 return svga_screen(svga->pipe.screen)->sws->have_gb_dma; 798} 799 800static inline boolean 801svga_have_vgpu10(const struct svga_context *svga) 802{ 803 return svga_screen(svga->pipe.screen)->sws->have_vgpu10; 804} 805 806static inline boolean 807svga_have_sm4_1(const struct svga_context *svga) 808{ 809 return svga_screen(svga->pipe.screen)->sws->have_sm4_1; 810} 811 812static inline boolean 813svga_have_sm5(const struct svga_context *svga) 814{ 815 return svga_screen(svga->pipe.screen)->sws->have_sm5; 816} 817 818static inline boolean 819svga_need_to_rebind_resources(const struct svga_context *svga) 820{ 821 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources; 822} 823 824static inline boolean 825svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2) 826{ 827 return memcmp(r1, r2, sizeof(*r1)) == 0; 828} 829 830/** 831 * If the Gallium HUD is enabled, this will return the current time. 832 * Otherwise, just return zero. 833 */ 834static inline int64_t 835svga_get_time(struct svga_context *svga) 836{ 837 return svga->hud.uses_time ? os_time_get() : 0; 838} 839 840/* 841 * The SVGA_TRY_XX family of macros can be used to optionally replace a 842 * function call with an error value, the purpose is to trigger and test 843 * retry path handling. 844 */ 845#ifdef DEBUG 846 847/* 848 * Optionally replace a function call with a PIPE_ERROR_OUT_OF_MEMORY 849 * return value 850 */ 851#define SVGA_TRY(_func) \ 852 ((SVGA_DEBUG & DEBUG_RETRY) ? PIPE_ERROR_OUT_OF_MEMORY : (_func)) 853 854/* Optionally replace a function call with a NULL return value */ 855#define SVGA_TRY_PTR(_func) \ 856 ((SVGA_DEBUG & DEBUG_RETRY) ? NULL : (_func)) 857 858/* 859 * Optionally replace a function call with a NULL return value, and set 860 * the _retry parameter to TRUE. 861 */ 862#define SVGA_TRY_MAP(_func, _retry) \ 863 ((SVGA_DEBUG & DEBUG_RETRY) ? (_retry) = TRUE, NULL : (_func)) 864#else 865 866#define SVGA_TRY(_func) (_func) 867 868#define SVGA_TRY_PTR(_func) (_func) 869 870#define SVGA_TRY_MAP(_func, _retry) (_func) 871#endif 872 873/** 874 * Enter retry processing after hitting out-of-command space 875 */ 876static inline void 877svga_retry_enter(struct svga_context *svga) 878{ 879 /* We shouldn't nest retries, but currently we do. */ 880 if ((SVGA_DEBUG & DEBUG_RETRY) && svga->swc->in_retry) { 881 debug_printf("WARNING: Recursive retry. Level: %u.\n", 882 svga->swc->in_retry); 883 } 884 svga->swc->in_retry++; 885} 886 887/** 888 * Exit retry processing after hitting out-of-command space 889 */ 890static inline void 891svga_retry_exit(struct svga_context *svga) 892{ 893 assert(svga->swc->in_retry > 0); 894 svga->swc->in_retry--; 895} 896 897/** 898 * Perform a function call, and on failure flush the context and retry, 899 * asserting that the retry succeeded. On return, the boolean argument 900 * _retried indicates whether the function call was retried or not. 901 */ 902#define SVGA_RETRY_CHECK(_svga, _func, _retried) \ 903 do { \ 904 enum pipe_error ret; \ 905 \ 906 ret = SVGA_TRY(_func); \ 907 (_retried) = (ret != PIPE_OK); \ 908 if (_retried) { \ 909 svga_retry_enter(_svga); \ 910 svga_context_flush(_svga, NULL); \ 911 ret = (_func); \ 912 assert(ret == PIPE_OK); \ 913 svga_retry_exit(_svga); \ 914 } \ 915 } while(0) 916 917/** 918 * Perform a function call, and on failure flush the context and retry, 919 * asserting that the retry succeeded. 920 */ 921#define SVGA_RETRY(_svga, _func) \ 922 do { \ 923 UNUSED boolean retried; \ 924 \ 925 SVGA_RETRY_CHECK(_svga, _func, retried); \ 926 } while(0) 927 928/** 929 * Perform a function call, and on out-of-memory, flush the context and 930 * retry. The retry return value is stored in _ret for reuse. 931 */ 932#define SVGA_RETRY_OOM(_svga, _ret, _func) \ 933 do { \ 934 (_ret) = SVGA_TRY(_func); \ 935 if ((_ret) == PIPE_ERROR_OUT_OF_MEMORY) { \ 936 svga_retry_enter(_svga); \ 937 svga_context_flush(_svga, NULL); \ 938 (_ret) = (_func); \ 939 svga_retry_exit(_svga); \ 940 } \ 941 } while (0); 942 943#endif 944