101e04c3fSmrg/****************************************************************************
201e04c3fSmrg * Copyright (C) 2015 Intel Corporation.   All Rights Reserved.
301e04c3fSmrg *
401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
501e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
601e04c3fSmrg * to deal in the Software without restriction, including without limitation
701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
901e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1001e04c3fSmrg *
1101e04c3fSmrg * The above copyright notice and this permission notice (including the next
1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the
1301e04c3fSmrg * Software.
1401e04c3fSmrg *
1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2101e04c3fSmrg * IN THE SOFTWARE.
2201e04c3fSmrg ***************************************************************************/
2301e04c3fSmrg
2401e04c3fSmrg#include "swr_context.h"
2501e04c3fSmrg#include "swr_memory.h"
2601e04c3fSmrg#include "swr_screen.h"
2701e04c3fSmrg#include "swr_resource.h"
2801e04c3fSmrg#include "swr_scratch.h"
2901e04c3fSmrg#include "swr_query.h"
3001e04c3fSmrg#include "swr_fence.h"
3101e04c3fSmrg
3201e04c3fSmrg#include "util/u_memory.h"
3301e04c3fSmrg#include "util/u_inlines.h"
347ec681f3Smrg#include "util/format/u_format.h"
3501e04c3fSmrg#include "util/u_atomic.h"
3601e04c3fSmrg#include "util/u_upload_mgr.h"
3701e04c3fSmrg#include "util/u_transfer.h"
3801e04c3fSmrg#include "util/u_surface.h"
3901e04c3fSmrg
4001e04c3fSmrg#include "api.h"
4101e04c3fSmrg#include "backend.h"
4201e04c3fSmrg#include "knobs.h"
4301e04c3fSmrg
4401e04c3fSmrgstatic struct pipe_surface *
4501e04c3fSmrgswr_create_surface(struct pipe_context *pipe,
4601e04c3fSmrg                   struct pipe_resource *pt,
4701e04c3fSmrg                   const struct pipe_surface *surf_tmpl)
4801e04c3fSmrg{
4901e04c3fSmrg   struct pipe_surface *ps;
5001e04c3fSmrg
5101e04c3fSmrg   ps = CALLOC_STRUCT(pipe_surface);
5201e04c3fSmrg   if (ps) {
5301e04c3fSmrg      pipe_reference_init(&ps->reference, 1);
5401e04c3fSmrg      pipe_resource_reference(&ps->texture, pt);
5501e04c3fSmrg      ps->context = pipe;
5601e04c3fSmrg      ps->format = surf_tmpl->format;
5701e04c3fSmrg      if (pt->target != PIPE_BUFFER) {
5801e04c3fSmrg         assert(surf_tmpl->u.tex.level <= pt->last_level);
5901e04c3fSmrg         ps->width = u_minify(pt->width0, surf_tmpl->u.tex.level);
6001e04c3fSmrg         ps->height = u_minify(pt->height0, surf_tmpl->u.tex.level);
6101e04c3fSmrg         ps->u.tex.level = surf_tmpl->u.tex.level;
6201e04c3fSmrg         ps->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
6301e04c3fSmrg         ps->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
6401e04c3fSmrg      } else {
6501e04c3fSmrg         /* setting width as number of elements should get us correct
6601e04c3fSmrg          * renderbuffer width */
6701e04c3fSmrg         ps->width = surf_tmpl->u.buf.last_element
6801e04c3fSmrg            - surf_tmpl->u.buf.first_element + 1;
6901e04c3fSmrg         ps->height = pt->height0;
7001e04c3fSmrg         ps->u.buf.first_element = surf_tmpl->u.buf.first_element;
7101e04c3fSmrg         ps->u.buf.last_element = surf_tmpl->u.buf.last_element;
7201e04c3fSmrg         assert(ps->u.buf.first_element <= ps->u.buf.last_element);
7301e04c3fSmrg         assert(ps->u.buf.last_element < ps->width);
7401e04c3fSmrg      }
7501e04c3fSmrg   }
7601e04c3fSmrg   return ps;
7701e04c3fSmrg}
7801e04c3fSmrg
7901e04c3fSmrgstatic void
8001e04c3fSmrgswr_surface_destroy(struct pipe_context *pipe, struct pipe_surface *surf)
8101e04c3fSmrg{
8201e04c3fSmrg   assert(surf->texture);
8301e04c3fSmrg   struct pipe_resource *resource = surf->texture;
8401e04c3fSmrg
8501e04c3fSmrg   /* If the resource has been drawn to, store tiles. */
8601e04c3fSmrg   swr_store_dirty_resource(pipe, resource, SWR_TILE_RESOLVED);
8701e04c3fSmrg
8801e04c3fSmrg   pipe_resource_reference(&resource, NULL);
8901e04c3fSmrg   FREE(surf);
9001e04c3fSmrg}
9101e04c3fSmrg
9201e04c3fSmrg
9301e04c3fSmrgstatic void *
9401e04c3fSmrgswr_transfer_map(struct pipe_context *pipe,
9501e04c3fSmrg                 struct pipe_resource *resource,
9601e04c3fSmrg                 unsigned level,
9701e04c3fSmrg                 unsigned usage,
9801e04c3fSmrg                 const struct pipe_box *box,
9901e04c3fSmrg                 struct pipe_transfer **transfer)
10001e04c3fSmrg{
10101e04c3fSmrg   struct swr_screen *screen = swr_screen(pipe->screen);
10201e04c3fSmrg   struct swr_resource *spr = swr_resource(resource);
10301e04c3fSmrg   struct pipe_transfer *pt;
10401e04c3fSmrg   enum pipe_format format = resource->format;
10501e04c3fSmrg
10601e04c3fSmrg   assert(resource);
10701e04c3fSmrg   assert(level <= resource->last_level);
10801e04c3fSmrg
10901e04c3fSmrg   /* If mapping an attached rendertarget, store tiles to surface and set
11001e04c3fSmrg    * postStoreTileState to SWR_TILE_INVALID so tiles get reloaded on next use
11101e04c3fSmrg    * and nothing needs to be done at unmap. */
11201e04c3fSmrg   swr_store_dirty_resource(pipe, resource, SWR_TILE_INVALID);
11301e04c3fSmrg
1147ec681f3Smrg   if (!(usage & PIPE_MAP_UNSYNCHRONIZED)) {
11501e04c3fSmrg      /* If resource is in use, finish fence before mapping.
11601e04c3fSmrg       * Unless requested not to block, then if not done return NULL map */
1177ec681f3Smrg      if (usage & PIPE_MAP_DONTBLOCK) {
11801e04c3fSmrg         if (swr_is_fence_pending(screen->flush_fence))
11901e04c3fSmrg            return NULL;
12001e04c3fSmrg      } else {
12101e04c3fSmrg         if (spr->status) {
12201e04c3fSmrg            /* But, if there's no fence pending, submit one.
12301e04c3fSmrg             * XXX: Remove once draw timestamps are finished. */
12401e04c3fSmrg            if (!swr_is_fence_pending(screen->flush_fence))
12501e04c3fSmrg               swr_fence_submit(swr_context(pipe), screen->flush_fence);
12601e04c3fSmrg
12701e04c3fSmrg            swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
12801e04c3fSmrg            swr_resource_unused(resource);
12901e04c3fSmrg         }
13001e04c3fSmrg      }
13101e04c3fSmrg   }
13201e04c3fSmrg
13301e04c3fSmrg   pt = CALLOC_STRUCT(pipe_transfer);
13401e04c3fSmrg   if (!pt)
13501e04c3fSmrg      return NULL;
13601e04c3fSmrg   pipe_resource_reference(&pt->resource, resource);
1377ec681f3Smrg   pt->usage = (pipe_map_flags)usage;
13801e04c3fSmrg   pt->level = level;
13901e04c3fSmrg   pt->box = *box;
14001e04c3fSmrg   pt->stride = spr->swr.pitch;
14101e04c3fSmrg   pt->layer_stride = spr->swr.qpitch * spr->swr.pitch;
14201e04c3fSmrg
14301e04c3fSmrg   /* if we're mapping the depth/stencil, copy in stencil for the section
14401e04c3fSmrg    * being read in
14501e04c3fSmrg    */
1467ec681f3Smrg   if (usage & PIPE_MAP_READ && spr->has_depth && spr->has_stencil) {
14701e04c3fSmrg      size_t zbase, sbase;
14801e04c3fSmrg      for (int z = box->z; z < box->z + box->depth; z++) {
14901e04c3fSmrg         zbase = (z * spr->swr.qpitch + box->y) * spr->swr.pitch +
15001e04c3fSmrg            spr->mip_offsets[level];
15101e04c3fSmrg         sbase = (z * spr->secondary.qpitch + box->y) * spr->secondary.pitch +
15201e04c3fSmrg            spr->secondary_mip_offsets[level];
15301e04c3fSmrg         for (int y = box->y; y < box->y + box->height; y++) {
15401e04c3fSmrg            if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
15501e04c3fSmrg               for (int x = box->x; x < box->x + box->width; x++)
15601e04c3fSmrg                  ((uint8_t*)(spr->swr.xpBaseAddress))[zbase + 4 * x + 3] =
15701e04c3fSmrg                     ((uint8_t*)(spr->secondary.xpBaseAddress))[sbase + x];
15801e04c3fSmrg            } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
15901e04c3fSmrg               for (int x = box->x; x < box->x + box->width; x++)
16001e04c3fSmrg                  ((uint8_t*)(spr->swr.xpBaseAddress))[zbase + 8 * x + 4] =
16101e04c3fSmrg                     ((uint8_t*)(spr->secondary.xpBaseAddress))[sbase + x];
16201e04c3fSmrg            }
16301e04c3fSmrg            zbase += spr->swr.pitch;
16401e04c3fSmrg            sbase += spr->secondary.pitch;
16501e04c3fSmrg         }
16601e04c3fSmrg      }
16701e04c3fSmrg   }
16801e04c3fSmrg
16901e04c3fSmrg   unsigned offset = box->z * pt->layer_stride +
17001e04c3fSmrg      util_format_get_nblocksy(format, box->y) * pt->stride +
17101e04c3fSmrg      util_format_get_stride(format, box->x);
17201e04c3fSmrg
17301e04c3fSmrg   *transfer = pt;
17401e04c3fSmrg
17501e04c3fSmrg   return (void*)(spr->swr.xpBaseAddress + offset + spr->mip_offsets[level]);
17601e04c3fSmrg}
17701e04c3fSmrg
17801e04c3fSmrgstatic void
17901e04c3fSmrgswr_transfer_flush_region(struct pipe_context *pipe,
18001e04c3fSmrg                          struct pipe_transfer *transfer,
18101e04c3fSmrg                          const struct pipe_box *flush_box)
18201e04c3fSmrg{
18301e04c3fSmrg   assert(transfer->resource);
1847ec681f3Smrg   assert(transfer->usage & PIPE_MAP_WRITE);
18501e04c3fSmrg
18601e04c3fSmrg   struct swr_resource *spr = swr_resource(transfer->resource);
18701e04c3fSmrg   if (!spr->has_depth || !spr->has_stencil)
18801e04c3fSmrg      return;
18901e04c3fSmrg
19001e04c3fSmrg   size_t zbase, sbase;
19101e04c3fSmrg   struct pipe_box box = *flush_box;
19201e04c3fSmrg   box.x += transfer->box.x;
19301e04c3fSmrg   box.y += transfer->box.y;
19401e04c3fSmrg   box.z += transfer->box.z;
19501e04c3fSmrg   for (int z = box.z; z < box.z + box.depth; z++) {
19601e04c3fSmrg      zbase = (z * spr->swr.qpitch + box.y) * spr->swr.pitch +
19701e04c3fSmrg         spr->mip_offsets[transfer->level];
19801e04c3fSmrg      sbase = (z * spr->secondary.qpitch + box.y) * spr->secondary.pitch +
19901e04c3fSmrg         spr->secondary_mip_offsets[transfer->level];
20001e04c3fSmrg      for (int y = box.y; y < box.y + box.height; y++) {
20101e04c3fSmrg         if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
20201e04c3fSmrg            for (int x = box.x; x < box.x + box.width; x++)
20301e04c3fSmrg               ((uint8_t*)(spr->secondary.xpBaseAddress))[sbase + x] =
20401e04c3fSmrg                  ((uint8_t*)(spr->swr.xpBaseAddress))[zbase + 4 * x + 3];
20501e04c3fSmrg         } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) {
20601e04c3fSmrg            for (int x = box.x; x < box.x + box.width; x++)
20701e04c3fSmrg               ((uint8_t*)(spr->secondary.xpBaseAddress))[sbase + x] =
20801e04c3fSmrg                  ((uint8_t*)(spr->swr.xpBaseAddress))[zbase + 8 * x + 4];
20901e04c3fSmrg         }
21001e04c3fSmrg         zbase += spr->swr.pitch;
21101e04c3fSmrg         sbase += spr->secondary.pitch;
21201e04c3fSmrg      }
21301e04c3fSmrg   }
21401e04c3fSmrg}
21501e04c3fSmrg
21601e04c3fSmrgstatic void
21701e04c3fSmrgswr_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *transfer)
21801e04c3fSmrg{
21901e04c3fSmrg   assert(transfer->resource);
22001e04c3fSmrg
22101e04c3fSmrg   struct swr_resource *spr = swr_resource(transfer->resource);
22201e04c3fSmrg   /* if we're mapping the depth/stencil, copy in stencil for the section
22301e04c3fSmrg    * being written out
22401e04c3fSmrg    */
2257ec681f3Smrg   if (transfer->usage & PIPE_MAP_WRITE &&
2267ec681f3Smrg       !(transfer->usage & PIPE_MAP_FLUSH_EXPLICIT) &&
22701e04c3fSmrg       spr->has_depth && spr->has_stencil) {
22801e04c3fSmrg      struct pipe_box box;
22901e04c3fSmrg      u_box_3d(0, 0, 0, transfer->box.width, transfer->box.height,
23001e04c3fSmrg               transfer->box.depth, &box);
23101e04c3fSmrg      swr_transfer_flush_region(pipe, transfer, &box);
23201e04c3fSmrg   }
23301e04c3fSmrg
23401e04c3fSmrg   pipe_resource_reference(&transfer->resource, NULL);
23501e04c3fSmrg   FREE(transfer);
23601e04c3fSmrg}
23701e04c3fSmrg
23801e04c3fSmrg
23901e04c3fSmrgstatic void
24001e04c3fSmrgswr_resource_copy(struct pipe_context *pipe,
24101e04c3fSmrg                  struct pipe_resource *dst,
24201e04c3fSmrg                  unsigned dst_level,
24301e04c3fSmrg                  unsigned dstx,
24401e04c3fSmrg                  unsigned dsty,
24501e04c3fSmrg                  unsigned dstz,
24601e04c3fSmrg                  struct pipe_resource *src,
24701e04c3fSmrg                  unsigned src_level,
24801e04c3fSmrg                  const struct pipe_box *src_box)
24901e04c3fSmrg{
25001e04c3fSmrg   struct swr_screen *screen = swr_screen(pipe->screen);
25101e04c3fSmrg
25201e04c3fSmrg   /* If either the src or dst is a renderTarget, store tiles before copy */
25301e04c3fSmrg   swr_store_dirty_resource(pipe, src, SWR_TILE_RESOLVED);
25401e04c3fSmrg   swr_store_dirty_resource(pipe, dst, SWR_TILE_RESOLVED);
25501e04c3fSmrg
25601e04c3fSmrg   swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0);
25701e04c3fSmrg   swr_resource_unused(src);
25801e04c3fSmrg   swr_resource_unused(dst);
25901e04c3fSmrg
26001e04c3fSmrg   if ((dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER)
26101e04c3fSmrg       || (dst->target != PIPE_BUFFER && src->target != PIPE_BUFFER)) {
26201e04c3fSmrg      util_resource_copy_region(
26301e04c3fSmrg         pipe, dst, dst_level, dstx, dsty, dstz, src, src_level, src_box);
26401e04c3fSmrg      return;
26501e04c3fSmrg   }
26601e04c3fSmrg
26701e04c3fSmrg   debug_printf("unhandled swr_resource_copy\n");
26801e04c3fSmrg}
26901e04c3fSmrg
27001e04c3fSmrg
27101e04c3fSmrgstatic void
27201e04c3fSmrgswr_blit(struct pipe_context *pipe, const struct pipe_blit_info *blit_info)
27301e04c3fSmrg{
27401e04c3fSmrg   struct swr_context *ctx = swr_context(pipe);
27501e04c3fSmrg   /* Make a copy of the const blit_info, so we can modify it */
27601e04c3fSmrg   struct pipe_blit_info info = *blit_info;
27701e04c3fSmrg
27801e04c3fSmrg   if (info.render_condition_enable && !swr_check_render_cond(pipe))
27901e04c3fSmrg      return;
28001e04c3fSmrg
28101e04c3fSmrg   if (info.src.resource->nr_samples > 1 && info.dst.resource->nr_samples <= 1
28201e04c3fSmrg       && !util_format_is_depth_or_stencil(info.src.resource->format)
28301e04c3fSmrg       && !util_format_is_pure_integer(info.src.resource->format)) {
28401e04c3fSmrg      debug_printf("swr_blit: color resolve : %d -> %d\n",
28501e04c3fSmrg            info.src.resource->nr_samples, info.dst.resource->nr_samples);
28601e04c3fSmrg
28701e04c3fSmrg      /* Resolve is done as part of the surface store. */
28801e04c3fSmrg      swr_store_dirty_resource(pipe, info.src.resource, SWR_TILE_RESOLVED);
28901e04c3fSmrg
29001e04c3fSmrg      struct pipe_resource *src_resource = info.src.resource;
29101e04c3fSmrg      struct pipe_resource *resolve_target =
29201e04c3fSmrg         swr_resource(src_resource)->resolve_target;
29301e04c3fSmrg
29401e04c3fSmrg      /* The resolve target becomes the new source for the blit. */
29501e04c3fSmrg      info.src.resource = resolve_target;
29601e04c3fSmrg   }
29701e04c3fSmrg
29801e04c3fSmrg   if (util_try_blit_via_copy_region(pipe, &info)) {
29901e04c3fSmrg      return; /* done */
30001e04c3fSmrg   }
30101e04c3fSmrg
30201e04c3fSmrg   if (info.mask & PIPE_MASK_S) {
30301e04c3fSmrg      debug_printf("swr: cannot blit stencil, skipping\n");
30401e04c3fSmrg      info.mask &= ~PIPE_MASK_S;
30501e04c3fSmrg   }
30601e04c3fSmrg
30701e04c3fSmrg   if (!util_blitter_is_blit_supported(ctx->blitter, &info)) {
30801e04c3fSmrg      debug_printf("swr: blit unsupported %s -> %s\n",
30901e04c3fSmrg                   util_format_short_name(info.src.resource->format),
31001e04c3fSmrg                   util_format_short_name(info.dst.resource->format));
31101e04c3fSmrg      return;
31201e04c3fSmrg   }
31301e04c3fSmrg
31401e04c3fSmrg   if (ctx->active_queries) {
31501e04c3fSmrg      ctx->api.pfnSwrEnableStatsFE(ctx->swrContext, FALSE);
31601e04c3fSmrg      ctx->api.pfnSwrEnableStatsBE(ctx->swrContext, FALSE);
31701e04c3fSmrg   }
31801e04c3fSmrg
31901e04c3fSmrg   util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vertex_buffer);
32001e04c3fSmrg   util_blitter_save_vertex_elements(ctx->blitter, (void *)ctx->velems);
32101e04c3fSmrg   util_blitter_save_vertex_shader(ctx->blitter, (void *)ctx->vs);
32201e04c3fSmrg   util_blitter_save_geometry_shader(ctx->blitter, (void*)ctx->gs);
3237ec681f3Smrg   util_blitter_save_tessctrl_shader(ctx->blitter, (void*)ctx->tcs);
3247ec681f3Smrg   util_blitter_save_tesseval_shader(ctx->blitter, (void*)ctx->tes);
32501e04c3fSmrg   util_blitter_save_so_targets(
32601e04c3fSmrg      ctx->blitter,
32701e04c3fSmrg      ctx->num_so_targets,
32801e04c3fSmrg      (struct pipe_stream_output_target **)ctx->so_targets);
32901e04c3fSmrg   util_blitter_save_rasterizer(ctx->blitter, (void *)ctx->rasterizer);
3307ec681f3Smrg   util_blitter_save_viewport(ctx->blitter, &ctx->viewports[0]);
3317ec681f3Smrg   util_blitter_save_scissor(ctx->blitter, &ctx->scissors[0]);
33201e04c3fSmrg   util_blitter_save_fragment_shader(ctx->blitter, ctx->fs);
33301e04c3fSmrg   util_blitter_save_blend(ctx->blitter, (void *)ctx->blend);
33401e04c3fSmrg   util_blitter_save_depth_stencil_alpha(ctx->blitter,
33501e04c3fSmrg                                         (void *)ctx->depth_stencil);
33601e04c3fSmrg   util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
33701e04c3fSmrg   util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask);
33801e04c3fSmrg   util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer);
33901e04c3fSmrg   util_blitter_save_fragment_sampler_states(
34001e04c3fSmrg      ctx->blitter,
34101e04c3fSmrg      ctx->num_samplers[PIPE_SHADER_FRAGMENT],
34201e04c3fSmrg      (void **)ctx->samplers[PIPE_SHADER_FRAGMENT]);
34301e04c3fSmrg   util_blitter_save_fragment_sampler_views(
34401e04c3fSmrg      ctx->blitter,
34501e04c3fSmrg      ctx->num_sampler_views[PIPE_SHADER_FRAGMENT],
34601e04c3fSmrg      ctx->sampler_views[PIPE_SHADER_FRAGMENT]);
34701e04c3fSmrg   util_blitter_save_render_condition(ctx->blitter,
34801e04c3fSmrg                                      ctx->render_cond_query,
34901e04c3fSmrg                                      ctx->render_cond_cond,
35001e04c3fSmrg                                      ctx->render_cond_mode);
35101e04c3fSmrg
35201e04c3fSmrg   util_blitter_blit(ctx->blitter, &info);
35301e04c3fSmrg
35401e04c3fSmrg   if (ctx->active_queries) {
35501e04c3fSmrg      ctx->api.pfnSwrEnableStatsFE(ctx->swrContext, TRUE);
35601e04c3fSmrg      ctx->api.pfnSwrEnableStatsBE(ctx->swrContext, TRUE);
35701e04c3fSmrg   }
35801e04c3fSmrg}
35901e04c3fSmrg
36001e04c3fSmrg
36101e04c3fSmrgstatic void
36201e04c3fSmrgswr_destroy(struct pipe_context *pipe)
36301e04c3fSmrg{
36401e04c3fSmrg   struct swr_context *ctx = swr_context(pipe);
36501e04c3fSmrg   struct swr_screen *screen = swr_screen(pipe->screen);
36601e04c3fSmrg
36701e04c3fSmrg   if (ctx->blitter)
36801e04c3fSmrg      util_blitter_destroy(ctx->blitter);
36901e04c3fSmrg
37001e04c3fSmrg   for (unsigned i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
37101e04c3fSmrg      if (ctx->framebuffer.cbufs[i]) {
37201e04c3fSmrg         struct swr_resource *res = swr_resource(ctx->framebuffer.cbufs[i]->texture);
37301e04c3fSmrg         /* NULL curr_pipe, so we don't have a reference to a deleted pipe */
37401e04c3fSmrg         res->curr_pipe = NULL;
37501e04c3fSmrg         pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL);
37601e04c3fSmrg      }
37701e04c3fSmrg   }
37801e04c3fSmrg
37901e04c3fSmrg   if (ctx->framebuffer.zsbuf) {
38001e04c3fSmrg      struct swr_resource *res = swr_resource(ctx->framebuffer.zsbuf->texture);
38101e04c3fSmrg      /* NULL curr_pipe, so we don't have a reference to a deleted pipe */
38201e04c3fSmrg      res->curr_pipe = NULL;
38301e04c3fSmrg      pipe_surface_reference(&ctx->framebuffer.zsbuf, NULL);
38401e04c3fSmrg   }
38501e04c3fSmrg
38601e04c3fSmrg   for (unsigned i = 0; i < ARRAY_SIZE(ctx->sampler_views[0]); i++) {
38701e04c3fSmrg      pipe_sampler_view_reference(&ctx->sampler_views[PIPE_SHADER_FRAGMENT][i], NULL);
38801e04c3fSmrg   }
38901e04c3fSmrg
39001e04c3fSmrg   for (unsigned i = 0; i < ARRAY_SIZE(ctx->sampler_views[0]); i++) {
39101e04c3fSmrg      pipe_sampler_view_reference(&ctx->sampler_views[PIPE_SHADER_VERTEX][i], NULL);
39201e04c3fSmrg   }
39301e04c3fSmrg
39401e04c3fSmrg   if (ctx->pipe.stream_uploader)
39501e04c3fSmrg      u_upload_destroy(ctx->pipe.stream_uploader);
39601e04c3fSmrg
39701e04c3fSmrg   /* Idle core after destroying buffer resources, but before deleting
39801e04c3fSmrg    * context.  Destroying resources has potentially called StoreTiles.*/
39901e04c3fSmrg   ctx->api.pfnSwrWaitForIdle(ctx->swrContext);
40001e04c3fSmrg
40101e04c3fSmrg   if (ctx->swrContext)
40201e04c3fSmrg      ctx->api.pfnSwrDestroyContext(ctx->swrContext);
40301e04c3fSmrg
40401e04c3fSmrg   delete ctx->blendJIT;
40501e04c3fSmrg
40601e04c3fSmrg   swr_destroy_scratch_buffers(ctx);
40701e04c3fSmrg
4087ec681f3Smrg
40901e04c3fSmrg   /* Only update screen->pipe if current context is being destroyed */
41001e04c3fSmrg   assert(screen);
41101e04c3fSmrg   if (screen->pipe == pipe)
41201e04c3fSmrg      screen->pipe = NULL;
41301e04c3fSmrg
41401e04c3fSmrg   AlignedFree(ctx);
41501e04c3fSmrg}
41601e04c3fSmrg
41701e04c3fSmrg
41801e04c3fSmrgstatic void
41901e04c3fSmrgswr_render_condition(struct pipe_context *pipe,
42001e04c3fSmrg                     struct pipe_query *query,
4217ec681f3Smrg                     bool condition,
42201e04c3fSmrg                     enum pipe_render_cond_flag mode)
42301e04c3fSmrg{
42401e04c3fSmrg   struct swr_context *ctx = swr_context(pipe);
42501e04c3fSmrg
42601e04c3fSmrg   ctx->render_cond_query = query;
42701e04c3fSmrg   ctx->render_cond_mode = mode;
42801e04c3fSmrg   ctx->render_cond_cond = condition;
42901e04c3fSmrg}
43001e04c3fSmrg
4317ec681f3Smrg
4327ec681f3Smrgstatic void
4337ec681f3Smrgswr_flush_resource(struct pipe_context *ctx, struct pipe_resource *resource)
4347ec681f3Smrg{
4357ec681f3Smrg   // NOOP
4367ec681f3Smrg}
4377ec681f3Smrg
43801e04c3fSmrgstatic void
43901e04c3fSmrgswr_UpdateStats(HANDLE hPrivateContext, const SWR_STATS *pStats)
44001e04c3fSmrg{
44101e04c3fSmrg   swr_draw_context *pDC = (swr_draw_context*)hPrivateContext;
44201e04c3fSmrg
44301e04c3fSmrg   if (!pDC)
44401e04c3fSmrg      return;
44501e04c3fSmrg
44601e04c3fSmrg   struct swr_query_result *pqr = pDC->pStats;
44701e04c3fSmrg
44801e04c3fSmrg   SWR_STATS *pSwrStats = &pqr->core;
44901e04c3fSmrg
45001e04c3fSmrg   pSwrStats->DepthPassCount += pStats->DepthPassCount;
45101e04c3fSmrg   pSwrStats->PsInvocations += pStats->PsInvocations;
45201e04c3fSmrg   pSwrStats->CsInvocations += pStats->CsInvocations;
45301e04c3fSmrg}
45401e04c3fSmrg
45501e04c3fSmrgstatic void
45601e04c3fSmrgswr_UpdateStatsFE(HANDLE hPrivateContext, const SWR_STATS_FE *pStats)
45701e04c3fSmrg{
45801e04c3fSmrg   swr_draw_context *pDC = (swr_draw_context*)hPrivateContext;
45901e04c3fSmrg
46001e04c3fSmrg   if (!pDC)
46101e04c3fSmrg      return;
46201e04c3fSmrg
46301e04c3fSmrg   struct swr_query_result *pqr = pDC->pStats;
46401e04c3fSmrg
46501e04c3fSmrg   SWR_STATS_FE *pSwrStats = &pqr->coreFE;
46601e04c3fSmrg   p_atomic_add(&pSwrStats->IaVertices, pStats->IaVertices);
46701e04c3fSmrg   p_atomic_add(&pSwrStats->IaPrimitives, pStats->IaPrimitives);
46801e04c3fSmrg   p_atomic_add(&pSwrStats->VsInvocations, pStats->VsInvocations);
46901e04c3fSmrg   p_atomic_add(&pSwrStats->HsInvocations, pStats->HsInvocations);
47001e04c3fSmrg   p_atomic_add(&pSwrStats->DsInvocations, pStats->DsInvocations);
47101e04c3fSmrg   p_atomic_add(&pSwrStats->GsInvocations, pStats->GsInvocations);
47201e04c3fSmrg   p_atomic_add(&pSwrStats->CInvocations, pStats->CInvocations);
47301e04c3fSmrg   p_atomic_add(&pSwrStats->CPrimitives, pStats->CPrimitives);
47401e04c3fSmrg   p_atomic_add(&pSwrStats->GsPrimitives, pStats->GsPrimitives);
47501e04c3fSmrg
47601e04c3fSmrg   for (unsigned i = 0; i < 4; i++) {
47701e04c3fSmrg      p_atomic_add(&pSwrStats->SoPrimStorageNeeded[i],
47801e04c3fSmrg            pStats->SoPrimStorageNeeded[i]);
47901e04c3fSmrg      p_atomic_add(&pSwrStats->SoNumPrimsWritten[i],
48001e04c3fSmrg            pStats->SoNumPrimsWritten[i]);
48101e04c3fSmrg   }
48201e04c3fSmrg}
48301e04c3fSmrg
4847ec681f3Smrgstatic void
4857ec681f3Smrgswr_UpdateStreamOut(HANDLE hPrivateContext, uint64_t numPrims)
4867ec681f3Smrg{
4877ec681f3Smrg   swr_draw_context *pDC = (swr_draw_context*)hPrivateContext;
4887ec681f3Smrg
4897ec681f3Smrg   if (!pDC)
4907ec681f3Smrg      return;
4917ec681f3Smrg
4927ec681f3Smrg   if (pDC->soPrims)
4937ec681f3Smrg       *pDC->soPrims += numPrims;
4947ec681f3Smrg}
4957ec681f3Smrg
49601e04c3fSmrgstruct pipe_context *
49701e04c3fSmrgswr_create_context(struct pipe_screen *p_screen, void *priv, unsigned flags)
49801e04c3fSmrg{
49901e04c3fSmrg   struct swr_context *ctx = (struct swr_context *)
50001e04c3fSmrg      AlignedMalloc(sizeof(struct swr_context), KNOB_SIMD_BYTES);
5017ec681f3Smrg   memset((void*)ctx, 0, sizeof(struct swr_context));
50201e04c3fSmrg
50301e04c3fSmrg   swr_screen(p_screen)->pfnSwrGetInterface(ctx->api);
5047ec681f3Smrg   swr_screen(p_screen)->pfnSwrGetTileInterface(ctx->tileApi);
50501e04c3fSmrg   ctx->swrDC.pAPI = &ctx->api;
5067ec681f3Smrg   ctx->swrDC.pTileAPI = &ctx->tileApi;
50701e04c3fSmrg
50801e04c3fSmrg   ctx->blendJIT =
50901e04c3fSmrg      new std::unordered_map<BLEND_COMPILE_STATE, PFN_BLEND_JIT_FUNC>;
51001e04c3fSmrg
51101e04c3fSmrg   ctx->max_draws_in_flight = KNOB_MAX_DRAWS_IN_FLIGHT;
51201e04c3fSmrg
5137ec681f3Smrg   SWR_CREATECONTEXT_INFO createInfo {0};
5147ec681f3Smrg
51501e04c3fSmrg   createInfo.privateStateSize = sizeof(swr_draw_context);
51601e04c3fSmrg   createInfo.pfnLoadTile = swr_LoadHotTile;
51701e04c3fSmrg   createInfo.pfnStoreTile = swr_StoreHotTile;
51801e04c3fSmrg   createInfo.pfnUpdateStats = swr_UpdateStats;
51901e04c3fSmrg   createInfo.pfnUpdateStatsFE = swr_UpdateStatsFE;
5207ec681f3Smrg   createInfo.pfnUpdateStreamOut = swr_UpdateStreamOut;
5219f464c52Smaya   createInfo.pfnMakeGfxPtr = swr_MakeGfxPtr;
52201e04c3fSmrg
52301e04c3fSmrg   SWR_THREADING_INFO threadingInfo {0};
52401e04c3fSmrg
52501e04c3fSmrg   threadingInfo.MAX_WORKER_THREADS        = KNOB_MAX_WORKER_THREADS;
52601e04c3fSmrg   threadingInfo.MAX_NUMA_NODES            = KNOB_MAX_NUMA_NODES;
52701e04c3fSmrg   threadingInfo.MAX_CORES_PER_NUMA_NODE   = KNOB_MAX_CORES_PER_NUMA_NODE;
52801e04c3fSmrg   threadingInfo.MAX_THREADS_PER_CORE      = KNOB_MAX_THREADS_PER_CORE;
52901e04c3fSmrg   threadingInfo.SINGLE_THREADED           = KNOB_SINGLE_THREADED;
53001e04c3fSmrg
53101e04c3fSmrg   // Use non-standard settings for KNL
53201e04c3fSmrg   if (swr_screen(p_screen)->is_knl)
53301e04c3fSmrg   {
53401e04c3fSmrg      if (nullptr == getenv("KNOB_MAX_THREADS_PER_CORE"))
53501e04c3fSmrg         threadingInfo.MAX_THREADS_PER_CORE  = 2;
53601e04c3fSmrg
53701e04c3fSmrg      if (nullptr == getenv("KNOB_MAX_DRAWS_IN_FLIGHT"))
53801e04c3fSmrg      {
53901e04c3fSmrg         ctx->max_draws_in_flight = 2048;
54001e04c3fSmrg         createInfo.MAX_DRAWS_IN_FLIGHT = ctx->max_draws_in_flight;
54101e04c3fSmrg      }
54201e04c3fSmrg   }
54301e04c3fSmrg
54401e04c3fSmrg   createInfo.pThreadInfo = &threadingInfo;
54501e04c3fSmrg
54601e04c3fSmrg   ctx->swrContext = ctx->api.pfnSwrCreateContext(&createInfo);
54701e04c3fSmrg
54801e04c3fSmrg   ctx->api.pfnSwrInit();
54901e04c3fSmrg
55001e04c3fSmrg   if (ctx->swrContext == NULL)
55101e04c3fSmrg      goto fail;
55201e04c3fSmrg
55301e04c3fSmrg   ctx->pipe.screen = p_screen;
55401e04c3fSmrg   ctx->pipe.destroy = swr_destroy;
55501e04c3fSmrg   ctx->pipe.priv = priv;
55601e04c3fSmrg   ctx->pipe.create_surface = swr_create_surface;
55701e04c3fSmrg   ctx->pipe.surface_destroy = swr_surface_destroy;
5587ec681f3Smrg   ctx->pipe.buffer_map = swr_transfer_map;
5597ec681f3Smrg   ctx->pipe.buffer_unmap = swr_transfer_unmap;
5607ec681f3Smrg   ctx->pipe.texture_map = swr_transfer_map;
5617ec681f3Smrg   ctx->pipe.texture_unmap = swr_transfer_unmap;
56201e04c3fSmrg   ctx->pipe.transfer_flush_region = swr_transfer_flush_region;
56301e04c3fSmrg
56401e04c3fSmrg   ctx->pipe.buffer_subdata = u_default_buffer_subdata;
56501e04c3fSmrg   ctx->pipe.texture_subdata = u_default_texture_subdata;
56601e04c3fSmrg
56701e04c3fSmrg   ctx->pipe.clear_texture = util_clear_texture;
56801e04c3fSmrg   ctx->pipe.resource_copy_region = swr_resource_copy;
5697ec681f3Smrg   ctx->pipe.flush_resource = swr_flush_resource;
57001e04c3fSmrg   ctx->pipe.render_condition = swr_render_condition;
57101e04c3fSmrg
57201e04c3fSmrg   swr_state_init(&ctx->pipe);
57301e04c3fSmrg   swr_clear_init(&ctx->pipe);
57401e04c3fSmrg   swr_draw_init(&ctx->pipe);
57501e04c3fSmrg   swr_query_init(&ctx->pipe);
57601e04c3fSmrg
57701e04c3fSmrg   ctx->pipe.stream_uploader = u_upload_create_default(&ctx->pipe);
57801e04c3fSmrg   if (!ctx->pipe.stream_uploader)
57901e04c3fSmrg      goto fail;
58001e04c3fSmrg   ctx->pipe.const_uploader = ctx->pipe.stream_uploader;
58101e04c3fSmrg
58201e04c3fSmrg   ctx->pipe.blit = swr_blit;
58301e04c3fSmrg   ctx->blitter = util_blitter_create(&ctx->pipe);
58401e04c3fSmrg   if (!ctx->blitter)
58501e04c3fSmrg      goto fail;
58601e04c3fSmrg
58701e04c3fSmrg   swr_init_scratch_buffers(ctx);
58801e04c3fSmrg
58901e04c3fSmrg   return &ctx->pipe;
59001e04c3fSmrg
59101e04c3fSmrgfail:
59201e04c3fSmrg   /* Should really validate the init steps and fail gracefully */
59301e04c3fSmrg   swr_destroy(&ctx->pipe);
59401e04c3fSmrg   return NULL;
59501e04c3fSmrg}
596