101e04c3fSmrg/* 201e04c3fSmrg * Copyright © 2014-2018 NVIDIA Corporation 301e04c3fSmrg * 401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 501e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 601e04c3fSmrg * to deal in the Software without restriction, including without limitation 701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the 901e04c3fSmrg * Software is furnished to do so, subject to the following conditions: 1001e04c3fSmrg * 1101e04c3fSmrg * The above copyright notice and this permission notice (including the next 1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1301e04c3fSmrg * Software. 1401e04c3fSmrg * 1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 2101e04c3fSmrg * IN THE SOFTWARE. 2201e04c3fSmrg */ 2301e04c3fSmrg 2401e04c3fSmrg#ifndef TEGRA_RESOURCE_H 2501e04c3fSmrg#define TEGRA_RESOURCE_H 2601e04c3fSmrg 2701e04c3fSmrg#include "pipe/p_state.h" 2801e04c3fSmrg 2901e04c3fSmrgstruct winsys_handle; 3001e04c3fSmrg 3101e04c3fSmrgstruct tegra_resource { 3201e04c3fSmrg struct pipe_resource base; 3301e04c3fSmrg struct pipe_resource *gpu; 347ec681f3Smrg unsigned int refcount; 3501e04c3fSmrg 3601e04c3fSmrg uint64_t modifier; 3701e04c3fSmrg uint32_t stride; 3801e04c3fSmrg uint32_t handle; 3901e04c3fSmrg size_t size; 4001e04c3fSmrg}; 4101e04c3fSmrg 4201e04c3fSmrgstatic inline struct tegra_resource * 4301e04c3fSmrgto_tegra_resource(struct pipe_resource *resource) 4401e04c3fSmrg{ 4501e04c3fSmrg return (struct tegra_resource *)resource; 4601e04c3fSmrg} 4701e04c3fSmrg 4801e04c3fSmrgstatic inline struct pipe_resource * 4901e04c3fSmrgtegra_resource_unwrap(struct pipe_resource *resource) 5001e04c3fSmrg{ 5101e04c3fSmrg if (!resource) 5201e04c3fSmrg return NULL; 5301e04c3fSmrg 5401e04c3fSmrg return to_tegra_resource(resource)->gpu; 5501e04c3fSmrg} 5601e04c3fSmrg 5701e04c3fSmrgstruct tegra_surface { 5801e04c3fSmrg struct pipe_surface base; 5901e04c3fSmrg struct pipe_surface *gpu; 6001e04c3fSmrg}; 6101e04c3fSmrg 6201e04c3fSmrgstatic inline struct tegra_surface * 6301e04c3fSmrgto_tegra_surface(struct pipe_surface *surface) 6401e04c3fSmrg{ 6501e04c3fSmrg return (struct tegra_surface *)surface; 6601e04c3fSmrg} 6701e04c3fSmrg 6801e04c3fSmrgstatic inline struct pipe_surface * 6901e04c3fSmrgtegra_surface_unwrap(struct pipe_surface *surface) 7001e04c3fSmrg{ 7101e04c3fSmrg if (!surface) 7201e04c3fSmrg return NULL; 7301e04c3fSmrg 7401e04c3fSmrg return to_tegra_surface(surface)->gpu; 7501e04c3fSmrg} 7601e04c3fSmrg 7701e04c3fSmrg#endif /* TEGRA_RESOURCE_H */ 78