101e04c3fSmrg/*
201e04c3fSmrg * Copyright © 2014-2017 Broadcom
301e04c3fSmrg *
401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
501e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
601e04c3fSmrg * to deal in the Software without restriction, including without limitation
701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
901e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1001e04c3fSmrg *
1101e04c3fSmrg * The above copyright notice and this permission notice (including the next
1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the
1301e04c3fSmrg * Software.
1401e04c3fSmrg *
1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2101e04c3fSmrg * IN THE SOFTWARE.
2201e04c3fSmrg */
2301e04c3fSmrg
2401e04c3fSmrg/** @file v3dx_job.c
2501e04c3fSmrg *
267ec681f3Smrg * V3D version-specific functions for submitting V3D render jobs to the
2701e04c3fSmrg * kernel.
2801e04c3fSmrg */
2901e04c3fSmrg
3001e04c3fSmrg#include "v3d_context.h"
3101e04c3fSmrg#include "broadcom/cle/v3dx_pack.h"
3201e04c3fSmrg
3301e04c3fSmrgvoid v3dX(bcl_epilogue)(struct v3d_context *v3d, struct v3d_job *job)
3401e04c3fSmrg{
3501e04c3fSmrg                v3d_cl_ensure_space_with_branch(&job->bcl,
367ec681f3Smrg                                                cl_packet_length(PRIMITIVE_COUNTS_FEEDBACK) +
3701e04c3fSmrg#if V3D_VERSION >= 41
3801e04c3fSmrg                                                cl_packet_length(TRANSFORM_FEEDBACK_SPECS) +
3901e04c3fSmrg#endif
4001e04c3fSmrg                                                cl_packet_length(FLUSH));
4101e04c3fSmrg
427ec681f3Smrg                if (job->tf_enabled || job->needs_primitives_generated) {
437ec681f3Smrg                        /* Write primitive counts to memory. */
447ec681f3Smrg                        assert(v3d->prim_counts);
457ec681f3Smrg                        struct v3d_resource *rsc =
467ec681f3Smrg                                v3d_resource(v3d->prim_counts);
477ec681f3Smrg                        cl_emit(&job->bcl, PRIMITIVE_COUNTS_FEEDBACK, counter) {
487ec681f3Smrg                                counter.address =
497ec681f3Smrg                                        cl_address(rsc->bo,
507ec681f3Smrg                                                   v3d->prim_counts_offset);
517ec681f3Smrg                                counter.read_write_64byte = false;
527ec681f3Smrg                                counter.op = 0;
537ec681f3Smrg                        }
547ec681f3Smrg                }
557ec681f3Smrg
5601e04c3fSmrg                /* Disable TF at the end of the CL, so that the TF block
5701e04c3fSmrg                 * cleans up and finishes before it gets reset by the next
5801e04c3fSmrg                 * frame's tile binning mode cfg packet. (SWVC5-718).
5901e04c3fSmrg                 */
6001e04c3fSmrg#if V3D_VERSION >= 41
6101e04c3fSmrg                if (job->tf_enabled) {
6201e04c3fSmrg                        cl_emit(&job->bcl, TRANSFORM_FEEDBACK_SPECS, tfe) {
6301e04c3fSmrg                                tfe.enable = false;
6401e04c3fSmrg                        };
6501e04c3fSmrg                }
6601e04c3fSmrg#endif /* V3D_VERSION >= 41 */
6701e04c3fSmrg
6801e04c3fSmrg                /* We just FLUSH here to tell the HW to cap the bin CLs with a
6901e04c3fSmrg                 * return.  Any remaining state changes won't be flushed to
7001e04c3fSmrg                 * the bins first -- you would need FLUSH_ALL for that, but
7101e04c3fSmrg                 * the HW for hasn't been validated
7201e04c3fSmrg                 */
7301e04c3fSmrg                cl_emit(&job->bcl, FLUSH, flush);
7401e04c3fSmrg}
75