101e04c3fSmrg/* 201e04c3fSmrg * Copyright 2014, 2015 Red Hat. 301e04c3fSmrg * 401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a 501e04c3fSmrg * copy of this software and associated documentation files (the "Software"), 601e04c3fSmrg * to deal in the Software without restriction, including without limitation 701e04c3fSmrg * on the rights to use, copy, modify, merge, publish, distribute, sub 801e04c3fSmrg * license, and/or sell copies of the Software, and to permit persons to whom 901e04c3fSmrg * the Software is furnished to do so, subject to the following conditions: 1001e04c3fSmrg * 1101e04c3fSmrg * The above copyright notice and this permission notice (including the next 1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the 1301e04c3fSmrg * Software. 1401e04c3fSmrg * 1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 1801e04c3fSmrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 1901e04c3fSmrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 2001e04c3fSmrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 2101e04c3fSmrg * USE OR OTHER DEALINGS IN THE SOFTWARE. 2201e04c3fSmrg */ 2301e04c3fSmrg#ifndef VIRGL_CONTEXT_H 2401e04c3fSmrg#define VIRGL_CONTEXT_H 2501e04c3fSmrg 2601e04c3fSmrg#include "pipe/p_state.h" 2701e04c3fSmrg#include "pipe/p_context.h" 2801e04c3fSmrg#include "util/slab.h" 2901e04c3fSmrg#include "util/list.h" 3001e04c3fSmrg 317ec681f3Smrg#include "virgl_staging_mgr.h" 329f464c52Smaya#include "virgl_transfer_queue.h" 339f464c52Smaya 3401e04c3fSmrgstruct pipe_screen; 3501e04c3fSmrgstruct tgsi_token; 3601e04c3fSmrgstruct u_upload_mgr; 3701e04c3fSmrgstruct virgl_cmd_buf; 3801e04c3fSmrgstruct virgl_vertex_elements_state; 3901e04c3fSmrg 4001e04c3fSmrgstruct virgl_sampler_view { 4101e04c3fSmrg struct pipe_sampler_view base; 4201e04c3fSmrg uint32_t handle; 4301e04c3fSmrg}; 4401e04c3fSmrg 4501e04c3fSmrgstruct virgl_so_target { 4601e04c3fSmrg struct pipe_stream_output_target base; 4701e04c3fSmrg uint32_t handle; 4801e04c3fSmrg}; 4901e04c3fSmrg 509f464c52Smayastruct virgl_rasterizer_state { 519f464c52Smaya struct pipe_rasterizer_state rs; 529f464c52Smaya uint32_t handle; 539f464c52Smaya}; 549f464c52Smaya 557ec681f3Smrgstruct virgl_shader_binding_state { 567ec681f3Smrg struct pipe_sampler_view *views[16]; 577ec681f3Smrg uint32_t view_enabled_mask; 587ec681f3Smrg 597ec681f3Smrg struct pipe_constant_buffer ubos[PIPE_MAX_CONSTANT_BUFFERS]; 607ec681f3Smrg uint32_t ubo_enabled_mask; 617ec681f3Smrg 627ec681f3Smrg struct pipe_shader_buffer ssbos[PIPE_MAX_SHADER_BUFFERS]; 637ec681f3Smrg uint32_t ssbo_enabled_mask; 647ec681f3Smrg 657ec681f3Smrg struct pipe_image_view images[PIPE_MAX_SHADER_IMAGES]; 667ec681f3Smrg uint32_t image_enabled_mask; 677ec681f3Smrg}; 687ec681f3Smrg 6901e04c3fSmrgstruct virgl_context { 7001e04c3fSmrg struct pipe_context base; 7101e04c3fSmrg struct virgl_cmd_buf *cbuf; 729f464c52Smaya unsigned cbuf_initial_cdw; 7301e04c3fSmrg 747ec681f3Smrg struct virgl_shader_binding_state shader_bindings[PIPE_SHADER_TYPES]; 757ec681f3Smrg struct pipe_shader_buffer atomic_buffers[PIPE_MAX_HW_ATOMIC_BUFFERS]; 767ec681f3Smrg uint32_t atomic_buffer_enabled_mask; 777ec681f3Smrg 7801e04c3fSmrg struct virgl_vertex_elements_state *vertex_elements; 7901e04c3fSmrg 8001e04c3fSmrg struct pipe_framebuffer_state framebuffer; 8101e04c3fSmrg 829f464c52Smaya struct slab_child_pool transfer_pool; 839f464c52Smaya struct virgl_transfer_queue queue; 8401e04c3fSmrg struct u_upload_mgr *uploader; 857ec681f3Smrg struct virgl_staging_mgr staging; 869f464c52Smaya bool encoded_transfers; 877ec681f3Smrg bool supports_staging; 887ec681f3Smrg uint8_t patch_vertices; 8901e04c3fSmrg 9001e04c3fSmrg struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; 9101e04c3fSmrg unsigned num_vertex_buffers; 9201e04c3fSmrg boolean vertex_array_dirty; 9301e04c3fSmrg 949f464c52Smaya struct virgl_rasterizer_state rs_state; 9501e04c3fSmrg struct virgl_so_target so_targets[PIPE_MAX_SO_BUFFERS]; 9601e04c3fSmrg unsigned num_so_targets; 9701e04c3fSmrg 989f464c52Smaya uint32_t num_draws, num_compute; 9901e04c3fSmrg 10001e04c3fSmrg struct primconvert_context *primconvert; 10101e04c3fSmrg uint32_t hw_sub_ctx_id; 1027ec681f3Smrg 1037ec681f3Smrg /* The total size of staging resources used in queued copy transfers. */ 1047ec681f3Smrg uint64_t queued_staging_res_size; 10501e04c3fSmrg}; 10601e04c3fSmrg 10701e04c3fSmrgstatic inline struct virgl_sampler_view * 10801e04c3fSmrgvirgl_sampler_view(struct pipe_sampler_view *view) 10901e04c3fSmrg{ 11001e04c3fSmrg return (struct virgl_sampler_view *)view; 11101e04c3fSmrg}; 11201e04c3fSmrg 11301e04c3fSmrgstatic inline struct virgl_so_target * 11401e04c3fSmrgvirgl_so_target(struct pipe_stream_output_target *target) 11501e04c3fSmrg{ 11601e04c3fSmrg return (struct virgl_so_target *)target; 11701e04c3fSmrg} 11801e04c3fSmrg 11901e04c3fSmrgstatic inline struct virgl_context *virgl_context(struct pipe_context *ctx) 12001e04c3fSmrg{ 12101e04c3fSmrg return (struct virgl_context *)ctx; 12201e04c3fSmrg} 12301e04c3fSmrg 12401e04c3fSmrgstruct pipe_context *virgl_context_create(struct pipe_screen *pscreen, 12501e04c3fSmrg void *priv, unsigned flags); 12601e04c3fSmrg 12701e04c3fSmrgvoid virgl_init_blit_functions(struct virgl_context *vctx); 12801e04c3fSmrgvoid virgl_init_query_functions(struct virgl_context *vctx); 12901e04c3fSmrgvoid virgl_init_so_functions(struct virgl_context *vctx); 13001e04c3fSmrg 1317ec681f3Smrgstruct tgsi_token *virgl_tgsi_transform(struct virgl_screen *vscreen, const struct tgsi_token *tokens_in); 1327ec681f3Smrg 1337ec681f3Smrgbool 1347ec681f3Smrgvirgl_can_rebind_resource(struct virgl_context *vctx, 1357ec681f3Smrg struct pipe_resource *res); 13601e04c3fSmrg 1377ec681f3Smrgvoid 1387ec681f3Smrgvirgl_rebind_resource(struct virgl_context *vctx, 1397ec681f3Smrg struct pipe_resource *res); 14001e04c3fSmrg 1417ec681f3Smrgvoid virgl_flush_eq(struct virgl_context *ctx, void *closure, 1427ec681f3Smrg struct pipe_fence_handle **fence); 14301e04c3fSmrg#endif 144