14a49301eSmrg/**************************************************************************
24a49301eSmrg *
3af69d88dSmrg * Copyright 2007 VMware, Inc.
44a49301eSmrg * All Rights Reserved.
54a49301eSmrg *
64a49301eSmrg * Permission is hereby granted, free of charge, to any person obtaining a
74a49301eSmrg * copy of this software and associated documentation files (the
84a49301eSmrg * "Software"), to deal in the Software without restriction, including
94a49301eSmrg * without limitation the rights to use, copy, modify, merge, publish,
104a49301eSmrg * distribute, sub license, and/or sell copies of the Software, and to
114a49301eSmrg * permit persons to whom the Software is furnished to do so, subject to
124a49301eSmrg * the following conditions:
134a49301eSmrg *
144a49301eSmrg * The above copyright notice and this permission notice (including the
154a49301eSmrg * next paragraph) shall be included in all copies or substantial portions
164a49301eSmrg * of the Software.
174a49301eSmrg *
184a49301eSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
194a49301eSmrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
204a49301eSmrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21af69d88dSmrg * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
224a49301eSmrg * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
234a49301eSmrg * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
244a49301eSmrg * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
254a49301eSmrg *
264a49301eSmrg **************************************************************************/
274a49301eSmrg
284a49301eSmrg#ifndef PIPE_CONTEXT_H
294a49301eSmrg#define PIPE_CONTEXT_H
304a49301eSmrg
313464ebd5Sriastradh#include "p_compiler.h"
32af69d88dSmrg#include "p_format.h"
33af69d88dSmrg#include "p_video_enums.h"
34af69d88dSmrg#include "p_defines.h"
3501e04c3fSmrg#include <stdio.h>
364a49301eSmrg
374a49301eSmrg#ifdef __cplusplus
384a49301eSmrgextern "C" {
394a49301eSmrg#endif
404a49301eSmrg
413464ebd5Sriastradh
423464ebd5Sriastradhstruct pipe_blend_color;
433464ebd5Sriastradhstruct pipe_blend_state;
44af69d88dSmrgstruct pipe_blit_info;
453464ebd5Sriastradhstruct pipe_box;
463464ebd5Sriastradhstruct pipe_clip_state;
47af69d88dSmrgstruct pipe_constant_buffer;
4801e04c3fSmrgstruct pipe_debug_callback;
493464ebd5Sriastradhstruct pipe_depth_stencil_alpha_state;
5001e04c3fSmrgstruct pipe_device_reset_callback;
513464ebd5Sriastradhstruct pipe_draw_info;
527ec681f3Smrgstruct pipe_draw_indirect_info;
537ec681f3Smrgstruct pipe_draw_start_count_bias;
547ec681f3Smrgstruct pipe_draw_vertex_state_info;
5501e04c3fSmrgstruct pipe_grid_info;
564a49301eSmrgstruct pipe_fence_handle;
573464ebd5Sriastradhstruct pipe_framebuffer_state;
5801e04c3fSmrgstruct pipe_image_view;
594a49301eSmrgstruct pipe_query;
603464ebd5Sriastradhstruct pipe_poly_stipple;
613464ebd5Sriastradhstruct pipe_rasterizer_state;
62af69d88dSmrgstruct pipe_resolve_info;
633464ebd5Sriastradhstruct pipe_resource;
643464ebd5Sriastradhstruct pipe_sampler_state;
653464ebd5Sriastradhstruct pipe_sampler_view;
663464ebd5Sriastradhstruct pipe_scissor_state;
6701e04c3fSmrgstruct pipe_shader_buffer;
683464ebd5Sriastradhstruct pipe_shader_state;
693464ebd5Sriastradhstruct pipe_stencil_ref;
70af69d88dSmrgstruct pipe_stream_output_target;
713464ebd5Sriastradhstruct pipe_surface;
72af69d88dSmrgstruct pipe_transfer;
733464ebd5Sriastradhstruct pipe_vertex_buffer;
743464ebd5Sriastradhstruct pipe_vertex_element;
757ec681f3Smrgstruct pipe_vertex_state;
76af69d88dSmrgstruct pipe_video_buffer;
77af69d88dSmrgstruct pipe_video_codec;
783464ebd5Sriastradhstruct pipe_viewport_state;
79af69d88dSmrgstruct pipe_compute_state;
80af69d88dSmrgunion pipe_color_union;
81af69d88dSmrgunion pipe_query_result;
8201e04c3fSmrgstruct u_log_context;
8301e04c3fSmrgstruct u_upload_mgr;
844a49301eSmrg
854a49301eSmrg/**
864a49301eSmrg * Gallium rendering context.  Basically:
874a49301eSmrg *  - state setting functions
884a49301eSmrg *  - VBO drawing functions
894a49301eSmrg *  - surface functions
904a49301eSmrg */
914a49301eSmrgstruct pipe_context {
924a49301eSmrg   struct pipe_screen *screen;
934a49301eSmrg
944a49301eSmrg   void *priv;  /**< context private data (for DRI for example) */
954a49301eSmrg   void *draw;  /**< private, for draw module (temporary?) */
964a49301eSmrg
9701e04c3fSmrg   /**
987ec681f3Smrg    * Stream uploaders created by the driver. All drivers, gallium frontends, and
9901e04c3fSmrg    * modules should use them.
10001e04c3fSmrg    *
10101e04c3fSmrg    * Use u_upload_alloc or u_upload_data as many times as you want.
10201e04c3fSmrg    * Once you are done, use u_upload_unmap.
10301e04c3fSmrg    */
10401e04c3fSmrg   struct u_upload_mgr *stream_uploader; /* everything but shader constants */
10501e04c3fSmrg   struct u_upload_mgr *const_uploader;  /* shader constants only */
10601e04c3fSmrg
1074a49301eSmrg   void (*destroy)( struct pipe_context * );
1084a49301eSmrg
1094a49301eSmrg   /**
1103464ebd5Sriastradh    * VBO drawing
1114a49301eSmrg    */
1124a49301eSmrg   /*@{*/
1137ec681f3Smrg   /**
1147ec681f3Smrg    * Multi draw.
1157ec681f3Smrg    *
1167ec681f3Smrg    * For indirect multi draws, num_draws is 1 and indirect->draw_count
1177ec681f3Smrg    * is used instead.
1187ec681f3Smrg    *
1197ec681f3Smrg    * Caps:
1207ec681f3Smrg    * - Always supported: Direct multi draws
1217ec681f3Smrg    * - PIPE_CAP_MULTI_DRAW_INDIRECT: Indirect multi draws
1227ec681f3Smrg    * - PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: Indirect draw count
1237ec681f3Smrg    *
1247ec681f3Smrg    * Differences against glMultiDraw and glMultiMode:
1257ec681f3Smrg    * - "info->mode" and "draws->index_bias" are always constant due to the lack
1267ec681f3Smrg    *   of hardware support and CPU performance concerns. Only start and count
1277ec681f3Smrg    *   vary.
1287ec681f3Smrg    * - if "info->increment_draw_id" is false, draw_id doesn't change between
1297ec681f3Smrg    *   draws
1307ec681f3Smrg    *
1317ec681f3Smrg    * Direct multi draws are also generated by u_threaded_context, which looks
1327ec681f3Smrg    * ahead in gallium command buffers and merges single draws.
1337ec681f3Smrg    *
1347ec681f3Smrg    * \param pipe          context
1357ec681f3Smrg    * \param info          draw info
1367ec681f3Smrg    * \param drawid_offset offset to add for drawid param of each draw
1377ec681f3Smrg    * \param indirect      indirect multi draws
1387ec681f3Smrg    * \param draws         array of (start, count) pairs for direct draws
1397ec681f3Smrg    * \param num_draws     number of direct draws; 1 for indirect multi draws
1407ec681f3Smrg    */
1417ec681f3Smrg   void (*draw_vbo)(struct pipe_context *pipe,
1427ec681f3Smrg                    const struct pipe_draw_info *info,
1437ec681f3Smrg                    unsigned drawid_offset,
1447ec681f3Smrg                    const struct pipe_draw_indirect_info *indirect,
1457ec681f3Smrg                    const struct pipe_draw_start_count_bias *draws,
1467ec681f3Smrg                    unsigned num_draws);
1477ec681f3Smrg
1487ec681f3Smrg   /**
1497ec681f3Smrg    * Multi draw for display lists.
1507ec681f3Smrg    *
1517ec681f3Smrg    * For more information, see pipe_vertex_state and
1527ec681f3Smrg    * pipe_draw_vertex_state_info.
1537ec681f3Smrg    *
1547ec681f3Smrg    * Explanation of partial_vertex_mask:
1557ec681f3Smrg    *
1567ec681f3Smrg    * 1. pipe_vertex_state::input::elements have a monotonic logical index
1577ec681f3Smrg    *    determined by pipe_vertex_state::input::full_velem_mask, specifically,
1587ec681f3Smrg    *    the position of the i-th bit set is the logical index of the i-th
1597ec681f3Smrg    *    vertex element, up to 31.
1607ec681f3Smrg    *
1617ec681f3Smrg    * 2. pipe_vertex_state::input::partial_velem_mask is a subset of
1627ec681f3Smrg    *    full_velem_mask where the bits set determine which vertex elements
1637ec681f3Smrg    *    should be bound contiguously. The vertex elements corresponding to
1647ec681f3Smrg    *    the bits not set in partial_velem_mask should be ignored.
1657ec681f3Smrg    *
1667ec681f3Smrg    * Those two allow creating pipe_vertex_state that has more vertex
1677ec681f3Smrg    * attributes than the vertex shader has inputs. The idea is that
1687ec681f3Smrg    * pipe_vertex_state can be used with any vertex shader that has the same
1697ec681f3Smrg    * number of inputs and same logical indices or less. This may sound like
1707ec681f3Smrg    * an overly complicated way to bind a subset of vertex elements, but it
1717ec681f3Smrg    * actually simplifies everything else:
1727ec681f3Smrg    *
1737ec681f3Smrg    * - In st/mesa, full_velem_mask is exactly the mask of enabled vertex
1747ec681f3Smrg    *   attributes (VERT_ATTRIB_x) in the display list VAO, while
1757ec681f3Smrg    *   partial_velem_mask is exactly the inputs_read mask of the vertex
1767ec681f3Smrg    *   shader (also VERT_ATTRIB_x).
1777ec681f3Smrg    *
1787ec681f3Smrg    * - In the driver, some bit ops and popcnt is needed to assemble vertex
1797ec681f3Smrg    *   elements very quickly.
1807ec681f3Smrg    */
1817ec681f3Smrg   void (*draw_vertex_state)(struct pipe_context *ctx,
1827ec681f3Smrg                             struct pipe_vertex_state *state,
1837ec681f3Smrg                             uint32_t partial_velem_mask,
1847ec681f3Smrg                             struct pipe_draw_vertex_state_info info,
1857ec681f3Smrg                             const struct pipe_draw_start_count_bias *draws,
1867ec681f3Smrg                             unsigned num_draws);
1874a49301eSmrg   /*@}*/
1884a49301eSmrg
189cdc920a0Smrg   /**
190cdc920a0Smrg    * Predicate subsequent rendering on occlusion query result
191cdc920a0Smrg    * \param query  the query predicate, or NULL if no predicate
192af69d88dSmrg    * \param condition whether to skip on FALSE or TRUE query results
193cdc920a0Smrg    * \param mode  one of PIPE_RENDER_COND_x
194cdc920a0Smrg    */
195cdc920a0Smrg   void (*render_condition)( struct pipe_context *pipe,
196cdc920a0Smrg                             struct pipe_query *query,
1977ec681f3Smrg                             bool condition,
19801e04c3fSmrg                             enum pipe_render_cond_flag mode );
1994a49301eSmrg
2007ec681f3Smrg   /**
2017ec681f3Smrg    * Predicate subsequent rendering on a value in a buffer
2027ec681f3Smrg    * \param buffer The buffer to query for the value
2037ec681f3Smrg    * \param offset Offset in the buffer to query 32-bit
2047ec681f3Smrg    * \param condition whether to skip on FALSE or TRUE query results
2057ec681f3Smrg    */
2067ec681f3Smrg   void (*render_condition_mem)( struct pipe_context *pipe,
2077ec681f3Smrg                                 struct pipe_resource *buffer,
2087ec681f3Smrg                                 uint32_t offset,
2097ec681f3Smrg                                 bool condition );
2104a49301eSmrg   /**
2114a49301eSmrg    * Query objects
2124a49301eSmrg    */
2134a49301eSmrg   /*@{*/
2144a49301eSmrg   struct pipe_query *(*create_query)( struct pipe_context *pipe,
215af69d88dSmrg                                       unsigned query_type,
216af69d88dSmrg                                       unsigned index );
2174a49301eSmrg
21801e04c3fSmrg   /**
21901e04c3fSmrg    * Create a query object that queries all given query types simultaneously.
22001e04c3fSmrg    *
22101e04c3fSmrg    * This can only be used for those query types for which
22201e04c3fSmrg    * get_driver_query_info indicates that it must be used. Only one batch
22301e04c3fSmrg    * query object may be active at a time.
22401e04c3fSmrg    *
22501e04c3fSmrg    * There may be additional constraints on which query types can be used
22601e04c3fSmrg    * together, in particular those that are implied by
22701e04c3fSmrg    * get_driver_query_group_info.
22801e04c3fSmrg    *
22901e04c3fSmrg    * \param num_queries the number of query types
23001e04c3fSmrg    * \param query_types array of \p num_queries query types
23101e04c3fSmrg    * \return a query object, or NULL on error.
23201e04c3fSmrg    */
23301e04c3fSmrg   struct pipe_query *(*create_batch_query)( struct pipe_context *pipe,
23401e04c3fSmrg                                             unsigned num_queries,
23501e04c3fSmrg                                             unsigned *query_types );
23601e04c3fSmrg
2374a49301eSmrg   void (*destroy_query)(struct pipe_context *pipe,
2384a49301eSmrg                         struct pipe_query *q);
2394a49301eSmrg
2407ec681f3Smrg   bool (*begin_query)(struct pipe_context *pipe, struct pipe_query *q);
24101e04c3fSmrg   bool (*end_query)(struct pipe_context *pipe, struct pipe_query *q);
2424a49301eSmrg
243cdc920a0Smrg   /**
244cdc920a0Smrg    * Get results of a query.
245cdc920a0Smrg    * \param wait  if true, this query will block until the result is ready
246cdc920a0Smrg    * \return TRUE if results are ready, FALSE otherwise
247cdc920a0Smrg    */
2487ec681f3Smrg   bool (*get_query_result)(struct pipe_context *pipe,
2497ec681f3Smrg                            struct pipe_query *q,
2507ec681f3Smrg                            bool wait,
2517ec681f3Smrg                            union pipe_query_result *result);
25201e04c3fSmrg
25301e04c3fSmrg   /**
25401e04c3fSmrg    * Get results of a query, storing into resource. Note that this may not
25501e04c3fSmrg    * be used with batch queries.
25601e04c3fSmrg    *
25701e04c3fSmrg    * \param wait  if true, this query will block until the result is ready
25801e04c3fSmrg    * \param result_type  the type of the value being stored:
25901e04c3fSmrg    * \param index  for queries that return multiple pieces of data, which
26001e04c3fSmrg    *               item of that data to store (e.g. for
26101e04c3fSmrg    *               PIPE_QUERY_PIPELINE_STATISTICS).
26201e04c3fSmrg    *               When the index is -1, instead of the value of the query
26301e04c3fSmrg    *               the driver should instead write a 1 or 0 to the appropriate
26401e04c3fSmrg    *               location with 1 meaning that the query result is available.
26501e04c3fSmrg    */
26601e04c3fSmrg   void (*get_query_result_resource)(struct pipe_context *pipe,
26701e04c3fSmrg                                     struct pipe_query *q,
2687ec681f3Smrg                                     bool wait,
26901e04c3fSmrg                                     enum pipe_query_value_type result_type,
27001e04c3fSmrg                                     int index,
27101e04c3fSmrg                                     struct pipe_resource *resource,
27201e04c3fSmrg                                     unsigned offset);
27301e04c3fSmrg
27401e04c3fSmrg   /**
27501e04c3fSmrg    * Set whether all current non-driver queries except TIME_ELAPSED are
27601e04c3fSmrg    * active or paused.
27701e04c3fSmrg    */
2787ec681f3Smrg   void (*set_active_query_state)(struct pipe_context *pipe, bool enable);
2797ec681f3Smrg
2807ec681f3Smrg   /**
2817ec681f3Smrg    * INTEL Performance Query
2827ec681f3Smrg    */
2837ec681f3Smrg   /*@{*/
2847ec681f3Smrg
2857ec681f3Smrg   unsigned (*init_intel_perf_query_info)(struct pipe_context *pipe);
2867ec681f3Smrg
2877ec681f3Smrg   void (*get_intel_perf_query_info)(struct pipe_context *pipe,
2887ec681f3Smrg                                     unsigned query_index,
2897ec681f3Smrg                                     const char **name,
2907ec681f3Smrg                                     uint32_t *data_size,
2917ec681f3Smrg                                     uint32_t *n_counters,
2927ec681f3Smrg                                     uint32_t *n_active);
2937ec681f3Smrg
2947ec681f3Smrg   void (*get_intel_perf_query_counter_info)(struct pipe_context *pipe,
2957ec681f3Smrg                                             unsigned query_index,
2967ec681f3Smrg                                             unsigned counter_index,
2977ec681f3Smrg                                             const char **name,
2987ec681f3Smrg                                             const char **desc,
2997ec681f3Smrg                                             uint32_t *offset,
3007ec681f3Smrg                                             uint32_t *data_size,
3017ec681f3Smrg                                             uint32_t *type_enum,
3027ec681f3Smrg                                             uint32_t *data_type_enum,
3037ec681f3Smrg                                             uint64_t *raw_max);
3047ec681f3Smrg
3057ec681f3Smrg   struct pipe_query *(*new_intel_perf_query_obj)(struct pipe_context *pipe,
3067ec681f3Smrg                                                 unsigned query_index);
3077ec681f3Smrg
3087ec681f3Smrg   bool (*begin_intel_perf_query)(struct pipe_context *pipe, struct pipe_query *q);
3097ec681f3Smrg
3107ec681f3Smrg   void (*end_intel_perf_query)(struct pipe_context *pipe, struct pipe_query *q);
3117ec681f3Smrg
3127ec681f3Smrg   void (*delete_intel_perf_query)(struct pipe_context *pipe, struct pipe_query *q);
3137ec681f3Smrg
3147ec681f3Smrg   void (*wait_intel_perf_query)(struct pipe_context *pipe, struct pipe_query *q);
3157ec681f3Smrg
3167ec681f3Smrg   bool (*is_intel_perf_query_ready)(struct pipe_context *pipe, struct pipe_query *q);
3177ec681f3Smrg
3187ec681f3Smrg   bool (*get_intel_perf_query_data)(struct pipe_context *pipe,
3197ec681f3Smrg                                     struct pipe_query *q,
3207ec681f3Smrg                                     size_t data_size,
3217ec681f3Smrg                                     uint32_t *data,
3227ec681f3Smrg                                     uint32_t *bytes_written);
32301e04c3fSmrg
3244a49301eSmrg   /*@}*/
3254a49301eSmrg
3264a49301eSmrg   /**
3274a49301eSmrg    * State functions (create/bind/destroy state objects)
3284a49301eSmrg    */
3294a49301eSmrg   /*@{*/
3304a49301eSmrg   void * (*create_blend_state)(struct pipe_context *,
3314a49301eSmrg                                const struct pipe_blend_state *);
3324a49301eSmrg   void   (*bind_blend_state)(struct pipe_context *, void *);
3334a49301eSmrg   void   (*delete_blend_state)(struct pipe_context *, void  *);
3344a49301eSmrg
3354a49301eSmrg   void * (*create_sampler_state)(struct pipe_context *,
3364a49301eSmrg                                  const struct pipe_sampler_state *);
337af69d88dSmrg   void   (*bind_sampler_states)(struct pipe_context *,
33801e04c3fSmrg                                 enum pipe_shader_type shader,
33901e04c3fSmrg                                 unsigned start_slot, unsigned num_samplers,
34001e04c3fSmrg                                 void **samplers);
3414a49301eSmrg   void   (*delete_sampler_state)(struct pipe_context *, void *);
3424a49301eSmrg
3434a49301eSmrg   void * (*create_rasterizer_state)(struct pipe_context *,
3444a49301eSmrg                                     const struct pipe_rasterizer_state *);
3454a49301eSmrg   void   (*bind_rasterizer_state)(struct pipe_context *, void *);
3464a49301eSmrg   void   (*delete_rasterizer_state)(struct pipe_context *, void *);
3474a49301eSmrg
3484a49301eSmrg   void * (*create_depth_stencil_alpha_state)(struct pipe_context *,
3494a49301eSmrg                                        const struct pipe_depth_stencil_alpha_state *);
3504a49301eSmrg   void   (*bind_depth_stencil_alpha_state)(struct pipe_context *, void *);
3514a49301eSmrg   void   (*delete_depth_stencil_alpha_state)(struct pipe_context *, void *);
3524a49301eSmrg
3534a49301eSmrg   void * (*create_fs_state)(struct pipe_context *,
3544a49301eSmrg                             const struct pipe_shader_state *);
3554a49301eSmrg   void   (*bind_fs_state)(struct pipe_context *, void *);
3564a49301eSmrg   void   (*delete_fs_state)(struct pipe_context *, void *);
3574a49301eSmrg
3584a49301eSmrg   void * (*create_vs_state)(struct pipe_context *,
3594a49301eSmrg                             const struct pipe_shader_state *);
3604a49301eSmrg   void   (*bind_vs_state)(struct pipe_context *, void *);
3614a49301eSmrg   void   (*delete_vs_state)(struct pipe_context *, void *);
362cdc920a0Smrg
363cdc920a0Smrg   void * (*create_gs_state)(struct pipe_context *,
364cdc920a0Smrg                             const struct pipe_shader_state *);
365cdc920a0Smrg   void   (*bind_gs_state)(struct pipe_context *, void *);
366cdc920a0Smrg   void   (*delete_gs_state)(struct pipe_context *, void *);
367cdc920a0Smrg
36801e04c3fSmrg   void * (*create_tcs_state)(struct pipe_context *,
36901e04c3fSmrg                              const struct pipe_shader_state *);
37001e04c3fSmrg   void   (*bind_tcs_state)(struct pipe_context *, void *);
37101e04c3fSmrg   void   (*delete_tcs_state)(struct pipe_context *, void *);
37201e04c3fSmrg
37301e04c3fSmrg   void * (*create_tes_state)(struct pipe_context *,
37401e04c3fSmrg                              const struct pipe_shader_state *);
37501e04c3fSmrg   void   (*bind_tes_state)(struct pipe_context *, void *);
37601e04c3fSmrg   void   (*delete_tes_state)(struct pipe_context *, void *);
37701e04c3fSmrg
3783464ebd5Sriastradh   void * (*create_vertex_elements_state)(struct pipe_context *,
3793464ebd5Sriastradh                                          unsigned num_elements,
3803464ebd5Sriastradh                                          const struct pipe_vertex_element *);
3813464ebd5Sriastradh   void   (*bind_vertex_elements_state)(struct pipe_context *, void *);
3823464ebd5Sriastradh   void   (*delete_vertex_elements_state)(struct pipe_context *, void *);
3833464ebd5Sriastradh
3844a49301eSmrg   /*@}*/
3854a49301eSmrg
3864a49301eSmrg   /**
3874a49301eSmrg    * Parameter-like state (or properties)
3884a49301eSmrg    */
3894a49301eSmrg   /*@{*/
3904a49301eSmrg   void (*set_blend_color)( struct pipe_context *,
3914a49301eSmrg                            const struct pipe_blend_color * );
3924a49301eSmrg
393cdc920a0Smrg   void (*set_stencil_ref)( struct pipe_context *,
3947ec681f3Smrg                            const struct pipe_stencil_ref ref);
395cdc920a0Smrg
3963464ebd5Sriastradh   void (*set_sample_mask)( struct pipe_context *,
3973464ebd5Sriastradh                            unsigned sample_mask );
3983464ebd5Sriastradh
399af69d88dSmrg   void (*set_min_samples)( struct pipe_context *,
400af69d88dSmrg                            unsigned min_samples );
401af69d88dSmrg
4024a49301eSmrg   void (*set_clip_state)( struct pipe_context *,
403cdc920a0Smrg                            const struct pipe_clip_state * );
4044a49301eSmrg
4057ec681f3Smrg   /**
4067ec681f3Smrg    * Set constant buffer
4077ec681f3Smrg    *
4087ec681f3Smrg    * \param shader           Shader stage
4097ec681f3Smrg    * \param index            Buffer binding slot index within a shader stage
4107ec681f3Smrg    * \param take_ownership   The callee takes ownership of the buffer reference.
4117ec681f3Smrg    *                         (the callee shouldn't increment the ref count)
4127ec681f3Smrg    * \param buf              Constant buffer parameters
4137ec681f3Smrg    */
4144a49301eSmrg   void (*set_constant_buffer)( struct pipe_context *,
41501e04c3fSmrg                                enum pipe_shader_type shader, uint index,
4167ec681f3Smrg                                bool take_ownership,
41701e04c3fSmrg                                const struct pipe_constant_buffer *buf );
4184a49301eSmrg
4197ec681f3Smrg   /**
4207ec681f3Smrg    * Set inlinable constants for constant buffer 0.
4217ec681f3Smrg    *
4227ec681f3Smrg    * These are constants that the driver would like to inline in the IR
4237ec681f3Smrg    * of the current shader and recompile it. Drivers can determine which
4247ec681f3Smrg    * constants they prefer to inline in finalize_nir and store that
4257ec681f3Smrg    * information in shader_info::*inlinable_uniform*. When the state tracker
4267ec681f3Smrg    * or frontend uploads constants to a constant buffer, it can pass
4277ec681f3Smrg    * inlinable constants separately via this call.
4287ec681f3Smrg    *
4297ec681f3Smrg    * Any set_constant_buffer call invalidates this state, so this function
4307ec681f3Smrg    * must be called after it. Binding a shader also invalidates this state.
4317ec681f3Smrg    *
4327ec681f3Smrg    * There is no PIPE_CAP for this. Drivers shouldn't set the shader_info
4337ec681f3Smrg    * fields if they don't want this or if they don't implement this.
4347ec681f3Smrg    */
4357ec681f3Smrg   void (*set_inlinable_constants)( struct pipe_context *,
4367ec681f3Smrg                                    enum pipe_shader_type shader,
4377ec681f3Smrg                                    uint num_values, uint32_t *values );
4387ec681f3Smrg
4394a49301eSmrg   void (*set_framebuffer_state)( struct pipe_context *,
4404a49301eSmrg                                  const struct pipe_framebuffer_state * );
4414a49301eSmrg
44201e04c3fSmrg   /**
44301e04c3fSmrg    * Set the sample locations used during rasterization. When NULL or sized
44401e04c3fSmrg    * zero, the default locations are used.
44501e04c3fSmrg    *
44601e04c3fSmrg    * Note that get_sample_position() still returns the default locations.
44701e04c3fSmrg    *
44801e04c3fSmrg    * The samples are accessed with
44901e04c3fSmrg    * locations[(pixel_y*grid_w+pixel_x)*ms+i],
45001e04c3fSmrg    * where:
45101e04c3fSmrg    * ms      = the sample count
45201e04c3fSmrg    * grid_w  = the pixel grid width for the sample count
45301e04c3fSmrg    * grid_w  = the pixel grid height for the sample count
45401e04c3fSmrg    * pixel_x = the window x coordinate modulo grid_w
45501e04c3fSmrg    * pixel_y = the window y coordinate modulo grid_w
45601e04c3fSmrg    * i       = the sample index
45701e04c3fSmrg    * This gives a result with the x coordinate as the low 4 bits and the y
45801e04c3fSmrg    * coordinate as the high 4 bits. For each coordinate 0 is the left or top
45901e04c3fSmrg    * edge of the pixel's rectangle and 16 (not 15) is the right or bottom edge.
46001e04c3fSmrg    *
46101e04c3fSmrg    * Out of bounds accesses are return undefined values.
46201e04c3fSmrg    *
46301e04c3fSmrg    * The pixel grid is used to vary sample locations across pixels and its
46401e04c3fSmrg    * size can be queried with get_sample_pixel_grid().
46501e04c3fSmrg    */
46601e04c3fSmrg   void (*set_sample_locations)( struct pipe_context *,
46701e04c3fSmrg                                 size_t size, const uint8_t *locations );
46801e04c3fSmrg
4694a49301eSmrg   void (*set_polygon_stipple)( struct pipe_context *,
47001e04c3fSmrg                                const struct pipe_poly_stipple * );
4714a49301eSmrg
472af69d88dSmrg   void (*set_scissor_states)( struct pipe_context *,
473af69d88dSmrg                               unsigned start_slot,
474af69d88dSmrg                               unsigned num_scissors,
475af69d88dSmrg                               const struct pipe_scissor_state * );
4764a49301eSmrg
47701e04c3fSmrg   void (*set_window_rectangles)( struct pipe_context *,
4787ec681f3Smrg                                  bool include,
47901e04c3fSmrg                                  unsigned num_rectangles,
48001e04c3fSmrg                                  const struct pipe_scissor_state * );
48101e04c3fSmrg
482af69d88dSmrg   void (*set_viewport_states)( struct pipe_context *,
483af69d88dSmrg                                unsigned start_slot,
484af69d88dSmrg                                unsigned num_viewports,
485af69d88dSmrg                                const struct pipe_viewport_state *);
4864a49301eSmrg
48701e04c3fSmrg   void (*set_sampler_views)(struct pipe_context *,
48801e04c3fSmrg                             enum pipe_shader_type shader,
489af69d88dSmrg                             unsigned start_slot, unsigned num_views,
4907ec681f3Smrg                             unsigned unbind_num_trailing_slots,
4917ec681f3Smrg                             bool take_ownership,
4929f464c52Smaya                             struct pipe_sampler_view **views);
4933464ebd5Sriastradh
49401e04c3fSmrg   void (*set_tess_state)(struct pipe_context *,
49501e04c3fSmrg                          const float default_outer_level[4],
49601e04c3fSmrg                          const float default_inner_level[2]);
49701e04c3fSmrg
4987ec681f3Smrg   /**
4997ec681f3Smrg    * Set the number of vertices per input patch for tessellation.
5007ec681f3Smrg    */
5017ec681f3Smrg   void (*set_patch_vertices)(struct pipe_context *ctx, uint8_t patch_vertices);
5027ec681f3Smrg
503af69d88dSmrg   /**
50401e04c3fSmrg    * Sets the debug callback. If the pointer is null, then no callback is
50501e04c3fSmrg    * set, otherwise a copy of the data should be made.
50601e04c3fSmrg    */
50701e04c3fSmrg   void (*set_debug_callback)(struct pipe_context *,
50801e04c3fSmrg                              const struct pipe_debug_callback *);
50901e04c3fSmrg
51001e04c3fSmrg   /**
51101e04c3fSmrg    * Bind an array of shader buffers that will be used by a shader.
51201e04c3fSmrg    * Any buffers that were previously bound to the specified range
51301e04c3fSmrg    * will be unbound.
514af69d88dSmrg    *
51501e04c3fSmrg    * \param shader     selects shader stage
51601e04c3fSmrg    * \param start_slot first buffer slot to bind.
51701e04c3fSmrg    * \param count      number of consecutive buffers to bind.
51801e04c3fSmrg    * \param buffers    array of pointers to the buffers to bind, it
519af69d88dSmrg    *                   should contain at least \a count elements
52001e04c3fSmrg    *                   unless it's NULL, in which case no buffers will
52101e04c3fSmrg    *                   be bound.
5229f464c52Smaya    * \param writable_bitmask  If bit i is not set, buffers[i] will only be
5239f464c52Smaya    *                          used with loads. If unsure, set to ~0.
52401e04c3fSmrg    */
52501e04c3fSmrg   void (*set_shader_buffers)(struct pipe_context *,
52601e04c3fSmrg                              enum pipe_shader_type shader,
52701e04c3fSmrg                              unsigned start_slot, unsigned count,
5289f464c52Smaya                              const struct pipe_shader_buffer *buffers,
5299f464c52Smaya                              unsigned writable_bitmask);
53001e04c3fSmrg
53101e04c3fSmrg   /**
53201e04c3fSmrg    * Bind an array of hw atomic buffers for use by all shaders.
53301e04c3fSmrg    * And buffers that were previously bound to the specified range
53401e04c3fSmrg    * will be unbound.
53501e04c3fSmrg    *
53601e04c3fSmrg    * \param start_slot first buffer slot to bind.
53701e04c3fSmrg    * \param count      number of consecutive buffers to bind.
53801e04c3fSmrg    * \param buffers    array of pointers to the buffers to bind, it
53901e04c3fSmrg    *                   should contain at least \a count elements
54001e04c3fSmrg    *                   unless it's NULL, in which case no buffers will
54101e04c3fSmrg    *                   be bound.
542af69d88dSmrg    */
54301e04c3fSmrg   void (*set_hw_atomic_buffers)(struct pipe_context *,
54401e04c3fSmrg                                 unsigned start_slot, unsigned count,
54501e04c3fSmrg                                 const struct pipe_shader_buffer *buffers);
54601e04c3fSmrg
54701e04c3fSmrg   /**
54801e04c3fSmrg    * Bind an array of images that will be used by a shader.
54901e04c3fSmrg    * Any images that were previously bound to the specified range
55001e04c3fSmrg    * will be unbound.
55101e04c3fSmrg    *
55201e04c3fSmrg    * \param shader     selects shader stage
55301e04c3fSmrg    * \param start_slot first image slot to bind.
55401e04c3fSmrg    * \param count      number of consecutive images to bind.
5557ec681f3Smrg    * \param unbind_num_trailing_slots  number of images to unbind after
5567ec681f3Smrg    *                                   the bound slot
55701e04c3fSmrg    * \param buffers    array of the images to bind, it
55801e04c3fSmrg    *                   should contain at least \a count elements
55901e04c3fSmrg    *                   unless it's NULL, in which case no images will
56001e04c3fSmrg    *                   be bound.
56101e04c3fSmrg    */
56201e04c3fSmrg   void (*set_shader_images)(struct pipe_context *,
56301e04c3fSmrg                             enum pipe_shader_type shader,
56401e04c3fSmrg                             unsigned start_slot, unsigned count,
5657ec681f3Smrg                             unsigned unbind_num_trailing_slots,
56601e04c3fSmrg                             const struct pipe_image_view *images);
5674a49301eSmrg
5687ec681f3Smrg   /**
5697ec681f3Smrg    * Bind an array of vertex buffers to the specified slots.
5707ec681f3Smrg    *
5717ec681f3Smrg    * \param start_slot      first vertex buffer slot
5727ec681f3Smrg    * \param count           number of consecutive vertex buffers to bind.
5737ec681f3Smrg    * \param unbind_num_trailing_slots  unbind slots after the bound slots
5747ec681f3Smrg    * \param take_ownership the caller holds buffer references and they
5757ec681f3Smrg    *                        should be taken over by the callee. This means
5767ec681f3Smrg    *                        that drivers shouldn't increment reference counts.
5777ec681f3Smrg    * \param buffers         array of the buffers to bind
5787ec681f3Smrg    */
5794a49301eSmrg   void (*set_vertex_buffers)( struct pipe_context *,
580af69d88dSmrg                               unsigned start_slot,
5814a49301eSmrg                               unsigned num_buffers,
5827ec681f3Smrg                               unsigned unbind_num_trailing_slots,
5837ec681f3Smrg                               bool take_ownership,
5844a49301eSmrg                               const struct pipe_vertex_buffer * );
5854a49301eSmrg
586af69d88dSmrg   /*@}*/
587af69d88dSmrg
588af69d88dSmrg   /**
589af69d88dSmrg    * Stream output functions.
590af69d88dSmrg    */
591af69d88dSmrg   /*@{*/
592af69d88dSmrg
593af69d88dSmrg   struct pipe_stream_output_target *(*create_stream_output_target)(
594af69d88dSmrg                        struct pipe_context *,
595af69d88dSmrg                        struct pipe_resource *,
596af69d88dSmrg                        unsigned buffer_offset,
597af69d88dSmrg                        unsigned buffer_size);
598af69d88dSmrg
599af69d88dSmrg   void (*stream_output_target_destroy)(struct pipe_context *,
600af69d88dSmrg                                        struct pipe_stream_output_target *);
601af69d88dSmrg
602af69d88dSmrg   void (*set_stream_output_targets)(struct pipe_context *,
603af69d88dSmrg                              unsigned num_targets,
604af69d88dSmrg                              struct pipe_stream_output_target **targets,
605af69d88dSmrg                              const unsigned *offsets);
6063464ebd5Sriastradh
6077ec681f3Smrg   uint32_t (*stream_output_target_offset)(struct pipe_stream_output_target *target);
6087ec681f3Smrg
6097ec681f3Smrg   /*@}*/
6107ec681f3Smrg
6117ec681f3Smrg
6127ec681f3Smrg   /**
6137ec681f3Smrg    * INTEL_blackhole_render
6147ec681f3Smrg    */
6157ec681f3Smrg   /*@{*/
6167ec681f3Smrg
6177ec681f3Smrg   void (*set_frontend_noop)(struct pipe_context *,
6187ec681f3Smrg                             bool enable);
6197ec681f3Smrg
6204a49301eSmrg   /*@}*/
6214a49301eSmrg
6224a49301eSmrg
6234a49301eSmrg   /**
6243464ebd5Sriastradh    * Resource functions for blit-like functionality
6254a49301eSmrg    *
626af69d88dSmrg    * If a driver supports multisampling, blit must implement color resolve.
6274a49301eSmrg    */
6284a49301eSmrg   /*@{*/
6294a49301eSmrg
6304a49301eSmrg   /**
6313464ebd5Sriastradh    * Copy a block of pixels from one resource to another.
6323464ebd5Sriastradh    * The resource must be of the same format.
6333464ebd5Sriastradh    * Resources with nr_samples > 1 are not allowed.
6344a49301eSmrg    */
6353464ebd5Sriastradh   void (*resource_copy_region)(struct pipe_context *pipe,
6363464ebd5Sriastradh                                struct pipe_resource *dst,
6373464ebd5Sriastradh                                unsigned dst_level,
6383464ebd5Sriastradh                                unsigned dstx, unsigned dsty, unsigned dstz,
6393464ebd5Sriastradh                                struct pipe_resource *src,
6403464ebd5Sriastradh                                unsigned src_level,
6413464ebd5Sriastradh                                const struct pipe_box *src_box);
6424a49301eSmrg
643af69d88dSmrg   /* Optimal hardware path for blitting pixels.
644af69d88dSmrg    * Scaling, format conversion, up- and downsampling (resolve) are allowed.
6454a49301eSmrg    */
646af69d88dSmrg   void (*blit)(struct pipe_context *pipe,
647af69d88dSmrg                const struct pipe_blit_info *info);
6483464ebd5Sriastradh
6494a49301eSmrg   /*@}*/
6504a49301eSmrg
6514a49301eSmrg   /**
6524a49301eSmrg    * Clear the specified set of currently bound buffers to specified values.
6534a49301eSmrg    * The entire buffers are cleared (no scissor, no colormask, etc).
6544a49301eSmrg    *
6554a49301eSmrg    * \param buffers  bitfield of PIPE_CLEAR_* values.
6567ec681f3Smrg    * \param scissor_state  the scissored region to clear
657af69d88dSmrg    * \param color  pointer to a union of fiu array for each of r, g, b, a.
6584a49301eSmrg    * \param depth  depth clear value in [0,1].
6594a49301eSmrg    * \param stencil  stencil clear value
6604a49301eSmrg    */
6614a49301eSmrg   void (*clear)(struct pipe_context *pipe,
6624a49301eSmrg                 unsigned buffers,
6637ec681f3Smrg                 const struct pipe_scissor_state *scissor_state,
664af69d88dSmrg                 const union pipe_color_union *color,
6654a49301eSmrg                 double depth,
6663464ebd5Sriastradh                 unsigned stencil);
6673464ebd5Sriastradh
6683464ebd5Sriastradh   /**
6693464ebd5Sriastradh    * Clear a color rendertarget surface.
670af69d88dSmrg    * \param color  pointer to an union of fiu array for each of r, g, b, a.
6713464ebd5Sriastradh    */
6723464ebd5Sriastradh   void (*clear_render_target)(struct pipe_context *pipe,
6733464ebd5Sriastradh                               struct pipe_surface *dst,
674af69d88dSmrg                               const union pipe_color_union *color,
6753464ebd5Sriastradh                               unsigned dstx, unsigned dsty,
67601e04c3fSmrg                               unsigned width, unsigned height,
67701e04c3fSmrg                               bool render_condition_enabled);
6784a49301eSmrg
6793464ebd5Sriastradh   /**
6803464ebd5Sriastradh    * Clear a depth-stencil surface.
6813464ebd5Sriastradh    * \param clear_flags  bitfield of PIPE_CLEAR_DEPTH/STENCIL values.
6823464ebd5Sriastradh    * \param depth  depth clear value in [0,1].
6833464ebd5Sriastradh    * \param stencil  stencil clear value
6843464ebd5Sriastradh    */
6853464ebd5Sriastradh   void (*clear_depth_stencil)(struct pipe_context *pipe,
6863464ebd5Sriastradh                               struct pipe_surface *dst,
6873464ebd5Sriastradh                               unsigned clear_flags,
6883464ebd5Sriastradh                               double depth,
6893464ebd5Sriastradh                               unsigned stencil,
6903464ebd5Sriastradh                               unsigned dstx, unsigned dsty,
69101e04c3fSmrg                               unsigned width, unsigned height,
69201e04c3fSmrg                               bool render_condition_enabled);
69301e04c3fSmrg
69401e04c3fSmrg   /**
69501e04c3fSmrg    * Clear the texture with the specified texel. Not guaranteed to be a
69601e04c3fSmrg    * renderable format. Data provided in the resource's format.
69701e04c3fSmrg    */
69801e04c3fSmrg   void (*clear_texture)(struct pipe_context *pipe,
69901e04c3fSmrg                         struct pipe_resource *res,
70001e04c3fSmrg                         unsigned level,
70101e04c3fSmrg                         const struct pipe_box *box,
70201e04c3fSmrg                         const void *data);
7033464ebd5Sriastradh
704af69d88dSmrg   /**
705af69d88dSmrg    * Clear a buffer. Runs a memset over the specified region with the element
706af69d88dSmrg    * value passed in through clear_value of size clear_value_size.
707af69d88dSmrg    */
708af69d88dSmrg   void (*clear_buffer)(struct pipe_context *pipe,
709af69d88dSmrg                        struct pipe_resource *res,
710af69d88dSmrg                        unsigned offset,
711af69d88dSmrg                        unsigned size,
712af69d88dSmrg                        const void *clear_value,
713af69d88dSmrg                        int clear_value_size);
714af69d88dSmrg
71501e04c3fSmrg   /**
71601e04c3fSmrg    * If a depth buffer is rendered with different sample location state than
71701e04c3fSmrg    * what is current at the time of reading, the values may differ because
71801e04c3fSmrg    * depth buffer compression can depend the sample locations.
719af69d88dSmrg    *
72001e04c3fSmrg    * This function is a hint to decompress the current depth buffer to avoid
72101e04c3fSmrg    * such problems.
72201e04c3fSmrg    */
72301e04c3fSmrg   void (*evaluate_depth_buffer)(struct pipe_context *pipe);
72401e04c3fSmrg
72501e04c3fSmrg   /**
72601e04c3fSmrg    * Flush draw commands.
72701e04c3fSmrg    *
72801e04c3fSmrg    * This guarantees that the new fence (if any) will finish in finite time,
72901e04c3fSmrg    * unless PIPE_FLUSH_DEFERRED is used.
73001e04c3fSmrg    *
73101e04c3fSmrg    * Subsequent operations on other contexts of the same screen are guaranteed
73201e04c3fSmrg    * to execute after the flushed commands, unless PIPE_FLUSH_ASYNC is used.
73301e04c3fSmrg    *
73401e04c3fSmrg    * NOTE: use screen->fence_reference() (or equivalent) to transfer
73501e04c3fSmrg    * new fence ref to **fence, to ensure that previous fence is unref'd
73601e04c3fSmrg    *
73701e04c3fSmrg    * \param fence  if not NULL, an old fence to unref and transfer a
73801e04c3fSmrg    *    new fence reference to
739af69d88dSmrg    * \param flags  bitfield of enum pipe_flush_flags values.
7404a49301eSmrg    */
741af69d88dSmrg   void (*flush)(struct pipe_context *pipe,
742af69d88dSmrg                 struct pipe_fence_handle **fence,
743af69d88dSmrg                 unsigned flags);
7444a49301eSmrg
74501e04c3fSmrg   /**
74601e04c3fSmrg    * Create a fence from a fd.
74701e04c3fSmrg    *
74801e04c3fSmrg    * This is used for importing a foreign/external fence fd.
74901e04c3fSmrg    *
75001e04c3fSmrg    * \param fence  if not NULL, an old fence to unref and transfer a
75101e04c3fSmrg    *    new fence reference to
75201e04c3fSmrg    * \param fd     fd representing the fence object
75301e04c3fSmrg    * \param type   indicates which fence types backs fd
75401e04c3fSmrg    */
75501e04c3fSmrg   void (*create_fence_fd)(struct pipe_context *pipe,
75601e04c3fSmrg                           struct pipe_fence_handle **fence,
75701e04c3fSmrg                           int fd,
75801e04c3fSmrg                           enum pipe_fd_type type);
75901e04c3fSmrg
76001e04c3fSmrg   /**
76101e04c3fSmrg    * Insert commands to have GPU wait for fence to be signaled.
76201e04c3fSmrg    */
76301e04c3fSmrg   void (*fence_server_sync)(struct pipe_context *pipe,
76401e04c3fSmrg                             struct pipe_fence_handle *fence);
76501e04c3fSmrg
76601e04c3fSmrg   /**
76701e04c3fSmrg    * Insert commands to have the GPU signal a fence.
76801e04c3fSmrg    */
76901e04c3fSmrg   void (*fence_server_signal)(struct pipe_context *pipe,
77001e04c3fSmrg                               struct pipe_fence_handle *fence);
77101e04c3fSmrg
7724a49301eSmrg   /**
7733464ebd5Sriastradh    * Create a view on a texture to be used by a shader stage.
7743464ebd5Sriastradh    */
7753464ebd5Sriastradh   struct pipe_sampler_view * (*create_sampler_view)(struct pipe_context *ctx,
7763464ebd5Sriastradh                                                     struct pipe_resource *texture,
7773464ebd5Sriastradh                                                     const struct pipe_sampler_view *templat);
7783464ebd5Sriastradh
77901e04c3fSmrg   /**
78001e04c3fSmrg    * Destroy a view on a texture.
78101e04c3fSmrg    *
78201e04c3fSmrg    * \param ctx the current context
78301e04c3fSmrg    * \param view the view to be destroyed
78401e04c3fSmrg    *
78501e04c3fSmrg    * \note The current context may not be the context in which the view was
78601e04c3fSmrg    *       created (view->context). However, the caller must guarantee that
78701e04c3fSmrg    *       the context which created the view is still alive.
78801e04c3fSmrg    */
7893464ebd5Sriastradh   void (*sampler_view_destroy)(struct pipe_context *ctx,
7903464ebd5Sriastradh                                struct pipe_sampler_view *view);
7913464ebd5Sriastradh
7923464ebd5Sriastradh
7933464ebd5Sriastradh   /**
7943464ebd5Sriastradh    * Get a surface which is a "view" into a resource, used by
7953464ebd5Sriastradh    * render target / depth stencil stages.
7963464ebd5Sriastradh    */
7973464ebd5Sriastradh   struct pipe_surface *(*create_surface)(struct pipe_context *ctx,
7983464ebd5Sriastradh                                          struct pipe_resource *resource,
7993464ebd5Sriastradh                                          const struct pipe_surface *templat);
8003464ebd5Sriastradh
8013464ebd5Sriastradh   void (*surface_destroy)(struct pipe_context *ctx,
8023464ebd5Sriastradh                           struct pipe_surface *);
8033464ebd5Sriastradh
80401e04c3fSmrg
8053464ebd5Sriastradh   /**
806af69d88dSmrg    * Map a resource.
8073464ebd5Sriastradh    *
8083464ebd5Sriastradh    * Transfers are (by default) context-private and allow uploads to be
809af69d88dSmrg    * interleaved with rendering.
810af69d88dSmrg    *
811af69d88dSmrg    * out_transfer will contain the transfer object that must be passed
812af69d88dSmrg    * to all the other transfer functions. It also contains useful
8137ec681f3Smrg    * information (like texture strides for texture_map).
8143464ebd5Sriastradh    */
8157ec681f3Smrg   void *(*buffer_map)(struct pipe_context *,
8167ec681f3Smrg		       struct pipe_resource *resource,
8177ec681f3Smrg		       unsigned level,
8187ec681f3Smrg		       unsigned usage,  /* a combination of PIPE_MAP_x */
8197ec681f3Smrg		       const struct pipe_box *,
8207ec681f3Smrg		       struct pipe_transfer **out_transfer);
8213464ebd5Sriastradh
8223464ebd5Sriastradh   /* If transfer was created with WRITE|FLUSH_EXPLICIT, only the
8233464ebd5Sriastradh    * regions specified with this call are guaranteed to be written to
8243464ebd5Sriastradh    * the resource.
8253464ebd5Sriastradh    */
8263464ebd5Sriastradh   void (*transfer_flush_region)( struct pipe_context *,
8273464ebd5Sriastradh				  struct pipe_transfer *transfer,
8283464ebd5Sriastradh				  const struct pipe_box *);
8293464ebd5Sriastradh
8307ec681f3Smrg   void (*buffer_unmap)(struct pipe_context *,
8317ec681f3Smrg			struct pipe_transfer *transfer);
8327ec681f3Smrg
8337ec681f3Smrg   void *(*texture_map)(struct pipe_context *,
8347ec681f3Smrg			struct pipe_resource *resource,
8357ec681f3Smrg			unsigned level,
8367ec681f3Smrg			unsigned usage,  /* a combination of PIPE_MAP_x */
8377ec681f3Smrg			const struct pipe_box *,
8387ec681f3Smrg			struct pipe_transfer **out_transfer);
8397ec681f3Smrg
8407ec681f3Smrg   void (*texture_unmap)(struct pipe_context *,
8417ec681f3Smrg			 struct pipe_transfer *transfer);
8423464ebd5Sriastradh
8433464ebd5Sriastradh   /* One-shot transfer operation with data supplied in a user
84401e04c3fSmrg    * pointer.
84501e04c3fSmrg    */
84601e04c3fSmrg   void (*buffer_subdata)(struct pipe_context *,
84701e04c3fSmrg                          struct pipe_resource *,
8487ec681f3Smrg                          unsigned usage, /* a combination of PIPE_MAP_x */
84901e04c3fSmrg                          unsigned offset,
85001e04c3fSmrg                          unsigned size,
85101e04c3fSmrg                          const void *data);
85201e04c3fSmrg
85301e04c3fSmrg   void (*texture_subdata)(struct pipe_context *,
85401e04c3fSmrg                           struct pipe_resource *,
85501e04c3fSmrg                           unsigned level,
8567ec681f3Smrg                           unsigned usage, /* a combination of PIPE_MAP_x */
85701e04c3fSmrg                           const struct pipe_box *,
85801e04c3fSmrg                           const void *data,
85901e04c3fSmrg                           unsigned stride,
86001e04c3fSmrg                           unsigned layer_stride);
8613464ebd5Sriastradh
8624a49301eSmrg   /**
8633464ebd5Sriastradh    * Flush any pending framebuffer writes and invalidate texture caches.
8644a49301eSmrg    */
86501e04c3fSmrg   void (*texture_barrier)(struct pipe_context *, unsigned flags);
866af69d88dSmrg
867af69d88dSmrg   /**
868af69d88dSmrg    * Flush caches according to flags.
869af69d88dSmrg    */
870af69d88dSmrg   void (*memory_barrier)(struct pipe_context *, unsigned flags);
871af69d88dSmrg
87201e04c3fSmrg   /**
87301e04c3fSmrg    * Change the commitment status of a part of the given resource, which must
87401e04c3fSmrg    * have been created with the PIPE_RESOURCE_FLAG_SPARSE bit.
87501e04c3fSmrg    *
87601e04c3fSmrg    * \param level The texture level whose commitment should be changed.
87701e04c3fSmrg    * \param box The region of the resource whose commitment should be changed.
87801e04c3fSmrg    * \param commit Whether memory should be committed or un-committed.
87901e04c3fSmrg    *
88001e04c3fSmrg    * \return false if out of memory, true on success.
88101e04c3fSmrg    */
88201e04c3fSmrg   bool (*resource_commit)(struct pipe_context *, struct pipe_resource *,
88301e04c3fSmrg                           unsigned level, struct pipe_box *box, bool commit);
88401e04c3fSmrg
885af69d88dSmrg   /**
886af69d88dSmrg    * Creates a video codec for a specific video format/profile
887af69d88dSmrg    */
888af69d88dSmrg   struct pipe_video_codec *(*create_video_codec)( struct pipe_context *context,
889af69d88dSmrg                                                   const struct pipe_video_codec *templat );
890af69d88dSmrg
891af69d88dSmrg   /**
892af69d88dSmrg    * Creates a video buffer as decoding target
893af69d88dSmrg    */
894af69d88dSmrg   struct pipe_video_buffer *(*create_video_buffer)( struct pipe_context *context,
895af69d88dSmrg                                                     const struct pipe_video_buffer *templat );
896af69d88dSmrg
897af69d88dSmrg   /**
898af69d88dSmrg    * Compute kernel execution
899af69d88dSmrg    */
900af69d88dSmrg   /*@{*/
901af69d88dSmrg   /**
902af69d88dSmrg    * Define the compute program and parameters to be used by
903af69d88dSmrg    * pipe_context::launch_grid.
904af69d88dSmrg    */
905af69d88dSmrg   void *(*create_compute_state)(struct pipe_context *context,
906af69d88dSmrg				 const struct pipe_compute_state *);
907af69d88dSmrg   void (*bind_compute_state)(struct pipe_context *, void *);
908af69d88dSmrg   void (*delete_compute_state)(struct pipe_context *, void *);
909af69d88dSmrg
910af69d88dSmrg   /**
911af69d88dSmrg    * Bind an array of shader resources that will be used by the
912af69d88dSmrg    * compute program.  Any resources that were previously bound to
913af69d88dSmrg    * the specified range will be unbound after this call.
914af69d88dSmrg    *
915af69d88dSmrg    * \param start      first resource to bind.
916af69d88dSmrg    * \param count      number of consecutive resources to bind.
917af69d88dSmrg    * \param resources  array of pointers to the resources to bind, it
918af69d88dSmrg    *                   should contain at least \a count elements
919af69d88dSmrg    *                   unless it's NULL, in which case no new
920af69d88dSmrg    *                   resources will be bound.
921af69d88dSmrg    */
922af69d88dSmrg   void (*set_compute_resources)(struct pipe_context *,
923af69d88dSmrg                                 unsigned start, unsigned count,
924af69d88dSmrg                                 struct pipe_surface **resources);
925af69d88dSmrg
926af69d88dSmrg   /**
927af69d88dSmrg    * Bind an array of buffers to be mapped into the address space of
928af69d88dSmrg    * the GLOBAL resource.  Any buffers that were previously bound
929af69d88dSmrg    * between [first, first + count - 1] are unbound after this call.
930af69d88dSmrg    *
931af69d88dSmrg    * \param first      first buffer to map.
932af69d88dSmrg    * \param count      number of consecutive buffers to map.
933af69d88dSmrg    * \param resources  array of pointers to the buffers to map, it
934af69d88dSmrg    *                   should contain at least \a count elements
935af69d88dSmrg    *                   unless it's NULL, in which case no new
936af69d88dSmrg    *                   resources will be bound.
937af69d88dSmrg    * \param handles    array of pointers to the memory locations that
938af69d88dSmrg    *                   will be updated with the address each buffer
939af69d88dSmrg    *                   will be mapped to.  The base memory address of
940af69d88dSmrg    *                   each of the buffers will be added to the value
941af69d88dSmrg    *                   pointed to by its corresponding handle to form
942af69d88dSmrg    *                   the final address argument.  It should contain
943af69d88dSmrg    *                   at least \a count elements, unless \a
944af69d88dSmrg    *                   resources is NULL in which case \a handles
945af69d88dSmrg    *                   should be NULL as well.
946af69d88dSmrg    *
947af69d88dSmrg    * Note that the driver isn't required to make any guarantees about
948af69d88dSmrg    * the contents of the \a handles array being valid anytime except
949af69d88dSmrg    * during the subsequent calls to pipe_context::launch_grid.  This
950af69d88dSmrg    * means that the only sensible location handles[i] may point to is
951af69d88dSmrg    * somewhere within the INPUT buffer itself.  This is so to
952af69d88dSmrg    * accommodate implementations that lack virtual memory but
953af69d88dSmrg    * nevertheless migrate buffers on the fly, leading to resource
954af69d88dSmrg    * base addresses that change on each kernel invocation or are
955af69d88dSmrg    * unknown to the pipe driver.
956af69d88dSmrg    */
957af69d88dSmrg   void (*set_global_binding)(struct pipe_context *context,
958af69d88dSmrg                              unsigned first, unsigned count,
959af69d88dSmrg                              struct pipe_resource **resources,
960af69d88dSmrg                              uint32_t **handles);
961af69d88dSmrg
962af69d88dSmrg   /**
963af69d88dSmrg    * Launch the compute kernel starting from instruction \a pc of the
964af69d88dSmrg    * currently bound compute program.
965af69d88dSmrg    */
966af69d88dSmrg   void (*launch_grid)(struct pipe_context *context,
96701e04c3fSmrg                       const struct pipe_grid_info *info);
968af69d88dSmrg   /*@}*/
969af69d88dSmrg
9707ec681f3Smrg   /**
9717ec681f3Smrg    * SVM (Share Virtual Memory) helpers
9727ec681f3Smrg    */
9737ec681f3Smrg   /*@{*/
9747ec681f3Smrg   /**
9757ec681f3Smrg    * Migrate range of virtual address to device or host memory.
9767ec681f3Smrg    *
9777ec681f3Smrg    * \param to_device - true if the virtual memory is migrated to the device
9787ec681f3Smrg    *                    false if the virtual memory is migrated to the host
9797ec681f3Smrg    * \param migrate_content - whether the content should be migrated as well
9807ec681f3Smrg    */
9817ec681f3Smrg   void (*svm_migrate)(struct pipe_context *context, unsigned num_ptrs,
9827ec681f3Smrg                       const void* const* ptrs, const size_t *sizes,
9837ec681f3Smrg                       bool to_device, bool migrate_content);
9847ec681f3Smrg   /*@}*/
9857ec681f3Smrg
986af69d88dSmrg   /**
98701e04c3fSmrg    * Get the default sample position for an individual sample point.
988af69d88dSmrg    *
989af69d88dSmrg    * \param sample_count - total number of samples
990af69d88dSmrg    * \param sample_index - sample to get the position values for
991af69d88dSmrg    * \param out_value - return value of 2 floats for x and y position for
992af69d88dSmrg    *                    requested sample.
993af69d88dSmrg    */
994af69d88dSmrg   void (*get_sample_position)(struct pipe_context *context,
995af69d88dSmrg                               unsigned sample_count,
996af69d88dSmrg                               unsigned sample_index,
997af69d88dSmrg                               float *out_value);
998af69d88dSmrg
99901e04c3fSmrg   /**
100001e04c3fSmrg    * Query a timestamp in nanoseconds.  This is completely equivalent to
100101e04c3fSmrg    * pipe_screen::get_timestamp() but takes a context handle for drivers
100201e04c3fSmrg    * that require a context.
100301e04c3fSmrg    */
100401e04c3fSmrg   uint64_t (*get_timestamp)(struct pipe_context *);
100501e04c3fSmrg
1006af69d88dSmrg   /**
1007af69d88dSmrg    * Flush the resource cache, so that the resource can be used
1008af69d88dSmrg    * by an external client. Possible usage:
1009af69d88dSmrg    * - flushing a resource before presenting it on the screen
1010af69d88dSmrg    * - flushing a resource if some other process or device wants to use it
1011af69d88dSmrg    * This shouldn't be used to flush caches if the resource is only managed
1012af69d88dSmrg    * by a single pipe_screen and is not shared with another process.
1013af69d88dSmrg    * (i.e. you shouldn't use it to flush caches explicitly if you want to e.g.
1014af69d88dSmrg    * use the resource for texturing)
1015af69d88dSmrg    */
1016af69d88dSmrg   void (*flush_resource)(struct pipe_context *ctx,
1017af69d88dSmrg                          struct pipe_resource *resource);
101801e04c3fSmrg
101901e04c3fSmrg   /**
102001e04c3fSmrg    * Invalidate the contents of the resource. This is used to
102101e04c3fSmrg    *
102201e04c3fSmrg    * (1) implement EGL's semantic of undefined depth/stencil
10239f464c52Smaya    * contents after a swapbuffers.  This allows a tiled renderer (for
102401e04c3fSmrg    * example) to not store the depth buffer.
102501e04c3fSmrg    *
102601e04c3fSmrg    * (2) implement GL's InvalidateBufferData. For backwards compatibility,
102701e04c3fSmrg    * you must only rely on the usability for this purpose when
102801e04c3fSmrg    * PIPE_CAP_INVALIDATE_BUFFER is enabled.
102901e04c3fSmrg    */
103001e04c3fSmrg   void (*invalidate_resource)(struct pipe_context *ctx,
103101e04c3fSmrg                               struct pipe_resource *resource);
103201e04c3fSmrg
103301e04c3fSmrg   /**
103401e04c3fSmrg    * Return information about unexpected device resets.
103501e04c3fSmrg    */
103601e04c3fSmrg   enum pipe_reset_status (*get_device_reset_status)(struct pipe_context *ctx);
103701e04c3fSmrg
103801e04c3fSmrg   /**
103901e04c3fSmrg    * Sets the reset status callback. If the pointer is null, then no callback
104001e04c3fSmrg    * is set, otherwise a copy of the data should be made.
104101e04c3fSmrg    */
104201e04c3fSmrg   void (*set_device_reset_callback)(struct pipe_context *ctx,
104301e04c3fSmrg                                     const struct pipe_device_reset_callback *cb);
104401e04c3fSmrg
104501e04c3fSmrg   /**
104601e04c3fSmrg    * Dump driver-specific debug information into a stream. This is
104701e04c3fSmrg    * used by debugging tools.
104801e04c3fSmrg    *
104901e04c3fSmrg    * \param ctx        pipe context
105001e04c3fSmrg    * \param stream     where the output should be written to
105101e04c3fSmrg    * \param flags      a mask of PIPE_DUMP_* flags
105201e04c3fSmrg    */
105301e04c3fSmrg   void (*dump_debug_state)(struct pipe_context *ctx, FILE *stream,
105401e04c3fSmrg                            unsigned flags);
105501e04c3fSmrg
105601e04c3fSmrg   /**
105701e04c3fSmrg    * Set the log context to which the driver should write internal debug logs
105801e04c3fSmrg    * (internal states, command streams).
105901e04c3fSmrg    *
106001e04c3fSmrg    * The caller must ensure that the log context is destroyed and reset to
106101e04c3fSmrg    * NULL before the pipe context is destroyed, and that log context functions
106201e04c3fSmrg    * are only called from the driver thread.
106301e04c3fSmrg    *
106401e04c3fSmrg    * \param ctx pipe context
106501e04c3fSmrg    * \param log logging context
106601e04c3fSmrg    */
106701e04c3fSmrg   void (*set_log_context)(struct pipe_context *ctx, struct u_log_context *log);
106801e04c3fSmrg
106901e04c3fSmrg   /**
107001e04c3fSmrg    * Emit string marker in cmdstream
107101e04c3fSmrg    */
107201e04c3fSmrg   void (*emit_string_marker)(struct pipe_context *ctx,
107301e04c3fSmrg                              const char *string,
107401e04c3fSmrg                              int len);
107501e04c3fSmrg
107601e04c3fSmrg   /**
107701e04c3fSmrg    * Generate mipmap.
107801e04c3fSmrg    * \return TRUE if mipmap generation succeeds, FALSE otherwise
107901e04c3fSmrg    */
10807ec681f3Smrg   bool (*generate_mipmap)(struct pipe_context *ctx,
10817ec681f3Smrg                           struct pipe_resource *resource,
10827ec681f3Smrg                           enum pipe_format format,
10837ec681f3Smrg                           unsigned base_level,
10847ec681f3Smrg                           unsigned last_level,
10857ec681f3Smrg                           unsigned first_layer,
10867ec681f3Smrg                           unsigned last_layer);
108701e04c3fSmrg
108801e04c3fSmrg   /**
108901e04c3fSmrg    * Create a 64-bit texture handle.
109001e04c3fSmrg    *
109101e04c3fSmrg    * \param ctx        pipe context
109201e04c3fSmrg    * \param view       pipe sampler view object
109301e04c3fSmrg    * \param state      pipe sampler state template
109401e04c3fSmrg    * \return           a 64-bit texture handle if success, 0 otherwise
109501e04c3fSmrg    */
109601e04c3fSmrg   uint64_t (*create_texture_handle)(struct pipe_context *ctx,
109701e04c3fSmrg                                     struct pipe_sampler_view *view,
109801e04c3fSmrg                                     const struct pipe_sampler_state *state);
109901e04c3fSmrg
110001e04c3fSmrg   /**
110101e04c3fSmrg    * Delete a texture handle.
110201e04c3fSmrg    *
110301e04c3fSmrg    * \param ctx        pipe context
110401e04c3fSmrg    * \param handle     64-bit texture handle
110501e04c3fSmrg    */
110601e04c3fSmrg   void (*delete_texture_handle)(struct pipe_context *ctx, uint64_t handle);
110701e04c3fSmrg
110801e04c3fSmrg   /**
110901e04c3fSmrg    * Make a texture handle resident.
111001e04c3fSmrg    *
111101e04c3fSmrg    * \param ctx        pipe context
111201e04c3fSmrg    * \param handle     64-bit texture handle
111301e04c3fSmrg    * \param resident   TRUE for resident, FALSE otherwise
111401e04c3fSmrg    */
111501e04c3fSmrg   void (*make_texture_handle_resident)(struct pipe_context *ctx,
111601e04c3fSmrg                                        uint64_t handle, bool resident);
111701e04c3fSmrg
111801e04c3fSmrg   /**
111901e04c3fSmrg    * Create a 64-bit image handle.
112001e04c3fSmrg    *
112101e04c3fSmrg    * \param ctx        pipe context
112201e04c3fSmrg    * \param image      pipe image view template
112301e04c3fSmrg    * \return           a 64-bit image handle if success, 0 otherwise
112401e04c3fSmrg    */
112501e04c3fSmrg   uint64_t (*create_image_handle)(struct pipe_context *ctx,
112601e04c3fSmrg                                   const struct pipe_image_view *image);
112701e04c3fSmrg
112801e04c3fSmrg   /**
112901e04c3fSmrg    * Delete an image handle.
113001e04c3fSmrg    *
113101e04c3fSmrg    * \param ctx        pipe context
113201e04c3fSmrg    * \param handle     64-bit image handle
113301e04c3fSmrg    */
113401e04c3fSmrg   void (*delete_image_handle)(struct pipe_context *ctx, uint64_t handle);
113501e04c3fSmrg
113601e04c3fSmrg   /**
113701e04c3fSmrg    * Make an image handle resident.
113801e04c3fSmrg    *
113901e04c3fSmrg    * \param ctx        pipe context
114001e04c3fSmrg    * \param handle     64-bit image handle
114101e04c3fSmrg    * \param access     GL_READ_ONLY, GL_WRITE_ONLY or GL_READ_WRITE
114201e04c3fSmrg    * \param resident   TRUE for resident, FALSE otherwise
114301e04c3fSmrg    */
114401e04c3fSmrg   void (*make_image_handle_resident)(struct pipe_context *ctx, uint64_t handle,
114501e04c3fSmrg                                      unsigned access, bool resident);
114601e04c3fSmrg
114701e04c3fSmrg   /**
114801e04c3fSmrg    * Call the given function from the driver thread.
114901e04c3fSmrg    *
115001e04c3fSmrg    * This is set by threaded contexts for use by debugging wrappers.
115101e04c3fSmrg    *
115201e04c3fSmrg    * \param asap if true, run the callback immediately if there are no pending
115301e04c3fSmrg    *             commands to be processed by the driver thread
115401e04c3fSmrg    */
115501e04c3fSmrg   void (*callback)(struct pipe_context *ctx, void (*fn)(void *), void *data,
115601e04c3fSmrg                    bool asap);
115701e04c3fSmrg
115801e04c3fSmrg   /**
115901e04c3fSmrg    * Set a context parameter See enum pipe_context_param for more details.
116001e04c3fSmrg    */
116101e04c3fSmrg   void (*set_context_param)(struct pipe_context *ctx,
116201e04c3fSmrg                             enum pipe_context_param param,
116301e04c3fSmrg                             unsigned value);
11647ec681f3Smrg
11657ec681f3Smrg   /**
11667ec681f3Smrg    * Creates a video buffer as decoding target, with modifiers.
11677ec681f3Smrg    */
11687ec681f3Smrg   struct pipe_video_buffer *(*create_video_buffer_with_modifiers)(struct pipe_context *context,
11697ec681f3Smrg                                                                   const struct pipe_video_buffer *templat,
11707ec681f3Smrg                                                                   const uint64_t *modifiers,
11717ec681f3Smrg                                                                   unsigned int modifiers_count);
11724a49301eSmrg};
11734a49301eSmrg
11744a49301eSmrg
11754a49301eSmrg#ifdef __cplusplus
11764a49301eSmrg}
11774a49301eSmrg#endif
11784a49301eSmrg
11794a49301eSmrg#endif /* PIPE_CONTEXT_H */
1180