1/**********************************************************
2 * Copyright 2009-2015 VMware, Inc.  All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26/**
27 * @file
28 * Common definitions for the VMware SVGA winsys.
29 *
30 * @author Jose Fonseca <jfonseca@vmware.com>
31 */
32
33
34#ifndef VMW_SCREEN_H_
35#define VMW_SCREEN_H_
36
37
38#include "pipe/p_compiler.h"
39#include "pipe/p_state.h"
40
41#include "svga_winsys.h"
42#include "pipebuffer/pb_buffer_fenced.h"
43#include <os/os_thread.h>
44#include <sys/types.h>
45
46#define VMW_GMR_POOL_SIZE (16*1024*1024)
47#define VMW_QUERY_POOL_SIZE (8192)
48#define VMW_DEBUG_FLUSH_STACK 10
49
50/*
51 * Something big, but arbitrary. The kernel reports an error if it can't
52 * handle this, and the svga driver will resort to multiple partial
53 * uploads.
54 */
55#define VMW_MAX_BUFFER_SIZE (512*1024*1024)
56
57struct pb_manager;
58struct vmw_region;
59
60struct vmw_cap_3d {
61   boolean has_cap;
62   SVGA3dDevCapResult result;
63};
64
65struct vmw_winsys_screen
66{
67   struct svga_winsys_screen base;
68
69   struct {
70      int drm_fd;
71      uint32_t hwversion;
72      uint32_t num_cap_3d;
73      struct vmw_cap_3d *cap_3d;
74      uint64_t max_mob_memory;
75      uint64_t max_surface_memory;
76      uint64_t max_texture_size;
77      boolean have_drm_2_6;
78      boolean have_drm_2_9;
79      uint32_t drm_execbuf_version;
80      boolean have_drm_2_15;
81      boolean have_drm_2_16;
82      boolean have_drm_2_17;
83      boolean have_drm_2_18;
84      boolean have_drm_2_19;
85   } ioctl;
86
87   struct {
88      struct pb_manager *gmr;
89      struct pb_manager *gmr_mm;
90      struct pb_manager *gmr_fenced;
91      struct pb_manager *gmr_slab;
92      struct pb_manager *gmr_slab_fenced;
93      struct pb_manager *query_mm;
94      struct pb_manager *query_fenced;
95      struct pb_manager *mob_fenced;
96      struct pb_manager *mob_cache;
97      struct pb_manager *mob_shader_slab;
98      struct pb_manager *mob_shader_slab_fenced;
99   } pools;
100
101   struct pb_fence_ops *fence_ops;
102
103#ifdef VMX86_STATS
104   /*
105    * mksGuestStats TLS array; length must be power of two
106    */
107   struct {
108      void *     stat_pages;
109      uint64_t   stat_id;
110      uint32_t   pid;
111   } mksstat_tls[64];
112
113#endif
114   /*
115    * Screen instances
116    */
117   dev_t device;
118   int open_count;
119
120   cnd_t cs_cond;
121   mtx_t cs_mutex;
122
123   boolean force_coherent;
124   boolean cache_maps;
125};
126
127
128static inline struct vmw_winsys_screen *
129vmw_winsys_screen(struct svga_winsys_screen *base)
130{
131   return (struct vmw_winsys_screen *)base;
132}
133
134/*  */
135uint32_t
136vmw_region_size(struct vmw_region *region);
137
138uint32
139vmw_ioctl_context_create(struct vmw_winsys_screen *vws);
140
141uint32
142vmw_ioctl_extended_context_create(struct vmw_winsys_screen *vws,
143                                  boolean vgpu10);
144
145void
146vmw_ioctl_context_destroy(struct vmw_winsys_screen *vws,
147                          uint32 cid);
148
149uint32
150vmw_ioctl_surface_create(struct vmw_winsys_screen *vws,
151                         SVGA3dSurface1Flags flags,
152                         SVGA3dSurfaceFormat format,
153                         unsigned usage,
154                         SVGA3dSize size,
155                         uint32 numFaces,
156                         uint32 numMipLevels,
157                         unsigned sampleCount);
158uint32
159vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws,
160                            SVGA3dSurfaceAllFlags flags,
161                            SVGA3dSurfaceFormat format,
162                            unsigned usage,
163                            SVGA3dSize size,
164                            uint32 numFaces,
165                            uint32 numMipLevels,
166                            unsigned sampleCount,
167                            uint32 buffer_handle,
168                            SVGA3dMSPattern multisamplePattern,
169                            SVGA3dMSQualityLevel qualityLevel,
170                            struct vmw_region **p_region);
171
172int
173vmw_ioctl_gb_surface_ref(struct vmw_winsys_screen *vws,
174                         const struct winsys_handle *whandle,
175                         SVGA3dSurfaceAllFlags *flags,
176                         SVGA3dSurfaceFormat *format,
177                         uint32_t *numMipLevels,
178                         uint32_t *handle,
179                         struct vmw_region **p_region);
180
181void
182vmw_ioctl_surface_destroy(struct vmw_winsys_screen *vws,
183                          uint32 sid);
184
185void
186vmw_ioctl_command(struct vmw_winsys_screen *vws,
187                  int32_t cid,
188                  uint32_t throttle_us,
189                  void *commands,
190                  uint32_t size,
191                  struct pipe_fence_handle **fence,
192                  int32_t imported_fence_fd,
193                  uint32_t flags);
194
195struct vmw_region *
196vmw_ioctl_region_create(struct vmw_winsys_screen *vws, uint32_t size);
197
198void
199vmw_ioctl_region_destroy(struct vmw_region *region);
200
201struct SVGAGuestPtr
202vmw_ioctl_region_ptr(struct vmw_region *region);
203
204void *
205vmw_ioctl_region_map(struct vmw_region *region);
206void
207vmw_ioctl_region_unmap(struct vmw_region *region);
208
209
210int
211vmw_ioctl_fence_finish(struct vmw_winsys_screen *vws,
212                       uint32_t handle, uint32_t flags);
213
214int
215vmw_ioctl_fence_signalled(struct vmw_winsys_screen *vws,
216                          uint32_t handle, uint32_t flags);
217
218void
219vmw_ioctl_fence_unref(struct vmw_winsys_screen *vws,
220		      uint32_t handle);
221
222uint32
223vmw_ioctl_shader_create(struct vmw_winsys_screen *vws,
224			SVGA3dShaderType type,
225			uint32 code_len);
226void
227vmw_ioctl_shader_destroy(struct vmw_winsys_screen *vws, uint32 shid);
228
229int
230vmw_ioctl_syncforcpu(struct vmw_region *region,
231                     boolean dont_block,
232                     boolean readonly,
233                     boolean allow_cs);
234void
235vmw_ioctl_releasefromcpu(struct vmw_region *region,
236                         boolean readonly,
237                         boolean allow_cs);
238/* Initialize parts of vmw_winsys_screen at startup:
239 */
240boolean vmw_ioctl_init(struct vmw_winsys_screen *vws);
241boolean vmw_pools_init(struct vmw_winsys_screen *vws);
242boolean vmw_query_pools_init(struct vmw_winsys_screen *vws);
243boolean vmw_mob_pools_init(struct vmw_winsys_screen *vws);
244boolean vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws);
245
246void vmw_ioctl_cleanup(struct vmw_winsys_screen *vws);
247void vmw_pools_cleanup(struct vmw_winsys_screen *vws);
248
249struct vmw_winsys_screen *vmw_winsys_create(int fd);
250void vmw_winsys_destroy(struct vmw_winsys_screen *sws);
251void vmw_winsys_screen_set_throttling(struct pipe_screen *screen,
252				      uint32_t throttle_us);
253
254struct pb_manager *
255simple_fenced_bufmgr_create(struct pb_manager *provider,
256			    struct pb_fence_ops *ops);
257void
258vmw_fences_signal(struct pb_fence_ops *fence_ops,
259                  uint32_t signaled,
260                  uint32_t emitted,
261                  boolean has_emitted);
262
263struct svga_winsys_gb_shader *
264vmw_svga_winsys_shader_create(struct svga_winsys_screen *sws,
265			      SVGA3dShaderType type,
266			      const uint32 *bytecode,
267			      uint32 bytecodeLen);
268void
269vmw_svga_winsys_shader_destroy(struct svga_winsys_screen *sws,
270			       struct svga_winsys_gb_shader *shader);
271
272size_t
273vmw_svga_winsys_stats_len(void);
274
275#endif /* VMW_SCREEN_H_ */
276