17ec681f3Smrg/* 27ec681f3Smrg * Copyright (c) 2018 Intel Corporation 37ec681f3Smrg * 47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 57ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 67ec681f3Smrg * to deal in the Software without restriction, including without limitation 77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the 97ec681f3Smrg * Software is furnished to do so, subject to the following conditions: 107ec681f3Smrg * 117ec681f3Smrg * The above copyright notice and this permission notice (including the next 127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 137ec681f3Smrg * Software. 147ec681f3Smrg * 157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 207ec681f3Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 217ec681f3Smrg * IN THE SOFTWARE. 227ec681f3Smrg */ 237ec681f3Smrg 247ec681f3Smrg#ifndef INTEL_AUX_MAP_H 257ec681f3Smrg#define INTEL_AUX_MAP_H 267ec681f3Smrg 277ec681f3Smrg#include "intel_buffer_alloc.h" 287ec681f3Smrg 297ec681f3Smrg#include "isl/isl.h" 307ec681f3Smrg 317ec681f3Smrg#include <stdint.h> 327ec681f3Smrg 337ec681f3Smrg#ifdef __cplusplus 347ec681f3Smrgextern "C" { 357ec681f3Smrg#endif 367ec681f3Smrg 377ec681f3Smrg/** 387ec681f3Smrg * Auxiliary surface mapping implementation 397ec681f3Smrg * 407ec681f3Smrg * These functions are implemented in common code shared by drivers. 417ec681f3Smrg */ 427ec681f3Smrg 437ec681f3Smrgstruct intel_aux_map_context; 447ec681f3Smrgstruct intel_device_info; 457ec681f3Smrg 467ec681f3Smrg#define INTEL_AUX_MAP_ADDRESS_MASK 0x0000ffffffffff00ull 477ec681f3Smrg#define INTEL_AUX_MAP_FORMAT_BITS_MASK 0xfff0000000000000ull 487ec681f3Smrg#define INTEL_AUX_MAP_ENTRY_VALID_BIT 0x1ull 497ec681f3Smrg#define INTEL_AUX_MAP_GFX12_CCS_SCALE 256 507ec681f3Smrg#define INTEL_AUX_MAP_MAIN_PAGE_SIZE (64 * 1024) 517ec681f3Smrg#define INTEL_AUX_MAP_AUX_PAGE_SIZE \ 527ec681f3Smrg (INTEL_AUX_MAP_MAIN_PAGE_SIZE / INTEL_AUX_MAP_GFX12_CCS_SCALE) 537ec681f3Smrg 547ec681f3Smrgstruct intel_aux_map_context * 557ec681f3Smrgintel_aux_map_init(void *driver_ctx, 567ec681f3Smrg struct intel_mapped_pinned_buffer_alloc *buffer_alloc, 577ec681f3Smrg const struct intel_device_info *devinfo); 587ec681f3Smrg 597ec681f3Smrgvoid 607ec681f3Smrgintel_aux_map_finish(struct intel_aux_map_context *ctx); 617ec681f3Smrg 627ec681f3Smrguint32_t 637ec681f3Smrgintel_aux_map_get_state_num(struct intel_aux_map_context *ctx); 647ec681f3Smrg 657ec681f3Smrg/** Returns the current number of buffers used by the aux-map tables 667ec681f3Smrg * 677ec681f3Smrg * When preparing to execute a new batch, use this function to determine how 687ec681f3Smrg * many buffers will be required. More buffers may be added by concurrent 697ec681f3Smrg * accesses of the aux-map functions, but they won't be required for since 707ec681f3Smrg * they involve surfaces not used by this batch. 717ec681f3Smrg */ 727ec681f3Smrguint32_t 737ec681f3Smrgintel_aux_map_get_num_buffers(struct intel_aux_map_context *ctx); 747ec681f3Smrg 757ec681f3Smrg/** Fill an array of exec_object2 with aux-map buffer handles 767ec681f3Smrg * 777ec681f3Smrg * The intel_aux_map_get_num_buffers call should be made, then the driver can 787ec681f3Smrg * make sure the `obj` array is large enough before calling this function. 797ec681f3Smrg */ 807ec681f3Smrgvoid 817ec681f3Smrgintel_aux_map_fill_bos(struct intel_aux_map_context *ctx, void **driver_bos, 827ec681f3Smrg uint32_t max_bos); 837ec681f3Smrg 847ec681f3Smrguint64_t 857ec681f3Smrgintel_aux_map_get_base(struct intel_aux_map_context *ctx); 867ec681f3Smrg 877ec681f3Smrguint64_t 887ec681f3Smrgintel_aux_map_format_bits(enum isl_tiling tiling, enum isl_format format, 897ec681f3Smrg uint8_t plane); 907ec681f3Smrg 917ec681f3Smrguint64_t 927ec681f3Smrgintel_aux_map_format_bits_for_isl_surf(const struct isl_surf *isl_surf); 937ec681f3Smrg 947ec681f3Smrguint64_t * 957ec681f3Smrgintel_aux_map_get_entry(struct intel_aux_map_context *ctx, 967ec681f3Smrg uint64_t address, 977ec681f3Smrg uint64_t *entry_address); 987ec681f3Smrg 997ec681f3Smrgvoid 1007ec681f3Smrgintel_aux_map_add_mapping(struct intel_aux_map_context *ctx, uint64_t address, 1017ec681f3Smrg uint64_t aux_address, uint64_t main_size_B, 1027ec681f3Smrg uint64_t format_bits); 1037ec681f3Smrg 1047ec681f3Smrgvoid 1057ec681f3Smrgintel_aux_map_unmap_range(struct intel_aux_map_context *ctx, uint64_t address, 1067ec681f3Smrg uint64_t size); 1077ec681f3Smrg 1087ec681f3Smrg#ifdef __cplusplus 1097ec681f3Smrg} 1107ec681f3Smrg#endif 1117ec681f3Smrg 1127ec681f3Smrg#endif /* INTEL_AUX_MAP_H */ 113