1/*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#include <stdlib.h>
25
26#include "compiler/brw_inst.h"
27#include "compiler/brw_eu.h"
28
29#include "intel_disasm.h"
30
31static bool
32is_send(uint32_t opcode)
33{
34   return (opcode == BRW_OPCODE_SEND  ||
35           opcode == BRW_OPCODE_SENDC ||
36           opcode == BRW_OPCODE_SENDS ||
37           opcode == BRW_OPCODE_SENDSC );
38}
39
40static int
41intel_disasm_find_end(const struct intel_device_info *devinfo,
42                      const void *assembly, int start)
43{
44   int offset = start;
45
46   /* This loop exits when send-with-EOT or when opcode is 0 */
47   while (true) {
48      const brw_inst *insn = assembly + offset;
49
50      if (brw_inst_cmpt_control(devinfo, insn)) {
51         offset += 8;
52      } else {
53         offset += 16;
54      }
55
56      /* Simplistic, but efficient way to terminate disasm */
57      uint32_t opcode = brw_inst_opcode(devinfo, insn);
58      if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
59         break;
60      }
61   }
62
63   return offset;
64}
65
66void
67intel_disassemble(const struct intel_device_info *devinfo,
68                  const void *assembly, int start, FILE *out)
69{
70   int end = intel_disasm_find_end(devinfo, assembly, start);
71
72   /* Make a dummy disasm structure that brw_validate_instructions
73    * can work from.
74    */
75   struct disasm_info *disasm_info = disasm_initialize(devinfo, NULL);
76   disasm_new_inst_group(disasm_info, start);
77   disasm_new_inst_group(disasm_info, end);
78
79   brw_validate_instructions(devinfo, assembly, start, end, disasm_info);
80
81   void *mem_ctx = ralloc_context(NULL);
82   const struct brw_label *root_label =
83      brw_label_assembly(devinfo, assembly, start, end, mem_ctx);
84
85   foreach_list_typed(struct inst_group, group, link,
86                      &disasm_info->group_list) {
87      struct exec_node *next_node = exec_node_get_next(&group->link);
88      if (exec_node_is_tail_sentinel(next_node))
89         break;
90
91      struct inst_group *next =
92         exec_node_data(struct inst_group, next_node, link);
93
94      int start_offset = group->offset;
95      int end_offset = next->offset;
96
97      brw_disassemble(devinfo, assembly, start_offset, end_offset,
98                      root_label, out);
99
100      if (group->error) {
101         fputs(group->error, out);
102      }
103   }
104
105   ralloc_free(mem_ctx);
106   ralloc_free(disasm_info);
107}
108