101e04c3fSmrg/* 201e04c3fSmrg * Copyright © 2008 Keith Packard 301e04c3fSmrg * 401e04c3fSmrg * Permission to use, copy, modify, distribute, and sell this software and its 501e04c3fSmrg * documentation for any purpose is hereby granted without fee, provided that 601e04c3fSmrg * the above copyright notice appear in all copies and that both that copyright 701e04c3fSmrg * notice and this permission notice appear in supporting documentation, and 801e04c3fSmrg * that the name of the copyright holders not be used in advertising or 901e04c3fSmrg * publicity pertaining to distribution of the software without specific, 1001e04c3fSmrg * written prior permission. The copyright holders make no representations 1101e04c3fSmrg * about the suitability of this software for any purpose. It is provided "as 1201e04c3fSmrg * is" without express or implied warranty. 1301e04c3fSmrg * 1401e04c3fSmrg * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 1501e04c3fSmrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 1601e04c3fSmrg * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 1701e04c3fSmrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 1801e04c3fSmrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 1901e04c3fSmrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE 2001e04c3fSmrg * OF THIS SOFTWARE. 2101e04c3fSmrg */ 2201e04c3fSmrg 2301e04c3fSmrg#include <stdio.h> 2401e04c3fSmrg#include <string.h> 2501e04c3fSmrg#include <stdarg.h> 2601e04c3fSmrg 2701e04c3fSmrg#include "brw_eu_defines.h" 2801e04c3fSmrg#include "brw_inst.h" 2901e04c3fSmrg#include "brw_shader.h" 3001e04c3fSmrg#include "brw_reg.h" 3101e04c3fSmrg#include "brw_inst.h" 3201e04c3fSmrg#include "brw_eu.h" 3301e04c3fSmrg#include "util/half_float.h" 3401e04c3fSmrg 357ec681f3Smrgbool 367ec681f3Smrgbrw_has_jip(const struct intel_device_info *devinfo, enum opcode opcode) 3701e04c3fSmrg{ 387ec681f3Smrg if (devinfo->ver < 6) 3901e04c3fSmrg return false; 4001e04c3fSmrg 4101e04c3fSmrg return opcode == BRW_OPCODE_IF || 4201e04c3fSmrg opcode == BRW_OPCODE_ELSE || 4301e04c3fSmrg opcode == BRW_OPCODE_ENDIF || 4401e04c3fSmrg opcode == BRW_OPCODE_WHILE || 4501e04c3fSmrg opcode == BRW_OPCODE_BREAK || 4601e04c3fSmrg opcode == BRW_OPCODE_CONTINUE || 4701e04c3fSmrg opcode == BRW_OPCODE_HALT; 4801e04c3fSmrg} 4901e04c3fSmrg 507ec681f3Smrgbool 517ec681f3Smrgbrw_has_uip(const struct intel_device_info *devinfo, enum opcode opcode) 5201e04c3fSmrg{ 537ec681f3Smrg if (devinfo->ver < 6) 5401e04c3fSmrg return false; 5501e04c3fSmrg 567ec681f3Smrg return (devinfo->ver >= 7 && opcode == BRW_OPCODE_IF) || 577ec681f3Smrg (devinfo->ver >= 8 && opcode == BRW_OPCODE_ELSE) || 5801e04c3fSmrg opcode == BRW_OPCODE_BREAK || 5901e04c3fSmrg opcode == BRW_OPCODE_CONTINUE || 6001e04c3fSmrg opcode == BRW_OPCODE_HALT; 6101e04c3fSmrg} 6201e04c3fSmrg 6301e04c3fSmrgstatic bool 647ec681f3Smrghas_branch_ctrl(const struct intel_device_info *devinfo, enum opcode opcode) 6501e04c3fSmrg{ 667ec681f3Smrg if (devinfo->ver < 8) 6701e04c3fSmrg return false; 6801e04c3fSmrg 6901e04c3fSmrg return opcode == BRW_OPCODE_IF || 7001e04c3fSmrg opcode == BRW_OPCODE_ELSE; 7101e04c3fSmrg /* opcode == BRW_OPCODE_GOTO; */ 7201e04c3fSmrg} 7301e04c3fSmrg 7401e04c3fSmrgstatic bool 7501e04c3fSmrgis_logic_instruction(unsigned opcode) 7601e04c3fSmrg{ 7701e04c3fSmrg return opcode == BRW_OPCODE_AND || 7801e04c3fSmrg opcode == BRW_OPCODE_NOT || 7901e04c3fSmrg opcode == BRW_OPCODE_OR || 8001e04c3fSmrg opcode == BRW_OPCODE_XOR; 8101e04c3fSmrg} 8201e04c3fSmrg 839f464c52Smayastatic bool 849f464c52Smayais_send(unsigned opcode) 859f464c52Smaya{ 869f464c52Smaya return opcode == BRW_OPCODE_SEND || 879f464c52Smaya opcode == BRW_OPCODE_SENDC || 889f464c52Smaya opcode == BRW_OPCODE_SENDS || 899f464c52Smaya opcode == BRW_OPCODE_SENDSC; 909f464c52Smaya} 919f464c52Smaya 929f464c52Smayastatic bool 937ec681f3Smrgis_split_send(UNUSED const struct intel_device_info *devinfo, unsigned opcode) 949f464c52Smaya{ 957ec681f3Smrg if (devinfo->ver >= 12) 967ec681f3Smrg return is_send(opcode); 977ec681f3Smrg else 987ec681f3Smrg return opcode == BRW_OPCODE_SENDS || 997ec681f3Smrg opcode == BRW_OPCODE_SENDSC; 1009f464c52Smaya} 1019f464c52Smaya 10201e04c3fSmrgconst char *const conditional_modifier[16] = { 10301e04c3fSmrg [BRW_CONDITIONAL_NONE] = "", 10401e04c3fSmrg [BRW_CONDITIONAL_Z] = ".z", 10501e04c3fSmrg [BRW_CONDITIONAL_NZ] = ".nz", 10601e04c3fSmrg [BRW_CONDITIONAL_G] = ".g", 10701e04c3fSmrg [BRW_CONDITIONAL_GE] = ".ge", 10801e04c3fSmrg [BRW_CONDITIONAL_L] = ".l", 10901e04c3fSmrg [BRW_CONDITIONAL_LE] = ".le", 11001e04c3fSmrg [BRW_CONDITIONAL_R] = ".r", 11101e04c3fSmrg [BRW_CONDITIONAL_O] = ".o", 11201e04c3fSmrg [BRW_CONDITIONAL_U] = ".u", 11301e04c3fSmrg}; 11401e04c3fSmrg 11501e04c3fSmrgstatic const char *const m_negate[2] = { 11601e04c3fSmrg [0] = "", 11701e04c3fSmrg [1] = "-", 11801e04c3fSmrg}; 11901e04c3fSmrg 12001e04c3fSmrgstatic const char *const _abs[2] = { 12101e04c3fSmrg [0] = "", 12201e04c3fSmrg [1] = "(abs)", 12301e04c3fSmrg}; 12401e04c3fSmrg 12501e04c3fSmrgstatic const char *const m_bitnot[2] = { "", "~" }; 12601e04c3fSmrg 12701e04c3fSmrgstatic const char *const vert_stride[16] = { 12801e04c3fSmrg [0] = "0", 12901e04c3fSmrg [1] = "1", 13001e04c3fSmrg [2] = "2", 13101e04c3fSmrg [3] = "4", 13201e04c3fSmrg [4] = "8", 13301e04c3fSmrg [5] = "16", 13401e04c3fSmrg [6] = "32", 13501e04c3fSmrg [15] = "VxH", 13601e04c3fSmrg}; 13701e04c3fSmrg 13801e04c3fSmrgstatic const char *const width[8] = { 13901e04c3fSmrg [0] = "1", 14001e04c3fSmrg [1] = "2", 14101e04c3fSmrg [2] = "4", 14201e04c3fSmrg [3] = "8", 14301e04c3fSmrg [4] = "16", 14401e04c3fSmrg}; 14501e04c3fSmrg 14601e04c3fSmrgstatic const char *const horiz_stride[4] = { 14701e04c3fSmrg [0] = "0", 14801e04c3fSmrg [1] = "1", 14901e04c3fSmrg [2] = "2", 15001e04c3fSmrg [3] = "4" 15101e04c3fSmrg}; 15201e04c3fSmrg 15301e04c3fSmrgstatic const char *const chan_sel[4] = { 15401e04c3fSmrg [0] = "x", 15501e04c3fSmrg [1] = "y", 15601e04c3fSmrg [2] = "z", 15701e04c3fSmrg [3] = "w", 15801e04c3fSmrg}; 15901e04c3fSmrg 16001e04c3fSmrgstatic const char *const debug_ctrl[2] = { 16101e04c3fSmrg [0] = "", 16201e04c3fSmrg [1] = ".breakpoint" 16301e04c3fSmrg}; 16401e04c3fSmrg 16501e04c3fSmrgstatic const char *const saturate[2] = { 16601e04c3fSmrg [0] = "", 16701e04c3fSmrg [1] = ".sat" 16801e04c3fSmrg}; 16901e04c3fSmrg 17001e04c3fSmrgstatic const char *const cmpt_ctrl[2] = { 17101e04c3fSmrg [0] = "", 17201e04c3fSmrg [1] = "compacted" 17301e04c3fSmrg}; 17401e04c3fSmrg 17501e04c3fSmrgstatic const char *const accwr[2] = { 17601e04c3fSmrg [0] = "", 17701e04c3fSmrg [1] = "AccWrEnable" 17801e04c3fSmrg}; 17901e04c3fSmrg 18001e04c3fSmrgstatic const char *const branch_ctrl[2] = { 18101e04c3fSmrg [0] = "", 18201e04c3fSmrg [1] = "BranchCtrl" 18301e04c3fSmrg}; 18401e04c3fSmrg 18501e04c3fSmrgstatic const char *const wectrl[2] = { 18601e04c3fSmrg [0] = "", 18701e04c3fSmrg [1] = "WE_all" 18801e04c3fSmrg}; 18901e04c3fSmrg 19001e04c3fSmrgstatic const char *const exec_size[8] = { 19101e04c3fSmrg [0] = "1", 19201e04c3fSmrg [1] = "2", 19301e04c3fSmrg [2] = "4", 19401e04c3fSmrg [3] = "8", 19501e04c3fSmrg [4] = "16", 19601e04c3fSmrg [5] = "32" 19701e04c3fSmrg}; 19801e04c3fSmrg 19901e04c3fSmrgstatic const char *const pred_inv[2] = { 20001e04c3fSmrg [0] = "+", 20101e04c3fSmrg [1] = "-" 20201e04c3fSmrg}; 20301e04c3fSmrg 20401e04c3fSmrgconst char *const pred_ctrl_align16[16] = { 20501e04c3fSmrg [1] = "", 20601e04c3fSmrg [2] = ".x", 20701e04c3fSmrg [3] = ".y", 20801e04c3fSmrg [4] = ".z", 20901e04c3fSmrg [5] = ".w", 21001e04c3fSmrg [6] = ".any4h", 21101e04c3fSmrg [7] = ".all4h", 21201e04c3fSmrg}; 21301e04c3fSmrg 21401e04c3fSmrgstatic const char *const pred_ctrl_align1[16] = { 21501e04c3fSmrg [BRW_PREDICATE_NORMAL] = "", 21601e04c3fSmrg [BRW_PREDICATE_ALIGN1_ANYV] = ".anyv", 21701e04c3fSmrg [BRW_PREDICATE_ALIGN1_ALLV] = ".allv", 21801e04c3fSmrg [BRW_PREDICATE_ALIGN1_ANY2H] = ".any2h", 21901e04c3fSmrg [BRW_PREDICATE_ALIGN1_ALL2H] = ".all2h", 22001e04c3fSmrg [BRW_PREDICATE_ALIGN1_ANY4H] = ".any4h", 22101e04c3fSmrg [BRW_PREDICATE_ALIGN1_ALL4H] = ".all4h", 22201e04c3fSmrg [BRW_PREDICATE_ALIGN1_ANY8H] = ".any8h", 22301e04c3fSmrg [BRW_PREDICATE_ALIGN1_ALL8H] = ".all8h", 22401e04c3fSmrg [BRW_PREDICATE_ALIGN1_ANY16H] = ".any16h", 22501e04c3fSmrg [BRW_PREDICATE_ALIGN1_ALL16H] = ".all16h", 22601e04c3fSmrg [BRW_PREDICATE_ALIGN1_ANY32H] = ".any32h", 22701e04c3fSmrg [BRW_PREDICATE_ALIGN1_ALL32H] = ".all32h", 22801e04c3fSmrg}; 22901e04c3fSmrg 23001e04c3fSmrgstatic const char *const thread_ctrl[4] = { 23101e04c3fSmrg [BRW_THREAD_NORMAL] = "", 23201e04c3fSmrg [BRW_THREAD_ATOMIC] = "atomic", 23301e04c3fSmrg [BRW_THREAD_SWITCH] = "switch", 23401e04c3fSmrg}; 23501e04c3fSmrg 23601e04c3fSmrgstatic const char *const compr_ctrl[4] = { 23701e04c3fSmrg [0] = "", 23801e04c3fSmrg [1] = "sechalf", 23901e04c3fSmrg [2] = "compr", 24001e04c3fSmrg [3] = "compr4", 24101e04c3fSmrg}; 24201e04c3fSmrg 24301e04c3fSmrgstatic const char *const dep_ctrl[4] = { 24401e04c3fSmrg [0] = "", 24501e04c3fSmrg [1] = "NoDDClr", 24601e04c3fSmrg [2] = "NoDDChk", 24701e04c3fSmrg [3] = "NoDDClr,NoDDChk", 24801e04c3fSmrg}; 24901e04c3fSmrg 25001e04c3fSmrgstatic const char *const mask_ctrl[4] = { 25101e04c3fSmrg [0] = "", 25201e04c3fSmrg [1] = "nomask", 25301e04c3fSmrg}; 25401e04c3fSmrg 25501e04c3fSmrgstatic const char *const access_mode[2] = { 25601e04c3fSmrg [0] = "align1", 25701e04c3fSmrg [1] = "align16", 25801e04c3fSmrg}; 25901e04c3fSmrg 26001e04c3fSmrgstatic const char *const reg_file[4] = { 26101e04c3fSmrg [0] = "A", 26201e04c3fSmrg [1] = "g", 26301e04c3fSmrg [2] = "m", 26401e04c3fSmrg [3] = "imm", 26501e04c3fSmrg}; 26601e04c3fSmrg 26701e04c3fSmrgstatic const char *const writemask[16] = { 26801e04c3fSmrg [0x0] = ".", 26901e04c3fSmrg [0x1] = ".x", 27001e04c3fSmrg [0x2] = ".y", 27101e04c3fSmrg [0x3] = ".xy", 27201e04c3fSmrg [0x4] = ".z", 27301e04c3fSmrg [0x5] = ".xz", 27401e04c3fSmrg [0x6] = ".yz", 27501e04c3fSmrg [0x7] = ".xyz", 27601e04c3fSmrg [0x8] = ".w", 27701e04c3fSmrg [0x9] = ".xw", 27801e04c3fSmrg [0xa] = ".yw", 27901e04c3fSmrg [0xb] = ".xyw", 28001e04c3fSmrg [0xc] = ".zw", 28101e04c3fSmrg [0xd] = ".xzw", 28201e04c3fSmrg [0xe] = ".yzw", 28301e04c3fSmrg [0xf] = "", 28401e04c3fSmrg}; 28501e04c3fSmrg 28601e04c3fSmrgstatic const char *const end_of_thread[2] = { 28701e04c3fSmrg [0] = "", 28801e04c3fSmrg [1] = "EOT" 28901e04c3fSmrg}; 29001e04c3fSmrg 2917ec681f3Smrg/* SFIDs on Gfx4-5 */ 2927ec681f3Smrgstatic const char *const gfx4_sfid[16] = { 29301e04c3fSmrg [BRW_SFID_NULL] = "null", 29401e04c3fSmrg [BRW_SFID_MATH] = "math", 29501e04c3fSmrg [BRW_SFID_SAMPLER] = "sampler", 29601e04c3fSmrg [BRW_SFID_MESSAGE_GATEWAY] = "gateway", 29701e04c3fSmrg [BRW_SFID_DATAPORT_READ] = "read", 29801e04c3fSmrg [BRW_SFID_DATAPORT_WRITE] = "write", 29901e04c3fSmrg [BRW_SFID_URB] = "urb", 30001e04c3fSmrg [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", 30101e04c3fSmrg [BRW_SFID_VME] = "vme", 30201e04c3fSmrg}; 30301e04c3fSmrg 3047ec681f3Smrgstatic const char *const gfx6_sfid[16] = { 30501e04c3fSmrg [BRW_SFID_NULL] = "null", 30601e04c3fSmrg [BRW_SFID_MATH] = "math", 30701e04c3fSmrg [BRW_SFID_SAMPLER] = "sampler", 30801e04c3fSmrg [BRW_SFID_MESSAGE_GATEWAY] = "gateway", 30901e04c3fSmrg [BRW_SFID_URB] = "urb", 31001e04c3fSmrg [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", 3117ec681f3Smrg [GFX6_SFID_DATAPORT_SAMPLER_CACHE] = "dp_sampler", 3127ec681f3Smrg [GFX6_SFID_DATAPORT_RENDER_CACHE] = "render", 3137ec681f3Smrg [GFX6_SFID_DATAPORT_CONSTANT_CACHE] = "const", 3147ec681f3Smrg [GFX7_SFID_DATAPORT_DATA_CACHE] = "data", 3157ec681f3Smrg [GFX7_SFID_PIXEL_INTERPOLATOR] = "pixel interp", 31601e04c3fSmrg [HSW_SFID_DATAPORT_DATA_CACHE_1] = "dp data 1", 31701e04c3fSmrg [HSW_SFID_CRE] = "cre", 3187ec681f3Smrg [GEN_RT_SFID_RAY_TRACE_ACCELERATOR] = "rt accel", 3197ec681f3Smrg [GFX12_SFID_SLM] = "slm", 3207ec681f3Smrg [GFX12_SFID_TGM] = "tgm", 3217ec681f3Smrg [GFX12_SFID_UGM] = "ugm", 32201e04c3fSmrg}; 32301e04c3fSmrg 3247ec681f3Smrgstatic const char *const gfx7_gateway_subfuncid[8] = { 32501e04c3fSmrg [BRW_MESSAGE_GATEWAY_SFID_OPEN_GATEWAY] = "open", 32601e04c3fSmrg [BRW_MESSAGE_GATEWAY_SFID_CLOSE_GATEWAY] = "close", 32701e04c3fSmrg [BRW_MESSAGE_GATEWAY_SFID_FORWARD_MSG] = "forward msg", 32801e04c3fSmrg [BRW_MESSAGE_GATEWAY_SFID_GET_TIMESTAMP] = "get timestamp", 32901e04c3fSmrg [BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG] = "barrier msg", 33001e04c3fSmrg [BRW_MESSAGE_GATEWAY_SFID_UPDATE_GATEWAY_STATE] = "update state", 33101e04c3fSmrg [BRW_MESSAGE_GATEWAY_SFID_MMIO_READ_WRITE] = "mmio read/write", 33201e04c3fSmrg}; 33301e04c3fSmrg 3347ec681f3Smrgstatic const char *const gfx4_dp_read_port_msg_type[4] = { 33501e04c3fSmrg [0b00] = "OWord Block Read", 33601e04c3fSmrg [0b01] = "OWord Dual Block Read", 33701e04c3fSmrg [0b10] = "Media Block Read", 33801e04c3fSmrg [0b11] = "DWord Scattered Read", 33901e04c3fSmrg}; 34001e04c3fSmrg 34101e04c3fSmrgstatic const char *const g45_dp_read_port_msg_type[8] = { 34201e04c3fSmrg [0b000] = "OWord Block Read", 34301e04c3fSmrg [0b010] = "OWord Dual Block Read", 34401e04c3fSmrg [0b100] = "Media Block Read", 34501e04c3fSmrg [0b110] = "DWord Scattered Read", 34601e04c3fSmrg [0b001] = "Render Target UNORM Read", 34701e04c3fSmrg [0b011] = "AVC Loop Filter Read", 34801e04c3fSmrg}; 34901e04c3fSmrg 35001e04c3fSmrgstatic const char *const dp_write_port_msg_type[8] = { 35101e04c3fSmrg [0b000] = "OWord block write", 35201e04c3fSmrg [0b001] = "OWord dual block write", 35301e04c3fSmrg [0b010] = "media block write", 35401e04c3fSmrg [0b011] = "DWord scattered write", 35501e04c3fSmrg [0b100] = "RT write", 35601e04c3fSmrg [0b101] = "streamed VB write", 35701e04c3fSmrg [0b110] = "RT UNORM write", /* G45+ */ 35801e04c3fSmrg [0b111] = "flush render cache", 35901e04c3fSmrg}; 36001e04c3fSmrg 3617ec681f3Smrgstatic const char *const dp_rc_msg_type_gfx6[16] = { 36201e04c3fSmrg [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read", 3637ec681f3Smrg [GFX6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read", 3647ec681f3Smrg [GFX6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read", 3657ec681f3Smrg [GFX6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read", 3667ec681f3Smrg [GFX6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = 36701e04c3fSmrg "OWORD unaligned block read", 3687ec681f3Smrg [GFX6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read", 3697ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write", 3707ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write", 3717ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = 37201e04c3fSmrg "OWORD dual block write", 3737ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write", 3747ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = 37501e04c3fSmrg "DWORD scattered write", 3767ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write", 3777ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write", 3787ec681f3Smrg [GFX6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write", 37901e04c3fSmrg}; 38001e04c3fSmrg 3817ec681f3Smrgstatic const char *const dp_rc_msg_type_gfx7[16] = { 3827ec681f3Smrg [GFX7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read", 3837ec681f3Smrg [GFX7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read", 3847ec681f3Smrg [GFX7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op", 3857ec681f3Smrg [GFX7_DATAPORT_RC_MEMORY_FENCE] = "memory fence", 3867ec681f3Smrg [GFX7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write", 3877ec681f3Smrg [GFX7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write", 3887ec681f3Smrg [GFX7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write" 38901e04c3fSmrg}; 39001e04c3fSmrg 3917ec681f3Smrgstatic const char *const dp_rc_msg_type_gfx9[16] = { 3927ec681f3Smrg [GFX9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write", 3937ec681f3Smrg [GFX9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read" 39401e04c3fSmrg}; 39501e04c3fSmrg 39601e04c3fSmrgstatic const char *const * 3977ec681f3Smrgdp_rc_msg_type(const struct intel_device_info *devinfo) 39801e04c3fSmrg{ 3997ec681f3Smrg return (devinfo->ver >= 9 ? dp_rc_msg_type_gfx9 : 4007ec681f3Smrg devinfo->ver >= 7 ? dp_rc_msg_type_gfx7 : 4017ec681f3Smrg devinfo->ver >= 6 ? dp_rc_msg_type_gfx6 : 40201e04c3fSmrg dp_write_port_msg_type); 40301e04c3fSmrg} 40401e04c3fSmrg 40501e04c3fSmrgstatic const char *const m_rt_write_subtype[] = { 40601e04c3fSmrg [0b000] = "SIMD16", 40701e04c3fSmrg [0b001] = "SIMD16/RepData", 40801e04c3fSmrg [0b010] = "SIMD8/DualSrcLow", 40901e04c3fSmrg [0b011] = "SIMD8/DualSrcHigh", 41001e04c3fSmrg [0b100] = "SIMD8", 4117ec681f3Smrg [0b101] = "SIMD8/ImageWrite", /* Gfx6+ */ 41201e04c3fSmrg [0b111] = "SIMD16/RepData-111", /* no idea how this is different than 1 */ 41301e04c3fSmrg}; 41401e04c3fSmrg 4157ec681f3Smrgstatic const char *const dp_dc0_msg_type_gfx7[16] = { 4167ec681f3Smrg [GFX7_DATAPORT_DC_OWORD_BLOCK_READ] = "DC OWORD block read", 4177ec681f3Smrg [GFX7_DATAPORT_DC_UNALIGNED_OWORD_BLOCK_READ] = 41801e04c3fSmrg "DC unaligned OWORD block read", 4197ec681f3Smrg [GFX7_DATAPORT_DC_OWORD_DUAL_BLOCK_READ] = "DC OWORD dual block read", 4207ec681f3Smrg [GFX7_DATAPORT_DC_DWORD_SCATTERED_READ] = "DC DWORD scattered read", 4217ec681f3Smrg [GFX7_DATAPORT_DC_BYTE_SCATTERED_READ] = "DC byte scattered read", 4227ec681f3Smrg [GFX7_DATAPORT_DC_UNTYPED_SURFACE_READ] = "DC untyped surface read", 4237ec681f3Smrg [GFX7_DATAPORT_DC_UNTYPED_ATOMIC_OP] = "DC untyped atomic", 4247ec681f3Smrg [GFX7_DATAPORT_DC_MEMORY_FENCE] = "DC mfence", 4257ec681f3Smrg [GFX7_DATAPORT_DC_OWORD_BLOCK_WRITE] = "DC OWORD block write", 4267ec681f3Smrg [GFX7_DATAPORT_DC_OWORD_DUAL_BLOCK_WRITE] = "DC OWORD dual block write", 4277ec681f3Smrg [GFX7_DATAPORT_DC_DWORD_SCATTERED_WRITE] = "DC DWORD scatterd write", 4287ec681f3Smrg [GFX7_DATAPORT_DC_BYTE_SCATTERED_WRITE] = "DC byte scattered write", 4297ec681f3Smrg [GFX7_DATAPORT_DC_UNTYPED_SURFACE_WRITE] = "DC untyped surface write", 4307ec681f3Smrg}; 4317ec681f3Smrg 4327ec681f3Smrgstatic const char *const dp_oword_block_rw[8] = { 4337ec681f3Smrg [BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW] = "1-low", 4347ec681f3Smrg [BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH] = "1-high", 4357ec681f3Smrg [BRW_DATAPORT_OWORD_BLOCK_2_OWORDS] = "2", 4367ec681f3Smrg [BRW_DATAPORT_OWORD_BLOCK_4_OWORDS] = "4", 4377ec681f3Smrg [BRW_DATAPORT_OWORD_BLOCK_8_OWORDS] = "8", 43801e04c3fSmrg}; 43901e04c3fSmrg 44001e04c3fSmrgstatic const char *const dp_dc1_msg_type_hsw[32] = { 44101e04c3fSmrg [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ] = "untyped surface read", 44201e04c3fSmrg [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP] = "DC untyped atomic op", 44301e04c3fSmrg [HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2] = 44401e04c3fSmrg "DC untyped 4x2 atomic op", 44501e04c3fSmrg [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_READ] = "DC media block read", 44601e04c3fSmrg [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ] = "DC typed surface read", 44701e04c3fSmrg [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP] = "DC typed atomic", 44801e04c3fSmrg [HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2] = "DC typed 4x2 atomic op", 44901e04c3fSmrg [HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE] = "DC untyped surface write", 45001e04c3fSmrg [HSW_DATAPORT_DC_PORT1_MEDIA_BLOCK_WRITE] = "DC media block write", 45101e04c3fSmrg [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP] = "DC atomic counter op", 45201e04c3fSmrg [HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2] = 45301e04c3fSmrg "DC 4x2 atomic counter op", 45401e04c3fSmrg [HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE] = "DC typed surface write", 4557ec681f3Smrg [GFX9_DATAPORT_DC_PORT1_A64_SCATTERED_READ] = "DC A64 scattered read", 4567ec681f3Smrg [GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ] = "DC A64 untyped surface read", 4577ec681f3Smrg [GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP] = "DC A64 untyped atomic op", 4587ec681f3Smrg [GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_READ] = "DC A64 oword block read", 4597ec681f3Smrg [GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_WRITE] = "DC A64 oword block write", 4607ec681f3Smrg [GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE] = "DC A64 untyped surface write", 4617ec681f3Smrg [GFX8_DATAPORT_DC_PORT1_A64_SCATTERED_WRITE] = "DC A64 scattered write", 4627ec681f3Smrg [GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP] = 46301e04c3fSmrg "DC untyped atomic float op", 4647ec681f3Smrg [GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP] = 4659f464c52Smaya "DC A64 untyped atomic float op", 4667ec681f3Smrg [GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP] = 4677ec681f3Smrg "DC A64 untyped atomic half-integer op", 4687ec681f3Smrg [GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP] = 4697ec681f3Smrg "DC A64 untyped atomic half-float op", 47001e04c3fSmrg}; 47101e04c3fSmrg 47201e04c3fSmrgstatic const char *const aop[16] = { 47301e04c3fSmrg [BRW_AOP_AND] = "and", 47401e04c3fSmrg [BRW_AOP_OR] = "or", 47501e04c3fSmrg [BRW_AOP_XOR] = "xor", 47601e04c3fSmrg [BRW_AOP_MOV] = "mov", 47701e04c3fSmrg [BRW_AOP_INC] = "inc", 47801e04c3fSmrg [BRW_AOP_DEC] = "dec", 47901e04c3fSmrg [BRW_AOP_ADD] = "add", 48001e04c3fSmrg [BRW_AOP_SUB] = "sub", 48101e04c3fSmrg [BRW_AOP_REVSUB] = "revsub", 48201e04c3fSmrg [BRW_AOP_IMAX] = "imax", 48301e04c3fSmrg [BRW_AOP_IMIN] = "imin", 48401e04c3fSmrg [BRW_AOP_UMAX] = "umax", 48501e04c3fSmrg [BRW_AOP_UMIN] = "umin", 48601e04c3fSmrg [BRW_AOP_CMPWR] = "cmpwr", 48701e04c3fSmrg [BRW_AOP_PREDEC] = "predec", 48801e04c3fSmrg}; 48901e04c3fSmrg 4907ec681f3Smrgstatic const char *const aop_float[5] = { 49101e04c3fSmrg [BRW_AOP_FMAX] = "fmax", 49201e04c3fSmrg [BRW_AOP_FMIN] = "fmin", 49301e04c3fSmrg [BRW_AOP_FCMPWR] = "fcmpwr", 4947ec681f3Smrg [BRW_AOP_FADD] = "fadd", 49501e04c3fSmrg}; 49601e04c3fSmrg 49701e04c3fSmrgstatic const char * const pixel_interpolator_msg_types[4] = { 4987ec681f3Smrg [GFX7_PIXEL_INTERPOLATOR_LOC_SHARED_OFFSET] = "per_message_offset", 4997ec681f3Smrg [GFX7_PIXEL_INTERPOLATOR_LOC_SAMPLE] = "sample_position", 5007ec681f3Smrg [GFX7_PIXEL_INTERPOLATOR_LOC_CENTROID] = "centroid", 5017ec681f3Smrg [GFX7_PIXEL_INTERPOLATOR_LOC_PER_SLOT_OFFSET] = "per_slot_offset", 50201e04c3fSmrg}; 50301e04c3fSmrg 50401e04c3fSmrgstatic const char *const math_function[16] = { 50501e04c3fSmrg [BRW_MATH_FUNCTION_INV] = "inv", 50601e04c3fSmrg [BRW_MATH_FUNCTION_LOG] = "log", 50701e04c3fSmrg [BRW_MATH_FUNCTION_EXP] = "exp", 50801e04c3fSmrg [BRW_MATH_FUNCTION_SQRT] = "sqrt", 50901e04c3fSmrg [BRW_MATH_FUNCTION_RSQ] = "rsq", 51001e04c3fSmrg [BRW_MATH_FUNCTION_SIN] = "sin", 51101e04c3fSmrg [BRW_MATH_FUNCTION_COS] = "cos", 51201e04c3fSmrg [BRW_MATH_FUNCTION_SINCOS] = "sincos", 51301e04c3fSmrg [BRW_MATH_FUNCTION_FDIV] = "fdiv", 51401e04c3fSmrg [BRW_MATH_FUNCTION_POW] = "pow", 51501e04c3fSmrg [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod", 51601e04c3fSmrg [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv", 51701e04c3fSmrg [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod", 5187ec681f3Smrg [GFX8_MATH_FUNCTION_INVM] = "invm", 5197ec681f3Smrg [GFX8_MATH_FUNCTION_RSQRTM] = "rsqrtm", 5207ec681f3Smrg}; 5217ec681f3Smrg 5227ec681f3Smrgstatic const char *const sync_function[16] = { 5237ec681f3Smrg [TGL_SYNC_NOP] = "nop", 5247ec681f3Smrg [TGL_SYNC_ALLRD] = "allrd", 5257ec681f3Smrg [TGL_SYNC_ALLWR] = "allwr", 5267ec681f3Smrg [TGL_SYNC_BAR] = "bar", 5277ec681f3Smrg [TGL_SYNC_HOST] = "host", 52801e04c3fSmrg}; 52901e04c3fSmrg 53001e04c3fSmrgstatic const char *const math_saturate[2] = { 53101e04c3fSmrg [0] = "", 53201e04c3fSmrg [1] = "sat" 53301e04c3fSmrg}; 53401e04c3fSmrg 53501e04c3fSmrgstatic const char *const math_signed[2] = { 53601e04c3fSmrg [0] = "", 53701e04c3fSmrg [1] = "signed" 53801e04c3fSmrg}; 53901e04c3fSmrg 54001e04c3fSmrgstatic const char *const math_scalar[2] = { 54101e04c3fSmrg [0] = "", 54201e04c3fSmrg [1] = "scalar" 54301e04c3fSmrg}; 54401e04c3fSmrg 54501e04c3fSmrgstatic const char *const math_precision[2] = { 54601e04c3fSmrg [0] = "", 54701e04c3fSmrg [1] = "partial_precision" 54801e04c3fSmrg}; 54901e04c3fSmrg 5507ec681f3Smrgstatic const char *const gfx5_urb_opcode[] = { 55101e04c3fSmrg [0] = "urb_write", 55201e04c3fSmrg [1] = "ff_sync", 55301e04c3fSmrg}; 55401e04c3fSmrg 5557ec681f3Smrgstatic const char *const gfx7_urb_opcode[] = { 55601e04c3fSmrg [BRW_URB_OPCODE_WRITE_HWORD] = "write HWord", 55701e04c3fSmrg [BRW_URB_OPCODE_WRITE_OWORD] = "write OWord", 55801e04c3fSmrg [BRW_URB_OPCODE_READ_HWORD] = "read HWord", 55901e04c3fSmrg [BRW_URB_OPCODE_READ_OWORD] = "read OWord", 5607ec681f3Smrg [GFX7_URB_OPCODE_ATOMIC_MOV] = "atomic mov", /* Gfx7+ */ 5617ec681f3Smrg [GFX7_URB_OPCODE_ATOMIC_INC] = "atomic inc", /* Gfx7+ */ 5627ec681f3Smrg [GFX8_URB_OPCODE_ATOMIC_ADD] = "atomic add", /* Gfx8+ */ 5637ec681f3Smrg [GFX8_URB_OPCODE_SIMD8_WRITE] = "SIMD8 write", /* Gfx8+ */ 5647ec681f3Smrg [GFX8_URB_OPCODE_SIMD8_READ] = "SIMD8 read", /* Gfx8+ */ 5657ec681f3Smrg [GFX125_URB_OPCODE_FENCE] = "fence", /* Gfx12.5+ */ 5667ec681f3Smrg /* [10-15] - reserved */ 56701e04c3fSmrg}; 56801e04c3fSmrg 56901e04c3fSmrgstatic const char *const urb_swizzle[4] = { 57001e04c3fSmrg [BRW_URB_SWIZZLE_NONE] = "", 57101e04c3fSmrg [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave", 57201e04c3fSmrg [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose", 57301e04c3fSmrg}; 57401e04c3fSmrg 57501e04c3fSmrgstatic const char *const urb_allocate[2] = { 57601e04c3fSmrg [0] = "", 57701e04c3fSmrg [1] = "allocate" 57801e04c3fSmrg}; 57901e04c3fSmrg 58001e04c3fSmrgstatic const char *const urb_used[2] = { 58101e04c3fSmrg [0] = "", 58201e04c3fSmrg [1] = "used" 58301e04c3fSmrg}; 58401e04c3fSmrg 58501e04c3fSmrgstatic const char *const urb_complete[2] = { 58601e04c3fSmrg [0] = "", 58701e04c3fSmrg [1] = "complete" 58801e04c3fSmrg}; 58901e04c3fSmrg 5907ec681f3Smrgstatic const char *const gfx5_sampler_msg_type[] = { 5917ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE] = "sample", 5927ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS] = "sample_b", 5937ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_LOD] = "sample_l", 5947ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_COMPARE] = "sample_c", 5957ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_DERIVS] = "sample_d", 5967ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE] = "sample_b_c", 5977ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE] = "sample_l_c", 5987ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_LD] = "ld", 5997ec681f3Smrg [GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4] = "gather4", 6007ec681f3Smrg [GFX5_SAMPLER_MESSAGE_LOD] = "lod", 6017ec681f3Smrg [GFX5_SAMPLER_MESSAGE_SAMPLE_RESINFO] = "resinfo", 6027ec681f3Smrg [GFX6_SAMPLER_MESSAGE_SAMPLE_SAMPLEINFO] = "sampleinfo", 6037ec681f3Smrg [GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_C] = "gather4_c", 6047ec681f3Smrg [GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO] = "gather4_po", 6057ec681f3Smrg [GFX7_SAMPLER_MESSAGE_SAMPLE_GATHER4_PO_C] = "gather4_po_c", 60601e04c3fSmrg [HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE] = "sample_d_c", 6077ec681f3Smrg [GFX9_SAMPLER_MESSAGE_SAMPLE_LZ] = "sample_lz", 6087ec681f3Smrg [GFX9_SAMPLER_MESSAGE_SAMPLE_C_LZ] = "sample_c_lz", 6097ec681f3Smrg [GFX9_SAMPLER_MESSAGE_SAMPLE_LD_LZ] = "ld_lz", 6107ec681f3Smrg [GFX9_SAMPLER_MESSAGE_SAMPLE_LD2DMS_W] = "ld2dms_w", 6117ec681f3Smrg [GFX7_SAMPLER_MESSAGE_SAMPLE_LD_MCS] = "ld_mcs", 6127ec681f3Smrg [GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DMS] = "ld2dms", 6137ec681f3Smrg [GFX7_SAMPLER_MESSAGE_SAMPLE_LD2DSS] = "ld2dss", 61401e04c3fSmrg}; 61501e04c3fSmrg 6167ec681f3Smrgstatic const char *const gfx5_sampler_simd_mode[4] = { 61701e04c3fSmrg [BRW_SAMPLER_SIMD_MODE_SIMD4X2] = "SIMD4x2", 61801e04c3fSmrg [BRW_SAMPLER_SIMD_MODE_SIMD8] = "SIMD8", 61901e04c3fSmrg [BRW_SAMPLER_SIMD_MODE_SIMD16] = "SIMD16", 62001e04c3fSmrg [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64", 62101e04c3fSmrg}; 62201e04c3fSmrg 62301e04c3fSmrgstatic const char *const sampler_target_format[4] = { 62401e04c3fSmrg [0] = "F", 62501e04c3fSmrg [2] = "UD", 62601e04c3fSmrg [3] = "D" 62701e04c3fSmrg}; 62801e04c3fSmrg 6297ec681f3Smrgstatic const char *const lsc_operation[] = { 6307ec681f3Smrg [LSC_OP_LOAD] = "load", 6317ec681f3Smrg [LSC_OP_LOAD_CMASK] = "load_cmask", 6327ec681f3Smrg [LSC_OP_STORE] = "store", 6337ec681f3Smrg [LSC_OP_STORE_CMASK] = "store_cmask", 6347ec681f3Smrg [LSC_OP_FENCE] = "fence", 6357ec681f3Smrg [LSC_OP_ATOMIC_INC] = "atomic_inc", 6367ec681f3Smrg [LSC_OP_ATOMIC_DEC] = "atomic_dec", 6377ec681f3Smrg [LSC_OP_ATOMIC_LOAD] = "atomic_load", 6387ec681f3Smrg [LSC_OP_ATOMIC_STORE] = "atomic_store", 6397ec681f3Smrg [LSC_OP_ATOMIC_ADD] = "atomic_add", 6407ec681f3Smrg [LSC_OP_ATOMIC_SUB] = "atomic_sub", 6417ec681f3Smrg [LSC_OP_ATOMIC_MIN] = "atomic_min", 6427ec681f3Smrg [LSC_OP_ATOMIC_MAX] = "atomic_max", 6437ec681f3Smrg [LSC_OP_ATOMIC_UMIN] = "atomic_umin", 6447ec681f3Smrg [LSC_OP_ATOMIC_UMAX] = "atomic_umax", 6457ec681f3Smrg [LSC_OP_ATOMIC_CMPXCHG] = "atomic_cmpxchg", 6467ec681f3Smrg [LSC_OP_ATOMIC_FADD] = "atomic_fadd", 6477ec681f3Smrg [LSC_OP_ATOMIC_FSUB] = "atomic_fsub", 6487ec681f3Smrg [LSC_OP_ATOMIC_FMIN] = "atomic_fmin", 6497ec681f3Smrg [LSC_OP_ATOMIC_FMAX] = "atomic_fmax", 6507ec681f3Smrg [LSC_OP_ATOMIC_FCMPXCHG] = "atomic_fcmpxchg", 6517ec681f3Smrg [LSC_OP_ATOMIC_AND] = "atomic_and", 6527ec681f3Smrg [LSC_OP_ATOMIC_OR] = "atomic_or", 6537ec681f3Smrg [LSC_OP_ATOMIC_XOR] = "atomic_xor", 6547ec681f3Smrg}; 6557ec681f3Smrg 6567ec681f3Smrgstatic const char *const lsc_addr_surface_type[] = { 6577ec681f3Smrg [LSC_ADDR_SURFTYPE_FLAT] = "flat", 6587ec681f3Smrg [LSC_ADDR_SURFTYPE_BSS] = "bss", 6597ec681f3Smrg [LSC_ADDR_SURFTYPE_SS] = "ss", 6607ec681f3Smrg [LSC_ADDR_SURFTYPE_BTI] = "bti", 6617ec681f3Smrg}; 6627ec681f3Smrg 6637ec681f3Smrgstatic const char* const lsc_fence_scope[] = { 6647ec681f3Smrg [LSC_FENCE_THREADGROUP] = "threadgroup", 6657ec681f3Smrg [LSC_FENCE_LOCAL] = "local", 6667ec681f3Smrg [LSC_FENCE_TILE] = "tile", 6677ec681f3Smrg [LSC_FENCE_GPU] = "gpu", 6687ec681f3Smrg [LSC_FENCE_ALL_GPU] = "all_gpu", 6697ec681f3Smrg [LSC_FENCE_SYSTEM_RELEASE] = "system_release", 6707ec681f3Smrg [LSC_FENCE_SYSTEM_ACQUIRE] = "system_acquire", 6717ec681f3Smrg}; 6727ec681f3Smrg 6737ec681f3Smrgstatic const char* const lsc_flush_type[] = { 6747ec681f3Smrg [LSC_FLUSH_TYPE_NONE] = "none", 6757ec681f3Smrg [LSC_FLUSH_TYPE_EVICT] = "evict", 6767ec681f3Smrg [LSC_FLUSH_TYPE_INVALIDATE] = "invalidate", 6777ec681f3Smrg [LSC_FLUSH_TYPE_DISCARD] = "discard", 6787ec681f3Smrg [LSC_FLUSH_TYPE_CLEAN] = "clean", 6797ec681f3Smrg [LSC_FLUSH_TYPE_L3ONLY] = "l3only", 6807ec681f3Smrg}; 6817ec681f3Smrg 6827ec681f3Smrgstatic const char* const lsc_addr_size[] = { 6837ec681f3Smrg [LSC_ADDR_SIZE_A16] = "a16", 6847ec681f3Smrg [LSC_ADDR_SIZE_A32] = "a32", 6857ec681f3Smrg [LSC_ADDR_SIZE_A64] = "a64", 6867ec681f3Smrg}; 6877ec681f3Smrg 6887ec681f3Smrgstatic const char* const lsc_backup_fence_routing[] = { 6897ec681f3Smrg [LSC_NORMAL_ROUTING] = "normal_routing", 6907ec681f3Smrg [LSC_ROUTE_TO_LSC] = "route_to_lsc", 6917ec681f3Smrg}; 6927ec681f3Smrg 6937ec681f3Smrgstatic const char* const lsc_data_size[] = { 6947ec681f3Smrg [LSC_DATA_SIZE_D8] = "d8", 6957ec681f3Smrg [LSC_DATA_SIZE_D16] = "d16", 6967ec681f3Smrg [LSC_DATA_SIZE_D32] = "d32", 6977ec681f3Smrg [LSC_DATA_SIZE_D64] = "d64", 6987ec681f3Smrg [LSC_DATA_SIZE_D8U32] = "d8u32", 6997ec681f3Smrg [LSC_DATA_SIZE_D16U32] = "d16u32", 7007ec681f3Smrg [LSC_DATA_SIZE_D16BF32] = "d16bf32", 7017ec681f3Smrg}; 7027ec681f3Smrg 7037ec681f3Smrgstatic const char* const lsc_vect_size_str[] = { 7047ec681f3Smrg [LSC_VECT_SIZE_V1] = "V1", 7057ec681f3Smrg [LSC_VECT_SIZE_V2] = "V2", 7067ec681f3Smrg [LSC_VECT_SIZE_V3] = "V3", 7077ec681f3Smrg [LSC_VECT_SIZE_V4] = "V4", 7087ec681f3Smrg [LSC_VECT_SIZE_V8] = "V8", 7097ec681f3Smrg [LSC_VECT_SIZE_V16] = "V16", 7107ec681f3Smrg [LSC_VECT_SIZE_V32] = "V32", 7117ec681f3Smrg [LSC_VECT_SIZE_V64] = "V64", 7127ec681f3Smrg}; 7137ec681f3Smrg 7147ec681f3Smrgstatic const char* const lsc_cmask_str[] = { 7157ec681f3Smrg [LSC_CMASK_X] = "x", 7167ec681f3Smrg [LSC_CMASK_Y] = "y", 7177ec681f3Smrg [LSC_CMASK_XY] = "xy", 7187ec681f3Smrg [LSC_CMASK_Z] = "z", 7197ec681f3Smrg [LSC_CMASK_XZ] = "xz", 7207ec681f3Smrg [LSC_CMASK_YZ] = "yz", 7217ec681f3Smrg [LSC_CMASK_XYZ] = "xyz", 7227ec681f3Smrg [LSC_CMASK_W] = "w", 7237ec681f3Smrg [LSC_CMASK_XW] = "xw", 7247ec681f3Smrg [LSC_CMASK_YW] = "yw", 7257ec681f3Smrg [LSC_CMASK_XYW] = "xyw", 7267ec681f3Smrg [LSC_CMASK_ZW] = "zw", 7277ec681f3Smrg [LSC_CMASK_XZW] = "xzw", 7287ec681f3Smrg [LSC_CMASK_YZW] = "yzw", 7297ec681f3Smrg [LSC_CMASK_XYZW] = "xyzw", 7307ec681f3Smrg}; 7317ec681f3Smrg 7327ec681f3Smrgstatic const char* const lsc_cache_load[] = { 7337ec681f3Smrg [LSC_CACHE_LOAD_L1STATE_L3MOCS] = "L1STATE_L3MOCS", 7347ec681f3Smrg [LSC_CACHE_LOAD_L1UC_L3UC] = "L1UC_L3UC", 7357ec681f3Smrg [LSC_CACHE_LOAD_L1UC_L3C] = "L1UC_L3C", 7367ec681f3Smrg [LSC_CACHE_LOAD_L1C_L3UC] = "L1C_L3UC", 7377ec681f3Smrg [LSC_CACHE_LOAD_L1C_L3C] = "L1C_L3C", 7387ec681f3Smrg [LSC_CACHE_LOAD_L1S_L3UC] = "L1S_L3UC", 7397ec681f3Smrg [LSC_CACHE_LOAD_L1S_L3C] = "L1S_L3C", 7407ec681f3Smrg [LSC_CACHE_LOAD_L1IAR_L3C] = "L1IAR_L3C", 7417ec681f3Smrg}; 7427ec681f3Smrg 7437ec681f3Smrgstatic const char* const lsc_cache_store[] = { 7447ec681f3Smrg [LSC_CACHE_STORE_L1STATE_L3MOCS] = "L1STATE_L3MOCS", 7457ec681f3Smrg [LSC_CACHE_STORE_L1UC_L3UC] = "L1UC_L3UC", 7467ec681f3Smrg [LSC_CACHE_STORE_L1UC_L3WB] = "L1UC_L3WB", 7477ec681f3Smrg [LSC_CACHE_STORE_L1WT_L3UC] = "L1WT_L3UC", 7487ec681f3Smrg [LSC_CACHE_STORE_L1WT_L3WB] = "L1WT_L3WB", 7497ec681f3Smrg [LSC_CACHE_STORE_L1S_L3UC] = "L1S_L3UC", 7507ec681f3Smrg [LSC_CACHE_STORE_L1S_L3WB] = "L1S_L3WB", 7517ec681f3Smrg [LSC_CACHE_STORE_L1WB_L3WB] = "L1WB_L3WB", 7527ec681f3Smrg}; 75301e04c3fSmrg 75401e04c3fSmrgstatic int column; 75501e04c3fSmrg 75601e04c3fSmrgstatic int 75701e04c3fSmrgstring(FILE *file, const char *string) 75801e04c3fSmrg{ 75901e04c3fSmrg fputs(string, file); 76001e04c3fSmrg column += strlen(string); 76101e04c3fSmrg return 0; 76201e04c3fSmrg} 76301e04c3fSmrg 76401e04c3fSmrgstatic int 76501e04c3fSmrgformat(FILE *f, const char *format, ...) PRINTFLIKE(2, 3); 76601e04c3fSmrg 76701e04c3fSmrgstatic int 76801e04c3fSmrgformat(FILE *f, const char *format, ...) 76901e04c3fSmrg{ 77001e04c3fSmrg char buf[1024]; 77101e04c3fSmrg va_list args; 77201e04c3fSmrg va_start(args, format); 77301e04c3fSmrg 77401e04c3fSmrg vsnprintf(buf, sizeof(buf) - 1, format, args); 77501e04c3fSmrg va_end(args); 77601e04c3fSmrg string(f, buf); 77701e04c3fSmrg return 0; 77801e04c3fSmrg} 77901e04c3fSmrg 78001e04c3fSmrgstatic int 78101e04c3fSmrgnewline(FILE *f) 78201e04c3fSmrg{ 78301e04c3fSmrg putc('\n', f); 78401e04c3fSmrg column = 0; 78501e04c3fSmrg return 0; 78601e04c3fSmrg} 78701e04c3fSmrg 78801e04c3fSmrgstatic int 78901e04c3fSmrgpad(FILE *f, int c) 79001e04c3fSmrg{ 79101e04c3fSmrg do 79201e04c3fSmrg string(f, " "); 79301e04c3fSmrg while (column < c); 79401e04c3fSmrg return 0; 79501e04c3fSmrg} 79601e04c3fSmrg 79701e04c3fSmrgstatic int 79801e04c3fSmrgcontrol(FILE *file, const char *name, const char *const ctrl[], 79901e04c3fSmrg unsigned id, int *space) 80001e04c3fSmrg{ 80101e04c3fSmrg if (!ctrl[id]) { 80201e04c3fSmrg fprintf(file, "*** invalid %s value %d ", name, id); 80301e04c3fSmrg return 1; 80401e04c3fSmrg } 80501e04c3fSmrg if (ctrl[id][0]) { 80601e04c3fSmrg if (space && *space) 80701e04c3fSmrg string(file, " "); 80801e04c3fSmrg string(file, ctrl[id]); 80901e04c3fSmrg if (space) 81001e04c3fSmrg *space = 1; 81101e04c3fSmrg } 81201e04c3fSmrg return 0; 81301e04c3fSmrg} 81401e04c3fSmrg 81501e04c3fSmrgstatic int 8167ec681f3Smrgprint_opcode(FILE *file, const struct intel_device_info *devinfo, 81701e04c3fSmrg enum opcode id) 81801e04c3fSmrg{ 81901e04c3fSmrg const struct opcode_desc *desc = brw_opcode_desc(devinfo, id); 82001e04c3fSmrg if (!desc) { 82101e04c3fSmrg format(file, "*** invalid opcode value %d ", id); 82201e04c3fSmrg return 1; 82301e04c3fSmrg } 82401e04c3fSmrg string(file, desc->name); 82501e04c3fSmrg return 0; 82601e04c3fSmrg} 82701e04c3fSmrg 82801e04c3fSmrgstatic int 82901e04c3fSmrgreg(FILE *file, unsigned _reg_file, unsigned _reg_nr) 83001e04c3fSmrg{ 83101e04c3fSmrg int err = 0; 83201e04c3fSmrg 83301e04c3fSmrg /* Clear the Compr4 instruction compression bit. */ 83401e04c3fSmrg if (_reg_file == BRW_MESSAGE_REGISTER_FILE) 83501e04c3fSmrg _reg_nr &= ~BRW_MRF_COMPR4; 83601e04c3fSmrg 83701e04c3fSmrg if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) { 83801e04c3fSmrg switch (_reg_nr & 0xf0) { 83901e04c3fSmrg case BRW_ARF_NULL: 84001e04c3fSmrg string(file, "null"); 84101e04c3fSmrg break; 84201e04c3fSmrg case BRW_ARF_ADDRESS: 84301e04c3fSmrg format(file, "a%d", _reg_nr & 0x0f); 84401e04c3fSmrg break; 84501e04c3fSmrg case BRW_ARF_ACCUMULATOR: 84601e04c3fSmrg format(file, "acc%d", _reg_nr & 0x0f); 84701e04c3fSmrg break; 84801e04c3fSmrg case BRW_ARF_FLAG: 84901e04c3fSmrg format(file, "f%d", _reg_nr & 0x0f); 85001e04c3fSmrg break; 85101e04c3fSmrg case BRW_ARF_MASK: 85201e04c3fSmrg format(file, "mask%d", _reg_nr & 0x0f); 85301e04c3fSmrg break; 85401e04c3fSmrg case BRW_ARF_MASK_STACK: 8557ec681f3Smrg format(file, "ms%d", _reg_nr & 0x0f); 8567ec681f3Smrg break; 8577ec681f3Smrg case BRW_ARF_MASK_STACK_DEPTH: 85801e04c3fSmrg format(file, "msd%d", _reg_nr & 0x0f); 85901e04c3fSmrg break; 86001e04c3fSmrg case BRW_ARF_STATE: 86101e04c3fSmrg format(file, "sr%d", _reg_nr & 0x0f); 86201e04c3fSmrg break; 86301e04c3fSmrg case BRW_ARF_CONTROL: 86401e04c3fSmrg format(file, "cr%d", _reg_nr & 0x0f); 86501e04c3fSmrg break; 86601e04c3fSmrg case BRW_ARF_NOTIFICATION_COUNT: 86701e04c3fSmrg format(file, "n%d", _reg_nr & 0x0f); 86801e04c3fSmrg break; 86901e04c3fSmrg case BRW_ARF_IP: 87001e04c3fSmrg string(file, "ip"); 87101e04c3fSmrg return -1; 87201e04c3fSmrg break; 87301e04c3fSmrg case BRW_ARF_TDR: 87401e04c3fSmrg format(file, "tdr0"); 87501e04c3fSmrg return -1; 87601e04c3fSmrg case BRW_ARF_TIMESTAMP: 87701e04c3fSmrg format(file, "tm%d", _reg_nr & 0x0f); 87801e04c3fSmrg break; 87901e04c3fSmrg default: 88001e04c3fSmrg format(file, "ARF%d", _reg_nr); 88101e04c3fSmrg break; 88201e04c3fSmrg } 88301e04c3fSmrg } else { 88401e04c3fSmrg err |= control(file, "src reg file", reg_file, _reg_file, NULL); 88501e04c3fSmrg format(file, "%d", _reg_nr); 88601e04c3fSmrg } 88701e04c3fSmrg return err; 88801e04c3fSmrg} 88901e04c3fSmrg 89001e04c3fSmrgstatic int 8917ec681f3Smrgdest(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst) 89201e04c3fSmrg{ 89301e04c3fSmrg enum brw_reg_type type = brw_inst_dst_type(devinfo, inst); 89401e04c3fSmrg unsigned elem_size = brw_reg_type_to_size(type); 89501e04c3fSmrg int err = 0; 89601e04c3fSmrg 8979f464c52Smaya if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) { 8989f464c52Smaya /* These are fixed for split sends */ 8999f464c52Smaya type = BRW_REGISTER_TYPE_UD; 9009f464c52Smaya elem_size = 4; 9017ec681f3Smrg if (devinfo->ver >= 12) { 9027ec681f3Smrg err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst), 9037ec681f3Smrg brw_inst_dst_da_reg_nr(devinfo, inst)); 9047ec681f3Smrg string(file, brw_reg_type_to_letters(type)); 9057ec681f3Smrg } else if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 9069f464c52Smaya err |= reg(file, brw_inst_send_dst_reg_file(devinfo, inst), 9079f464c52Smaya brw_inst_dst_da_reg_nr(devinfo, inst)); 9089f464c52Smaya unsigned subreg_nr = brw_inst_dst_da16_subreg_nr(devinfo, inst); 9099f464c52Smaya if (subreg_nr) 9109f464c52Smaya format(file, ".%u", subreg_nr); 9119f464c52Smaya string(file, brw_reg_type_to_letters(type)); 9129f464c52Smaya } else { 9139f464c52Smaya string(file, "g[a0"); 9149f464c52Smaya if (brw_inst_dst_ia_subreg_nr(devinfo, inst)) 9159f464c52Smaya format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) / 9169f464c52Smaya elem_size); 9179f464c52Smaya if (brw_inst_send_dst_ia16_addr_imm(devinfo, inst)) 9189f464c52Smaya format(file, " %d", brw_inst_send_dst_ia16_addr_imm(devinfo, inst)); 9199f464c52Smaya string(file, "]<"); 9209f464c52Smaya string(file, brw_reg_type_to_letters(type)); 9219f464c52Smaya } 9229f464c52Smaya } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 92301e04c3fSmrg if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 92401e04c3fSmrg err |= reg(file, brw_inst_dst_reg_file(devinfo, inst), 92501e04c3fSmrg brw_inst_dst_da_reg_nr(devinfo, inst)); 92601e04c3fSmrg if (err == -1) 92701e04c3fSmrg return 0; 92801e04c3fSmrg if (brw_inst_dst_da1_subreg_nr(devinfo, inst)) 92901e04c3fSmrg format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) / 93001e04c3fSmrg elem_size); 93101e04c3fSmrg string(file, "<"); 93201e04c3fSmrg err |= control(file, "horiz stride", horiz_stride, 93301e04c3fSmrg brw_inst_dst_hstride(devinfo, inst), NULL); 93401e04c3fSmrg string(file, ">"); 93501e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 93601e04c3fSmrg } else { 93701e04c3fSmrg string(file, "g[a0"); 93801e04c3fSmrg if (brw_inst_dst_ia_subreg_nr(devinfo, inst)) 93901e04c3fSmrg format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) / 94001e04c3fSmrg elem_size); 94101e04c3fSmrg if (brw_inst_dst_ia1_addr_imm(devinfo, inst)) 94201e04c3fSmrg format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst)); 94301e04c3fSmrg string(file, "]<"); 94401e04c3fSmrg err |= control(file, "horiz stride", horiz_stride, 94501e04c3fSmrg brw_inst_dst_hstride(devinfo, inst), NULL); 94601e04c3fSmrg string(file, ">"); 94701e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 94801e04c3fSmrg } 94901e04c3fSmrg } else { 95001e04c3fSmrg if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 95101e04c3fSmrg err |= reg(file, brw_inst_dst_reg_file(devinfo, inst), 95201e04c3fSmrg brw_inst_dst_da_reg_nr(devinfo, inst)); 95301e04c3fSmrg if (err == -1) 95401e04c3fSmrg return 0; 95501e04c3fSmrg if (brw_inst_dst_da16_subreg_nr(devinfo, inst)) 95601e04c3fSmrg format(file, ".%u", 16 / elem_size); 95701e04c3fSmrg string(file, "<1>"); 95801e04c3fSmrg err |= control(file, "writemask", writemask, 95901e04c3fSmrg brw_inst_da16_writemask(devinfo, inst), NULL); 96001e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 96101e04c3fSmrg } else { 96201e04c3fSmrg err = 1; 96301e04c3fSmrg string(file, "Indirect align16 address mode not supported"); 96401e04c3fSmrg } 96501e04c3fSmrg } 96601e04c3fSmrg 96701e04c3fSmrg return 0; 96801e04c3fSmrg} 96901e04c3fSmrg 97001e04c3fSmrgstatic int 9717ec681f3Smrgdest_3src(FILE *file, const struct intel_device_info *devinfo, 9727ec681f3Smrg const brw_inst *inst) 97301e04c3fSmrg{ 97401e04c3fSmrg bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 97501e04c3fSmrg int err = 0; 97601e04c3fSmrg uint32_t reg_file; 97701e04c3fSmrg unsigned subreg_nr; 97801e04c3fSmrg enum brw_reg_type type; 97901e04c3fSmrg 9807ec681f3Smrg if (devinfo->ver < 10 && is_align1) 9817ec681f3Smrg return 0; 9827ec681f3Smrg 9837ec681f3Smrg if (devinfo->ver == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst)) 98401e04c3fSmrg reg_file = BRW_MESSAGE_REGISTER_FILE; 9857ec681f3Smrg else if (devinfo->ver >= 12) 9867ec681f3Smrg reg_file = brw_inst_3src_a1_dst_reg_file(devinfo, inst); 9877ec681f3Smrg else if (is_align1 && brw_inst_3src_a1_dst_reg_file(devinfo, inst)) 9887ec681f3Smrg reg_file = BRW_ARCHITECTURE_REGISTER_FILE; 98901e04c3fSmrg else 99001e04c3fSmrg reg_file = BRW_GENERAL_REGISTER_FILE; 99101e04c3fSmrg 99201e04c3fSmrg err |= reg(file, reg_file, brw_inst_3src_dst_reg_nr(devinfo, inst)); 99301e04c3fSmrg if (err == -1) 99401e04c3fSmrg return 0; 99501e04c3fSmrg 99601e04c3fSmrg if (is_align1) { 99701e04c3fSmrg type = brw_inst_3src_a1_dst_type(devinfo, inst); 99801e04c3fSmrg subreg_nr = brw_inst_3src_a1_dst_subreg_nr(devinfo, inst); 99901e04c3fSmrg } else { 100001e04c3fSmrg type = brw_inst_3src_a16_dst_type(devinfo, inst); 100101e04c3fSmrg subreg_nr = brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4; 100201e04c3fSmrg } 100301e04c3fSmrg subreg_nr /= brw_reg_type_to_size(type); 100401e04c3fSmrg 100501e04c3fSmrg if (subreg_nr) 100601e04c3fSmrg format(file, ".%u", subreg_nr); 100701e04c3fSmrg string(file, "<1>"); 100801e04c3fSmrg 100901e04c3fSmrg if (!is_align1) { 101001e04c3fSmrg err |= control(file, "writemask", writemask, 101101e04c3fSmrg brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL); 101201e04c3fSmrg } 101301e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 101401e04c3fSmrg 101501e04c3fSmrg return 0; 101601e04c3fSmrg} 101701e04c3fSmrg 101801e04c3fSmrgstatic int 101901e04c3fSmrgsrc_align1_region(FILE *file, 102001e04c3fSmrg unsigned _vert_stride, unsigned _width, 102101e04c3fSmrg unsigned _horiz_stride) 102201e04c3fSmrg{ 102301e04c3fSmrg int err = 0; 102401e04c3fSmrg string(file, "<"); 102501e04c3fSmrg err |= control(file, "vert stride", vert_stride, _vert_stride, NULL); 102601e04c3fSmrg string(file, ","); 102701e04c3fSmrg err |= control(file, "width", width, _width, NULL); 102801e04c3fSmrg string(file, ","); 102901e04c3fSmrg err |= control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL); 103001e04c3fSmrg string(file, ">"); 103101e04c3fSmrg return err; 103201e04c3fSmrg} 103301e04c3fSmrg 103401e04c3fSmrgstatic int 103501e04c3fSmrgsrc_da1(FILE *file, 10367ec681f3Smrg const struct intel_device_info *devinfo, 103701e04c3fSmrg unsigned opcode, 103801e04c3fSmrg enum brw_reg_type type, unsigned _reg_file, 103901e04c3fSmrg unsigned _vert_stride, unsigned _width, unsigned _horiz_stride, 104001e04c3fSmrg unsigned reg_num, unsigned sub_reg_num, unsigned __abs, 104101e04c3fSmrg unsigned _negate) 104201e04c3fSmrg{ 104301e04c3fSmrg int err = 0; 104401e04c3fSmrg 10457ec681f3Smrg if (devinfo->ver >= 8 && is_logic_instruction(opcode)) 104601e04c3fSmrg err |= control(file, "bitnot", m_bitnot, _negate, NULL); 104701e04c3fSmrg else 104801e04c3fSmrg err |= control(file, "negate", m_negate, _negate, NULL); 104901e04c3fSmrg 105001e04c3fSmrg err |= control(file, "abs", _abs, __abs, NULL); 105101e04c3fSmrg 105201e04c3fSmrg err |= reg(file, _reg_file, reg_num); 105301e04c3fSmrg if (err == -1) 105401e04c3fSmrg return 0; 105501e04c3fSmrg if (sub_reg_num) { 105601e04c3fSmrg unsigned elem_size = brw_reg_type_to_size(type); 105701e04c3fSmrg format(file, ".%d", sub_reg_num / elem_size); /* use formal style like spec */ 105801e04c3fSmrg } 105901e04c3fSmrg src_align1_region(file, _vert_stride, _width, _horiz_stride); 106001e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 106101e04c3fSmrg return err; 106201e04c3fSmrg} 106301e04c3fSmrg 106401e04c3fSmrgstatic int 106501e04c3fSmrgsrc_ia1(FILE *file, 10667ec681f3Smrg const struct intel_device_info *devinfo, 106701e04c3fSmrg unsigned opcode, 106801e04c3fSmrg enum brw_reg_type type, 106901e04c3fSmrg int _addr_imm, 107001e04c3fSmrg unsigned _addr_subreg_nr, 107101e04c3fSmrg unsigned _negate, 107201e04c3fSmrg unsigned __abs, 107301e04c3fSmrg unsigned _horiz_stride, unsigned _width, unsigned _vert_stride) 107401e04c3fSmrg{ 107501e04c3fSmrg int err = 0; 107601e04c3fSmrg 10777ec681f3Smrg if (devinfo->ver >= 8 && is_logic_instruction(opcode)) 107801e04c3fSmrg err |= control(file, "bitnot", m_bitnot, _negate, NULL); 107901e04c3fSmrg else 108001e04c3fSmrg err |= control(file, "negate", m_negate, _negate, NULL); 108101e04c3fSmrg 108201e04c3fSmrg err |= control(file, "abs", _abs, __abs, NULL); 108301e04c3fSmrg 108401e04c3fSmrg string(file, "g[a0"); 108501e04c3fSmrg if (_addr_subreg_nr) 108601e04c3fSmrg format(file, ".%d", _addr_subreg_nr); 108701e04c3fSmrg if (_addr_imm) 108801e04c3fSmrg format(file, " %d", _addr_imm); 108901e04c3fSmrg string(file, "]"); 109001e04c3fSmrg src_align1_region(file, _vert_stride, _width, _horiz_stride); 109101e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 109201e04c3fSmrg return err; 109301e04c3fSmrg} 109401e04c3fSmrg 109501e04c3fSmrgstatic int 109601e04c3fSmrgsrc_swizzle(FILE *file, unsigned swiz) 109701e04c3fSmrg{ 109801e04c3fSmrg unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X); 109901e04c3fSmrg unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y); 110001e04c3fSmrg unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z); 110101e04c3fSmrg unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W); 110201e04c3fSmrg int err = 0; 110301e04c3fSmrg 110401e04c3fSmrg if (x == y && x == z && x == w) { 110501e04c3fSmrg string(file, "."); 110601e04c3fSmrg err |= control(file, "channel select", chan_sel, x, NULL); 110701e04c3fSmrg } else if (swiz != BRW_SWIZZLE_XYZW) { 110801e04c3fSmrg string(file, "."); 110901e04c3fSmrg err |= control(file, "channel select", chan_sel, x, NULL); 111001e04c3fSmrg err |= control(file, "channel select", chan_sel, y, NULL); 111101e04c3fSmrg err |= control(file, "channel select", chan_sel, z, NULL); 111201e04c3fSmrg err |= control(file, "channel select", chan_sel, w, NULL); 111301e04c3fSmrg } 111401e04c3fSmrg return err; 111501e04c3fSmrg} 111601e04c3fSmrg 111701e04c3fSmrgstatic int 111801e04c3fSmrgsrc_da16(FILE *file, 11197ec681f3Smrg const struct intel_device_info *devinfo, 112001e04c3fSmrg unsigned opcode, 112101e04c3fSmrg enum brw_reg_type type, 112201e04c3fSmrg unsigned _reg_file, 112301e04c3fSmrg unsigned _vert_stride, 112401e04c3fSmrg unsigned _reg_nr, 112501e04c3fSmrg unsigned _subreg_nr, 112601e04c3fSmrg unsigned __abs, 112701e04c3fSmrg unsigned _negate, 112801e04c3fSmrg unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w) 112901e04c3fSmrg{ 113001e04c3fSmrg int err = 0; 113101e04c3fSmrg 11327ec681f3Smrg if (devinfo->ver >= 8 && is_logic_instruction(opcode)) 113301e04c3fSmrg err |= control(file, "bitnot", m_bitnot, _negate, NULL); 113401e04c3fSmrg else 113501e04c3fSmrg err |= control(file, "negate", m_negate, _negate, NULL); 113601e04c3fSmrg 113701e04c3fSmrg err |= control(file, "abs", _abs, __abs, NULL); 113801e04c3fSmrg 113901e04c3fSmrg err |= reg(file, _reg_file, _reg_nr); 114001e04c3fSmrg if (err == -1) 114101e04c3fSmrg return 0; 114201e04c3fSmrg if (_subreg_nr) { 114301e04c3fSmrg unsigned elem_size = brw_reg_type_to_size(type); 114401e04c3fSmrg 114501e04c3fSmrg /* bit4 for subreg number byte addressing. Make this same meaning as 114601e04c3fSmrg in da1 case, so output looks consistent. */ 114701e04c3fSmrg format(file, ".%d", 16 / elem_size); 114801e04c3fSmrg } 114901e04c3fSmrg string(file, "<"); 115001e04c3fSmrg err |= control(file, "vert stride", vert_stride, _vert_stride, NULL); 115101e04c3fSmrg string(file, ">"); 115201e04c3fSmrg err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w)); 115301e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 115401e04c3fSmrg return err; 115501e04c3fSmrg} 115601e04c3fSmrg 115701e04c3fSmrgstatic enum brw_vertical_stride 11587ec681f3Smrgvstride_from_align1_3src_vstride(const struct intel_device_info *devinfo, 11597ec681f3Smrg enum gfx10_align1_3src_vertical_stride vstride) 116001e04c3fSmrg{ 116101e04c3fSmrg switch (vstride) { 116201e04c3fSmrg case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0; 11637ec681f3Smrg case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_2: 11647ec681f3Smrg if (devinfo->ver >= 12) 11657ec681f3Smrg return BRW_VERTICAL_STRIDE_1; 11667ec681f3Smrg else 11677ec681f3Smrg return BRW_VERTICAL_STRIDE_2; 116801e04c3fSmrg case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4; 116901e04c3fSmrg case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8; 117001e04c3fSmrg default: 117101e04c3fSmrg unreachable("not reached"); 117201e04c3fSmrg } 117301e04c3fSmrg} 117401e04c3fSmrg 117501e04c3fSmrgstatic enum brw_horizontal_stride 11767ec681f3Smrghstride_from_align1_3src_hstride(enum gfx10_align1_3src_src_horizontal_stride hstride) 117701e04c3fSmrg{ 117801e04c3fSmrg switch (hstride) { 117901e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_HORIZONTAL_STRIDE_0; 118001e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_HORIZONTAL_STRIDE_1; 118101e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_HORIZONTAL_STRIDE_2; 118201e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_HORIZONTAL_STRIDE_4; 118301e04c3fSmrg default: 118401e04c3fSmrg unreachable("not reached"); 118501e04c3fSmrg } 118601e04c3fSmrg} 118701e04c3fSmrg 118801e04c3fSmrgstatic enum brw_vertical_stride 11897ec681f3Smrgvstride_from_align1_3src_hstride(enum gfx10_align1_3src_src_horizontal_stride hstride) 119001e04c3fSmrg{ 119101e04c3fSmrg switch (hstride) { 119201e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_0: return BRW_VERTICAL_STRIDE_0; 119301e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_1: return BRW_VERTICAL_STRIDE_1; 119401e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_2: return BRW_VERTICAL_STRIDE_2; 119501e04c3fSmrg case BRW_ALIGN1_3SRC_SRC_HORIZONTAL_STRIDE_4: return BRW_VERTICAL_STRIDE_4; 119601e04c3fSmrg default: 119701e04c3fSmrg unreachable("not reached"); 119801e04c3fSmrg } 119901e04c3fSmrg} 120001e04c3fSmrg 12017ec681f3Smrg/* From "GFX10 Regioning Rules for Align1 Ternary Operations" in the 120201e04c3fSmrg * "Register Region Restrictions" documentation 120301e04c3fSmrg */ 120401e04c3fSmrgstatic enum brw_width 120501e04c3fSmrgimplied_width(enum brw_vertical_stride _vert_stride, 120601e04c3fSmrg enum brw_horizontal_stride _horiz_stride) 120701e04c3fSmrg{ 120801e04c3fSmrg /* "1. Width is 1 when Vertical and Horizontal Strides are both zero." */ 120901e04c3fSmrg if (_vert_stride == BRW_VERTICAL_STRIDE_0 && 121001e04c3fSmrg _horiz_stride == BRW_HORIZONTAL_STRIDE_0) { 121101e04c3fSmrg return BRW_WIDTH_1; 121201e04c3fSmrg 121301e04c3fSmrg /* "2. Width is equal to vertical stride when Horizontal Stride is zero." */ 121401e04c3fSmrg } else if (_horiz_stride == BRW_HORIZONTAL_STRIDE_0) { 121501e04c3fSmrg switch (_vert_stride) { 121601e04c3fSmrg case BRW_VERTICAL_STRIDE_2: return BRW_WIDTH_2; 121701e04c3fSmrg case BRW_VERTICAL_STRIDE_4: return BRW_WIDTH_4; 121801e04c3fSmrg case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8; 121901e04c3fSmrg case BRW_VERTICAL_STRIDE_0: 122001e04c3fSmrg default: 122101e04c3fSmrg unreachable("not reached"); 122201e04c3fSmrg } 122301e04c3fSmrg 122401e04c3fSmrg } else { 122501e04c3fSmrg /* FINISHME: Implement these: */ 122601e04c3fSmrg 122701e04c3fSmrg /* "3. Width is equal to Vertical Stride/Horizontal Stride when both 122801e04c3fSmrg * Strides are non-zero. 122901e04c3fSmrg * 123001e04c3fSmrg * 4. Vertical Stride must not be zero if Horizontal Stride is non-zero. 123101e04c3fSmrg * This implies Vertical Stride is always greater than Horizontal 123201e04c3fSmrg * Stride." 123301e04c3fSmrg * 123401e04c3fSmrg * Given these statements and the knowledge that the stride and width 123501e04c3fSmrg * values are encoded in logarithmic form, we can perform the division 123601e04c3fSmrg * by just subtracting. 123701e04c3fSmrg */ 123801e04c3fSmrg return _vert_stride - _horiz_stride; 123901e04c3fSmrg } 124001e04c3fSmrg} 124101e04c3fSmrg 124201e04c3fSmrgstatic int 12437ec681f3Smrgsrc0_3src(FILE *file, const struct intel_device_info *devinfo, 12447ec681f3Smrg const brw_inst *inst) 124501e04c3fSmrg{ 124601e04c3fSmrg int err = 0; 124701e04c3fSmrg unsigned reg_nr, subreg_nr; 124801e04c3fSmrg enum brw_reg_file _file; 124901e04c3fSmrg enum brw_reg_type type; 125001e04c3fSmrg enum brw_vertical_stride _vert_stride; 125101e04c3fSmrg enum brw_width _width; 125201e04c3fSmrg enum brw_horizontal_stride _horiz_stride; 125301e04c3fSmrg bool is_scalar_region; 125401e04c3fSmrg bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 125501e04c3fSmrg 12567ec681f3Smrg if (devinfo->ver < 10 && is_align1) 12577ec681f3Smrg return 0; 12587ec681f3Smrg 125901e04c3fSmrg if (is_align1) { 12607ec681f3Smrg if (devinfo->ver >= 12 && !brw_inst_3src_a1_src0_is_imm(devinfo, inst)) { 12617ec681f3Smrg _file = brw_inst_3src_a1_src0_reg_file(devinfo, inst); 12627ec681f3Smrg } else if (brw_inst_3src_a1_src0_reg_file(devinfo, inst) == 12637ec681f3Smrg BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { 126401e04c3fSmrg _file = BRW_GENERAL_REGISTER_FILE; 126501e04c3fSmrg } else if (brw_inst_3src_a1_src0_type(devinfo, inst) == 126601e04c3fSmrg BRW_REGISTER_TYPE_NF) { 126701e04c3fSmrg _file = BRW_ARCHITECTURE_REGISTER_FILE; 126801e04c3fSmrg } else { 126901e04c3fSmrg _file = BRW_IMMEDIATE_VALUE; 127001e04c3fSmrg uint16_t imm_val = brw_inst_3src_a1_src0_imm(devinfo, inst); 127101e04c3fSmrg enum brw_reg_type type = brw_inst_3src_a1_src0_type(devinfo, inst); 127201e04c3fSmrg 127301e04c3fSmrg if (type == BRW_REGISTER_TYPE_W) { 127401e04c3fSmrg format(file, "%dW", imm_val); 127501e04c3fSmrg } else if (type == BRW_REGISTER_TYPE_UW) { 127601e04c3fSmrg format(file, "0x%04xUW", imm_val); 127701e04c3fSmrg } else if (type == BRW_REGISTER_TYPE_HF) { 12787ec681f3Smrg format(file, "0x%04xHF", imm_val); 127901e04c3fSmrg } 128001e04c3fSmrg return 0; 128101e04c3fSmrg } 128201e04c3fSmrg 12837ec681f3Smrg reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst); 12847ec681f3Smrg subreg_nr = brw_inst_3src_a1_src0_subreg_nr(devinfo, inst); 12857ec681f3Smrg type = brw_inst_3src_a1_src0_type(devinfo, inst); 128601e04c3fSmrg _vert_stride = vstride_from_align1_3src_vstride( 12877ec681f3Smrg devinfo, brw_inst_3src_a1_src0_vstride(devinfo, inst)); 128801e04c3fSmrg _horiz_stride = hstride_from_align1_3src_hstride( 128901e04c3fSmrg brw_inst_3src_a1_src0_hstride(devinfo, inst)); 129001e04c3fSmrg _width = implied_width(_vert_stride, _horiz_stride); 129101e04c3fSmrg } else { 129201e04c3fSmrg _file = BRW_GENERAL_REGISTER_FILE; 129301e04c3fSmrg reg_nr = brw_inst_3src_src0_reg_nr(devinfo, inst); 129401e04c3fSmrg subreg_nr = brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4; 129501e04c3fSmrg type = brw_inst_3src_a16_src_type(devinfo, inst); 129601e04c3fSmrg 129701e04c3fSmrg if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) { 129801e04c3fSmrg _vert_stride = BRW_VERTICAL_STRIDE_0; 129901e04c3fSmrg _width = BRW_WIDTH_1; 130001e04c3fSmrg _horiz_stride = BRW_HORIZONTAL_STRIDE_0; 130101e04c3fSmrg } else { 130201e04c3fSmrg _vert_stride = BRW_VERTICAL_STRIDE_4; 130301e04c3fSmrg _width = BRW_WIDTH_4; 130401e04c3fSmrg _horiz_stride = BRW_HORIZONTAL_STRIDE_1; 130501e04c3fSmrg } 130601e04c3fSmrg } 130701e04c3fSmrg is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 && 130801e04c3fSmrg _width == BRW_WIDTH_1 && 130901e04c3fSmrg _horiz_stride == BRW_HORIZONTAL_STRIDE_0; 131001e04c3fSmrg 131101e04c3fSmrg subreg_nr /= brw_reg_type_to_size(type); 131201e04c3fSmrg 131301e04c3fSmrg err |= control(file, "negate", m_negate, 131401e04c3fSmrg brw_inst_3src_src0_negate(devinfo, inst), NULL); 131501e04c3fSmrg err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL); 131601e04c3fSmrg 131701e04c3fSmrg err |= reg(file, _file, reg_nr); 131801e04c3fSmrg if (err == -1) 131901e04c3fSmrg return 0; 132001e04c3fSmrg if (subreg_nr || is_scalar_region) 132101e04c3fSmrg format(file, ".%d", subreg_nr); 132201e04c3fSmrg src_align1_region(file, _vert_stride, _width, _horiz_stride); 132301e04c3fSmrg if (!is_scalar_region && !is_align1) 132401e04c3fSmrg err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst)); 132501e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 132601e04c3fSmrg return err; 132701e04c3fSmrg} 132801e04c3fSmrg 132901e04c3fSmrgstatic int 13307ec681f3Smrgsrc1_3src(FILE *file, const struct intel_device_info *devinfo, 13317ec681f3Smrg const brw_inst *inst) 133201e04c3fSmrg{ 133301e04c3fSmrg int err = 0; 133401e04c3fSmrg unsigned reg_nr, subreg_nr; 133501e04c3fSmrg enum brw_reg_file _file; 133601e04c3fSmrg enum brw_reg_type type; 133701e04c3fSmrg enum brw_vertical_stride _vert_stride; 133801e04c3fSmrg enum brw_width _width; 133901e04c3fSmrg enum brw_horizontal_stride _horiz_stride; 134001e04c3fSmrg bool is_scalar_region; 134101e04c3fSmrg bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 134201e04c3fSmrg 13437ec681f3Smrg if (devinfo->ver < 10 && is_align1) 13447ec681f3Smrg return 0; 13457ec681f3Smrg 134601e04c3fSmrg if (is_align1) { 13477ec681f3Smrg if (devinfo->ver >= 12) { 13487ec681f3Smrg _file = brw_inst_3src_a1_src1_reg_file(devinfo, inst); 13497ec681f3Smrg } else if (brw_inst_3src_a1_src1_reg_file(devinfo, inst) == 13507ec681f3Smrg BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { 135101e04c3fSmrg _file = BRW_GENERAL_REGISTER_FILE; 135201e04c3fSmrg } else { 135301e04c3fSmrg _file = BRW_ARCHITECTURE_REGISTER_FILE; 135401e04c3fSmrg } 135501e04c3fSmrg 135601e04c3fSmrg reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst); 135701e04c3fSmrg subreg_nr = brw_inst_3src_a1_src1_subreg_nr(devinfo, inst); 135801e04c3fSmrg type = brw_inst_3src_a1_src1_type(devinfo, inst); 135901e04c3fSmrg 136001e04c3fSmrg _vert_stride = vstride_from_align1_3src_vstride( 13617ec681f3Smrg devinfo, brw_inst_3src_a1_src1_vstride(devinfo, inst)); 136201e04c3fSmrg _horiz_stride = hstride_from_align1_3src_hstride( 136301e04c3fSmrg brw_inst_3src_a1_src1_hstride(devinfo, inst)); 136401e04c3fSmrg _width = implied_width(_vert_stride, _horiz_stride); 136501e04c3fSmrg } else { 136601e04c3fSmrg _file = BRW_GENERAL_REGISTER_FILE; 136701e04c3fSmrg reg_nr = brw_inst_3src_src1_reg_nr(devinfo, inst); 136801e04c3fSmrg subreg_nr = brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4; 136901e04c3fSmrg type = brw_inst_3src_a16_src_type(devinfo, inst); 137001e04c3fSmrg 137101e04c3fSmrg if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) { 137201e04c3fSmrg _vert_stride = BRW_VERTICAL_STRIDE_0; 137301e04c3fSmrg _width = BRW_WIDTH_1; 137401e04c3fSmrg _horiz_stride = BRW_HORIZONTAL_STRIDE_0; 137501e04c3fSmrg } else { 137601e04c3fSmrg _vert_stride = BRW_VERTICAL_STRIDE_4; 137701e04c3fSmrg _width = BRW_WIDTH_4; 137801e04c3fSmrg _horiz_stride = BRW_HORIZONTAL_STRIDE_1; 137901e04c3fSmrg } 138001e04c3fSmrg } 138101e04c3fSmrg is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 && 138201e04c3fSmrg _width == BRW_WIDTH_1 && 138301e04c3fSmrg _horiz_stride == BRW_HORIZONTAL_STRIDE_0; 138401e04c3fSmrg 138501e04c3fSmrg subreg_nr /= brw_reg_type_to_size(type); 138601e04c3fSmrg 138701e04c3fSmrg err |= control(file, "negate", m_negate, 138801e04c3fSmrg brw_inst_3src_src1_negate(devinfo, inst), NULL); 138901e04c3fSmrg err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL); 139001e04c3fSmrg 139101e04c3fSmrg err |= reg(file, _file, reg_nr); 139201e04c3fSmrg if (err == -1) 139301e04c3fSmrg return 0; 139401e04c3fSmrg if (subreg_nr || is_scalar_region) 139501e04c3fSmrg format(file, ".%d", subreg_nr); 139601e04c3fSmrg src_align1_region(file, _vert_stride, _width, _horiz_stride); 139701e04c3fSmrg if (!is_scalar_region && !is_align1) 139801e04c3fSmrg err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst)); 139901e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 140001e04c3fSmrg return err; 140101e04c3fSmrg} 140201e04c3fSmrg 140301e04c3fSmrgstatic int 14047ec681f3Smrgsrc2_3src(FILE *file, const struct intel_device_info *devinfo, 14057ec681f3Smrg const brw_inst *inst) 140601e04c3fSmrg{ 140701e04c3fSmrg int err = 0; 140801e04c3fSmrg unsigned reg_nr, subreg_nr; 140901e04c3fSmrg enum brw_reg_file _file; 141001e04c3fSmrg enum brw_reg_type type; 141101e04c3fSmrg enum brw_vertical_stride _vert_stride; 141201e04c3fSmrg enum brw_width _width; 141301e04c3fSmrg enum brw_horizontal_stride _horiz_stride; 141401e04c3fSmrg bool is_scalar_region; 141501e04c3fSmrg bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; 141601e04c3fSmrg 14177ec681f3Smrg if (devinfo->ver < 10 && is_align1) 14187ec681f3Smrg return 0; 14197ec681f3Smrg 142001e04c3fSmrg if (is_align1) { 14217ec681f3Smrg if (devinfo->ver >= 12 && !brw_inst_3src_a1_src2_is_imm(devinfo, inst)) { 14227ec681f3Smrg _file = brw_inst_3src_a1_src2_reg_file(devinfo, inst); 14237ec681f3Smrg } else if (brw_inst_3src_a1_src2_reg_file(devinfo, inst) == 14247ec681f3Smrg BRW_ALIGN1_3SRC_GENERAL_REGISTER_FILE) { 142501e04c3fSmrg _file = BRW_GENERAL_REGISTER_FILE; 142601e04c3fSmrg } else { 142701e04c3fSmrg _file = BRW_IMMEDIATE_VALUE; 142801e04c3fSmrg uint16_t imm_val = brw_inst_3src_a1_src2_imm(devinfo, inst); 142901e04c3fSmrg enum brw_reg_type type = brw_inst_3src_a1_src2_type(devinfo, inst); 143001e04c3fSmrg 143101e04c3fSmrg if (type == BRW_REGISTER_TYPE_W) { 143201e04c3fSmrg format(file, "%dW", imm_val); 143301e04c3fSmrg } else if (type == BRW_REGISTER_TYPE_UW) { 143401e04c3fSmrg format(file, "0x%04xUW", imm_val); 143501e04c3fSmrg } else if (type == BRW_REGISTER_TYPE_HF) { 14367ec681f3Smrg format(file, "0x%04xHF", imm_val); 143701e04c3fSmrg } 143801e04c3fSmrg return 0; 143901e04c3fSmrg } 144001e04c3fSmrg 14417ec681f3Smrg reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst); 14427ec681f3Smrg subreg_nr = brw_inst_3src_a1_src2_subreg_nr(devinfo, inst); 14437ec681f3Smrg type = brw_inst_3src_a1_src2_type(devinfo, inst); 144401e04c3fSmrg /* FINISHME: No vertical stride on src2. Is using the hstride in place 144501e04c3fSmrg * correct? Doesn't seem like it, since there's hstride=1 but 144601e04c3fSmrg * no vstride=1. 144701e04c3fSmrg */ 144801e04c3fSmrg _vert_stride = vstride_from_align1_3src_hstride( 144901e04c3fSmrg brw_inst_3src_a1_src2_hstride(devinfo, inst)); 145001e04c3fSmrg _horiz_stride = hstride_from_align1_3src_hstride( 145101e04c3fSmrg brw_inst_3src_a1_src2_hstride(devinfo, inst)); 145201e04c3fSmrg _width = implied_width(_vert_stride, _horiz_stride); 145301e04c3fSmrg } else { 145401e04c3fSmrg _file = BRW_GENERAL_REGISTER_FILE; 145501e04c3fSmrg reg_nr = brw_inst_3src_src2_reg_nr(devinfo, inst); 145601e04c3fSmrg subreg_nr = brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4; 145701e04c3fSmrg type = brw_inst_3src_a16_src_type(devinfo, inst); 145801e04c3fSmrg 145901e04c3fSmrg if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) { 146001e04c3fSmrg _vert_stride = BRW_VERTICAL_STRIDE_0; 146101e04c3fSmrg _width = BRW_WIDTH_1; 146201e04c3fSmrg _horiz_stride = BRW_HORIZONTAL_STRIDE_0; 146301e04c3fSmrg } else { 146401e04c3fSmrg _vert_stride = BRW_VERTICAL_STRIDE_4; 146501e04c3fSmrg _width = BRW_WIDTH_4; 146601e04c3fSmrg _horiz_stride = BRW_HORIZONTAL_STRIDE_1; 146701e04c3fSmrg } 146801e04c3fSmrg } 146901e04c3fSmrg is_scalar_region = _vert_stride == BRW_VERTICAL_STRIDE_0 && 147001e04c3fSmrg _width == BRW_WIDTH_1 && 147101e04c3fSmrg _horiz_stride == BRW_HORIZONTAL_STRIDE_0; 147201e04c3fSmrg 147301e04c3fSmrg subreg_nr /= brw_reg_type_to_size(type); 147401e04c3fSmrg 147501e04c3fSmrg err |= control(file, "negate", m_negate, 147601e04c3fSmrg brw_inst_3src_src2_negate(devinfo, inst), NULL); 147701e04c3fSmrg err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL); 147801e04c3fSmrg 147901e04c3fSmrg err |= reg(file, _file, reg_nr); 148001e04c3fSmrg if (err == -1) 148101e04c3fSmrg return 0; 148201e04c3fSmrg if (subreg_nr || is_scalar_region) 148301e04c3fSmrg format(file, ".%d", subreg_nr); 148401e04c3fSmrg src_align1_region(file, _vert_stride, _width, _horiz_stride); 148501e04c3fSmrg if (!is_scalar_region && !is_align1) 148601e04c3fSmrg err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst)); 148701e04c3fSmrg string(file, brw_reg_type_to_letters(type)); 148801e04c3fSmrg return err; 148901e04c3fSmrg} 149001e04c3fSmrg 149101e04c3fSmrgstatic int 14927ec681f3Smrgimm(FILE *file, const struct intel_device_info *devinfo, enum brw_reg_type type, 149301e04c3fSmrg const brw_inst *inst) 149401e04c3fSmrg{ 149501e04c3fSmrg switch (type) { 149601e04c3fSmrg case BRW_REGISTER_TYPE_UQ: 149701e04c3fSmrg format(file, "0x%016"PRIx64"UQ", brw_inst_imm_uq(devinfo, inst)); 149801e04c3fSmrg break; 149901e04c3fSmrg case BRW_REGISTER_TYPE_Q: 15007ec681f3Smrg format(file, "0x%016"PRIx64"Q", brw_inst_imm_uq(devinfo, inst)); 150101e04c3fSmrg break; 150201e04c3fSmrg case BRW_REGISTER_TYPE_UD: 150301e04c3fSmrg format(file, "0x%08xUD", brw_inst_imm_ud(devinfo, inst)); 150401e04c3fSmrg break; 150501e04c3fSmrg case BRW_REGISTER_TYPE_D: 150601e04c3fSmrg format(file, "%dD", brw_inst_imm_d(devinfo, inst)); 150701e04c3fSmrg break; 150801e04c3fSmrg case BRW_REGISTER_TYPE_UW: 150901e04c3fSmrg format(file, "0x%04xUW", (uint16_t) brw_inst_imm_ud(devinfo, inst)); 151001e04c3fSmrg break; 151101e04c3fSmrg case BRW_REGISTER_TYPE_W: 151201e04c3fSmrg format(file, "%dW", (int16_t) brw_inst_imm_d(devinfo, inst)); 151301e04c3fSmrg break; 151401e04c3fSmrg case BRW_REGISTER_TYPE_UV: 151501e04c3fSmrg format(file, "0x%08xUV", brw_inst_imm_ud(devinfo, inst)); 151601e04c3fSmrg break; 151701e04c3fSmrg case BRW_REGISTER_TYPE_VF: 151801e04c3fSmrg format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127, 96)); 151901e04c3fSmrg pad(file, 48); 152001e04c3fSmrg format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */", 152101e04c3fSmrg brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)), 152201e04c3fSmrg brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 8), 152301e04c3fSmrg brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 16), 152401e04c3fSmrg brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >> 24)); 152501e04c3fSmrg break; 152601e04c3fSmrg case BRW_REGISTER_TYPE_V: 152701e04c3fSmrg format(file, "0x%08xV", brw_inst_imm_ud(devinfo, inst)); 152801e04c3fSmrg break; 152901e04c3fSmrg case BRW_REGISTER_TYPE_F: 15307ec681f3Smrg /* The DIM instruction's src0 uses an F type but contains a 15317ec681f3Smrg * 64-bit immediate 15327ec681f3Smrg */ 15337ec681f3Smrg if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_DIM) { 15347ec681f3Smrg format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 64)); 15357ec681f3Smrg pad(file, 48); 15367ec681f3Smrg format(file, "/* %-gF */", brw_inst_imm_df(devinfo, inst)); 15377ec681f3Smrg } else { 15387ec681f3Smrg format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127, 96)); 15397ec681f3Smrg pad(file, 48); 15407ec681f3Smrg format(file, " /* %-gF */", brw_inst_imm_f(devinfo, inst)); 15417ec681f3Smrg } 154201e04c3fSmrg break; 154301e04c3fSmrg case BRW_REGISTER_TYPE_DF: 154401e04c3fSmrg format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127, 64)); 154501e04c3fSmrg pad(file, 48); 154601e04c3fSmrg format(file, "/* %-gDF */", brw_inst_imm_df(devinfo, inst)); 154701e04c3fSmrg break; 154801e04c3fSmrg case BRW_REGISTER_TYPE_HF: 154901e04c3fSmrg string(file, "Half Float IMM"); 155001e04c3fSmrg break; 155101e04c3fSmrg case BRW_REGISTER_TYPE_NF: 155201e04c3fSmrg case BRW_REGISTER_TYPE_UB: 155301e04c3fSmrg case BRW_REGISTER_TYPE_B: 155401e04c3fSmrg format(file, "*** invalid immediate type %d ", type); 155501e04c3fSmrg } 155601e04c3fSmrg return 0; 155701e04c3fSmrg} 155801e04c3fSmrg 15599f464c52Smayastatic int 15609f464c52Smayasrc_sends_da(FILE *file, 15617ec681f3Smrg const struct intel_device_info *devinfo, 15629f464c52Smaya enum brw_reg_type type, 15637ec681f3Smrg enum brw_reg_file _reg_file, 15649f464c52Smaya unsigned _reg_nr, 15659f464c52Smaya unsigned _reg_subnr) 15669f464c52Smaya{ 15679f464c52Smaya int err = 0; 15689f464c52Smaya 15697ec681f3Smrg err |= reg(file, _reg_file, _reg_nr); 15709f464c52Smaya if (err == -1) 15719f464c52Smaya return 0; 15729f464c52Smaya if (_reg_subnr) 15739f464c52Smaya format(file, ".1"); 15749f464c52Smaya string(file, brw_reg_type_to_letters(type)); 15759f464c52Smaya 15769f464c52Smaya return err; 15779f464c52Smaya} 15789f464c52Smaya 15799f464c52Smayastatic int 15809f464c52Smayasrc_sends_ia(FILE *file, 15817ec681f3Smrg const struct intel_device_info *devinfo, 15829f464c52Smaya enum brw_reg_type type, 15839f464c52Smaya int _addr_imm, 15849f464c52Smaya unsigned _addr_subreg_nr) 15859f464c52Smaya{ 15869f464c52Smaya string(file, "g[a0"); 15879f464c52Smaya if (_addr_subreg_nr) 15889f464c52Smaya format(file, ".1"); 15899f464c52Smaya if (_addr_imm) 15909f464c52Smaya format(file, " %d", _addr_imm); 15919f464c52Smaya string(file, "]"); 15929f464c52Smaya string(file, brw_reg_type_to_letters(type)); 15939f464c52Smaya 15949f464c52Smaya return 0; 15959f464c52Smaya} 15969f464c52Smaya 159701e04c3fSmrgstatic int 15987ec681f3Smrgsrc_send_desc_ia(FILE *file, 15997ec681f3Smrg const struct intel_device_info *devinfo, 16007ec681f3Smrg unsigned _addr_subreg_nr) 16017ec681f3Smrg{ 16027ec681f3Smrg string(file, "a0"); 16037ec681f3Smrg if (_addr_subreg_nr) 16047ec681f3Smrg format(file, ".%d", _addr_subreg_nr); 16057ec681f3Smrg format(file, "<0>UD"); 16067ec681f3Smrg 16077ec681f3Smrg return 0; 16087ec681f3Smrg} 16097ec681f3Smrg 16107ec681f3Smrgstatic int 16117ec681f3Smrgsrc0(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst) 161201e04c3fSmrg{ 16139f464c52Smaya if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) { 16147ec681f3Smrg if (devinfo->ver >= 12) { 16157ec681f3Smrg return src_sends_da(file, 16167ec681f3Smrg devinfo, 16177ec681f3Smrg BRW_REGISTER_TYPE_UD, 16187ec681f3Smrg brw_inst_send_src0_reg_file(devinfo, inst), 16197ec681f3Smrg brw_inst_src0_da_reg_nr(devinfo, inst), 16207ec681f3Smrg 0); 16217ec681f3Smrg } else if (brw_inst_send_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 16229f464c52Smaya return src_sends_da(file, 16239f464c52Smaya devinfo, 16249f464c52Smaya BRW_REGISTER_TYPE_UD, 16257ec681f3Smrg BRW_GENERAL_REGISTER_FILE, 16269f464c52Smaya brw_inst_src0_da_reg_nr(devinfo, inst), 16279f464c52Smaya brw_inst_src0_da16_subreg_nr(devinfo, inst)); 16289f464c52Smaya } else { 16299f464c52Smaya return src_sends_ia(file, 16309f464c52Smaya devinfo, 16319f464c52Smaya BRW_REGISTER_TYPE_UD, 16329f464c52Smaya brw_inst_send_src0_ia16_addr_imm(devinfo, inst), 16339f464c52Smaya brw_inst_src0_ia_subreg_nr(devinfo, inst)); 16349f464c52Smaya } 16359f464c52Smaya } else if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) { 163601e04c3fSmrg return imm(file, devinfo, brw_inst_src0_type(devinfo, inst), inst); 163701e04c3fSmrg } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 163801e04c3fSmrg if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 163901e04c3fSmrg return src_da1(file, 164001e04c3fSmrg devinfo, 164101e04c3fSmrg brw_inst_opcode(devinfo, inst), 164201e04c3fSmrg brw_inst_src0_type(devinfo, inst), 164301e04c3fSmrg brw_inst_src0_reg_file(devinfo, inst), 164401e04c3fSmrg brw_inst_src0_vstride(devinfo, inst), 164501e04c3fSmrg brw_inst_src0_width(devinfo, inst), 164601e04c3fSmrg brw_inst_src0_hstride(devinfo, inst), 164701e04c3fSmrg brw_inst_src0_da_reg_nr(devinfo, inst), 164801e04c3fSmrg brw_inst_src0_da1_subreg_nr(devinfo, inst), 164901e04c3fSmrg brw_inst_src0_abs(devinfo, inst), 165001e04c3fSmrg brw_inst_src0_negate(devinfo, inst)); 165101e04c3fSmrg } else { 165201e04c3fSmrg return src_ia1(file, 165301e04c3fSmrg devinfo, 165401e04c3fSmrg brw_inst_opcode(devinfo, inst), 165501e04c3fSmrg brw_inst_src0_type(devinfo, inst), 165601e04c3fSmrg brw_inst_src0_ia1_addr_imm(devinfo, inst), 165701e04c3fSmrg brw_inst_src0_ia_subreg_nr(devinfo, inst), 165801e04c3fSmrg brw_inst_src0_negate(devinfo, inst), 165901e04c3fSmrg brw_inst_src0_abs(devinfo, inst), 166001e04c3fSmrg brw_inst_src0_hstride(devinfo, inst), 166101e04c3fSmrg brw_inst_src0_width(devinfo, inst), 166201e04c3fSmrg brw_inst_src0_vstride(devinfo, inst)); 166301e04c3fSmrg } 166401e04c3fSmrg } else { 166501e04c3fSmrg if (brw_inst_src0_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 166601e04c3fSmrg return src_da16(file, 166701e04c3fSmrg devinfo, 166801e04c3fSmrg brw_inst_opcode(devinfo, inst), 166901e04c3fSmrg brw_inst_src0_type(devinfo, inst), 167001e04c3fSmrg brw_inst_src0_reg_file(devinfo, inst), 167101e04c3fSmrg brw_inst_src0_vstride(devinfo, inst), 167201e04c3fSmrg brw_inst_src0_da_reg_nr(devinfo, inst), 167301e04c3fSmrg brw_inst_src0_da16_subreg_nr(devinfo, inst), 167401e04c3fSmrg brw_inst_src0_abs(devinfo, inst), 167501e04c3fSmrg brw_inst_src0_negate(devinfo, inst), 167601e04c3fSmrg brw_inst_src0_da16_swiz_x(devinfo, inst), 167701e04c3fSmrg brw_inst_src0_da16_swiz_y(devinfo, inst), 167801e04c3fSmrg brw_inst_src0_da16_swiz_z(devinfo, inst), 167901e04c3fSmrg brw_inst_src0_da16_swiz_w(devinfo, inst)); 168001e04c3fSmrg } else { 168101e04c3fSmrg string(file, "Indirect align16 address mode not supported"); 168201e04c3fSmrg return 1; 168301e04c3fSmrg } 168401e04c3fSmrg } 168501e04c3fSmrg} 168601e04c3fSmrg 168701e04c3fSmrgstatic int 16887ec681f3Smrgsrc1(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst) 168901e04c3fSmrg{ 16909f464c52Smaya if (is_split_send(devinfo, brw_inst_opcode(devinfo, inst))) { 16919f464c52Smaya return src_sends_da(file, 16929f464c52Smaya devinfo, 16939f464c52Smaya BRW_REGISTER_TYPE_UD, 16947ec681f3Smrg brw_inst_send_src1_reg_file(devinfo, inst), 16959f464c52Smaya brw_inst_send_src1_reg_nr(devinfo, inst), 16969f464c52Smaya 0 /* subreg_nr */); 16979f464c52Smaya } else if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) { 169801e04c3fSmrg return imm(file, devinfo, brw_inst_src1_type(devinfo, inst), inst); 169901e04c3fSmrg } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 170001e04c3fSmrg if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 170101e04c3fSmrg return src_da1(file, 170201e04c3fSmrg devinfo, 170301e04c3fSmrg brw_inst_opcode(devinfo, inst), 170401e04c3fSmrg brw_inst_src1_type(devinfo, inst), 170501e04c3fSmrg brw_inst_src1_reg_file(devinfo, inst), 170601e04c3fSmrg brw_inst_src1_vstride(devinfo, inst), 170701e04c3fSmrg brw_inst_src1_width(devinfo, inst), 170801e04c3fSmrg brw_inst_src1_hstride(devinfo, inst), 170901e04c3fSmrg brw_inst_src1_da_reg_nr(devinfo, inst), 171001e04c3fSmrg brw_inst_src1_da1_subreg_nr(devinfo, inst), 171101e04c3fSmrg brw_inst_src1_abs(devinfo, inst), 171201e04c3fSmrg brw_inst_src1_negate(devinfo, inst)); 171301e04c3fSmrg } else { 171401e04c3fSmrg return src_ia1(file, 171501e04c3fSmrg devinfo, 171601e04c3fSmrg brw_inst_opcode(devinfo, inst), 171701e04c3fSmrg brw_inst_src1_type(devinfo, inst), 171801e04c3fSmrg brw_inst_src1_ia1_addr_imm(devinfo, inst), 171901e04c3fSmrg brw_inst_src1_ia_subreg_nr(devinfo, inst), 172001e04c3fSmrg brw_inst_src1_negate(devinfo, inst), 172101e04c3fSmrg brw_inst_src1_abs(devinfo, inst), 172201e04c3fSmrg brw_inst_src1_hstride(devinfo, inst), 172301e04c3fSmrg brw_inst_src1_width(devinfo, inst), 172401e04c3fSmrg brw_inst_src1_vstride(devinfo, inst)); 172501e04c3fSmrg } 172601e04c3fSmrg } else { 172701e04c3fSmrg if (brw_inst_src1_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { 172801e04c3fSmrg return src_da16(file, 172901e04c3fSmrg devinfo, 173001e04c3fSmrg brw_inst_opcode(devinfo, inst), 173101e04c3fSmrg brw_inst_src1_type(devinfo, inst), 173201e04c3fSmrg brw_inst_src1_reg_file(devinfo, inst), 173301e04c3fSmrg brw_inst_src1_vstride(devinfo, inst), 173401e04c3fSmrg brw_inst_src1_da_reg_nr(devinfo, inst), 173501e04c3fSmrg brw_inst_src1_da16_subreg_nr(devinfo, inst), 173601e04c3fSmrg brw_inst_src1_abs(devinfo, inst), 173701e04c3fSmrg brw_inst_src1_negate(devinfo, inst), 173801e04c3fSmrg brw_inst_src1_da16_swiz_x(devinfo, inst), 173901e04c3fSmrg brw_inst_src1_da16_swiz_y(devinfo, inst), 174001e04c3fSmrg brw_inst_src1_da16_swiz_z(devinfo, inst), 174101e04c3fSmrg brw_inst_src1_da16_swiz_w(devinfo, inst)); 174201e04c3fSmrg } else { 174301e04c3fSmrg string(file, "Indirect align16 address mode not supported"); 174401e04c3fSmrg return 1; 174501e04c3fSmrg } 174601e04c3fSmrg } 174701e04c3fSmrg} 174801e04c3fSmrg 174901e04c3fSmrgstatic int 17507ec681f3Smrgqtr_ctrl(FILE *file, const struct intel_device_info *devinfo, 17517ec681f3Smrg const brw_inst *inst) 175201e04c3fSmrg{ 175301e04c3fSmrg int qtr_ctl = brw_inst_qtr_control(devinfo, inst); 175401e04c3fSmrg int exec_size = 1 << brw_inst_exec_size(devinfo, inst); 17557ec681f3Smrg const unsigned nib_ctl = devinfo->ver < 7 ? 0 : 175601e04c3fSmrg brw_inst_nib_control(devinfo, inst); 175701e04c3fSmrg 175801e04c3fSmrg if (exec_size < 8 || nib_ctl) { 175901e04c3fSmrg format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1); 176001e04c3fSmrg } else if (exec_size == 8) { 176101e04c3fSmrg switch (qtr_ctl) { 176201e04c3fSmrg case 0: 176301e04c3fSmrg string(file, " 1Q"); 176401e04c3fSmrg break; 176501e04c3fSmrg case 1: 176601e04c3fSmrg string(file, " 2Q"); 176701e04c3fSmrg break; 176801e04c3fSmrg case 2: 176901e04c3fSmrg string(file, " 3Q"); 177001e04c3fSmrg break; 177101e04c3fSmrg case 3: 177201e04c3fSmrg string(file, " 4Q"); 177301e04c3fSmrg break; 177401e04c3fSmrg } 177501e04c3fSmrg } else if (exec_size == 16) { 177601e04c3fSmrg if (qtr_ctl < 2) 177701e04c3fSmrg string(file, " 1H"); 177801e04c3fSmrg else 177901e04c3fSmrg string(file, " 2H"); 178001e04c3fSmrg } 178101e04c3fSmrg return 0; 178201e04c3fSmrg} 178301e04c3fSmrg 17847ec681f3Smrgstatic int 17857ec681f3Smrgswsb(FILE *file, const struct intel_device_info *devinfo, const brw_inst *inst) 17867ec681f3Smrg{ 17877ec681f3Smrg const enum opcode opcode = brw_inst_opcode(devinfo, inst); 17887ec681f3Smrg const uint8_t x = brw_inst_swsb(devinfo, inst); 17897ec681f3Smrg const struct tgl_swsb swsb = tgl_swsb_decode(devinfo, opcode, x); 17907ec681f3Smrg if (swsb.regdist) 17917ec681f3Smrg format(file, " %s@%d", 17927ec681f3Smrg (swsb.pipe == TGL_PIPE_FLOAT ? "F" : 17937ec681f3Smrg swsb.pipe == TGL_PIPE_INT ? "I" : 17947ec681f3Smrg swsb.pipe == TGL_PIPE_LONG ? "L" : 17957ec681f3Smrg swsb.pipe == TGL_PIPE_ALL ? "A" : "" ), 17967ec681f3Smrg swsb.regdist); 17977ec681f3Smrg if (swsb.mode) 17987ec681f3Smrg format(file, " $%d%s", swsb.sbid, 17997ec681f3Smrg (swsb.mode & TGL_SBID_SET ? "" : 18007ec681f3Smrg swsb.mode & TGL_SBID_DST ? ".dst" : ".src")); 18017ec681f3Smrg return 0; 18027ec681f3Smrg} 18037ec681f3Smrg 180401e04c3fSmrg#ifdef DEBUG 180501e04c3fSmrgstatic __attribute__((__unused__)) int 18067ec681f3Smrgbrw_disassemble_imm(const struct intel_device_info *devinfo, 180701e04c3fSmrg uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0) 180801e04c3fSmrg{ 180901e04c3fSmrg brw_inst inst; 181001e04c3fSmrg inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0); 181101e04c3fSmrg inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2); 18127ec681f3Smrg return brw_disassemble_inst(stderr, devinfo, &inst, false, 0, NULL); 181301e04c3fSmrg} 181401e04c3fSmrg#endif 181501e04c3fSmrg 18167ec681f3Smrgstatic void 18177ec681f3Smrgwrite_label(FILE *file, const struct intel_device_info *devinfo, 18187ec681f3Smrg const struct brw_label *root_label, 18197ec681f3Smrg int offset, int jump) 18207ec681f3Smrg{ 18217ec681f3Smrg if (root_label != NULL) { 18227ec681f3Smrg int to_bytes_scale = sizeof(brw_inst) / brw_jump_scale(devinfo); 18237ec681f3Smrg const struct brw_label *label = 18247ec681f3Smrg brw_find_label(root_label, offset + jump * to_bytes_scale); 18257ec681f3Smrg if (label != NULL) { 18267ec681f3Smrg format(file, " LABEL%d", label->number); 18277ec681f3Smrg } 18287ec681f3Smrg } 18297ec681f3Smrg} 18307ec681f3Smrg 18317ec681f3Smrgstatic void 18327ec681f3Smrglsc_disassemble_ex_desc(const struct intel_device_info *devinfo, 18337ec681f3Smrg uint32_t imm_desc, 18347ec681f3Smrg uint32_t imm_ex_desc, 18357ec681f3Smrg FILE *file) 18367ec681f3Smrg{ 18377ec681f3Smrg const unsigned addr_type = lsc_msg_desc_addr_type(devinfo, imm_desc); 18387ec681f3Smrg switch (addr_type) { 18397ec681f3Smrg case LSC_ADDR_SURFTYPE_FLAT: 18407ec681f3Smrg format(file, "base_offset %u ", 18417ec681f3Smrg lsc_flat_ex_desc_base_offset(devinfo, imm_ex_desc)); 18427ec681f3Smrg break; 18437ec681f3Smrg case LSC_ADDR_SURFTYPE_BSS: 18447ec681f3Smrg case LSC_ADDR_SURFTYPE_SS: 18457ec681f3Smrg format(file, "surface_state_index %u ", 18467ec681f3Smrg lsc_bss_ex_desc_index(devinfo, imm_ex_desc)); 18477ec681f3Smrg break; 18487ec681f3Smrg case LSC_ADDR_SURFTYPE_BTI: 18497ec681f3Smrg format(file, "BTI %u ", 18507ec681f3Smrg lsc_bti_ex_desc_index(devinfo, imm_ex_desc)); 18517ec681f3Smrg format(file, "base_offset %u ", 18527ec681f3Smrg lsc_bti_ex_desc_base_offset(devinfo, imm_ex_desc)); 18537ec681f3Smrg break; 18547ec681f3Smrg default: 18557ec681f3Smrg format(file, "unsupported address surface type %d", addr_type); 18567ec681f3Smrg break; 18577ec681f3Smrg } 18587ec681f3Smrg} 18597ec681f3Smrg 18607ec681f3Smrgstatic inline bool 18617ec681f3Smrgbrw_sfid_is_lsc(unsigned sfid) 18627ec681f3Smrg{ 18637ec681f3Smrg switch (sfid) { 18647ec681f3Smrg case GFX12_SFID_UGM: 18657ec681f3Smrg case GFX12_SFID_SLM: 18667ec681f3Smrg case GFX12_SFID_TGM: 18677ec681f3Smrg return true; 18687ec681f3Smrg default: 18697ec681f3Smrg break; 18707ec681f3Smrg } 18717ec681f3Smrg 18727ec681f3Smrg return false; 18737ec681f3Smrg} 18747ec681f3Smrg 187501e04c3fSmrgint 18767ec681f3Smrgbrw_disassemble_inst(FILE *file, const struct intel_device_info *devinfo, 18777ec681f3Smrg const brw_inst *inst, bool is_compacted, 18787ec681f3Smrg int offset, const struct brw_label *root_label) 187901e04c3fSmrg{ 188001e04c3fSmrg int err = 0; 188101e04c3fSmrg int space = 0; 188201e04c3fSmrg 188301e04c3fSmrg const enum opcode opcode = brw_inst_opcode(devinfo, inst); 188401e04c3fSmrg const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode); 188501e04c3fSmrg 188601e04c3fSmrg if (brw_inst_pred_control(devinfo, inst)) { 188701e04c3fSmrg string(file, "("); 188801e04c3fSmrg err |= control(file, "predicate inverse", pred_inv, 188901e04c3fSmrg brw_inst_pred_inv(devinfo, inst), NULL); 18909f464c52Smaya format(file, "f%"PRIu64".%"PRIu64, 18917ec681f3Smrg devinfo->ver >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0, 18929f464c52Smaya brw_inst_flag_subreg_nr(devinfo, inst)); 189301e04c3fSmrg if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { 189401e04c3fSmrg err |= control(file, "predicate control align1", pred_ctrl_align1, 189501e04c3fSmrg brw_inst_pred_control(devinfo, inst), NULL); 189601e04c3fSmrg } else { 189701e04c3fSmrg err |= control(file, "predicate control align16", pred_ctrl_align16, 189801e04c3fSmrg brw_inst_pred_control(devinfo, inst), NULL); 189901e04c3fSmrg } 190001e04c3fSmrg string(file, ") "); 190101e04c3fSmrg } 190201e04c3fSmrg 190301e04c3fSmrg err |= print_opcode(file, devinfo, opcode); 19047ec681f3Smrg 19057ec681f3Smrg if (!is_send(opcode)) 19067ec681f3Smrg err |= control(file, "saturate", saturate, brw_inst_saturate(devinfo, inst), 19077ec681f3Smrg NULL); 190801e04c3fSmrg 190901e04c3fSmrg err |= control(file, "debug control", debug_ctrl, 191001e04c3fSmrg brw_inst_debug_control(devinfo, inst), NULL); 191101e04c3fSmrg 191201e04c3fSmrg if (opcode == BRW_OPCODE_MATH) { 191301e04c3fSmrg string(file, " "); 191401e04c3fSmrg err |= control(file, "function", math_function, 191501e04c3fSmrg brw_inst_math_function(devinfo, inst), NULL); 19167ec681f3Smrg 19177ec681f3Smrg } else if (opcode == BRW_OPCODE_SYNC) { 19187ec681f3Smrg string(file, " "); 19197ec681f3Smrg err |= control(file, "function", sync_function, 19207ec681f3Smrg brw_inst_cond_modifier(devinfo, inst), NULL); 19217ec681f3Smrg 19229f464c52Smaya } else if (!is_send(opcode)) { 192301e04c3fSmrg err |= control(file, "conditional modifier", conditional_modifier, 192401e04c3fSmrg brw_inst_cond_modifier(devinfo, inst), NULL); 192501e04c3fSmrg 192601e04c3fSmrg /* If we're using the conditional modifier, print which flags reg is 19277ec681f3Smrg * used for it. Note that on gfx6+, the embedded-condition SEL and 192801e04c3fSmrg * control flow doesn't update flags. 192901e04c3fSmrg */ 193001e04c3fSmrg if (brw_inst_cond_modifier(devinfo, inst) && 19317ec681f3Smrg (devinfo->ver < 6 || (opcode != BRW_OPCODE_SEL && 193201e04c3fSmrg opcode != BRW_OPCODE_CSEL && 193301e04c3fSmrg opcode != BRW_OPCODE_IF && 193401e04c3fSmrg opcode != BRW_OPCODE_WHILE))) { 19359f464c52Smaya format(file, ".f%"PRIu64".%"PRIu64, 19367ec681f3Smrg devinfo->ver >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0, 19379f464c52Smaya brw_inst_flag_subreg_nr(devinfo, inst)); 193801e04c3fSmrg } 193901e04c3fSmrg } 194001e04c3fSmrg 194101e04c3fSmrg if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) { 194201e04c3fSmrg string(file, "("); 194301e04c3fSmrg err |= control(file, "execution size", exec_size, 194401e04c3fSmrg brw_inst_exec_size(devinfo, inst), NULL); 194501e04c3fSmrg string(file, ")"); 194601e04c3fSmrg } 194701e04c3fSmrg 19487ec681f3Smrg if (opcode == BRW_OPCODE_SEND && devinfo->ver < 6) 194901e04c3fSmrg format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst)); 195001e04c3fSmrg 19517ec681f3Smrg if (brw_has_uip(devinfo, opcode)) { 195201e04c3fSmrg /* Instructions that have UIP also have JIP. */ 195301e04c3fSmrg pad(file, 16); 19547ec681f3Smrg string(file, "JIP: "); 19557ec681f3Smrg write_label(file, devinfo, root_label, offset, brw_inst_jip(devinfo, inst)); 19567ec681f3Smrg 19577ec681f3Smrg pad(file, 38); 19587ec681f3Smrg string(file, "UIP: "); 19597ec681f3Smrg write_label(file, devinfo, root_label, offset, brw_inst_uip(devinfo, inst)); 19607ec681f3Smrg } else if (brw_has_jip(devinfo, opcode)) { 19617ec681f3Smrg int jip; 19627ec681f3Smrg if (devinfo->ver >= 7) { 19637ec681f3Smrg jip = brw_inst_jip(devinfo, inst); 196401e04c3fSmrg } else { 19657ec681f3Smrg jip = brw_inst_gfx6_jump_count(devinfo, inst); 196601e04c3fSmrg } 19677ec681f3Smrg 19687ec681f3Smrg pad(file, 16); 19697ec681f3Smrg string(file, "JIP: "); 19707ec681f3Smrg write_label(file, devinfo, root_label, offset, jip); 19717ec681f3Smrg } else if (devinfo->ver < 6 && (opcode == BRW_OPCODE_BREAK || 197201e04c3fSmrg opcode == BRW_OPCODE_CONTINUE || 197301e04c3fSmrg opcode == BRW_OPCODE_ELSE)) { 197401e04c3fSmrg pad(file, 16); 19757ec681f3Smrg format(file, "Jump: %d", brw_inst_gfx4_jump_count(devinfo, inst)); 197601e04c3fSmrg pad(file, 32); 19777ec681f3Smrg format(file, "Pop: %"PRIu64, brw_inst_gfx4_pop_count(devinfo, inst)); 19787ec681f3Smrg } else if (devinfo->ver < 6 && (opcode == BRW_OPCODE_IF || 197901e04c3fSmrg opcode == BRW_OPCODE_IFF || 19807ec681f3Smrg opcode == BRW_OPCODE_HALT || 19817ec681f3Smrg opcode == BRW_OPCODE_WHILE)) { 198201e04c3fSmrg pad(file, 16); 19837ec681f3Smrg format(file, "Jump: %d", brw_inst_gfx4_jump_count(devinfo, inst)); 19847ec681f3Smrg } else if (devinfo->ver < 6 && opcode == BRW_OPCODE_ENDIF) { 198501e04c3fSmrg pad(file, 16); 19867ec681f3Smrg format(file, "Pop: %"PRIu64, brw_inst_gfx4_pop_count(devinfo, inst)); 198701e04c3fSmrg } else if (opcode == BRW_OPCODE_JMPI) { 198801e04c3fSmrg pad(file, 16); 198901e04c3fSmrg err |= src1(file, devinfo, inst); 199001e04c3fSmrg } else if (desc && desc->nsrc == 3) { 199101e04c3fSmrg pad(file, 16); 199201e04c3fSmrg err |= dest_3src(file, devinfo, inst); 199301e04c3fSmrg 199401e04c3fSmrg pad(file, 32); 199501e04c3fSmrg err |= src0_3src(file, devinfo, inst); 199601e04c3fSmrg 199701e04c3fSmrg pad(file, 48); 199801e04c3fSmrg err |= src1_3src(file, devinfo, inst); 199901e04c3fSmrg 200001e04c3fSmrg pad(file, 64); 200101e04c3fSmrg err |= src2_3src(file, devinfo, inst); 200201e04c3fSmrg } else if (desc) { 200301e04c3fSmrg if (desc->ndst > 0) { 200401e04c3fSmrg pad(file, 16); 200501e04c3fSmrg err |= dest(file, devinfo, inst); 200601e04c3fSmrg } 200701e04c3fSmrg 200801e04c3fSmrg if (desc->nsrc > 0) { 200901e04c3fSmrg pad(file, 32); 201001e04c3fSmrg err |= src0(file, devinfo, inst); 201101e04c3fSmrg } 201201e04c3fSmrg 201301e04c3fSmrg if (desc->nsrc > 1) { 201401e04c3fSmrg pad(file, 48); 201501e04c3fSmrg err |= src1(file, devinfo, inst); 201601e04c3fSmrg } 201701e04c3fSmrg } 201801e04c3fSmrg 20199f464c52Smaya if (is_send(opcode)) { 202001e04c3fSmrg enum brw_message_target sfid = brw_inst_sfid(devinfo, inst); 202101e04c3fSmrg 20229f464c52Smaya bool has_imm_desc = false, has_imm_ex_desc = false; 20239f464c52Smaya uint32_t imm_desc = 0, imm_ex_desc = 0; 20249f464c52Smaya if (is_split_send(devinfo, opcode)) { 202501e04c3fSmrg pad(file, 64); 20269f464c52Smaya if (brw_inst_send_sel_reg32_desc(devinfo, inst)) { 20279f464c52Smaya /* show the indirect descriptor source */ 20287ec681f3Smrg err |= src_send_desc_ia(file, devinfo, 0); 20299f464c52Smaya } else { 20309f464c52Smaya has_imm_desc = true; 20319f464c52Smaya imm_desc = brw_inst_send_desc(devinfo, inst); 20329f464c52Smaya fprintf(file, "0x%08"PRIx32, imm_desc); 20339f464c52Smaya } 20349f464c52Smaya 20359f464c52Smaya pad(file, 80); 20369f464c52Smaya if (brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) { 20379f464c52Smaya /* show the indirect descriptor source */ 20387ec681f3Smrg err |= src_send_desc_ia(file, devinfo, 20397ec681f3Smrg brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst)); 20409f464c52Smaya } else { 20419f464c52Smaya has_imm_ex_desc = true; 20427ec681f3Smrg imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst); 20439f464c52Smaya fprintf(file, "0x%08"PRIx32, imm_ex_desc); 20449f464c52Smaya } 204501e04c3fSmrg } else { 20469f464c52Smaya if (brw_inst_src1_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE) { 20479f464c52Smaya /* show the indirect descriptor source */ 20489f464c52Smaya pad(file, 48); 20499f464c52Smaya err |= src1(file, devinfo, inst); 20509f464c52Smaya pad(file, 64); 20519f464c52Smaya } else { 20529f464c52Smaya has_imm_desc = true; 20539f464c52Smaya imm_desc = brw_inst_send_desc(devinfo, inst); 20549f464c52Smaya pad(file, 48); 20559f464c52Smaya } 205601e04c3fSmrg 20579f464c52Smaya /* Print message descriptor as immediate source */ 20589f464c52Smaya fprintf(file, "0x%08"PRIx64, inst->data[1] >> 32); 20599f464c52Smaya } 206001e04c3fSmrg 206101e04c3fSmrg newline(file); 206201e04c3fSmrg pad(file, 16); 206301e04c3fSmrg space = 0; 206401e04c3fSmrg 206501e04c3fSmrg fprintf(file, " "); 20667ec681f3Smrg err |= control(file, "SFID", devinfo->ver >= 6 ? gfx6_sfid : gfx4_sfid, 206701e04c3fSmrg sfid, &space); 206801e04c3fSmrg string(file, " MsgDesc:"); 206901e04c3fSmrg 20709f464c52Smaya if (!has_imm_desc) { 207101e04c3fSmrg format(file, " indirect"); 207201e04c3fSmrg } else { 20737ec681f3Smrg bool unsupported = false; 207401e04c3fSmrg switch (sfid) { 207501e04c3fSmrg case BRW_SFID_MATH: 207601e04c3fSmrg err |= control(file, "math function", math_function, 207701e04c3fSmrg brw_inst_math_msg_function(devinfo, inst), &space); 207801e04c3fSmrg err |= control(file, "math saturate", math_saturate, 207901e04c3fSmrg brw_inst_math_msg_saturate(devinfo, inst), &space); 208001e04c3fSmrg err |= control(file, "math signed", math_signed, 208101e04c3fSmrg brw_inst_math_msg_signed_int(devinfo, inst), &space); 208201e04c3fSmrg err |= control(file, "math scalar", math_scalar, 208301e04c3fSmrg brw_inst_math_msg_data_type(devinfo, inst), &space); 208401e04c3fSmrg err |= control(file, "math precision", math_precision, 208501e04c3fSmrg brw_inst_math_msg_precision(devinfo, inst), &space); 208601e04c3fSmrg break; 208701e04c3fSmrg case BRW_SFID_SAMPLER: 20887ec681f3Smrg if (devinfo->ver >= 5) { 20897ec681f3Smrg err |= control(file, "sampler message", gfx5_sampler_msg_type, 20909f464c52Smaya brw_sampler_desc_msg_type(devinfo, imm_desc), 20919f464c52Smaya &space); 20927ec681f3Smrg err |= control(file, "sampler simd mode", gfx5_sampler_simd_mode, 20939f464c52Smaya brw_sampler_desc_simd_mode(devinfo, imm_desc), 20949f464c52Smaya &space); 20959f464c52Smaya format(file, " Surface = %u Sampler = %u", 20969f464c52Smaya brw_sampler_desc_binding_table_index(devinfo, imm_desc), 20979f464c52Smaya brw_sampler_desc_sampler(devinfo, imm_desc)); 209801e04c3fSmrg } else { 20997ec681f3Smrg format(file, " (bti %u, sampler %u, msg_type %u, ", 21009f464c52Smaya brw_sampler_desc_binding_table_index(devinfo, imm_desc), 21019f464c52Smaya brw_sampler_desc_sampler(devinfo, imm_desc), 21029f464c52Smaya brw_sampler_desc_msg_type(devinfo, imm_desc)); 210301e04c3fSmrg if (!devinfo->is_g4x) { 210401e04c3fSmrg err |= control(file, "sampler target format", 210501e04c3fSmrg sampler_target_format, 21069f464c52Smaya brw_sampler_desc_return_format(devinfo, imm_desc), 21079f464c52Smaya NULL); 210801e04c3fSmrg } 210901e04c3fSmrg string(file, ")"); 211001e04c3fSmrg } 211101e04c3fSmrg break; 21127ec681f3Smrg case GFX6_SFID_DATAPORT_SAMPLER_CACHE: 21137ec681f3Smrg case GFX6_SFID_DATAPORT_CONSTANT_CACHE: 21147ec681f3Smrg /* aka BRW_SFID_DATAPORT_READ on Gfx4-5 */ 21157ec681f3Smrg if (devinfo->ver >= 6) { 21167ec681f3Smrg format(file, " (bti %u, msg_ctrl %u, msg_type %u, write_commit %u)", 21179f464c52Smaya brw_dp_desc_binding_table_index(devinfo, imm_desc), 21189f464c52Smaya brw_dp_desc_msg_control(devinfo, imm_desc), 21199f464c52Smaya brw_dp_desc_msg_type(devinfo, imm_desc), 21207ec681f3Smrg devinfo->ver >= 7 ? 0u : 21219f464c52Smaya brw_dp_write_desc_write_commit(devinfo, imm_desc)); 212201e04c3fSmrg } else { 21237ec681f3Smrg bool is_965 = devinfo->ver == 4 && !devinfo->is_g4x; 212401e04c3fSmrg err |= control(file, "DP read message type", 21257ec681f3Smrg is_965 ? gfx4_dp_read_port_msg_type : 212601e04c3fSmrg g45_dp_read_port_msg_type, 21279f464c52Smaya brw_dp_read_desc_msg_type(devinfo, imm_desc), 212801e04c3fSmrg &space); 212901e04c3fSmrg 21309f464c52Smaya format(file, " MsgCtrl = 0x%u", 21319f464c52Smaya brw_dp_read_desc_msg_control(devinfo, imm_desc)); 213201e04c3fSmrg 21339f464c52Smaya format(file, " Surface = %u", 21349f464c52Smaya brw_dp_desc_binding_table_index(devinfo, imm_desc)); 213501e04c3fSmrg } 213601e04c3fSmrg break; 213701e04c3fSmrg 21387ec681f3Smrg case GFX6_SFID_DATAPORT_RENDER_CACHE: { 21397ec681f3Smrg /* aka BRW_SFID_DATAPORT_WRITE on Gfx4-5 */ 21407ec681f3Smrg unsigned msg_type = brw_fb_write_desc_msg_type(devinfo, imm_desc); 214101e04c3fSmrg 214201e04c3fSmrg err |= control(file, "DP rc message type", 214301e04c3fSmrg dp_rc_msg_type(devinfo), msg_type, &space); 214401e04c3fSmrg 214501e04c3fSmrg bool is_rt_write = msg_type == 21467ec681f3Smrg (devinfo->ver >= 6 ? GFX6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 214701e04c3fSmrg : BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE); 214801e04c3fSmrg 214901e04c3fSmrg if (is_rt_write) { 215001e04c3fSmrg err |= control(file, "RT message type", m_rt_write_subtype, 215101e04c3fSmrg brw_inst_rt_message_type(devinfo, inst), &space); 21527ec681f3Smrg if (devinfo->ver >= 6 && brw_inst_rt_slot_group(devinfo, inst)) 215301e04c3fSmrg string(file, " Hi"); 21547ec681f3Smrg if (brw_fb_write_desc_last_render_target(devinfo, imm_desc)) 215501e04c3fSmrg string(file, " LastRT"); 21567ec681f3Smrg if (devinfo->ver >= 10 && 21577ec681f3Smrg brw_fb_write_desc_coarse_write(devinfo, imm_desc)) 21587ec681f3Smrg string(file, " CoarseWrite"); 21597ec681f3Smrg if (devinfo->ver < 7 && 21607ec681f3Smrg brw_fb_write_desc_write_commit(devinfo, imm_desc)) 216101e04c3fSmrg string(file, " WriteCommit"); 216201e04c3fSmrg } else { 21639f464c52Smaya format(file, " MsgCtrl = 0x%u", 21647ec681f3Smrg brw_fb_write_desc_msg_control(devinfo, imm_desc)); 216501e04c3fSmrg } 216601e04c3fSmrg 21679f464c52Smaya format(file, " Surface = %u", 21687ec681f3Smrg brw_fb_desc_binding_table_index(devinfo, imm_desc)); 216901e04c3fSmrg break; 217001e04c3fSmrg } 217101e04c3fSmrg 217201e04c3fSmrg case BRW_SFID_URB: { 217301e04c3fSmrg unsigned opcode = brw_inst_urb_opcode(devinfo, inst); 217401e04c3fSmrg 21757ec681f3Smrg format(file, " offset %"PRIu64, brw_inst_urb_global_offset(devinfo, inst)); 217601e04c3fSmrg 217701e04c3fSmrg space = 1; 217801e04c3fSmrg 217901e04c3fSmrg err |= control(file, "urb opcode", 21807ec681f3Smrg devinfo->ver >= 7 ? gfx7_urb_opcode 21817ec681f3Smrg : gfx5_urb_opcode, 218201e04c3fSmrg opcode, &space); 218301e04c3fSmrg 21847ec681f3Smrg if (devinfo->ver >= 7 && 218501e04c3fSmrg brw_inst_urb_per_slot_offset(devinfo, inst)) { 218601e04c3fSmrg string(file, " per-slot"); 218701e04c3fSmrg } 218801e04c3fSmrg 21897ec681f3Smrg if (opcode == GFX8_URB_OPCODE_SIMD8_WRITE || 21907ec681f3Smrg opcode == GFX8_URB_OPCODE_SIMD8_READ) { 219101e04c3fSmrg if (brw_inst_urb_channel_mask_present(devinfo, inst)) 219201e04c3fSmrg string(file, " masked"); 21937ec681f3Smrg } else if (opcode != GFX125_URB_OPCODE_FENCE) { 219401e04c3fSmrg err |= control(file, "urb swizzle", urb_swizzle, 219501e04c3fSmrg brw_inst_urb_swizzle_control(devinfo, inst), 219601e04c3fSmrg &space); 219701e04c3fSmrg } 219801e04c3fSmrg 21997ec681f3Smrg if (devinfo->ver < 7) { 220001e04c3fSmrg err |= control(file, "urb allocate", urb_allocate, 220101e04c3fSmrg brw_inst_urb_allocate(devinfo, inst), &space); 220201e04c3fSmrg err |= control(file, "urb used", urb_used, 220301e04c3fSmrg brw_inst_urb_used(devinfo, inst), &space); 220401e04c3fSmrg } 22057ec681f3Smrg if (devinfo->ver < 8) { 220601e04c3fSmrg err |= control(file, "urb complete", urb_complete, 220701e04c3fSmrg brw_inst_urb_complete(devinfo, inst), &space); 220801e04c3fSmrg } 220901e04c3fSmrg break; 221001e04c3fSmrg } 221101e04c3fSmrg case BRW_SFID_THREAD_SPAWNER: 221201e04c3fSmrg break; 221301e04c3fSmrg 221401e04c3fSmrg case BRW_SFID_MESSAGE_GATEWAY: 221501e04c3fSmrg format(file, " (%s)", 22167ec681f3Smrg gfx7_gateway_subfuncid[brw_inst_gateway_subfuncid(devinfo, inst)]); 221701e04c3fSmrg break; 221801e04c3fSmrg 22197ec681f3Smrg case GFX12_SFID_SLM: 22207ec681f3Smrg case GFX12_SFID_TGM: 22217ec681f3Smrg case GFX12_SFID_UGM: { 22227ec681f3Smrg assert(devinfo->has_lsc); 22237ec681f3Smrg format(file, " ("); 22247ec681f3Smrg const enum lsc_opcode op = lsc_msg_desc_opcode(devinfo, imm_desc); 22257ec681f3Smrg err |= control(file, "operation", lsc_operation, 22267ec681f3Smrg op, &space); 22277ec681f3Smrg format(file, ","); 22287ec681f3Smrg err |= control(file, "addr_size", lsc_addr_size, 22297ec681f3Smrg lsc_msg_desc_addr_size(devinfo, imm_desc), 22307ec681f3Smrg &space); 22317ec681f3Smrg 22327ec681f3Smrg if (op == LSC_OP_FENCE) { 22337ec681f3Smrg format(file, ","); 22347ec681f3Smrg err |= control(file, "scope", lsc_fence_scope, 22357ec681f3Smrg lsc_fence_msg_desc_scope(devinfo, imm_desc), 22367ec681f3Smrg &space); 22377ec681f3Smrg format(file, ","); 22387ec681f3Smrg err |= control(file, "flush_type", lsc_flush_type, 22397ec681f3Smrg lsc_fence_msg_desc_flush_type(devinfo, imm_desc), 22407ec681f3Smrg &space); 22417ec681f3Smrg format(file, ","); 22427ec681f3Smrg err |= control(file, "backup_mode_fence_routing", 22437ec681f3Smrg lsc_backup_fence_routing, 22447ec681f3Smrg lsc_fence_msg_desc_backup_routing(devinfo, imm_desc), 22457ec681f3Smrg &space); 22467ec681f3Smrg } else { 22477ec681f3Smrg format(file, ","); 22487ec681f3Smrg err |= control(file, "data_size", lsc_data_size, 22497ec681f3Smrg lsc_msg_desc_data_size(devinfo, imm_desc), 22507ec681f3Smrg &space); 22517ec681f3Smrg format(file, ","); 22527ec681f3Smrg if (lsc_opcode_has_cmask(op)) { 22537ec681f3Smrg err |= control(file, "component_mask", 22547ec681f3Smrg lsc_cmask_str, 22557ec681f3Smrg lsc_msg_desc_cmask(devinfo, imm_desc), 22567ec681f3Smrg &space); 22577ec681f3Smrg } else { 22587ec681f3Smrg err |= control(file, "vector_size", 22597ec681f3Smrg lsc_vect_size_str, 22607ec681f3Smrg lsc_msg_desc_vect_size(devinfo, imm_desc), 22617ec681f3Smrg &space); 22627ec681f3Smrg if (lsc_msg_desc_transpose(devinfo, imm_desc)) 22637ec681f3Smrg format(file, ", transpose"); 22647ec681f3Smrg } 22657ec681f3Smrg switch(op) { 22667ec681f3Smrg case LSC_OP_LOAD_CMASK: 22677ec681f3Smrg case LSC_OP_LOAD: 22687ec681f3Smrg format(file, ","); 22697ec681f3Smrg err |= control(file, "cache_load", 22707ec681f3Smrg lsc_cache_load, 22717ec681f3Smrg lsc_msg_desc_cache_ctrl(devinfo, imm_desc), 22727ec681f3Smrg &space); 22737ec681f3Smrg break; 22747ec681f3Smrg default: 22757ec681f3Smrg format(file, ","); 22767ec681f3Smrg err |= control(file, "cache_store", 22777ec681f3Smrg lsc_cache_store, 22787ec681f3Smrg lsc_msg_desc_cache_ctrl(devinfo, imm_desc), 22797ec681f3Smrg &space); 22807ec681f3Smrg break; 22817ec681f3Smrg } 22827ec681f3Smrg } 22837ec681f3Smrg format(file, " dst_len = %u,", lsc_msg_desc_dest_len(devinfo, imm_desc)); 22847ec681f3Smrg format(file, " src0_len = %u,", lsc_msg_desc_src0_len(devinfo, imm_desc)); 22857ec681f3Smrg format(file, " src1_len = %d", brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc)); 22867ec681f3Smrg err |= control(file, "address_type", lsc_addr_surface_type, 22877ec681f3Smrg lsc_msg_desc_addr_type(devinfo, imm_desc), &space); 22887ec681f3Smrg format(file, " )"); 22897ec681f3Smrg break; 22907ec681f3Smrg } 22917ec681f3Smrg 22927ec681f3Smrg case GFX7_SFID_DATAPORT_DATA_CACHE: 22937ec681f3Smrg if (devinfo->ver >= 7) { 229401e04c3fSmrg format(file, " ("); 22957ec681f3Smrg space = 0; 229601e04c3fSmrg 229701e04c3fSmrg err |= control(file, "DP DC0 message type", 22987ec681f3Smrg dp_dc0_msg_type_gfx7, 22999f464c52Smaya brw_dp_desc_msg_type(devinfo, imm_desc), &space); 230001e04c3fSmrg 23017ec681f3Smrg format(file, ", bti %u, ", 23029f464c52Smaya brw_dp_desc_binding_table_index(devinfo, imm_desc)); 230301e04c3fSmrg 230401e04c3fSmrg switch (brw_inst_dp_msg_type(devinfo, inst)) { 23057ec681f3Smrg case GFX7_DATAPORT_DC_UNTYPED_ATOMIC_OP: 230601e04c3fSmrg control(file, "atomic op", aop, 23079f464c52Smaya brw_dp_desc_msg_control(devinfo, imm_desc) & 0xf, 23089f464c52Smaya &space); 230901e04c3fSmrg break; 23107ec681f3Smrg case GFX7_DATAPORT_DC_OWORD_BLOCK_READ: 23117ec681f3Smrg case GFX7_DATAPORT_DC_OWORD_BLOCK_WRITE: { 23127ec681f3Smrg unsigned msg_ctrl = brw_dp_desc_msg_control(devinfo, imm_desc); 23137ec681f3Smrg assert(dp_oword_block_rw[msg_ctrl & 7]); 23147ec681f3Smrg format(file, "owords = %s, aligned = %d", 23157ec681f3Smrg dp_oword_block_rw[msg_ctrl & 7], (msg_ctrl >> 3) & 3); 23167ec681f3Smrg break; 23177ec681f3Smrg } 231801e04c3fSmrg default: 23199f464c52Smaya format(file, "%u", 23209f464c52Smaya brw_dp_desc_msg_control(devinfo, imm_desc)); 232101e04c3fSmrg } 232201e04c3fSmrg format(file, ")"); 23237ec681f3Smrg } else { 23247ec681f3Smrg unsupported = true; 232501e04c3fSmrg } 23267ec681f3Smrg break; 232701e04c3fSmrg 232801e04c3fSmrg case HSW_SFID_DATAPORT_DATA_CACHE_1: { 23297ec681f3Smrg if (devinfo->ver >= 7) { 233001e04c3fSmrg format(file, " ("); 23317ec681f3Smrg space = 0; 233201e04c3fSmrg 23339f464c52Smaya unsigned msg_ctrl = brw_dp_desc_msg_control(devinfo, imm_desc); 233401e04c3fSmrg 233501e04c3fSmrg err |= control(file, "DP DC1 message type", 233601e04c3fSmrg dp_dc1_msg_type_hsw, 23379f464c52Smaya brw_dp_desc_msg_type(devinfo, imm_desc), &space); 233801e04c3fSmrg 23399f464c52Smaya format(file, ", Surface = %u, ", 23409f464c52Smaya brw_dp_desc_binding_table_index(devinfo, imm_desc)); 234101e04c3fSmrg 234201e04c3fSmrg switch (brw_inst_dp_msg_type(devinfo, inst)) { 234301e04c3fSmrg case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP: 234401e04c3fSmrg case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP: 234501e04c3fSmrg case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP: 234601e04c3fSmrg format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16); 23477ec681f3Smrg FALLTHROUGH; 234801e04c3fSmrg case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2: 234901e04c3fSmrg case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2: 235001e04c3fSmrg case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2: 23517ec681f3Smrg case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_OP: 23527ec681f3Smrg case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_INT_OP: 235301e04c3fSmrg control(file, "atomic op", aop, msg_ctrl & 0xf, &space); 235401e04c3fSmrg break; 235501e04c3fSmrg case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ: 235601e04c3fSmrg case HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_WRITE: 235701e04c3fSmrg case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_READ: 23589f464c52Smaya case HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE: 23597ec681f3Smrg case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_WRITE: 23607ec681f3Smrg case GFX8_DATAPORT_DC_PORT1_A64_UNTYPED_SURFACE_READ: { 236101e04c3fSmrg static const char *simd_modes[] = { "4x2", "16", "8" }; 236201e04c3fSmrg format(file, "SIMD%s, Mask = 0x%x", 236301e04c3fSmrg simd_modes[msg_ctrl >> 4], msg_ctrl & 0xf); 236401e04c3fSmrg break; 236501e04c3fSmrg } 23667ec681f3Smrg case GFX9_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_FLOAT_OP: 23677ec681f3Smrg case GFX9_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_FLOAT_OP: 23687ec681f3Smrg case GFX12_DATAPORT_DC_PORT1_A64_UNTYPED_ATOMIC_HALF_FLOAT_OP: 236901e04c3fSmrg format(file, "SIMD%d,", (msg_ctrl & (1 << 4)) ? 8 : 16); 237001e04c3fSmrg control(file, "atomic float op", aop_float, msg_ctrl & 0xf, 237101e04c3fSmrg &space); 237201e04c3fSmrg break; 23737ec681f3Smrg case GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_WRITE: 23747ec681f3Smrg case GFX9_DATAPORT_DC_PORT1_A64_OWORD_BLOCK_READ: 23757ec681f3Smrg assert(dp_oword_block_rw[msg_ctrl & 7]); 23767ec681f3Smrg format(file, "owords = %s, aligned = %d", 23777ec681f3Smrg dp_oword_block_rw[msg_ctrl & 7], (msg_ctrl >> 3) & 3); 23787ec681f3Smrg break; 237901e04c3fSmrg default: 238001e04c3fSmrg format(file, "0x%x", msg_ctrl); 238101e04c3fSmrg } 238201e04c3fSmrg format(file, ")"); 23837ec681f3Smrg } else { 23847ec681f3Smrg unsupported = true; 238501e04c3fSmrg } 23867ec681f3Smrg break; 238701e04c3fSmrg } 238801e04c3fSmrg 23897ec681f3Smrg case GFX7_SFID_PIXEL_INTERPOLATOR: 23907ec681f3Smrg if (devinfo->ver >= 7) { 239101e04c3fSmrg format(file, " (%s, %s, 0x%02"PRIx64")", 239201e04c3fSmrg brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp", 239301e04c3fSmrg pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)], 239401e04c3fSmrg brw_inst_pi_message_data(devinfo, inst)); 23957ec681f3Smrg } else { 23967ec681f3Smrg unsupported = true; 239701e04c3fSmrg } 23987ec681f3Smrg break; 23997ec681f3Smrg 24007ec681f3Smrg case GEN_RT_SFID_RAY_TRACE_ACCELERATOR: 24017ec681f3Smrg if (devinfo->has_ray_tracing) { 24027ec681f3Smrg format(file, " SIMD%d,", 24037ec681f3Smrg brw_rt_trace_ray_desc_exec_size(devinfo, imm_desc)); 24047ec681f3Smrg } else { 24057ec681f3Smrg unsupported = true; 24067ec681f3Smrg } 24077ec681f3Smrg break; 240801e04c3fSmrg 240901e04c3fSmrg default: 24107ec681f3Smrg unsupported = true; 241101e04c3fSmrg break; 241201e04c3fSmrg } 241301e04c3fSmrg 24147ec681f3Smrg if (unsupported) 24157ec681f3Smrg format(file, "unsupported shared function ID %d", sfid); 24167ec681f3Smrg 241701e04c3fSmrg if (space) 241801e04c3fSmrg string(file, " "); 241901e04c3fSmrg } 24207ec681f3Smrg if (brw_sfid_is_lsc(sfid)) { 24217ec681f3Smrg lsc_disassemble_ex_desc(devinfo, imm_desc, imm_ex_desc, file); 24227ec681f3Smrg } else { 24237ec681f3Smrg if (has_imm_desc) 24247ec681f3Smrg format(file, "mlen %u", brw_message_desc_mlen(devinfo, imm_desc)); 24257ec681f3Smrg if (has_imm_ex_desc) { 24267ec681f3Smrg format(file, " ex_mlen %u", 24277ec681f3Smrg brw_message_ex_desc_ex_mlen(devinfo, imm_ex_desc)); 24287ec681f3Smrg } 24297ec681f3Smrg if (has_imm_desc) 24307ec681f3Smrg format(file, " rlen %u", brw_message_desc_rlen(devinfo, imm_desc)); 24319f464c52Smaya } 243201e04c3fSmrg } 243301e04c3fSmrg pad(file, 64); 243401e04c3fSmrg if (opcode != BRW_OPCODE_NOP && opcode != BRW_OPCODE_NENOP) { 243501e04c3fSmrg string(file, "{"); 243601e04c3fSmrg space = 1; 243701e04c3fSmrg err |= control(file, "access mode", access_mode, 243801e04c3fSmrg brw_inst_access_mode(devinfo, inst), &space); 24397ec681f3Smrg if (devinfo->ver >= 6) { 244001e04c3fSmrg err |= control(file, "write enable control", wectrl, 244101e04c3fSmrg brw_inst_mask_control(devinfo, inst), &space); 244201e04c3fSmrg } else { 244301e04c3fSmrg err |= control(file, "mask control", mask_ctrl, 244401e04c3fSmrg brw_inst_mask_control(devinfo, inst), &space); 244501e04c3fSmrg } 244601e04c3fSmrg 24477ec681f3Smrg if (devinfo->ver < 12) { 24487ec681f3Smrg err |= control(file, "dependency control", dep_ctrl, 24497ec681f3Smrg ((brw_inst_no_dd_check(devinfo, inst) << 1) | 24507ec681f3Smrg brw_inst_no_dd_clear(devinfo, inst)), &space); 24517ec681f3Smrg } 24527ec681f3Smrg 24537ec681f3Smrg if (devinfo->ver >= 6) 245401e04c3fSmrg err |= qtr_ctrl(file, devinfo, inst); 245501e04c3fSmrg else { 245601e04c3fSmrg if (brw_inst_qtr_control(devinfo, inst) == BRW_COMPRESSION_COMPRESSED && 245701e04c3fSmrg desc && desc->ndst > 0 && 245801e04c3fSmrg brw_inst_dst_reg_file(devinfo, inst) == BRW_MESSAGE_REGISTER_FILE && 245901e04c3fSmrg brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) { 246001e04c3fSmrg format(file, " compr4"); 246101e04c3fSmrg } else { 246201e04c3fSmrg err |= control(file, "compression control", compr_ctrl, 246301e04c3fSmrg brw_inst_qtr_control(devinfo, inst), &space); 246401e04c3fSmrg } 246501e04c3fSmrg } 246601e04c3fSmrg 24677ec681f3Smrg if (devinfo->ver >= 12) 24687ec681f3Smrg err |= swsb(file, devinfo, inst); 24697ec681f3Smrg 247001e04c3fSmrg err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space); 247101e04c3fSmrg err |= control(file, "thread control", thread_ctrl, 24727ec681f3Smrg (devinfo->ver >= 12 ? brw_inst_atomic_control(devinfo, inst) : 24737ec681f3Smrg brw_inst_thread_control(devinfo, inst)), 24747ec681f3Smrg &space); 247501e04c3fSmrg if (has_branch_ctrl(devinfo, opcode)) { 247601e04c3fSmrg err |= control(file, "branch ctrl", branch_ctrl, 247701e04c3fSmrg brw_inst_branch_control(devinfo, inst), &space); 24787ec681f3Smrg } else if (devinfo->ver >= 6) { 247901e04c3fSmrg err |= control(file, "acc write control", accwr, 248001e04c3fSmrg brw_inst_acc_wr_control(devinfo, inst), &space); 248101e04c3fSmrg } 24829f464c52Smaya if (is_send(opcode)) 248301e04c3fSmrg err |= control(file, "end of thread", end_of_thread, 248401e04c3fSmrg brw_inst_eot(devinfo, inst), &space); 248501e04c3fSmrg if (space) 248601e04c3fSmrg string(file, " "); 248701e04c3fSmrg string(file, "}"); 248801e04c3fSmrg } 248901e04c3fSmrg string(file, ";"); 249001e04c3fSmrg newline(file); 249101e04c3fSmrg return err; 249201e04c3fSmrg} 2493