1/************************************************************************** 2 * 3 * Copyright 2003 VMware, Inc. 4 * Copyright 2009 Intel Corporation. 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation the rights to use, copy, modify, merge, publish, 11 * distribute, sub license, and/or sell copies of the Software, and to 12 * permit persons to whom the Software is furnished to do so, subject to 13 * the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial portions 17 * of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 **************************************************************************/ 28 29#include "main/glheader.h" 30#include "main/mtypes.h" 31#include "main/condrender.h" 32#include "swrast/swrast.h" 33#include "drivers/common/meta.h" 34 35#include "intel_context.h" 36#include "intel_blit.h" 37#include "intel_clear.h" 38#include "intel_fbo.h" 39#include "intel_regions.h" 40 41#define FILE_DEBUG_FLAG DEBUG_BLIT 42 43static const char *buffer_names[] = { 44 [BUFFER_FRONT_LEFT] = "front", 45 [BUFFER_BACK_LEFT] = "back", 46 [BUFFER_FRONT_RIGHT] = "front right", 47 [BUFFER_BACK_RIGHT] = "back right", 48 [BUFFER_DEPTH] = "depth", 49 [BUFFER_STENCIL] = "stencil", 50 [BUFFER_ACCUM] = "accum", 51 [BUFFER_COLOR0] = "color0", 52 [BUFFER_COLOR1] = "color1", 53 [BUFFER_COLOR2] = "color2", 54 [BUFFER_COLOR3] = "color3", 55 [BUFFER_COLOR4] = "color4", 56 [BUFFER_COLOR5] = "color5", 57 [BUFFER_COLOR6] = "color6", 58 [BUFFER_COLOR7] = "color7", 59}; 60 61static void 62debug_mask(const char *name, GLbitfield mask) 63{ 64 GLuint i; 65 66 if (unlikely(INTEL_DEBUG & DEBUG_BLIT)) { 67 DBG("%s clear:", name); 68 for (i = 0; i < BUFFER_COUNT; i++) { 69 if (mask & (1 << i)) 70 DBG(" %s", buffer_names[i]); 71 } 72 DBG("\n"); 73 } 74} 75 76/** 77 * Called by ctx->Driver.Clear. 78 */ 79static void 80intelClear(struct gl_context *ctx, GLbitfield mask) 81{ 82 struct intel_context *intel = intel_context(ctx); 83 GLbitfield tri_mask = 0; 84 GLbitfield blit_mask = 0; 85 GLbitfield swrast_mask = 0; 86 struct gl_framebuffer *fb = ctx->DrawBuffer; 87 struct intel_renderbuffer *irb; 88 int i; 89 90 if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) { 91 intel->front_buffer_dirty = true; 92 } 93 94 if (0) 95 fprintf(stderr, "%s\n", __func__); 96 97 /* Get SW clears out of the way: Anything without an intel_renderbuffer */ 98 for (i = 0; i < BUFFER_COUNT; i++) { 99 if (!(mask & (1 << i))) 100 continue; 101 102 irb = intel_get_renderbuffer(fb, i); 103 if (unlikely(!irb)) { 104 swrast_mask |= (1 << i); 105 mask &= ~(1 << i); 106 } 107 } 108 if (unlikely(swrast_mask)) { 109 debug_mask("swrast", swrast_mask); 110 _swrast_Clear(ctx, swrast_mask); 111 } 112 113 /* HW color buffers (front, back, aux, generic FBO, etc) */ 114 if (GET_COLORMASK(ctx->Color.ColorMask, 0) == 0xf) { 115 /* clear all R,G,B,A */ 116 blit_mask |= (mask & BUFFER_BITS_COLOR); 117 } 118 else { 119 /* glColorMask in effect */ 120 tri_mask |= (mask & BUFFER_BITS_COLOR); 121 } 122 123 /* Make sure we have up to date buffers before we start looking at 124 * the tiling bits to determine how to clear. */ 125 intel_prepare_render(intel); 126 127 /* HW stencil */ 128 if (mask & BUFFER_BIT_STENCIL) { 129 const struct intel_region *stencilRegion 130 = intel_get_rb_region(fb, BUFFER_STENCIL); 131 if (stencilRegion) { 132 /* have hw stencil */ 133 if (stencilRegion->tiling == I915_TILING_Y || 134 (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) { 135 /* We have to use the 3D engine if we're clearing a partial mask 136 * of the stencil buffer, or if we're on a 965 which has a tiled 137 * depth/stencil buffer in a layout we can't blit to. 138 */ 139 tri_mask |= BUFFER_BIT_STENCIL; 140 } 141 else { 142 /* clearing all stencil bits, use blitting */ 143 blit_mask |= BUFFER_BIT_STENCIL; 144 } 145 } 146 } 147 148 /* HW depth */ 149 if (mask & BUFFER_BIT_DEPTH) { 150 const struct intel_region *irb = intel_get_rb_region(fb, BUFFER_DEPTH); 151 152 /* clear depth with whatever method is used for stencil (see above) */ 153 if (irb->tiling == I915_TILING_Y || tri_mask & BUFFER_BIT_STENCIL) 154 tri_mask |= BUFFER_BIT_DEPTH; 155 else 156 blit_mask |= BUFFER_BIT_DEPTH; 157 } 158 159 /* If we're doing a tri pass for depth/stencil, include a likely color 160 * buffer with it. 161 */ 162 if (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) { 163 int color_bit = ffs(mask & BUFFER_BITS_COLOR); 164 if (color_bit != 0) { 165 tri_mask |= blit_mask & (1 << (color_bit - 1)); 166 blit_mask &= ~(1 << (color_bit - 1)); 167 } 168 } 169 170 /* Anything left, just use tris */ 171 tri_mask |= mask & ~blit_mask; 172 173 if (blit_mask) { 174 debug_mask("blit", blit_mask); 175 tri_mask |= intelClearWithBlit(ctx, blit_mask); 176 } 177 178 if (tri_mask) { 179 debug_mask("tri", tri_mask); 180 if (!ctx->Extensions.ARB_fragment_shader) 181 _mesa_meta_Clear(&intel->ctx, tri_mask); 182 else 183 _mesa_meta_glsl_Clear(&intel->ctx, tri_mask); 184 } 185} 186 187 188void 189intelInitClearFuncs(struct dd_function_table *functions) 190{ 191 functions->Clear = intelClear; 192} 193