17ec681f3Smrg/* 27ec681f3Smrg * Copyright (C) 2019 Connor Abbott <cwabbott0@gmail.com> 37ec681f3Smrg * Copyright (C) 2019 Lyude Paul <thatslyude@gmail.com> 47ec681f3Smrg * Copyright (C) 2019 Ryan Houdek <Sonicadvance1@gmail.com> 57ec681f3Smrg * 67ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 77ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 87ec681f3Smrg * to deal in the Software without restriction, including without limitation 97ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 107ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the 117ec681f3Smrg * Software is furnished to do so, subject to the following conditions: 127ec681f3Smrg * 137ec681f3Smrg * The above copyright notice and this permission notice (including the next 147ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 157ec681f3Smrg * Software. 167ec681f3Smrg * 177ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 187ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 197ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 207ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 217ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 227ec681f3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 237ec681f3Smrg * SOFTWARE. 247ec681f3Smrg */ 257ec681f3Smrg 267ec681f3Smrg#ifndef __bifrost_h__ 277ec681f3Smrg#define __bifrost_h__ 287ec681f3Smrg 297ec681f3Smrg#include <stdint.h> 307ec681f3Smrg#include <stdbool.h> 317ec681f3Smrg#include <assert.h> 327ec681f3Smrg 337ec681f3Smrg#define BIFROST_DBG_MSGS 0x0001 347ec681f3Smrg#define BIFROST_DBG_SHADERS 0x0002 357ec681f3Smrg#define BIFROST_DBG_SHADERDB 0x0004 367ec681f3Smrg#define BIFROST_DBG_VERBOSE 0x0008 377ec681f3Smrg#define BIFROST_DBG_INTERNAL 0x0010 387ec681f3Smrg#define BIFROST_DBG_NOSCHED 0x0020 397ec681f3Smrg#define BIFROST_DBG_INORDER 0x0040 407ec681f3Smrg#define BIFROST_DBG_NOVALIDATE 0x0080 417ec681f3Smrg#define BIFROST_DBG_NOOPT 0x0100 427ec681f3Smrg 437ec681f3Smrgextern int bifrost_debug; 447ec681f3Smrg 457ec681f3Smrgenum bifrost_message_type { 467ec681f3Smrg BIFROST_MESSAGE_NONE = 0, 477ec681f3Smrg BIFROST_MESSAGE_VARYING = 1, 487ec681f3Smrg BIFROST_MESSAGE_ATTRIBUTE = 2, 497ec681f3Smrg BIFROST_MESSAGE_TEX = 3, 507ec681f3Smrg BIFROST_MESSAGE_VARTEX = 4, 517ec681f3Smrg BIFROST_MESSAGE_LOAD = 5, 527ec681f3Smrg BIFROST_MESSAGE_STORE = 6, 537ec681f3Smrg BIFROST_MESSAGE_ATOMIC = 7, 547ec681f3Smrg BIFROST_MESSAGE_BARRIER = 8, 557ec681f3Smrg BIFROST_MESSAGE_BLEND = 9, 567ec681f3Smrg BIFROST_MESSAGE_TILE = 10, 577ec681f3Smrg /* type 11 reserved */ 587ec681f3Smrg BIFROST_MESSAGE_Z_STENCIL = 12, 597ec681f3Smrg BIFROST_MESSAGE_ATEST = 13, 607ec681f3Smrg BIFROST_MESSAGE_JOB = 14, 617ec681f3Smrg BIFROST_MESSAGE_64BIT = 15 627ec681f3Smrg}; 637ec681f3Smrg 647ec681f3Smrgenum bifrost_ftz { 657ec681f3Smrg BIFROST_FTZ_DISABLE = 0, 667ec681f3Smrg BIFROST_FTZ_DX11 = 1, 677ec681f3Smrg BIFROST_FTZ_ALWAYS = 2, 687ec681f3Smrg BIFROST_FTZ_ABRUPT = 3 697ec681f3Smrg}; 707ec681f3Smrg 717ec681f3Smrgenum bifrost_exceptions { 727ec681f3Smrg BIFROST_EXCEPTIONS_ENABLED = 0, 737ec681f3Smrg BIFROST_EXCEPTIONS_DISABLED = 1, 747ec681f3Smrg BIFROST_EXCEPTIONS_PRECISE_DIVISION = 2, 757ec681f3Smrg BIFROST_EXCEPTIONS_PRECISE_SQRT = 3, 767ec681f3Smrg}; 777ec681f3Smrg 787ec681f3Smrg/* Describes clause flow control, with respect to control flow and branch 797ec681f3Smrg * reconvergence. 807ec681f3Smrg * 817ec681f3Smrg * Control flow may be considered back-to-back (execute clauses back-to-back), 827ec681f3Smrg * non-back-to-back (switch warps after clause before the next clause), write 837ec681f3Smrg * elision (back-to-back and elide register slot #3 write from the clause), or 847ec681f3Smrg * end of shader. 857ec681f3Smrg * 867ec681f3Smrg * Branch reconvergence may be disabled, enabled unconditionally, or enabled 877ec681f3Smrg * based on the program counter. A clause requires reconvergence if it has a 887ec681f3Smrg * successor that can be executed without first executing the clause itself. 897ec681f3Smrg * Separate iterations of a loop are treated separately here, so it is also the 907ec681f3Smrg * case for a loop exit where the iteration count is not warp-invariant. 917ec681f3Smrg * 927ec681f3Smrg */ 937ec681f3Smrg 947ec681f3Smrgenum bifrost_flow { 957ec681f3Smrg /* End-of-shader */ 967ec681f3Smrg BIFROST_FLOW_END = 0, 977ec681f3Smrg 987ec681f3Smrg /* Non back-to-back, PC-encoded reconvergence */ 997ec681f3Smrg BIFROST_FLOW_NBTB_PC = 1, 1007ec681f3Smrg 1017ec681f3Smrg /* Non back-to-back, unconditional reconvergence */ 1027ec681f3Smrg BIFROST_FLOW_NBTB_UNCONDITIONAL = 2, 1037ec681f3Smrg 1047ec681f3Smrg /* Non back-to-back, no reconvergence */ 1057ec681f3Smrg BIFROST_FLOW_NBTB = 3, 1067ec681f3Smrg 1077ec681f3Smrg /* Back-to-back, unconditional reconvergence */ 1087ec681f3Smrg BIFROST_FLOW_BTB_UNCONDITIONAL = 4, 1097ec681f3Smrg 1107ec681f3Smrg /* Back-to-back, no reconvergence */ 1117ec681f3Smrg BIFROST_FLOW_BTB_NONE = 5, 1127ec681f3Smrg 1137ec681f3Smrg /* Write elision, unconditional reconvergence */ 1147ec681f3Smrg BIFROST_FLOW_WE_UNCONDITIONAL = 6, 1157ec681f3Smrg 1167ec681f3Smrg /* Write elision, no reconvergence */ 1177ec681f3Smrg BIFROST_FLOW_WE = 7, 1187ec681f3Smrg}; 1197ec681f3Smrg 1207ec681f3Smrgenum bifrost_slot { 1217ec681f3Smrg /* 0-5 are general purpose */ 1227ec681f3Smrg BIFROST_SLOT_ELDEST_DEPTH = 6, 1237ec681f3Smrg BIFROST_SLOT_ELDEST_COLOUR = 7, 1247ec681f3Smrg}; 1257ec681f3Smrg 1267ec681f3Smrgstruct bifrost_header { 1277ec681f3Smrg /* Reserved */ 1287ec681f3Smrg unsigned zero1 : 5; 1297ec681f3Smrg 1307ec681f3Smrg /* Flush-to-zero mode, leave zero for GL */ 1317ec681f3Smrg enum bifrost_ftz flush_to_zero : 2; 1327ec681f3Smrg 1337ec681f3Smrg /* Convert any infinite result of any floating-point operation to the 1347ec681f3Smrg * biggest representable number */ 1357ec681f3Smrg unsigned suppress_inf: 1; 1367ec681f3Smrg 1377ec681f3Smrg /* Convert NaN to +0.0 */ 1387ec681f3Smrg unsigned suppress_nan : 1; 1397ec681f3Smrg 1407ec681f3Smrg /* Floating-point excception handling mode */ 1417ec681f3Smrg enum bifrost_exceptions float_exceptions : 2; 1427ec681f3Smrg 1437ec681f3Smrg /* Enum describing the flow control, which matters for handling 1447ec681f3Smrg * divergence and reconvergence efficiently */ 1457ec681f3Smrg enum bifrost_flow flow_control : 3; 1467ec681f3Smrg 1477ec681f3Smrg /* Reserved */ 1487ec681f3Smrg unsigned zero2 : 1; 1497ec681f3Smrg 1507ec681f3Smrg /* Terminate discarded threads, rather than continuing execution. Set 1517ec681f3Smrg * for fragment shaders for standard GL behaviour of DISCARD. Also in a 1527ec681f3Smrg * fragment shader, this disables helper invocations, so cannot be used 1537ec681f3Smrg * in a shader that requires derivatives or texture LOD computation */ 1547ec681f3Smrg unsigned terminate_discarded_threads : 1; 1557ec681f3Smrg 1567ec681f3Smrg /* If set, the hardware may prefetch the next clause. If false, the 1577ec681f3Smrg * hardware may not. Clear for unconditional branches. */ 1587ec681f3Smrg unsigned next_clause_prefetch : 1; 1597ec681f3Smrg 1607ec681f3Smrg /* If set, a barrier will be inserted after the clause waiting for all 1617ec681f3Smrg * message passing instructions to read their staging registers, such 1627ec681f3Smrg * that it is safe for the next clause to write them. */ 1637ec681f3Smrg unsigned staging_barrier: 1; 1647ec681f3Smrg unsigned staging_register : 6; 1657ec681f3Smrg 1667ec681f3Smrg /* Slots to wait on and slot to be used for message passing 1677ec681f3Smrg * instructions respectively */ 1687ec681f3Smrg unsigned dependency_wait : 8; 1697ec681f3Smrg unsigned dependency_slot : 3; 1707ec681f3Smrg 1717ec681f3Smrg enum bifrost_message_type message_type : 5; 1727ec681f3Smrg enum bifrost_message_type next_message_type : 5; 1737ec681f3Smrg} __attribute__((packed)); 1747ec681f3Smrg 1757ec681f3Smrgenum bifrost_packed_src { 1767ec681f3Smrg BIFROST_SRC_PORT0 = 0, 1777ec681f3Smrg BIFROST_SRC_PORT1 = 1, 1787ec681f3Smrg BIFROST_SRC_PORT2 = 2, 1797ec681f3Smrg BIFROST_SRC_STAGE = 3, 1807ec681f3Smrg BIFROST_SRC_FAU_LO = 4, 1817ec681f3Smrg BIFROST_SRC_FAU_HI = 5, 1827ec681f3Smrg BIFROST_SRC_PASS_FMA = 6, 1837ec681f3Smrg BIFROST_SRC_PASS_ADD = 7, 1847ec681f3Smrg}; 1857ec681f3Smrg 1867ec681f3Smrgstruct bifrost_fma_inst { 1877ec681f3Smrg unsigned src0 : 3; 1887ec681f3Smrg unsigned op : 20; 1897ec681f3Smrg} __attribute__((packed)); 1907ec681f3Smrg 1917ec681f3Smrgstruct bifrost_add_inst { 1927ec681f3Smrg unsigned src0 : 3; 1937ec681f3Smrg unsigned op : 17; 1947ec681f3Smrg} __attribute__((packed)); 1957ec681f3Smrg 1967ec681f3Smrgenum branch_bit_size { 1977ec681f3Smrg BR_SIZE_32 = 0, 1987ec681f3Smrg BR_SIZE_16XX = 1, 1997ec681f3Smrg BR_SIZE_16YY = 2, 2007ec681f3Smrg // For the above combinations of bitsize and location, an extra bit is 2017ec681f3Smrg // encoded via comparing the sources. The only possible source of ambiguity 2027ec681f3Smrg // would be if the sources were the same, but then the branch condition 2037ec681f3Smrg // would be always true or always false anyways, so we can ignore it. But 2047ec681f3Smrg // this no longer works when comparing the y component to the x component, 2057ec681f3Smrg // since it's valid to compare the y component of a source against its own 2067ec681f3Smrg // x component. Instead, the extra bit is encoded via an extra bitsize. 2077ec681f3Smrg BR_SIZE_16YX0 = 3, 2087ec681f3Smrg BR_SIZE_16YX1 = 4, 2097ec681f3Smrg BR_SIZE_32_AND_16X = 5, 2107ec681f3Smrg BR_SIZE_32_AND_16Y = 6, 2117ec681f3Smrg // Used for comparisons with zero and always-true, see below. I think this 2127ec681f3Smrg // only works for integer comparisons. 2137ec681f3Smrg BR_SIZE_ZERO = 7, 2147ec681f3Smrg}; 2157ec681f3Smrg 2167ec681f3Smrgstruct bifrost_regs { 2177ec681f3Smrg unsigned fau_idx : 8; 2187ec681f3Smrg unsigned reg3 : 6; 2197ec681f3Smrg unsigned reg2 : 6; 2207ec681f3Smrg unsigned reg0 : 5; 2217ec681f3Smrg unsigned reg1 : 6; 2227ec681f3Smrg unsigned ctrl : 4; 2237ec681f3Smrg} __attribute__((packed)); 2247ec681f3Smrg 2257ec681f3Smrg#define BIFROST_FMTC_CONSTANTS 0b0011 2267ec681f3Smrg#define BIFROST_FMTC_FINAL 0b0111 2277ec681f3Smrg 2287ec681f3Smrgstruct bifrost_fmt_constant { 2297ec681f3Smrg unsigned pos : 4; 2307ec681f3Smrg unsigned tag : 4; 2317ec681f3Smrg uint64_t imm_1 : 60; 2327ec681f3Smrg uint64_t imm_2 : 60; 2337ec681f3Smrg} __attribute__((packed)); 2347ec681f3Smrg 2357ec681f3Smrg/* Clause formats, encoded in a table */ 2367ec681f3Smrg 2377ec681f3Smrgenum bi_clause_subword { 2387ec681f3Smrg /* Literal 3-bit values */ 2397ec681f3Smrg BI_CLAUSE_SUBWORD_LITERAL_0 = 0, 2407ec681f3Smrg /* etc */ 2417ec681f3Smrg BI_CLAUSE_SUBWORD_LITERAL_7 = 7, 2427ec681f3Smrg 2437ec681f3Smrg /* The value of the corresponding tuple in the corresponding bits */ 2447ec681f3Smrg BI_CLAUSE_SUBWORD_TUPLE_0 = 8, 2457ec681f3Smrg /* etc */ 2467ec681f3Smrg BI_CLAUSE_SUBWORD_TUPLE_7 = 15, 2477ec681f3Smrg 2487ec681f3Smrg /* Clause header */ 2497ec681f3Smrg BI_CLAUSE_SUBWORD_HEADER = 16, 2507ec681f3Smrg 2517ec681f3Smrg /* Leave zero, but semantically distinct from literal 0 */ 2527ec681f3Smrg BI_CLAUSE_SUBWORD_RESERVED = 17, 2537ec681f3Smrg 2547ec681f3Smrg /* Embedded constant 0 */ 2557ec681f3Smrg BI_CLAUSE_SUBWORD_CONSTANT = 18, 2567ec681f3Smrg 2577ec681f3Smrg /* M bits controlling modifier for the constant */ 2587ec681f3Smrg BI_CLAUSE_SUBWORD_M = 19, 2597ec681f3Smrg 2607ec681f3Smrg /* Z bit: 1 to begin encoding constants, 0 to terminate the clause */ 2617ec681f3Smrg BI_CLAUSE_SUBWORD_Z = 20, 2627ec681f3Smrg 2637ec681f3Smrg /* Upper 3-bits of a given tuple and zero extended */ 2647ec681f3Smrg BI_CLAUSE_SUBWORD_UPPER_0 = 32, 2657ec681f3Smrg /* etc */ 2667ec681f3Smrg BI_CLAUSE_SUBWORD_UPPER_7 = BI_CLAUSE_SUBWORD_UPPER_0 + 7, 2677ec681f3Smrg 2687ec681f3Smrg /* Upper 3-bits of two tuples, concatenated and zero-extended */ 2697ec681f3Smrg BI_CLAUSE_SUBWORD_UPPER_23 = BI_CLAUSE_SUBWORD_UPPER_0 + 23, 2707ec681f3Smrg BI_CLAUSE_SUBWORD_UPPER_56 = BI_CLAUSE_SUBWORD_UPPER_0 + 56, 2717ec681f3Smrg}; 2727ec681f3Smrg 2737ec681f3Smrg#define L(x) (BI_CLAUSE_SUBWORD_LITERAL_0 + x) 2747ec681f3Smrg#define U(x) (BI_CLAUSE_SUBWORD_UPPER_0 + x) 2757ec681f3Smrg#define T(x) (BI_CLAUSE_SUBWORD_TUPLE_0 + x) 2767ec681f3Smrg#define EC BI_CLAUSE_SUBWORD_CONSTANT 2777ec681f3Smrg#define M BI_CLAUSE_SUBWORD_M 2787ec681f3Smrg#define Z BI_CLAUSE_SUBWORD_Z 2797ec681f3Smrg#define H BI_CLAUSE_SUBWORD_HEADER 2807ec681f3Smrg#define R BI_CLAUSE_SUBWORD_RESERVED 2817ec681f3Smrg 2827ec681f3Smrgstruct bi_clause_format { 2837ec681f3Smrg unsigned format; /* format number */ 2847ec681f3Smrg unsigned pos; /* index in the clause */ 2857ec681f3Smrg enum bi_clause_subword tag_1; /* 2-bits */ 2867ec681f3Smrg enum bi_clause_subword tag_2; /* 3-bits */ 2877ec681f3Smrg enum bi_clause_subword tag_3; /* 3-bits */ 2887ec681f3Smrg enum bi_clause_subword s0_s3; /* 60 bits */ 2897ec681f3Smrg enum bi_clause_subword s4; /* 15 bits */ 2907ec681f3Smrg enum bi_clause_subword s5_s6; /* 30 bits */ 2917ec681f3Smrg enum bi_clause_subword s7; /* 15 bits */ 2927ec681f3Smrg}; 2937ec681f3Smrg 2947ec681f3Smrgstatic const struct bi_clause_format bi_clause_formats[] = { 2957ec681f3Smrg { 0, 0, L(0), L(5), U(0), T(0), T(0), H, H }, 2967ec681f3Smrg { 0, 0, Z, L(1), U(0), T(0), T(0), H, H }, 2977ec681f3Smrg { 1, 1, Z, L(0), L(3), T(1), T(1), R, U(1) }, 2987ec681f3Smrg { 2, 1, L(0), L(4), U(1), T(1), T(1), T(2), T(2) }, 2997ec681f3Smrg { 3, 2, Z, L(0), L(4), EC, M, T(2), U(2) }, 3007ec681f3Smrg { 4, 2, L(0), L(0), L(1), T(3), T(3), T(2), U(23) }, 3017ec681f3Smrg { 4, 2, Z, L(0), L(5), T(3), T(3), T(2), U(23) }, 3027ec681f3Smrg { 5, 2, L(2), U(3), U(2), T(3), T(3), T(2), EC }, 3037ec681f3Smrg { 6, 3, Z, L(2), U(4), T(4), T(4), EC, EC }, 3047ec681f3Smrg { 7, 3, L(1), L(4), U(4), T(4), T(4), T(5), T(5) }, 3057ec681f3Smrg { 8, 4, Z, L(0), L(6), EC, M, T(5), U(5) }, 3067ec681f3Smrg { 9, 4, Z, L(0), L(7), T(6), T(6), T(5), U(56) }, 3077ec681f3Smrg { 10, 4, L(3), U(6), U(5), T(6), T(6), T(5), EC }, 3087ec681f3Smrg { 11, 5, Z, L(3), U(7), T(7), T(7), EC, EC }, 3097ec681f3Smrg}; 3107ec681f3Smrg 3117ec681f3Smrg#undef L 3127ec681f3Smrg#undef U 3137ec681f3Smrg#undef T 3147ec681f3Smrg#undef EC 3157ec681f3Smrg#undef M 3167ec681f3Smrg#undef Z 3177ec681f3Smrg#undef H 3187ec681f3Smrg#undef R 3197ec681f3Smrg 3207ec681f3Smrg/* 32-bit modes for slots 2/3, as encoded in the register block. Other values 3217ec681f3Smrg * are reserved. First part specifies behaviour of slot 2 (Idle, Read, Write 3227ec681f3Smrg * Full, Write Low, Write High), second part behaviour of slot 3, and the last 3237ec681f3Smrg * part specifies the source for the write (FMA, ADD, or MIX for FMA/ADD). 3247ec681f3Smrg * 3257ec681f3Smrg * IDLE is a special mode disabling both slots, except for the first 3267ec681f3Smrg * instruction in the clause which uses IDLE_1 for the same purpose. 3277ec681f3Smrg * 3287ec681f3Smrg * All fields 0 used as sentinel for reserved encoding, so IDLE(_1) have FMA 3297ec681f3Smrg * set (and ignored) as a placeholder to differentiate from reserved. 3307ec681f3Smrg */ 3317ec681f3Smrgenum bifrost_reg_mode { 3327ec681f3Smrg BIFROST_R_WL_FMA = 1, 3337ec681f3Smrg BIFROST_R_WH_FMA = 2, 3347ec681f3Smrg BIFROST_R_W_FMA = 3, 3357ec681f3Smrg BIFROST_R_WL_ADD = 4, 3367ec681f3Smrg BIFROST_R_WH_ADD = 5, 3377ec681f3Smrg BIFROST_R_W_ADD = 6, 3387ec681f3Smrg BIFROST_WL_WL_ADD = 7, 3397ec681f3Smrg BIFROST_WL_WH_ADD = 8, 3407ec681f3Smrg BIFROST_WL_W_ADD = 9, 3417ec681f3Smrg BIFROST_WH_WL_ADD = 10, 3427ec681f3Smrg BIFROST_WH_WH_ADD = 11, 3437ec681f3Smrg BIFROST_WH_W_ADD = 12, 3447ec681f3Smrg BIFROST_W_WL_ADD = 13, 3457ec681f3Smrg BIFROST_W_WH_ADD = 14, 3467ec681f3Smrg BIFROST_W_W_ADD = 15, 3477ec681f3Smrg BIFROST_IDLE_1 = 16, 3487ec681f3Smrg BIFROST_I_W_FMA = 17, 3497ec681f3Smrg BIFROST_I_WL_FMA = 18, 3507ec681f3Smrg BIFROST_I_WH_FMA = 19, 3517ec681f3Smrg BIFROST_R_I = 20, 3527ec681f3Smrg BIFROST_I_W_ADD = 21, 3537ec681f3Smrg BIFROST_I_WL_ADD = 22, 3547ec681f3Smrg BIFROST_I_WH_ADD = 23, 3557ec681f3Smrg BIFROST_WL_WH_MIX = 24, 3567ec681f3Smrg BIFROST_WH_WL_MIX = 26, 3577ec681f3Smrg BIFROST_IDLE = 27, 3587ec681f3Smrg}; 3597ec681f3Smrg 3607ec681f3Smrgenum bifrost_reg_op { 3617ec681f3Smrg BIFROST_OP_IDLE = 0, 3627ec681f3Smrg BIFROST_OP_READ = 1, 3637ec681f3Smrg BIFROST_OP_WRITE = 2, 3647ec681f3Smrg BIFROST_OP_WRITE_LO = 3, 3657ec681f3Smrg BIFROST_OP_WRITE_HI = 4, 3667ec681f3Smrg}; 3677ec681f3Smrg 3687ec681f3Smrgstruct bifrost_reg_ctrl_23 { 3697ec681f3Smrg enum bifrost_reg_op slot2; 3707ec681f3Smrg enum bifrost_reg_op slot3; 3717ec681f3Smrg bool slot3_fma; 3727ec681f3Smrg}; 3737ec681f3Smrg 3747ec681f3Smrgstatic const struct bifrost_reg_ctrl_23 bifrost_reg_ctrl_lut[32] = { 3757ec681f3Smrg [BIFROST_R_WL_FMA] = { BIFROST_OP_READ, BIFROST_OP_WRITE_LO, true }, 3767ec681f3Smrg [BIFROST_R_WH_FMA] = { BIFROST_OP_READ, BIFROST_OP_WRITE_HI, true }, 3777ec681f3Smrg [BIFROST_R_W_FMA] = { BIFROST_OP_READ, BIFROST_OP_WRITE, true }, 3787ec681f3Smrg [BIFROST_R_WL_ADD] = { BIFROST_OP_READ, BIFROST_OP_WRITE_LO, false }, 3797ec681f3Smrg [BIFROST_R_WH_ADD] = { BIFROST_OP_READ, BIFROST_OP_WRITE_HI, false }, 3807ec681f3Smrg [BIFROST_R_W_ADD] = { BIFROST_OP_READ, BIFROST_OP_WRITE, false }, 3817ec681f3Smrg [BIFROST_WL_WL_ADD] = { BIFROST_OP_WRITE_LO, BIFROST_OP_WRITE_LO, false }, 3827ec681f3Smrg [BIFROST_WL_WH_ADD] = { BIFROST_OP_WRITE_LO, BIFROST_OP_WRITE_HI, false }, 3837ec681f3Smrg [BIFROST_WL_W_ADD] = { BIFROST_OP_WRITE_LO, BIFROST_OP_WRITE, false }, 3847ec681f3Smrg [BIFROST_WH_WL_ADD] = { BIFROST_OP_WRITE_HI, BIFROST_OP_WRITE_LO, false }, 3857ec681f3Smrg [BIFROST_WH_WH_ADD] = { BIFROST_OP_WRITE_HI, BIFROST_OP_WRITE_HI, false }, 3867ec681f3Smrg [BIFROST_WH_W_ADD] = { BIFROST_OP_WRITE_HI, BIFROST_OP_WRITE, false }, 3877ec681f3Smrg [BIFROST_W_WL_ADD] = { BIFROST_OP_WRITE, BIFROST_OP_WRITE_LO, false }, 3887ec681f3Smrg [BIFROST_W_WH_ADD] = { BIFROST_OP_WRITE, BIFROST_OP_WRITE_HI, false }, 3897ec681f3Smrg [BIFROST_W_W_ADD] = { BIFROST_OP_WRITE, BIFROST_OP_WRITE, false }, 3907ec681f3Smrg [BIFROST_IDLE_1] = { BIFROST_OP_IDLE, BIFROST_OP_IDLE, true }, 3917ec681f3Smrg [BIFROST_I_W_FMA] = { BIFROST_OP_IDLE, BIFROST_OP_WRITE, true }, 3927ec681f3Smrg [BIFROST_I_WL_FMA] = { BIFROST_OP_IDLE, BIFROST_OP_WRITE_LO, true }, 3937ec681f3Smrg [BIFROST_I_WH_FMA] = { BIFROST_OP_IDLE, BIFROST_OP_WRITE_HI, true }, 3947ec681f3Smrg [BIFROST_R_I] = { BIFROST_OP_READ, BIFROST_OP_IDLE, false }, 3957ec681f3Smrg [BIFROST_I_W_ADD] = { BIFROST_OP_IDLE, BIFROST_OP_WRITE, false }, 3967ec681f3Smrg [BIFROST_I_WL_ADD] = { BIFROST_OP_IDLE, BIFROST_OP_WRITE_LO, false }, 3977ec681f3Smrg [BIFROST_I_WH_ADD] = { BIFROST_OP_IDLE, BIFROST_OP_WRITE_HI, false }, 3987ec681f3Smrg [BIFROST_WL_WH_MIX] = { BIFROST_OP_WRITE_LO, BIFROST_OP_WRITE_HI, false }, 3997ec681f3Smrg [BIFROST_WH_WL_MIX] = { BIFROST_OP_WRITE_HI, BIFROST_OP_WRITE_LO, false }, 4007ec681f3Smrg [BIFROST_IDLE] = { BIFROST_OP_IDLE, BIFROST_OP_IDLE, true }, 4017ec681f3Smrg}; 4027ec681f3Smrg 4037ec681f3Smrg/* Texture operator descriptors in various states. Usually packed in the 4047ec681f3Smrg * compiler and stored as a constant */ 4057ec681f3Smrg 4067ec681f3Smrgenum bifrost_index { 4077ec681f3Smrg /* Both texture/sampler index immediate */ 4087ec681f3Smrg BIFROST_INDEX_IMMEDIATE_SHARED = 0, 4097ec681f3Smrg 4107ec681f3Smrg /* Sampler index immediate, texture index from staging */ 4117ec681f3Smrg BIFROST_INDEX_IMMEDIATE_SAMPLER = 1, 4127ec681f3Smrg 4137ec681f3Smrg /* Texture index immediate, sampler index from staging */ 4147ec681f3Smrg BIFROST_INDEX_IMMEDIATE_TEXTURE = 2, 4157ec681f3Smrg 4167ec681f3Smrg /* Both indices from (separate) staging registers */ 4177ec681f3Smrg BIFROST_INDEX_REGISTER = 3, 4187ec681f3Smrg}; 4197ec681f3Smrg 4207ec681f3Smrgenum bifrost_tex_op { 4217ec681f3Smrg /* Given explicit derivatives, compute a gradient descriptor */ 4227ec681f3Smrg BIFROST_TEX_OP_GRDESC_DER = 4, 4237ec681f3Smrg 4247ec681f3Smrg /* Given implicit derivatives (texture coordinates in a fragment 4257ec681f3Smrg * shader), compute a gradient descriptor */ 4267ec681f3Smrg BIFROST_TEX_OP_GRDESC = 5, 4277ec681f3Smrg 4287ec681f3Smrg /* Fetch a texel. Takes a staging register with LOD level / face index 4297ec681f3Smrg * packed 16:16 */ 4307ec681f3Smrg BIFROST_TEX_OP_FETCH = 6, 4317ec681f3Smrg 4327ec681f3Smrg /* Filtered texture */ 4337ec681f3Smrg BIFROST_TEX_OP_TEX = 7, 4347ec681f3Smrg}; 4357ec681f3Smrg 4367ec681f3Smrgenum bifrost_lod_mode { 4377ec681f3Smrg /* Takes two staging registers forming a 64-bit gradient descriptor 4387ec681f3Smrg * (computed by a previous GRDESC or GRDESC_DER operation) */ 4397ec681f3Smrg BIFROST_LOD_MODE_GRDESC = 3, 4407ec681f3Smrg 4417ec681f3Smrg /* Take a staging register with 8:8 fixed-point in bottom 16-bits 4427ec681f3Smrg * specifying an explicit LOD */ 4437ec681f3Smrg BIFROST_LOD_MODE_EXPLICIT = 4, 4447ec681f3Smrg 4457ec681f3Smrg /* Takes a staging register with bottom 16-bits as 8:8 fixed-point LOD 4467ec681f3Smrg * bias and top 16-bit as 8:8 fixed-point lower bound (generally left 4477ec681f3Smrg * zero), added and clamped to a computed LOD */ 4487ec681f3Smrg BIFROST_LOD_MODE_BIAS = 5, 4497ec681f3Smrg 4507ec681f3Smrg /* Set LOD to zero */ 4517ec681f3Smrg BIFROST_LOD_MODE_ZERO = 6, 4527ec681f3Smrg 4537ec681f3Smrg /* Compute LOD */ 4547ec681f3Smrg BIFROST_LOD_MODE_COMPUTE = 7, 4557ec681f3Smrg}; 4567ec681f3Smrg 4577ec681f3Smrgenum bifrost_texture_format { 4587ec681f3Smrg /* 16-bit floating point, with optional clamping */ 4597ec681f3Smrg BIFROST_TEXTURE_FORMAT_F16 = 0, 4607ec681f3Smrg BIFROST_TEXTURE_FORMAT_F16_POS = 1, 4617ec681f3Smrg BIFROST_TEXTURE_FORMAT_F16_PM1 = 2, 4627ec681f3Smrg BIFROST_TEXTURE_FORMAT_F16_1 = 3, 4637ec681f3Smrg 4647ec681f3Smrg /* 32-bit floating point, with optional clamping */ 4657ec681f3Smrg BIFROST_TEXTURE_FORMAT_F32 = 4, 4667ec681f3Smrg BIFROST_TEXTURE_FORMAT_F32_POS = 5, 4677ec681f3Smrg BIFROST_TEXTURE_FORMAT_F32_PM1 = 6, 4687ec681f3Smrg BIFROST_TEXTURE_FORMAT_F32_1 = 7, 4697ec681f3Smrg}; 4707ec681f3Smrg 4717ec681f3Smrgenum bifrost_texture_format_full { 4727ec681f3Smrg /* Transclude bifrost_texture_format from above */ 4737ec681f3Smrg 4747ec681f3Smrg /* Integers, unclamped */ 4757ec681f3Smrg BIFROST_TEXTURE_FORMAT_U16 = 12, 4767ec681f3Smrg BIFROST_TEXTURE_FORMAT_S16 = 13, 4777ec681f3Smrg BIFROST_TEXTURE_FORMAT_U32 = 14, 4787ec681f3Smrg BIFROST_TEXTURE_FORMAT_S32 = 15, 4797ec681f3Smrg}; 4807ec681f3Smrg 4817ec681f3Smrgenum bifrost_texture_fetch { 4827ec681f3Smrg /* Default texelFetch */ 4837ec681f3Smrg BIFROST_TEXTURE_FETCH_TEXEL = 1, 4847ec681f3Smrg 4857ec681f3Smrg /* Deprecated, fetches 4x U32 of a U8 x 4 texture. Do not use. */ 4867ec681f3Smrg BIFROST_TEXTURE_FETCH_GATHER4_RGBA = 3, 4877ec681f3Smrg 4887ec681f3Smrg /* Gathers */ 4897ec681f3Smrg BIFROST_TEXTURE_FETCH_GATHER4_R = 4, 4907ec681f3Smrg BIFROST_TEXTURE_FETCH_GATHER4_G = 5, 4917ec681f3Smrg BIFROST_TEXTURE_FETCH_GATHER4_B = 6, 4927ec681f3Smrg BIFROST_TEXTURE_FETCH_GATHER4_A = 7 4937ec681f3Smrg}; 4947ec681f3Smrg 4957ec681f3Smrgstruct bifrost_texture_operation { 4967ec681f3Smrg /* If immediate_indices is set: 4977ec681f3Smrg * - immediate sampler index 4987ec681f3Smrg * - index used as texture index 4997ec681f3Smrg * Otherwise: 5007ec681f3Smrg * - bifrost_single_index in lower 2 bits 5017ec681f3Smrg * - 0x3 in upper 2 bits (single-texturing) 5027ec681f3Smrg */ 5037ec681f3Smrg unsigned sampler_index_or_mode : 4; 5047ec681f3Smrg unsigned index : 7; 5057ec681f3Smrg bool immediate_indices : 1; 5067ec681f3Smrg enum bifrost_tex_op op : 3; 5077ec681f3Smrg 5087ec681f3Smrg /* If set for TEX/FETCH, loads texel offsets and multisample index from 5097ec681f3Smrg * a staging register containing offset_x:offset_y:offset_z:ms_index 5107ec681f3Smrg * packed 8:8:8:8. Offsets must be in [-31, +31]. If set for 5117ec681f3Smrg * GRDESC(_DER), disable LOD bias. */ 5127ec681f3Smrg bool offset_or_bias_disable : 1; 5137ec681f3Smrg 5147ec681f3Smrg /* If set for TEX/FETCH, loads fp32 shadow comparison value from a 5157ec681f3Smrg * staging register. Implies fetch_component = gather4_r. If set for 5167ec681f3Smrg * GRDESC(_DER), disables LOD clamping. */ 5177ec681f3Smrg bool shadow_or_clamp_disable : 1; 5187ec681f3Smrg 5197ec681f3Smrg /* If set, loads an uint32 array index from a staging register. */ 5207ec681f3Smrg bool array : 1; 5217ec681f3Smrg 5227ec681f3Smrg /* Texture dimension, or 0 for a cubemap */ 5237ec681f3Smrg unsigned dimension : 2; 5247ec681f3Smrg 5257ec681f3Smrg /* Method to compute LOD value or for a FETCH, the 5267ec681f3Smrg * bifrost_texture_fetch component specification */ 5277ec681f3Smrg enum bifrost_lod_mode lod_or_fetch : 3; 5287ec681f3Smrg 5297ec681f3Smrg /* Reserved */ 5307ec681f3Smrg unsigned zero : 1; 5317ec681f3Smrg 5327ec681f3Smrg /* Register format for the result */ 5337ec681f3Smrg enum bifrost_texture_format_full format : 4; 5347ec681f3Smrg 5357ec681f3Smrg /* Write mask for the result */ 5367ec681f3Smrg unsigned mask : 4; 5377ec681f3Smrg} __attribute__((packed)); 5387ec681f3Smrg 5397ec681f3Smrg#define BIFROST_MEGA_SAMPLE 128 5407ec681f3Smrg#define BIFROST_ALL_SAMPLES 255 5417ec681f3Smrg#define BIFROST_CURRENT_PIXEL 255 5427ec681f3Smrg 5437ec681f3Smrgstruct bifrost_pixel_indices { 5447ec681f3Smrg unsigned sample : 8; 5457ec681f3Smrg unsigned rt : 8; 5467ec681f3Smrg unsigned x : 8; 5477ec681f3Smrg unsigned y : 8; 5487ec681f3Smrg} __attribute__((packed)); 5497ec681f3Smrg 5507ec681f3Smrgenum bi_constmod { 5517ec681f3Smrg BI_CONSTMOD_NONE, 5527ec681f3Smrg BI_CONSTMOD_PC_LO, 5537ec681f3Smrg BI_CONSTMOD_PC_HI, 5547ec681f3Smrg BI_CONSTMOD_PC_LO_HI 5557ec681f3Smrg}; 5567ec681f3Smrg 5577ec681f3Smrgstruct bi_constants { 5587ec681f3Smrg /* Raw constant values */ 5597ec681f3Smrg uint64_t raw[6]; 5607ec681f3Smrg 5617ec681f3Smrg /* Associated modifier derived from M values */ 5627ec681f3Smrg enum bi_constmod mods[6]; 5637ec681f3Smrg}; 5647ec681f3Smrg 5657ec681f3Smrg/* FAU selectors for constants are out-of-order, construct the top bits 5667ec681f3Smrg * here given a embedded constant index in a clause */ 5677ec681f3Smrg 5687ec681f3Smrgstatic inline unsigned 5697ec681f3Smrgbi_constant_field(unsigned idx) 5707ec681f3Smrg{ 5717ec681f3Smrg const unsigned values[] = { 5727ec681f3Smrg 4, 5, 6, 7, 2, 3 5737ec681f3Smrg }; 5747ec681f3Smrg 5757ec681f3Smrg assert(idx <= 5); 5767ec681f3Smrg return values[idx] << 4; 5777ec681f3Smrg} 5787ec681f3Smrg 5797ec681f3Smrg#endif 580