17ec681f3Smrg/* 27ec681f3Smrg * Copyright (C) 2021 Collabora, Ltd. 37ec681f3Smrg * Copyright (C) 2019 Ryan Houdek <Sonicadvance1@gmail.com> 47ec681f3Smrg * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org> 57ec681f3Smrg * Copyright © 2015 Red Hat 67ec681f3Smrg * 77ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 87ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 97ec681f3Smrg * to deal in the Software without restriction, including without limitation 107ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 117ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the 127ec681f3Smrg * Software is furnished to do so, subject to the following conditions: 137ec681f3Smrg * 147ec681f3Smrg * The above copyright notice and this permission notice (including the next 157ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 167ec681f3Smrg * Software. 177ec681f3Smrg * 187ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 197ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 207ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 217ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 227ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 237ec681f3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 247ec681f3Smrg * SOFTWARE. 257ec681f3Smrg */ 267ec681f3Smrg 277ec681f3Smrg#include <getopt.h> 287ec681f3Smrg#include <string.h> 297ec681f3Smrg#include "disassemble.h" 307ec681f3Smrg#include "compiler.h" 317ec681f3Smrg 327ec681f3Smrg#include "main/mtypes.h" 337ec681f3Smrg#include "compiler/glsl/standalone.h" 347ec681f3Smrg#include "compiler/glsl/glsl_to_nir.h" 357ec681f3Smrg#include "compiler/glsl/gl_nir.h" 367ec681f3Smrg#include "compiler/nir_types.h" 377ec681f3Smrg#include "util/u_dynarray.h" 387ec681f3Smrg#include "bifrost_compile.h" 397ec681f3Smrg 407ec681f3Smrgunsigned gpu_id = 0x7212; 417ec681f3Smrgint verbose = 0; 427ec681f3Smrg 437ec681f3Smrgstatic gl_shader_stage 447ec681f3Smrgfilename_to_stage(const char *stage) 457ec681f3Smrg{ 467ec681f3Smrg const char *ext = strrchr(stage, '.'); 477ec681f3Smrg 487ec681f3Smrg if (ext == NULL) { 497ec681f3Smrg fprintf(stderr, "No extension found in %s\n", stage); 507ec681f3Smrg exit(1); 517ec681f3Smrg } 527ec681f3Smrg 537ec681f3Smrg if (!strcmp(ext, ".cs") || !strcmp(ext, ".comp")) 547ec681f3Smrg return MESA_SHADER_COMPUTE; 557ec681f3Smrg else if (!strcmp(ext, ".vs") || !strcmp(ext, ".vert")) 567ec681f3Smrg return MESA_SHADER_VERTEX; 577ec681f3Smrg else if (!strcmp(ext, ".fs") || !strcmp(ext, ".frag")) 587ec681f3Smrg return MESA_SHADER_FRAGMENT; 597ec681f3Smrg else { 607ec681f3Smrg fprintf(stderr, "Invalid extension %s\n", ext); 617ec681f3Smrg exit(1); 627ec681f3Smrg } 637ec681f3Smrg 647ec681f3Smrg unreachable("Should've returned or bailed"); 657ec681f3Smrg} 667ec681f3Smrg 677ec681f3Smrgstatic int 687ec681f3Smrgst_packed_uniforms_type_size(const struct glsl_type *type, bool bindless) 697ec681f3Smrg{ 707ec681f3Smrg return glsl_count_dword_slots(type, bindless); 717ec681f3Smrg} 727ec681f3Smrg 737ec681f3Smrgstatic int 747ec681f3Smrgglsl_type_size(const struct glsl_type *type, bool bindless) 757ec681f3Smrg{ 767ec681f3Smrg return glsl_count_attribute_slots(type, false); 777ec681f3Smrg} 787ec681f3Smrg 797ec681f3Smrgstatic void 807ec681f3Smrginsert_sorted(struct exec_list *var_list, nir_variable *new_var) 817ec681f3Smrg{ 827ec681f3Smrg nir_foreach_variable_in_list (var, var_list) { 837ec681f3Smrg if (var->data.location > new_var->data.location) { 847ec681f3Smrg exec_node_insert_node_before(&var->node, &new_var->node); 857ec681f3Smrg return; 867ec681f3Smrg } 877ec681f3Smrg } 887ec681f3Smrg exec_list_push_tail(var_list, &new_var->node); 897ec681f3Smrg} 907ec681f3Smrg 917ec681f3Smrgstatic void 927ec681f3Smrgsort_varyings(nir_shader *nir, nir_variable_mode mode) 937ec681f3Smrg{ 947ec681f3Smrg struct exec_list new_list; 957ec681f3Smrg exec_list_make_empty(&new_list); 967ec681f3Smrg nir_foreach_variable_with_modes_safe (var, nir, mode) { 977ec681f3Smrg exec_node_remove(&var->node); 987ec681f3Smrg insert_sorted(&new_list, var); 997ec681f3Smrg } 1007ec681f3Smrg exec_list_append(&nir->variables, &new_list); 1017ec681f3Smrg} 1027ec681f3Smrg 1037ec681f3Smrgstatic void 1047ec681f3Smrgfixup_varying_slots(nir_shader *nir, nir_variable_mode mode) 1057ec681f3Smrg{ 1067ec681f3Smrg nir_foreach_variable_with_modes (var, nir, mode) { 1077ec681f3Smrg if (var->data.location >= VARYING_SLOT_VAR0) { 1087ec681f3Smrg var->data.location += 9; 1097ec681f3Smrg } else if ((var->data.location >= VARYING_SLOT_TEX0) && 1107ec681f3Smrg (var->data.location <= VARYING_SLOT_TEX7)) { 1117ec681f3Smrg var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0; 1127ec681f3Smrg } 1137ec681f3Smrg } 1147ec681f3Smrg} 1157ec681f3Smrg 1167ec681f3Smrgstatic void 1177ec681f3Smrgcompile_shader(int stages, char **files) 1187ec681f3Smrg{ 1197ec681f3Smrg struct gl_shader_program *prog; 1207ec681f3Smrg nir_shader *nir[MESA_SHADER_COMPUTE + 1]; 1217ec681f3Smrg unsigned shader_types[MESA_SHADER_COMPUTE + 1]; 1227ec681f3Smrg 1237ec681f3Smrg if (stages > MESA_SHADER_COMPUTE) { 1247ec681f3Smrg fprintf(stderr, "Too many stages"); 1257ec681f3Smrg exit(1); 1267ec681f3Smrg } 1277ec681f3Smrg 1287ec681f3Smrg for (unsigned i = 0; i < stages; ++i) 1297ec681f3Smrg shader_types[i] = filename_to_stage(files[i]); 1307ec681f3Smrg 1317ec681f3Smrg struct standalone_options options = { 1327ec681f3Smrg .glsl_version = 300, /* ES - needed for precision */ 1337ec681f3Smrg .do_link = true, 1347ec681f3Smrg .lower_precision = true 1357ec681f3Smrg }; 1367ec681f3Smrg 1377ec681f3Smrg static struct gl_context local_ctx; 1387ec681f3Smrg 1397ec681f3Smrg prog = standalone_compile_shader(&options, stages, files, &local_ctx); 1407ec681f3Smrg 1417ec681f3Smrg for (unsigned i = 0; i < stages; ++i) { 1427ec681f3Smrg gl_shader_stage stage = shader_types[i]; 1437ec681f3Smrg prog->_LinkedShaders[stage]->Program->info.stage = stage; 1447ec681f3Smrg } 1457ec681f3Smrg 1467ec681f3Smrg struct util_dynarray binary; 1477ec681f3Smrg 1487ec681f3Smrg util_dynarray_init(&binary, NULL); 1497ec681f3Smrg 1507ec681f3Smrg for (unsigned i = 0; i < stages; ++i) { 1517ec681f3Smrg nir[i] = glsl_to_nir(&local_ctx, prog, shader_types[i], &bifrost_nir_options); 1527ec681f3Smrg 1537ec681f3Smrg if (shader_types[i] == MESA_SHADER_VERTEX) { 1547ec681f3Smrg nir_assign_var_locations(nir[i], nir_var_shader_in, &nir[i]->num_inputs, 1557ec681f3Smrg glsl_type_size); 1567ec681f3Smrg sort_varyings(nir[i], nir_var_shader_out); 1577ec681f3Smrg nir_assign_var_locations(nir[i], nir_var_shader_out, &nir[i]->num_outputs, 1587ec681f3Smrg glsl_type_size); 1597ec681f3Smrg fixup_varying_slots(nir[i], nir_var_shader_out); 1607ec681f3Smrg } else if (shader_types[i] == MESA_SHADER_FRAGMENT) { 1617ec681f3Smrg sort_varyings(nir[i], nir_var_shader_in); 1627ec681f3Smrg nir_assign_var_locations(nir[i], nir_var_shader_in, &nir[i]->num_inputs, 1637ec681f3Smrg glsl_type_size); 1647ec681f3Smrg fixup_varying_slots(nir[i], nir_var_shader_in); 1657ec681f3Smrg nir_assign_var_locations(nir[i], nir_var_shader_out, &nir[i]->num_outputs, 1667ec681f3Smrg glsl_type_size); 1677ec681f3Smrg } 1687ec681f3Smrg 1697ec681f3Smrg nir_assign_var_locations(nir[i], nir_var_uniform, &nir[i]->num_uniforms, 1707ec681f3Smrg glsl_type_size); 1717ec681f3Smrg 1727ec681f3Smrg NIR_PASS_V(nir[i], nir_lower_global_vars_to_local); 1737ec681f3Smrg NIR_PASS_V(nir[i], nir_lower_io_to_temporaries, nir_shader_get_entrypoint(nir[i]), true, i == 0); 1747ec681f3Smrg NIR_PASS_V(nir[i], nir_opt_copy_prop_vars); 1757ec681f3Smrg NIR_PASS_V(nir[i], nir_opt_combine_stores, nir_var_all); 1767ec681f3Smrg 1777ec681f3Smrg NIR_PASS_V(nir[i], nir_lower_system_values); 1787ec681f3Smrg NIR_PASS_V(nir[i], gl_nir_lower_samplers, prog); 1797ec681f3Smrg NIR_PASS_V(nir[i], nir_split_var_copies); 1807ec681f3Smrg NIR_PASS_V(nir[i], nir_lower_var_copies); 1817ec681f3Smrg 1827ec681f3Smrg NIR_PASS_V(nir[i], nir_lower_io, nir_var_uniform, 1837ec681f3Smrg st_packed_uniforms_type_size, 1847ec681f3Smrg (nir_lower_io_options)0); 1857ec681f3Smrg NIR_PASS_V(nir[i], nir_lower_uniforms_to_ubo, true, false); 1867ec681f3Smrg 1877ec681f3Smrg /* before buffers and vars_to_ssa */ 1887ec681f3Smrg NIR_PASS_V(nir[i], gl_nir_lower_images, true); 1897ec681f3Smrg 1907ec681f3Smrg NIR_PASS_V(nir[i], gl_nir_lower_buffers, prog); 1917ec681f3Smrg NIR_PASS_V(nir[i], nir_opt_constant_folding); 1927ec681f3Smrg 1937ec681f3Smrg struct panfrost_compile_inputs inputs = { 1947ec681f3Smrg .gpu_id = gpu_id, 1957ec681f3Smrg }; 1967ec681f3Smrg struct pan_shader_info info = { 0 }; 1977ec681f3Smrg 1987ec681f3Smrg util_dynarray_clear(&binary); 1997ec681f3Smrg bifrost_compile_shader_nir(nir[i], &inputs, &binary, &info); 2007ec681f3Smrg 2017ec681f3Smrg char *fn = NULL; 2027ec681f3Smrg asprintf(&fn, "shader_%u.bin", i); 2037ec681f3Smrg assert(fn != NULL); 2047ec681f3Smrg FILE *fp = fopen(fn, "wb"); 2057ec681f3Smrg fwrite(binary.data, 1, binary.size, fp); 2067ec681f3Smrg fclose(fp); 2077ec681f3Smrg free(fn); 2087ec681f3Smrg } 2097ec681f3Smrg 2107ec681f3Smrg util_dynarray_fini(&binary); 2117ec681f3Smrg} 2127ec681f3Smrg 2137ec681f3Smrg#define BI_FOURCC(ch0, ch1, ch2, ch3) ( \ 2147ec681f3Smrg (uint32_t)(ch0) | (uint32_t)(ch1) << 8 | \ 2157ec681f3Smrg (uint32_t)(ch2) << 16 | (uint32_t)(ch3) << 24) 2167ec681f3Smrg 2177ec681f3Smrgstatic void 2187ec681f3Smrgdisassemble(const char *filename) 2197ec681f3Smrg{ 2207ec681f3Smrg FILE *fp = fopen(filename, "rb"); 2217ec681f3Smrg assert(fp); 2227ec681f3Smrg 2237ec681f3Smrg fseek(fp, 0, SEEK_END); 2247ec681f3Smrg unsigned filesize = ftell(fp); 2257ec681f3Smrg rewind(fp); 2267ec681f3Smrg 2277ec681f3Smrg uint32_t *code = malloc(filesize); 2287ec681f3Smrg unsigned res = fread(code, 1, filesize, fp); 2297ec681f3Smrg if (res != filesize) { 2307ec681f3Smrg printf("Couldn't read full file\n"); 2317ec681f3Smrg } 2327ec681f3Smrg 2337ec681f3Smrg fclose(fp); 2347ec681f3Smrg 2357ec681f3Smrg if (filesize && code[0] == BI_FOURCC('M', 'B', 'S', '2')) { 2367ec681f3Smrg for (int i = 0; i < filesize / 4; ++i) { 2377ec681f3Smrg if (code[i] != BI_FOURCC('O', 'B', 'J', 'C')) 2387ec681f3Smrg continue; 2397ec681f3Smrg 2407ec681f3Smrg unsigned size = code[i + 1]; 2417ec681f3Smrg unsigned offset = i + 2; 2427ec681f3Smrg 2437ec681f3Smrg disassemble_bifrost(stdout, (uint8_t*)(code + offset), size, verbose); 2447ec681f3Smrg } 2457ec681f3Smrg } else { 2467ec681f3Smrg disassemble_bifrost(stdout, (uint8_t*)code, filesize, verbose); 2477ec681f3Smrg } 2487ec681f3Smrg 2497ec681f3Smrg free(code); 2507ec681f3Smrg} 2517ec681f3Smrg 2527ec681f3Smrgint 2537ec681f3Smrgmain(int argc, char **argv) 2547ec681f3Smrg{ 2557ec681f3Smrg int c; 2567ec681f3Smrg 2577ec681f3Smrg if (argc < 2) { 2587ec681f3Smrg printf("Pass a command\n"); 2597ec681f3Smrg exit(1); 2607ec681f3Smrg } 2617ec681f3Smrg 2627ec681f3Smrg static struct option longopts[] = { 2637ec681f3Smrg { "id", optional_argument, NULL, 'i' }, 2647ec681f3Smrg { "gpu", optional_argument, NULL, 'g' }, 2657ec681f3Smrg { "verbose", no_argument, &verbose, 'v' }, 2667ec681f3Smrg { NULL, 0, NULL, 0 } 2677ec681f3Smrg }; 2687ec681f3Smrg 2697ec681f3Smrg static struct { 2707ec681f3Smrg const char *name; 2717ec681f3Smrg unsigned major, minor; 2727ec681f3Smrg } gpus[] = { 2737ec681f3Smrg { "G71", 6, 0 }, 2747ec681f3Smrg { "G72", 6, 2 }, 2757ec681f3Smrg { "G51", 7, 0 }, 2767ec681f3Smrg { "G76", 7, 1 }, 2777ec681f3Smrg { "G52", 7, 2 }, 2787ec681f3Smrg { "G31", 7, 3 }, 2797ec681f3Smrg { "G77", 9, 0 }, 2807ec681f3Smrg { "G57", 9, 1 }, 2817ec681f3Smrg { "G78", 9, 2 }, 2827ec681f3Smrg { "G57", 9, 3 }, 2837ec681f3Smrg { "G68", 9, 4 }, 2847ec681f3Smrg { "G78AE", 9, 5 }, 2857ec681f3Smrg }; 2867ec681f3Smrg 2877ec681f3Smrg while ((c = getopt_long(argc, argv, "v:", longopts, NULL)) != -1) { 2887ec681f3Smrg 2897ec681f3Smrg switch (c) { 2907ec681f3Smrg case 'i': 2917ec681f3Smrg gpu_id = atoi(optarg); 2927ec681f3Smrg 2937ec681f3Smrg if (!gpu_id) { 2947ec681f3Smrg fprintf(stderr, "Expected GPU ID, got %s\n", optarg); 2957ec681f3Smrg return 1; 2967ec681f3Smrg } 2977ec681f3Smrg 2987ec681f3Smrg break; 2997ec681f3Smrg case 'g': 3007ec681f3Smrg gpu_id = 0; 3017ec681f3Smrg 3027ec681f3Smrg /* Compatibility with the Arm compiler */ 3037ec681f3Smrg if (strncmp(optarg, "Mali-", 5) == 0) optarg += 5; 3047ec681f3Smrg 3057ec681f3Smrg for (unsigned i = 0; i < ARRAY_SIZE(gpus); ++i) { 3067ec681f3Smrg if (strcmp(gpus[i].name, optarg)) continue; 3077ec681f3Smrg 3087ec681f3Smrg unsigned major = gpus[i].major; 3097ec681f3Smrg unsigned minor = gpus[i].minor; 3107ec681f3Smrg 3117ec681f3Smrg gpu_id = (major << 12) | (minor << 8); 3127ec681f3Smrg break; 3137ec681f3Smrg } 3147ec681f3Smrg 3157ec681f3Smrg if (!gpu_id) { 3167ec681f3Smrg fprintf(stderr, "Unknown GPU %s\n", optarg); 3177ec681f3Smrg return 1; 3187ec681f3Smrg } 3197ec681f3Smrg 3207ec681f3Smrg break; 3217ec681f3Smrg default: 3227ec681f3Smrg break; 3237ec681f3Smrg } 3247ec681f3Smrg } 3257ec681f3Smrg 3267ec681f3Smrg if (strcmp(argv[optind], "compile") == 0) 3277ec681f3Smrg compile_shader(argc - optind - 1, &argv[optind + 1]); 3287ec681f3Smrg else if (strcmp(argv[optind], "disasm") == 0) 3297ec681f3Smrg disassemble(argv[optind + 1]); 3307ec681f3Smrg else { 3317ec681f3Smrg fprintf(stderr, "Unknown command. Valid: compile/disasm\n"); 3327ec681f3Smrg return 1; 3337ec681f3Smrg } 3347ec681f3Smrg 3357ec681f3Smrg return 0; 3367ec681f3Smrg} 337