17ec681f3Smrg/* 27ec681f3Smrg * Copyright (C) 2019 Collabora, Ltd. 37ec681f3Smrg * 47ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining a 57ec681f3Smrg * copy of this software and associated documentation files (the "Software"), 67ec681f3Smrg * to deal in the Software without restriction, including without limitation 77ec681f3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 87ec681f3Smrg * and/or sell copies of the Software, and to permit persons to whom the 97ec681f3Smrg * Software is furnished to do so, subject to the following conditions: 107ec681f3Smrg * 117ec681f3Smrg * The above copyright notice and this permission notice (including the next 127ec681f3Smrg * paragraph) shall be included in all copies or substantial portions of the 137ec681f3Smrg * Software. 147ec681f3Smrg * 157ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 167ec681f3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 177ec681f3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 187ec681f3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 197ec681f3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 207ec681f3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 217ec681f3Smrg * SOFTWARE. 227ec681f3Smrg * 237ec681f3Smrg * Authors (Collabora): 247ec681f3Smrg * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> 257ec681f3Smrg */ 267ec681f3Smrg 277ec681f3Smrg#include "compiler.h" 287ec681f3Smrg 297ec681f3Smrg/* Midgard texture/derivative operations have a pair of bits controlling the 307ec681f3Smrg * behaviour of helper invocations: 317ec681f3Smrg * 327ec681f3Smrg * - Should a helper invocation terminate after executing this instruction? 337ec681f3Smrg * - Should a helper invocation actually execute this instruction? 347ec681f3Smrg * 357ec681f3Smrg * The terminate bit should be set on the last instruction requiring helper 367ec681f3Smrg * invocations. Without control flow, that's literally the last instruction; 377ec681f3Smrg * with control flow, there may be multiple such instructions (with ifs) or no 387ec681f3Smrg * such instruction (with loops). 397ec681f3Smrg * 407ec681f3Smrg * The execute bit should be set if the value of this instruction is required 417ec681f3Smrg * by a future instruction requiring helper invocations. Consider: 427ec681f3Smrg * 437ec681f3Smrg * 0 = texture ... 447ec681f3Smrg * 1 = fmul 0, #10 457ec681f3Smrg * 2 = dfdx 1 467ec681f3Smrg * store 2 477ec681f3Smrg * 487ec681f3Smrg * Since the derivative calculation 2 requires helper invocations, the value 1 497ec681f3Smrg * must be calculated by helper invocations, and since it depends on 0, 0 must 507ec681f3Smrg * be calculated by helpers. Hence the texture op has the execute bit set, and 517ec681f3Smrg * the derivative op has the terminate bit set. 527ec681f3Smrg * 537ec681f3Smrg * Calculating the terminate bit occurs by forward dataflow analysis to 547ec681f3Smrg * determine which blocks require helper invocations. A block requires 557ec681f3Smrg * invocations in if any of its instructions use helper invocations, or if it 567ec681f3Smrg * depends on a block that requires invocation. With that analysis, the 577ec681f3Smrg * terminate bit is set on the last instruction using invocations within any 587ec681f3Smrg * block that does *not* require invocations out. 597ec681f3Smrg * 607ec681f3Smrg * Likewise, calculating the execute bit requires backward dataflow analysis 617ec681f3Smrg * with union as the join operation and the generating set being the union of 627ec681f3Smrg * sources of instructions writing executed values. 637ec681f3Smrg */ 647ec681f3Smrg 657ec681f3Smrg/* Does a block use helpers directly */ 667ec681f3Smrgstatic bool 677ec681f3Smrgmir_block_uses_helpers(gl_shader_stage stage, midgard_block *block) 687ec681f3Smrg{ 697ec681f3Smrg mir_foreach_instr_in_block(block, ins) { 707ec681f3Smrg if (ins->type != TAG_TEXTURE_4) continue; 717ec681f3Smrg if (mir_op_computes_derivatives(stage, ins->op)) 727ec681f3Smrg return true; 737ec681f3Smrg } 747ec681f3Smrg 757ec681f3Smrg return false; 767ec681f3Smrg} 777ec681f3Smrg 787ec681f3Smrgstatic bool 797ec681f3Smrgmir_block_terminates_helpers(midgard_block *block) 807ec681f3Smrg{ 817ec681f3Smrg /* Can't terminate if there are no helpers */ 827ec681f3Smrg if (!block->helpers_in) 837ec681f3Smrg return false; 847ec681f3Smrg 857ec681f3Smrg /* Can't terminate if a successor needs helpers */ 867ec681f3Smrg pan_foreach_successor((&block->base), succ) { 877ec681f3Smrg if (((midgard_block *) succ)->helpers_in) 887ec681f3Smrg return false; 897ec681f3Smrg } 907ec681f3Smrg 917ec681f3Smrg /* Otherwise we terminate */ 927ec681f3Smrg return true; 937ec681f3Smrg} 947ec681f3Smrg 957ec681f3Smrgvoid 967ec681f3Smrgmir_analyze_helper_terminate(compiler_context *ctx) 977ec681f3Smrg{ 987ec681f3Smrg /* Set blocks as directly requiring helpers, and if they do add them to 997ec681f3Smrg * the worklist to propagate to their predecessors */ 1007ec681f3Smrg 1017ec681f3Smrg struct set *worklist = _mesa_set_create(NULL, 1027ec681f3Smrg _mesa_hash_pointer, 1037ec681f3Smrg _mesa_key_pointer_equal); 1047ec681f3Smrg 1057ec681f3Smrg struct set *visited = _mesa_set_create(NULL, 1067ec681f3Smrg _mesa_hash_pointer, 1077ec681f3Smrg _mesa_key_pointer_equal); 1087ec681f3Smrg 1097ec681f3Smrg mir_foreach_block(ctx, _block) { 1107ec681f3Smrg midgard_block *block = (midgard_block *) _block; 1117ec681f3Smrg block->helpers_in |= mir_block_uses_helpers(ctx->stage, block); 1127ec681f3Smrg 1137ec681f3Smrg if (block->helpers_in) 1147ec681f3Smrg _mesa_set_add(worklist, _block); 1157ec681f3Smrg } 1167ec681f3Smrg 1177ec681f3Smrg /* Next, propagate back. Since there are a finite number of blocks, the 1187ec681f3Smrg * worklist (a subset of all the blocks) is finite. Since a block can 1197ec681f3Smrg * only be added to the worklist if it is not on the visited list and 1207ec681f3Smrg * the visited list - also a subset of the blocks - grows every 1217ec681f3Smrg * iteration, the algorithm must terminate. */ 1227ec681f3Smrg 1237ec681f3Smrg struct set_entry *cur; 1247ec681f3Smrg 1257ec681f3Smrg while((cur = _mesa_set_next_entry(worklist, NULL)) != NULL) { 1267ec681f3Smrg /* Pop off a block requiring helpers */ 1277ec681f3Smrg pan_block *blk = (struct pan_block *) cur->key; 1287ec681f3Smrg _mesa_set_remove(worklist, cur); 1297ec681f3Smrg 1307ec681f3Smrg /* Its predecessors also require helpers */ 1317ec681f3Smrg pan_foreach_predecessor(blk, pred) { 1327ec681f3Smrg if (!_mesa_set_search(visited, pred)) { 1337ec681f3Smrg ((midgard_block *) pred)->helpers_in = true; 1347ec681f3Smrg _mesa_set_add(worklist, pred); 1357ec681f3Smrg } 1367ec681f3Smrg } 1377ec681f3Smrg 1387ec681f3Smrg _mesa_set_add(visited, blk); 1397ec681f3Smrg } 1407ec681f3Smrg 1417ec681f3Smrg _mesa_set_destroy(visited, NULL); 1427ec681f3Smrg _mesa_set_destroy(worklist, NULL); 1437ec681f3Smrg 1447ec681f3Smrg /* Finally, set helper_terminate on the last derivative-calculating 1457ec681f3Smrg * instruction in a block that terminates helpers */ 1467ec681f3Smrg mir_foreach_block(ctx, _block) { 1477ec681f3Smrg midgard_block *block = (midgard_block *) _block; 1487ec681f3Smrg 1497ec681f3Smrg if (!mir_block_terminates_helpers(block)) 1507ec681f3Smrg continue; 1517ec681f3Smrg 1527ec681f3Smrg mir_foreach_instr_in_block_rev(block, ins) { 1537ec681f3Smrg if (ins->type != TAG_TEXTURE_4) continue; 1547ec681f3Smrg if (!mir_op_computes_derivatives(ctx->stage, ins->op)) continue; 1557ec681f3Smrg 1567ec681f3Smrg ins->helper_terminate = true; 1577ec681f3Smrg break; 1587ec681f3Smrg } 1597ec681f3Smrg } 1607ec681f3Smrg} 1617ec681f3Smrg 1627ec681f3Smrgstatic bool 1637ec681f3Smrgmir_helper_block_update(BITSET_WORD *deps, pan_block *_block, unsigned temp_count) 1647ec681f3Smrg{ 1657ec681f3Smrg bool progress = false; 1667ec681f3Smrg midgard_block *block = (midgard_block *) _block; 1677ec681f3Smrg 1687ec681f3Smrg mir_foreach_instr_in_block_rev(block, ins) { 1697ec681f3Smrg /* Ensure we write to a helper dependency */ 1707ec681f3Smrg if (ins->dest >= temp_count || !BITSET_TEST(deps, ins->dest)) 1717ec681f3Smrg continue; 1727ec681f3Smrg 1737ec681f3Smrg /* Then add all of our dependencies */ 1747ec681f3Smrg mir_foreach_src(ins, s) { 1757ec681f3Smrg if (ins->src[s] >= temp_count) 1767ec681f3Smrg continue; 1777ec681f3Smrg 1787ec681f3Smrg /* Progress if the dependency set changes */ 1797ec681f3Smrg progress |= !BITSET_TEST(deps, ins->src[s]); 1807ec681f3Smrg BITSET_SET(deps, ins->src[s]); 1817ec681f3Smrg } 1827ec681f3Smrg } 1837ec681f3Smrg 1847ec681f3Smrg return progress; 1857ec681f3Smrg} 1867ec681f3Smrg 1877ec681f3Smrgvoid 1887ec681f3Smrgmir_analyze_helper_requirements(compiler_context *ctx) 1897ec681f3Smrg{ 1907ec681f3Smrg mir_compute_temp_count(ctx); 1917ec681f3Smrg unsigned temp_count = ctx->temp_count; 1927ec681f3Smrg BITSET_WORD *deps = calloc(sizeof(BITSET_WORD), BITSET_WORDS(temp_count)); 1937ec681f3Smrg 1947ec681f3Smrg /* Initialize with the sources of instructions consuming 1957ec681f3Smrg * derivatives */ 1967ec681f3Smrg 1977ec681f3Smrg mir_foreach_instr_global(ctx, ins) { 1987ec681f3Smrg if (ins->type != TAG_TEXTURE_4) continue; 1997ec681f3Smrg if (ins->dest >= ctx->temp_count) continue; 2007ec681f3Smrg if (!mir_op_computes_derivatives(ctx->stage, ins->op)) continue; 2017ec681f3Smrg 2027ec681f3Smrg mir_foreach_src(ins, s) { 2037ec681f3Smrg if (ins->src[s] < temp_count) 2047ec681f3Smrg BITSET_SET(deps, ins->src[s]); 2057ec681f3Smrg } 2067ec681f3Smrg } 2077ec681f3Smrg 2087ec681f3Smrg /* Propagate that up */ 2097ec681f3Smrg 2107ec681f3Smrg struct set *work_list = _mesa_set_create(NULL, 2117ec681f3Smrg _mesa_hash_pointer, 2127ec681f3Smrg _mesa_key_pointer_equal); 2137ec681f3Smrg 2147ec681f3Smrg struct set *visited = _mesa_set_create(NULL, 2157ec681f3Smrg _mesa_hash_pointer, 2167ec681f3Smrg _mesa_key_pointer_equal); 2177ec681f3Smrg 2187ec681f3Smrg struct set_entry *cur = _mesa_set_add(work_list, pan_exit_block(&ctx->blocks)); 2197ec681f3Smrg 2207ec681f3Smrg do { 2217ec681f3Smrg pan_block *blk = (struct pan_block *) cur->key; 2227ec681f3Smrg _mesa_set_remove(work_list, cur); 2237ec681f3Smrg 2247ec681f3Smrg bool progress = mir_helper_block_update(deps, blk, temp_count); 2257ec681f3Smrg 2267ec681f3Smrg if (progress || !_mesa_set_search(visited, blk)) { 2277ec681f3Smrg pan_foreach_predecessor(blk, pred) 2287ec681f3Smrg _mesa_set_add(work_list, pred); 2297ec681f3Smrg } 2307ec681f3Smrg 2317ec681f3Smrg _mesa_set_add(visited, blk); 2327ec681f3Smrg } while((cur = _mesa_set_next_entry(work_list, NULL)) != NULL); 2337ec681f3Smrg 2347ec681f3Smrg _mesa_set_destroy(visited, NULL); 2357ec681f3Smrg _mesa_set_destroy(work_list, NULL); 2367ec681f3Smrg 2377ec681f3Smrg /* Set the execute bits */ 2387ec681f3Smrg 2397ec681f3Smrg mir_foreach_instr_global(ctx, ins) { 2407ec681f3Smrg if (ins->type != TAG_TEXTURE_4) continue; 2417ec681f3Smrg if (ins->dest >= ctx->temp_count) continue; 2427ec681f3Smrg 2437ec681f3Smrg ins->helper_execute = BITSET_TEST(deps, ins->dest); 2447ec681f3Smrg } 2457ec681f3Smrg 2467ec681f3Smrg free(deps); 2477ec681f3Smrg} 248