1/* 2 * Copyright (C) 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 25/* Instructions, enums and structures for CNL. 26 * 27 * This file has been generated, do not hand edit. 28 */ 29 30#ifndef GEN10_PACK_H 31#define GEN10_PACK_H 32 33#include <stdio.h> 34#include <stdint.h> 35#include <stdbool.h> 36#include <assert.h> 37#include <math.h> 38 39#ifndef __gen_validate_value 40#define __gen_validate_value(x) 41#endif 42 43#ifndef __gen_field_functions 44#define __gen_field_functions 45 46#ifdef NDEBUG 47#define NDEBUG_UNUSED __attribute__((unused)) 48#else 49#define NDEBUG_UNUSED 50#endif 51 52union __gen_value { 53 float f; 54 uint32_t dw; 55}; 56 57static inline uint64_t 58__gen_mbo(uint32_t start, uint32_t end) 59{ 60 return (~0ull >> (64 - (end - start + 1))) << start; 61} 62 63static inline uint64_t 64__gen_uint(uint64_t v, uint32_t start, NDEBUG_UNUSED uint32_t end) 65{ 66 __gen_validate_value(v); 67 68#ifndef NDEBUG 69 const int width = end - start + 1; 70 if (width < 64) { 71 const uint64_t max = (1ull << width) - 1; 72 assert(v <= max); 73 } 74#endif 75 76 return v << start; 77} 78 79static inline uint64_t 80__gen_sint(int64_t v, uint32_t start, uint32_t end) 81{ 82 const int width = end - start + 1; 83 84 __gen_validate_value(v); 85 86#ifndef NDEBUG 87 if (width < 64) { 88 const int64_t max = (1ll << (width - 1)) - 1; 89 const int64_t min = -(1ll << (width - 1)); 90 assert(min <= v && v <= max); 91 } 92#endif 93 94 const uint64_t mask = ~0ull >> (64 - width); 95 96 return (v & mask) << start; 97} 98 99static inline uint64_t 100__gen_offset(uint64_t v, NDEBUG_UNUSED uint32_t start, NDEBUG_UNUSED uint32_t end) 101{ 102 __gen_validate_value(v); 103#ifndef NDEBUG 104 uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; 105 106 assert((v & ~mask) == 0); 107#endif 108 109 return v; 110} 111 112static inline uint32_t 113__gen_float(float v) 114{ 115 __gen_validate_value(v); 116 return ((union __gen_value) { .f = (v) }).dw; 117} 118 119static inline uint64_t 120__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) 121{ 122 __gen_validate_value(v); 123 124 const float factor = (1 << fract_bits); 125 126#ifndef NDEBUG 127 const float max = ((1 << (end - start)) - 1) / factor; 128 const float min = -(1 << (end - start)) / factor; 129 assert(min <= v && v <= max); 130#endif 131 132 const int64_t int_val = llroundf(v * factor); 133 const uint64_t mask = ~0ull >> (64 - (end - start + 1)); 134 135 return (int_val & mask) << start; 136} 137 138static inline uint64_t 139__gen_ufixed(float v, uint32_t start, NDEBUG_UNUSED uint32_t end, uint32_t fract_bits) 140{ 141 __gen_validate_value(v); 142 143 const float factor = (1 << fract_bits); 144 145#ifndef NDEBUG 146 const float max = ((1 << (end - start + 1)) - 1) / factor; 147 const float min = 0.0f; 148 assert(min <= v && v <= max); 149#endif 150 151 const uint64_t uint_val = llroundf(v * factor); 152 153 return uint_val << start; 154} 155 156#ifndef __gen_address_type 157#error #define __gen_address_type before including this file 158#endif 159 160#ifndef __gen_user_data 161#error #define __gen_combine_address before including this file 162#endif 163 164#undef NDEBUG_UNUSED 165 166#endif 167 168 169enum GEN10_3D_Color_Buffer_Blend_Factor { 170 BLENDFACTOR_ONE = 1, 171 BLENDFACTOR_SRC_COLOR = 2, 172 BLENDFACTOR_SRC_ALPHA = 3, 173 BLENDFACTOR_DST_ALPHA = 4, 174 BLENDFACTOR_DST_COLOR = 5, 175 BLENDFACTOR_SRC_ALPHA_SATURATE = 6, 176 BLENDFACTOR_CONST_COLOR = 7, 177 BLENDFACTOR_CONST_ALPHA = 8, 178 BLENDFACTOR_SRC1_COLOR = 9, 179 BLENDFACTOR_SRC1_ALPHA = 10, 180 BLENDFACTOR_ZERO = 17, 181 BLENDFACTOR_INV_SRC_COLOR = 18, 182 BLENDFACTOR_INV_SRC_ALPHA = 19, 183 BLENDFACTOR_INV_DST_ALPHA = 20, 184 BLENDFACTOR_INV_DST_COLOR = 21, 185 BLENDFACTOR_INV_CONST_COLOR = 23, 186 BLENDFACTOR_INV_CONST_ALPHA = 24, 187 BLENDFACTOR_INV_SRC1_COLOR = 25, 188 BLENDFACTOR_INV_SRC1_ALPHA = 26, 189}; 190 191enum GEN10_3D_Color_Buffer_Blend_Function { 192 BLENDFUNCTION_ADD = 0, 193 BLENDFUNCTION_SUBTRACT = 1, 194 BLENDFUNCTION_REVERSE_SUBTRACT = 2, 195 BLENDFUNCTION_MIN = 3, 196 BLENDFUNCTION_MAX = 4, 197}; 198 199enum GEN10_3D_Compare_Function { 200 COMPAREFUNCTION_ALWAYS = 0, 201 COMPAREFUNCTION_NEVER = 1, 202 COMPAREFUNCTION_LESS = 2, 203 COMPAREFUNCTION_EQUAL = 3, 204 COMPAREFUNCTION_LEQUAL = 4, 205 COMPAREFUNCTION_GREATER = 5, 206 COMPAREFUNCTION_NOTEQUAL = 6, 207 COMPAREFUNCTION_GEQUAL = 7, 208}; 209 210enum GEN10_3D_Logic_Op_Function { 211 LOGICOP_CLEAR = 0, 212 LOGICOP_NOR = 1, 213 LOGICOP_AND_INVERTED = 2, 214 LOGICOP_COPY_INVERTED = 3, 215 LOGICOP_AND_REVERSE = 4, 216 LOGICOP_INVERT = 5, 217 LOGICOP_XOR = 6, 218 LOGICOP_NAND = 7, 219 LOGICOP_AND = 8, 220 LOGICOP_EQUIV = 9, 221 LOGICOP_NOOP = 10, 222 LOGICOP_OR_INVERTED = 11, 223 LOGICOP_COPY = 12, 224 LOGICOP_OR_REVERSE = 13, 225 LOGICOP_OR = 14, 226 LOGICOP_SET = 15, 227}; 228 229enum GEN10_3D_Prim_Topo_Type { 230 _3DPRIM_POINTLIST = 1, 231 _3DPRIM_LINELIST = 2, 232 _3DPRIM_LINESTRIP = 3, 233 _3DPRIM_TRILIST = 4, 234 _3DPRIM_TRISTRIP = 5, 235 _3DPRIM_TRIFAN = 6, 236 _3DPRIM_QUADLIST = 7, 237 _3DPRIM_QUADSTRIP = 8, 238 _3DPRIM_LINELIST_ADJ = 9, 239 _3DPRIM_LINESTRIP_ADJ = 10, 240 _3DPRIM_TRILIST_ADJ = 11, 241 _3DPRIM_TRISTRIP_ADJ = 12, 242 _3DPRIM_TRISTRIP_REVERSE = 13, 243 _3DPRIM_POLYGON = 14, 244 _3DPRIM_RECTLIST = 15, 245 _3DPRIM_LINELOOP = 16, 246 _3DPRIM_POINTLIST_BF = 17, 247 _3DPRIM_LINESTRIP_CONT = 18, 248 _3DPRIM_LINESTRIP_BF = 19, 249 _3DPRIM_LINESTRIP_CONT_BF = 20, 250 _3DPRIM_TRIFAN_NOSTIPPLE = 22, 251 _3DPRIM_PATCHLIST_1 = 32, 252 _3DPRIM_PATCHLIST_2 = 33, 253 _3DPRIM_PATCHLIST_3 = 34, 254 _3DPRIM_PATCHLIST_4 = 35, 255 _3DPRIM_PATCHLIST_5 = 36, 256 _3DPRIM_PATCHLIST_6 = 37, 257 _3DPRIM_PATCHLIST_7 = 38, 258 _3DPRIM_PATCHLIST_8 = 39, 259 _3DPRIM_PATCHLIST_9 = 40, 260 _3DPRIM_PATCHLIST_10 = 41, 261 _3DPRIM_PATCHLIST_11 = 42, 262 _3DPRIM_PATCHLIST_12 = 43, 263 _3DPRIM_PATCHLIST_13 = 44, 264 _3DPRIM_PATCHLIST_14 = 45, 265 _3DPRIM_PATCHLIST_15 = 46, 266 _3DPRIM_PATCHLIST_16 = 47, 267 _3DPRIM_PATCHLIST_17 = 48, 268 _3DPRIM_PATCHLIST_18 = 49, 269 _3DPRIM_PATCHLIST_19 = 50, 270 _3DPRIM_PATCHLIST_20 = 51, 271 _3DPRIM_PATCHLIST_21 = 52, 272 _3DPRIM_PATCHLIST_22 = 53, 273 _3DPRIM_PATCHLIST_23 = 54, 274 _3DPRIM_PATCHLIST_24 = 55, 275 _3DPRIM_PATCHLIST_25 = 56, 276 _3DPRIM_PATCHLIST_26 = 57, 277 _3DPRIM_PATCHLIST_27 = 58, 278 _3DPRIM_PATCHLIST_28 = 59, 279 _3DPRIM_PATCHLIST_29 = 60, 280 _3DPRIM_PATCHLIST_30 = 61, 281 _3DPRIM_PATCHLIST_31 = 62, 282 _3DPRIM_PATCHLIST_32 = 63, 283}; 284 285enum GEN10_3D_Stencil_Operation { 286 STENCILOP_KEEP = 0, 287 STENCILOP_ZERO = 1, 288 STENCILOP_REPLACE = 2, 289 STENCILOP_INCRSAT = 3, 290 STENCILOP_DECRSAT = 4, 291 STENCILOP_INCR = 5, 292 STENCILOP_DECR = 6, 293 STENCILOP_INVERT = 7, 294}; 295 296enum GEN10_3D_Vertex_Component_Control { 297 VFCOMP_NOSTORE = 0, 298 VFCOMP_STORE_SRC = 1, 299 VFCOMP_STORE_0 = 2, 300 VFCOMP_STORE_1_FP = 3, 301 VFCOMP_STORE_1_INT = 4, 302 VFCOMP_STORE_PID = 7, 303}; 304 305enum GEN10_Atomic_OPCODE { 306 MI_ATOMIC_OP_AND = 1, 307 MI_ATOMIC_OP_OR = 2, 308 MI_ATOMIC_OP_XOR = 3, 309 MI_ATOMIC_OP_MOVE = 4, 310 MI_ATOMIC_OP_INC = 5, 311 MI_ATOMIC_OP_DEC = 6, 312 MI_ATOMIC_OP_ADD = 7, 313 MI_ATOMIC_OP_SUB = 8, 314 MI_ATOMIC_OP_RSUB = 9, 315 MI_ATOMIC_OP_IMAX = 10, 316 MI_ATOMIC_OP_IMIN = 11, 317 MI_ATOMIC_OP_UMAX = 12, 318 MI_ATOMIC_OP_UMIN = 13, 319 MI_ATOMIC_OP_CMP_WR = 14, 320 MI_ATOMIC_OP_PREDEC = 15, 321 MI_ATOMIC_OP_AND8B = 33, 322 MI_ATOMIC_OP_OR8B = 34, 323 MI_ATOMIC_OP_XOR8B = 35, 324 MI_ATOMIC_OP_MOVE8B = 36, 325 MI_ATOMIC_OP_INC8B = 37, 326 MI_ATOMIC_OP_DEC8B = 38, 327 MI_ATOMIC_OP_ADD8B = 39, 328 MI_ATOMIC_OP_SUB8B = 40, 329 MI_ATOMIC_OP_RSUB8B = 41, 330 MI_ATOMIC_OP_IMAX8B = 42, 331 MI_ATOMIC_OP_IMIN8B = 43, 332 MI_ATOMIC_OP_UMAX8B = 44, 333 MI_ATOMIC_OP_UMIN8B = 45, 334 MI_ATOMIC_OP_CMP_WR8B = 46, 335 MI_ATOMIC_OP_PREDEC8B = 47, 336 MI_ATOMIC_OP_CMP_WR16B = 78, 337}; 338 339enum GEN10_Attribute_Component_Format { 340 ACF_DISABLED = 0, 341 ACF_XY = 1, 342 ACF_XYZ = 2, 343 ACF_XYZW = 3, 344}; 345 346enum GEN10_COMPONENT_ENABLES { 347 CE_NONE = 0, 348 CE_X = 1, 349 CE_Y = 2, 350 CE_XY = 3, 351 CE_Z = 4, 352 CE_XZ = 5, 353 CE_YZ = 6, 354 CE_XYZ = 7, 355 CE_W = 8, 356 CE_XW = 9, 357 CE_YW = 10, 358 CE_XYW = 11, 359 CE_ZW = 12, 360 CE_XZW = 13, 361 CE_YZW = 14, 362 CE_XYZW = 15, 363}; 364 365enum GEN10_ShaderChannelSelect { 366 SCS_ZERO = 0, 367 SCS_ONE = 1, 368 SCS_RED = 4, 369 SCS_GREEN = 5, 370 SCS_BLUE = 6, 371 SCS_ALPHA = 7, 372}; 373 374enum GEN10_TextureCoordinateMode { 375 TCM_WRAP = 0, 376 TCM_MIRROR = 1, 377 TCM_CLAMP = 2, 378 TCM_CUBE = 3, 379 TCM_CLAMP_BORDER = 4, 380 TCM_MIRROR_ONCE = 5, 381 TCM_HALF_BORDER = 6, 382}; 383 384enum GEN10_WRAP_SHORTEST_ENABLE { 385 WSE_X = 1, 386 WSE_Y = 2, 387 WSE_XY = 3, 388 WSE_Z = 4, 389 WSE_XZ = 5, 390 WSE_YZ = 6, 391 WSE_XYZ = 7, 392 WSE_W = 8, 393 WSE_XW = 9, 394 WSE_YW = 10, 395 WSE_XYW = 11, 396 WSE_ZW = 12, 397 WSE_XZW = 13, 398 WSE_YZW = 14, 399 WSE_XYZW = 15, 400}; 401 402#define GEN10_3DSTATE_CONSTANT_BODY_length 10 403struct GEN10_3DSTATE_CONSTANT_BODY { 404 uint32_t ReadLength[4]; 405 __gen_address_type Buffer[4]; 406}; 407 408static inline void 409GEN10_3DSTATE_CONSTANT_BODY_pack(__attribute__((unused)) __gen_user_data *data, 410 __attribute__((unused)) void * restrict dst, 411 __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_BODY * restrict values) 412{ 413 uint32_t * restrict dw = (uint32_t * restrict) dst; 414 415 dw[0] = 416 __gen_uint(values->ReadLength[0], 0, 15) | 417 __gen_uint(values->ReadLength[1], 16, 31); 418 419 dw[1] = 420 __gen_uint(values->ReadLength[2], 0, 15) | 421 __gen_uint(values->ReadLength[3], 16, 31); 422 423 const uint64_t v2_address = 424 __gen_combine_address(data, &dw[2], values->Buffer[0], 0); 425 dw[2] = v2_address; 426 dw[3] = v2_address >> 32; 427 428 const uint64_t v4_address = 429 __gen_combine_address(data, &dw[4], values->Buffer[1], 0); 430 dw[4] = v4_address; 431 dw[5] = v4_address >> 32; 432 433 const uint64_t v6_address = 434 __gen_combine_address(data, &dw[6], values->Buffer[2], 0); 435 dw[6] = v6_address; 436 dw[7] = v6_address >> 32; 437 438 const uint64_t v8_address = 439 __gen_combine_address(data, &dw[8], values->Buffer[3], 0); 440 dw[8] = v8_address; 441 dw[9] = v8_address >> 32; 442} 443 444#define GEN10_BINDING_TABLE_EDIT_ENTRY_length 1 445struct GEN10_BINDING_TABLE_EDIT_ENTRY { 446 uint64_t SurfaceStatePointer; 447 uint32_t BindingTableIndex; 448}; 449 450static inline void 451GEN10_BINDING_TABLE_EDIT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 452 __attribute__((unused)) void * restrict dst, 453 __attribute__((unused)) const struct GEN10_BINDING_TABLE_EDIT_ENTRY * restrict values) 454{ 455 uint32_t * restrict dw = (uint32_t * restrict) dst; 456 457 dw[0] = 458 __gen_offset(values->SurfaceStatePointer, 0, 15) | 459 __gen_uint(values->BindingTableIndex, 16, 23); 460} 461 462#define GEN10_BINDING_TABLE_STATE_length 1 463struct GEN10_BINDING_TABLE_STATE { 464 uint64_t SurfaceStatePointer; 465}; 466 467static inline void 468GEN10_BINDING_TABLE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 469 __attribute__((unused)) void * restrict dst, 470 __attribute__((unused)) const struct GEN10_BINDING_TABLE_STATE * restrict values) 471{ 472 uint32_t * restrict dw = (uint32_t * restrict) dst; 473 474 dw[0] = 475 __gen_offset(values->SurfaceStatePointer, 6, 31); 476} 477 478#define GEN10_BLEND_STATE_ENTRY_length 2 479struct GEN10_BLEND_STATE_ENTRY { 480 bool WriteDisableBlue; 481 bool WriteDisableGreen; 482 bool WriteDisableRed; 483 bool WriteDisableAlpha; 484 enum GEN10_3D_Color_Buffer_Blend_Function AlphaBlendFunction; 485 enum GEN10_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 486 enum GEN10_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 487 enum GEN10_3D_Color_Buffer_Blend_Function ColorBlendFunction; 488 enum GEN10_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 489 enum GEN10_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 490 bool ColorBufferBlendEnable; 491 bool PostBlendColorClampEnable; 492 bool PreBlendColorClampEnable; 493 uint32_t ColorClampRange; 494#define COLORCLAMP_UNORM 0 495#define COLORCLAMP_SNORM 1 496#define COLORCLAMP_RTFORMAT 2 497 bool PreBlendSourceOnlyClampEnable; 498 enum GEN10_3D_Logic_Op_Function LogicOpFunction; 499 bool LogicOpEnable; 500}; 501 502static inline void 503GEN10_BLEND_STATE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 504 __attribute__((unused)) void * restrict dst, 505 __attribute__((unused)) const struct GEN10_BLEND_STATE_ENTRY * restrict values) 506{ 507 uint32_t * restrict dw = (uint32_t * restrict) dst; 508 509 dw[0] = 510 __gen_uint(values->WriteDisableBlue, 0, 0) | 511 __gen_uint(values->WriteDisableGreen, 1, 1) | 512 __gen_uint(values->WriteDisableRed, 2, 2) | 513 __gen_uint(values->WriteDisableAlpha, 3, 3) | 514 __gen_uint(values->AlphaBlendFunction, 5, 7) | 515 __gen_uint(values->DestinationAlphaBlendFactor, 8, 12) | 516 __gen_uint(values->SourceAlphaBlendFactor, 13, 17) | 517 __gen_uint(values->ColorBlendFunction, 18, 20) | 518 __gen_uint(values->DestinationBlendFactor, 21, 25) | 519 __gen_uint(values->SourceBlendFactor, 26, 30) | 520 __gen_uint(values->ColorBufferBlendEnable, 31, 31); 521 522 dw[1] = 523 __gen_uint(values->PostBlendColorClampEnable, 0, 0) | 524 __gen_uint(values->PreBlendColorClampEnable, 1, 1) | 525 __gen_uint(values->ColorClampRange, 2, 3) | 526 __gen_uint(values->PreBlendSourceOnlyClampEnable, 4, 4) | 527 __gen_uint(values->LogicOpFunction, 27, 30) | 528 __gen_uint(values->LogicOpEnable, 31, 31); 529} 530 531#define GEN10_BLEND_STATE_length 1 532struct GEN10_BLEND_STATE { 533 uint32_t YDitherOffset; 534 uint32_t XDitherOffset; 535 bool ColorDitherEnable; 536 enum GEN10_3D_Compare_Function AlphaTestFunction; 537 bool AlphaTestEnable; 538 bool AlphaToCoverageDitherEnable; 539 bool AlphaToOneEnable; 540 bool IndependentAlphaBlendEnable; 541 bool AlphaToCoverageEnable; 542 /* variable length fields follow */ 543}; 544 545static inline void 546GEN10_BLEND_STATE_pack(__attribute__((unused)) __gen_user_data *data, 547 __attribute__((unused)) void * restrict dst, 548 __attribute__((unused)) const struct GEN10_BLEND_STATE * restrict values) 549{ 550 uint32_t * restrict dw = (uint32_t * restrict) dst; 551 552 dw[0] = 553 __gen_uint(values->YDitherOffset, 19, 20) | 554 __gen_uint(values->XDitherOffset, 21, 22) | 555 __gen_uint(values->ColorDitherEnable, 23, 23) | 556 __gen_uint(values->AlphaTestFunction, 24, 26) | 557 __gen_uint(values->AlphaTestEnable, 27, 27) | 558 __gen_uint(values->AlphaToCoverageDitherEnable, 28, 28) | 559 __gen_uint(values->AlphaToOneEnable, 29, 29) | 560 __gen_uint(values->IndependentAlphaBlendEnable, 30, 30) | 561 __gen_uint(values->AlphaToCoverageEnable, 31, 31); 562} 563 564#define GEN10_CC_VIEWPORT_length 2 565struct GEN10_CC_VIEWPORT { 566 float MinimumDepth; 567 float MaximumDepth; 568}; 569 570static inline void 571GEN10_CC_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 572 __attribute__((unused)) void * restrict dst, 573 __attribute__((unused)) const struct GEN10_CC_VIEWPORT * restrict values) 574{ 575 uint32_t * restrict dw = (uint32_t * restrict) dst; 576 577 dw[0] = 578 __gen_float(values->MinimumDepth); 579 580 dw[1] = 581 __gen_float(values->MaximumDepth); 582} 583 584#define GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_length 2 585struct GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY { 586 float Table1XFilterCoefficientn2; 587 float Table1YFilterCoefficientn2; 588 float Table1XFilterCoefficientn3; 589 float Table1YFilterCoefficientn3; 590 float Table1XFilterCoefficientn4; 591 float Table1YFilterCoefficientn4; 592 float Table1XFilterCoefficientn5; 593 float Table1YFilterCoefficientn5; 594}; 595 596static inline void 597GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(__attribute__((unused)) __gen_user_data *data, 598 __attribute__((unused)) void * restrict dst, 599 __attribute__((unused)) const struct GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY * restrict values) 600{ 601 uint32_t * restrict dw = (uint32_t * restrict) dst; 602 603 dw[0] = 604 __gen_sfixed(values->Table1XFilterCoefficientn2, 0, 7, 6) | 605 __gen_sfixed(values->Table1YFilterCoefficientn2, 8, 15, 6) | 606 __gen_sfixed(values->Table1XFilterCoefficientn3, 16, 23, 6) | 607 __gen_sfixed(values->Table1YFilterCoefficientn3, 24, 31, 6); 608 609 dw[1] = 610 __gen_sfixed(values->Table1XFilterCoefficientn4, 0, 7, 6) | 611 __gen_sfixed(values->Table1YFilterCoefficientn4, 8, 15, 6) | 612 __gen_sfixed(values->Table1XFilterCoefficientn5, 16, 23, 6) | 613 __gen_sfixed(values->Table1YFilterCoefficientn5, 24, 31, 6); 614} 615 616#define GEN10_CLEAR_COLOR_length 8 617struct GEN10_CLEAR_COLOR { 618 int32_t RawClearColorRed; 619 int32_t RawClearColorGreen; 620 int32_t RawClearColorBlue; 621 int32_t RawClearColorAlpha; 622}; 623 624static inline void 625GEN10_CLEAR_COLOR_pack(__attribute__((unused)) __gen_user_data *data, 626 __attribute__((unused)) void * restrict dst, 627 __attribute__((unused)) const struct GEN10_CLEAR_COLOR * restrict values) 628{ 629 uint32_t * restrict dw = (uint32_t * restrict) dst; 630 631 dw[0] = 632 __gen_sint(values->RawClearColorRed, 0, 31); 633 634 dw[1] = 635 __gen_sint(values->RawClearColorGreen, 0, 31); 636 637 dw[2] = 638 __gen_sint(values->RawClearColorBlue, 0, 31); 639 640 dw[3] = 641 __gen_sint(values->RawClearColorAlpha, 0, 31); 642 643 dw[4] = 0; 644 645 dw[5] = 0; 646 647 dw[6] = 0; 648 649 dw[7] = 0; 650} 651 652#define GEN10_COLOR_CALC_STATE_length 6 653struct GEN10_COLOR_CALC_STATE { 654 uint32_t AlphaTestFormat; 655#define ALPHATEST_UNORM8 0 656#define ALPHATEST_FLOAT32 1 657 bool RoundDisableFunctionDisable; 658 uint32_t AlphaReferenceValueAsUNORM8; 659 float AlphaReferenceValueAsFLOAT32; 660 float BlendConstantColorRed; 661 float BlendConstantColorGreen; 662 float BlendConstantColorBlue; 663 float BlendConstantColorAlpha; 664}; 665 666static inline void 667GEN10_COLOR_CALC_STATE_pack(__attribute__((unused)) __gen_user_data *data, 668 __attribute__((unused)) void * restrict dst, 669 __attribute__((unused)) const struct GEN10_COLOR_CALC_STATE * restrict values) 670{ 671 uint32_t * restrict dw = (uint32_t * restrict) dst; 672 673 dw[0] = 674 __gen_uint(values->AlphaTestFormat, 0, 0) | 675 __gen_uint(values->RoundDisableFunctionDisable, 15, 15); 676 677 dw[1] = 678 __gen_uint(values->AlphaReferenceValueAsUNORM8, 0, 31) | 679 __gen_float(values->AlphaReferenceValueAsFLOAT32); 680 681 dw[2] = 682 __gen_float(values->BlendConstantColorRed); 683 684 dw[3] = 685 __gen_float(values->BlendConstantColorGreen); 686 687 dw[4] = 688 __gen_float(values->BlendConstantColorBlue); 689 690 dw[5] = 691 __gen_float(values->BlendConstantColorAlpha); 692} 693 694#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length 1 695struct GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR { 696 uint32_t TargetFunctionID; 697 uint32_t EndOfThread; 698#define NoTermination 0 699#define EOT 1 700 uint32_t ExtendedMessageLength; 701}; 702 703static inline void 704GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_pack(__attribute__((unused)) __gen_user_data *data, 705 __attribute__((unused)) void * restrict dst, 706 __attribute__((unused)) const struct GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR * restrict values) 707{ 708 uint32_t * restrict dw = (uint32_t * restrict) dst; 709 710 dw[0] = 711 __gen_uint(values->TargetFunctionID, 0, 3) | 712 __gen_uint(values->EndOfThread, 5, 5) | 713 __gen_uint(values->ExtendedMessageLength, 6, 9); 714} 715 716#define GEN10_FILTER_COEFFICIENT_length 1 717struct GEN10_FILTER_COEFFICIENT { 718 float FilterCoefficient; 719}; 720 721static inline void 722GEN10_FILTER_COEFFICIENT_pack(__attribute__((unused)) __gen_user_data *data, 723 __attribute__((unused)) void * restrict dst, 724 __attribute__((unused)) const struct GEN10_FILTER_COEFFICIENT * restrict values) 725{ 726 uint32_t * restrict dw = (uint32_t * restrict) dst; 727 728 dw[0] = 729 __gen_sfixed(values->FilterCoefficient, 0, 7, 6); 730} 731 732#define GEN10_FRAMEDELTAQP_length 2 733struct GEN10_FRAMEDELTAQP { 734 int32_t FrameDeltaQP[8]; 735}; 736 737static inline void 738GEN10_FRAMEDELTAQP_pack(__attribute__((unused)) __gen_user_data *data, 739 __attribute__((unused)) void * restrict dst, 740 __attribute__((unused)) const struct GEN10_FRAMEDELTAQP * restrict values) 741{ 742 uint32_t * restrict dw = (uint32_t * restrict) dst; 743 744 dw[0] = 745 __gen_sint(values->FrameDeltaQP[0], 0, 7) | 746 __gen_sint(values->FrameDeltaQP[1], 8, 15) | 747 __gen_sint(values->FrameDeltaQP[2], 16, 23) | 748 __gen_sint(values->FrameDeltaQP[3], 24, 31); 749 750 dw[1] = 751 __gen_sint(values->FrameDeltaQP[4], 0, 7) | 752 __gen_sint(values->FrameDeltaQP[5], 8, 15) | 753 __gen_sint(values->FrameDeltaQP[6], 16, 23) | 754 __gen_sint(values->FrameDeltaQP[7], 24, 31); 755} 756 757#define GEN10_FRAMEDELTAQPRANGE_length 2 758struct GEN10_FRAMEDELTAQPRANGE { 759 uint32_t FrameDeltaQPRange[8]; 760}; 761 762static inline void 763GEN10_FRAMEDELTAQPRANGE_pack(__attribute__((unused)) __gen_user_data *data, 764 __attribute__((unused)) void * restrict dst, 765 __attribute__((unused)) const struct GEN10_FRAMEDELTAQPRANGE * restrict values) 766{ 767 uint32_t * restrict dw = (uint32_t * restrict) dst; 768 769 dw[0] = 770 __gen_uint(values->FrameDeltaQPRange[0], 0, 7) | 771 __gen_uint(values->FrameDeltaQPRange[1], 8, 15) | 772 __gen_uint(values->FrameDeltaQPRange[2], 16, 23) | 773 __gen_uint(values->FrameDeltaQPRange[3], 24, 31); 774 775 dw[1] = 776 __gen_uint(values->FrameDeltaQPRange[4], 0, 7) | 777 __gen_uint(values->FrameDeltaQPRange[5], 8, 15) | 778 __gen_uint(values->FrameDeltaQPRange[6], 16, 23) | 779 __gen_uint(values->FrameDeltaQPRange[7], 24, 31); 780} 781 782#define GEN10_GATHER_CONSTANT_ENTRY_length 1 783struct GEN10_GATHER_CONSTANT_ENTRY { 784 uint32_t BindingTableIndexOffset; 785 uint32_t ChannelMask; 786 uint64_t ConstantBufferOffset; 787}; 788 789static inline void 790GEN10_GATHER_CONSTANT_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 791 __attribute__((unused)) void * restrict dst, 792 __attribute__((unused)) const struct GEN10_GATHER_CONSTANT_ENTRY * restrict values) 793{ 794 uint32_t * restrict dw = (uint32_t * restrict) dst; 795 796 dw[0] = 797 __gen_uint(values->BindingTableIndexOffset, 0, 3) | 798 __gen_uint(values->ChannelMask, 4, 7) | 799 __gen_offset(values->ConstantBufferOffset, 8, 15); 800} 801 802#define GEN10_HEVC_ARBITRATION_PRIORITY_length 1 803struct GEN10_HEVC_ARBITRATION_PRIORITY { 804 uint32_t Priority; 805#define Highestpriority 0 806#define Secondhighestpriority 1 807#define Thirdhighestpriority 2 808#define Lowestpriority 3 809}; 810 811static inline void 812GEN10_HEVC_ARBITRATION_PRIORITY_pack(__attribute__((unused)) __gen_user_data *data, 813 __attribute__((unused)) void * restrict dst, 814 __attribute__((unused)) const struct GEN10_HEVC_ARBITRATION_PRIORITY * restrict values) 815{ 816 uint32_t * restrict dw = (uint32_t * restrict) dst; 817 818 dw[0] = 819 __gen_uint(values->Priority, 0, 1); 820} 821 822#define GEN10_MEMORYADDRESSATTRIBUTES_length 1 823struct GEN10_MEMORYADDRESSATTRIBUTES { 824 uint32_t MOCS; 825 struct GEN10_HEVC_ARBITRATION_PRIORITY ArbitrationPriorityControl; 826 bool MemoryCompressionEnable; 827 uint32_t MemoryCompressionMode; 828 uint32_t RowStoreScratchBufferCacheSelect; 829 uint32_t TiledResourceMode; 830#define TRMODE_NONE 0 831#define TRMODE_TILEYF 1 832#define TRMODE_TILEYS 2 833}; 834 835static inline void 836GEN10_MEMORYADDRESSATTRIBUTES_pack(__attribute__((unused)) __gen_user_data *data, 837 __attribute__((unused)) void * restrict dst, 838 __attribute__((unused)) const struct GEN10_MEMORYADDRESSATTRIBUTES * restrict values) 839{ 840 uint32_t * restrict dw = (uint32_t * restrict) dst; 841 842 uint32_t v0_0; 843 GEN10_HEVC_ARBITRATION_PRIORITY_pack(data, &v0_0, &values->ArbitrationPriorityControl); 844 845 dw[0] = 846 __gen_uint(values->MOCS, 1, 6) | 847 __gen_uint(v0_0, 7, 8) | 848 __gen_uint(values->MemoryCompressionEnable, 9, 9) | 849 __gen_uint(values->MemoryCompressionMode, 10, 10) | 850 __gen_uint(values->RowStoreScratchBufferCacheSelect, 12, 12) | 851 __gen_uint(values->TiledResourceMode, 13, 14); 852} 853 854#define GEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_length 4 855struct GEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD { 856 uint32_t IndirectPayloadDataSizeinbits; 857 __gen_address_type IndirectPayloadBaseAddress; 858 struct GEN10_MEMORYADDRESSATTRIBUTES IndirectPayloadBaseAddress2; 859}; 860 861static inline void 862GEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD_pack(__attribute__((unused)) __gen_user_data *data, 863 __attribute__((unused)) void * restrict dst, 864 __attribute__((unused)) const struct GEN10_HCP_PAK_INSERT_OBJECT_INDIRECT_PAYLOAD * restrict values) 865{ 866 uint32_t * restrict dw = (uint32_t * restrict) dst; 867 868 dw[0] = 869 __gen_uint(values->IndirectPayloadDataSizeinbits, 0, 31); 870 871 const uint64_t v1_address = 872 __gen_combine_address(data, &dw[1], values->IndirectPayloadBaseAddress, 0); 873 dw[1] = v1_address; 874 dw[2] = v1_address >> 32; 875 876 GEN10_MEMORYADDRESSATTRIBUTES_pack(data, &dw[3], &values->IndirectPayloadBaseAddress2); 877} 878 879#define GEN10_HCP_REF_LIST_ENTRY_length 1 880struct GEN10_HCP_REF_LIST_ENTRY { 881 uint32_t ReferencePicturetbValue; 882 uint32_t ListEntry; 883 uint32_t ChromaWeightedPrediction; 884#define Default 0 885#define Explicit 1 886 uint32_t LumaWeightedPrediction; 887#define Default 0 888#define Explicit 1 889 bool LongTermReference; 890 bool FieldPic; 891 bool TopField; 892}; 893 894static inline void 895GEN10_HCP_REF_LIST_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 896 __attribute__((unused)) void * restrict dst, 897 __attribute__((unused)) const struct GEN10_HCP_REF_LIST_ENTRY * restrict values) 898{ 899 uint32_t * restrict dw = (uint32_t * restrict) dst; 900 901 dw[0] = 902 __gen_uint(values->ReferencePicturetbValue, 0, 7) | 903 __gen_uint(values->ListEntry, 8, 10) | 904 __gen_uint(values->ChromaWeightedPrediction, 11, 11) | 905 __gen_uint(values->LumaWeightedPrediction, 12, 12) | 906 __gen_uint(values->LongTermReference, 13, 13) | 907 __gen_uint(values->FieldPic, 14, 14) | 908 __gen_uint(values->TopField, 15, 15); 909} 910 911#define GEN10_HCP_TILE_POSITION_IN_CTB_length 1 912struct GEN10_HCP_TILE_POSITION_IN_CTB { 913 uint32_t CtbPos0i; 914 uint32_t CtbPos1i; 915 uint32_t CtbPos2i; 916 uint32_t CtbPos3i; 917}; 918 919static inline void 920GEN10_HCP_TILE_POSITION_IN_CTB_pack(__attribute__((unused)) __gen_user_data *data, 921 __attribute__((unused)) void * restrict dst, 922 __attribute__((unused)) const struct GEN10_HCP_TILE_POSITION_IN_CTB * restrict values) 923{ 924 uint32_t * restrict dw = (uint32_t * restrict) dst; 925 926 dw[0] = 927 __gen_uint(values->CtbPos0i, 0, 7) | 928 __gen_uint(values->CtbPos1i, 8, 15) | 929 __gen_uint(values->CtbPos2i, 16, 23) | 930 __gen_uint(values->CtbPos3i, 24, 31); 931} 932 933#define GEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY_length 1 934struct GEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY { 935 int32_t DeltaChromaWeightLX0; 936 uint32_t ChromaOffsetLX0; 937 int32_t DeltaChromaWeightLX1; 938 uint32_t ChromaOffsetLX1; 939}; 940 941static inline void 942GEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 943 __attribute__((unused)) void * restrict dst, 944 __attribute__((unused)) const struct GEN10_HCP_WEIGHTOFFSET_CHROMA_ENTRY * restrict values) 945{ 946 uint32_t * restrict dw = (uint32_t * restrict) dst; 947 948 dw[0] = 949 __gen_sint(values->DeltaChromaWeightLX0, 0, 7) | 950 __gen_uint(values->ChromaOffsetLX0, 8, 15) | 951 __gen_sint(values->DeltaChromaWeightLX1, 16, 23) | 952 __gen_uint(values->ChromaOffsetLX1, 24, 31); 953} 954 955#define GEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY_length 1 956struct GEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY { 957 int32_t DeltaLumaWeightLX; 958 uint32_t LumaOffsetLX; 959}; 960 961static inline void 962GEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 963 __attribute__((unused)) void * restrict dst, 964 __attribute__((unused)) const struct GEN10_HCP_WEIGHTOFFSET_LUMA_ENTRY * restrict values) 965{ 966 uint32_t * restrict dw = (uint32_t * restrict) dst; 967 968 dw[0] = 969 __gen_sint(values->DeltaLumaWeightLX, 0, 7) | 970 __gen_uint(values->LumaOffsetLX, 8, 15); 971} 972 973#define GEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS_length 1 974struct GEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS { 975 uint32_t LambdaValue0; 976 uint32_t LambdaValue1; 977}; 978 979static inline void 980GEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS_pack(__attribute__((unused)) __gen_user_data *data, 981 __attribute__((unused)) void * restrict dst, 982 __attribute__((unused)) const struct GEN10_HEVC_VP9_RDOQ_LAMBDA_FIELDS * restrict values) 983{ 984 uint32_t * restrict dw = (uint32_t * restrict) dst; 985 986 dw[0] = 987 __gen_uint(values->LambdaValue0, 0, 15) | 988 __gen_uint(values->LambdaValue1, 16, 31); 989} 990 991#define GEN10_HUC_VIRTUAL_ADDR_REGION_length 3 992struct GEN10_HUC_VIRTUAL_ADDR_REGION { 993 __gen_address_type Address; 994 struct GEN10_MEMORYADDRESSATTRIBUTES MemoryAddressAttributes; 995}; 996 997static inline void 998GEN10_HUC_VIRTUAL_ADDR_REGION_pack(__attribute__((unused)) __gen_user_data *data, 999 __attribute__((unused)) void * restrict dst, 1000 __attribute__((unused)) const struct GEN10_HUC_VIRTUAL_ADDR_REGION * restrict values) 1001{ 1002 uint32_t * restrict dw = (uint32_t * restrict) dst; 1003 1004 const uint64_t v0_address = 1005 __gen_combine_address(data, &dw[0], values->Address, 0); 1006 dw[0] = v0_address; 1007 dw[1] = v0_address >> 32; 1008 1009 GEN10_MEMORYADDRESSATTRIBUTES_pack(data, &dw[2], &values->MemoryAddressAttributes); 1010} 1011 1012#define GEN10_IMAGE_STATE_COST_length 2 1013struct GEN10_IMAGE_STATE_COST { 1014 uint32_t MV0Cost; 1015 uint32_t MV1Cost; 1016 uint32_t MV2Cost; 1017 uint32_t MV3Cost; 1018 uint32_t MV4Cost; 1019 uint32_t MV5Cost; 1020 uint32_t MV6Cost; 1021 uint32_t MV7Cost; 1022}; 1023 1024static inline void 1025GEN10_IMAGE_STATE_COST_pack(__attribute__((unused)) __gen_user_data *data, 1026 __attribute__((unused)) void * restrict dst, 1027 __attribute__((unused)) const struct GEN10_IMAGE_STATE_COST * restrict values) 1028{ 1029 uint32_t * restrict dw = (uint32_t * restrict) dst; 1030 1031 dw[0] = 1032 __gen_uint(values->MV0Cost, 0, 7) | 1033 __gen_uint(values->MV1Cost, 8, 15) | 1034 __gen_uint(values->MV2Cost, 16, 23) | 1035 __gen_uint(values->MV3Cost, 24, 31); 1036 1037 dw[1] = 1038 __gen_uint(values->MV4Cost, 0, 7) | 1039 __gen_uint(values->MV5Cost, 8, 15) | 1040 __gen_uint(values->MV6Cost, 16, 23) | 1041 __gen_uint(values->MV7Cost, 24, 31); 1042} 1043 1044#define GEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_length 3 1045struct GEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT { 1046 bool MBErrorConcealmentPSliceWeightPredictionDisableFlag; 1047 bool MBErrorConcealmentPSliceMotionVectorsOverrideDisableFlag; 1048 bool MBErrorConcealmentBSpatialWeightPredictionDisableFlag; 1049 bool MBErrorConcealmentBSpatialMotionVectorsOverrideDisableFlag; 1050 uint32_t MBErrorConcealmentBSpatialPredictionMode; 1051 bool MBHeaderErrorHandling; 1052 bool EntropyErrorHandling; 1053 bool MPRErrorHandling; 1054 bool BSDPrematureCompleteErrorHandling; 1055 uint32_t ConcealmentPictureID; 1056 bool MBErrorConcealmentBTemporalWeightPredictionDisable; 1057 bool MBErrorConcealmentBTemporalMotionVectorsOverrideEnable; 1058 uint32_t MBErrorConcealmentBTemporalPredictionMode; 1059 bool IntraPredMode4x48x8LumaErrorControl; 1060 bool InitCurrentMBNumber; 1061 uint32_t ConcealmentMethod; 1062 uint32_t FirstMBBitOffset; 1063 bool LastSlice; 1064 bool EmulationPreventionBytePresent; 1065 bool FixPrevMBSkipped; 1066 uint32_t FirstMBByteOffsetofSliceDataorSliceHeader; 1067 bool IntraPredictionErrorControl; 1068 bool Intra8x84x4PredictionErrorConcealmentControl; 1069 uint32_t BSliceTemporalInterConcealmentMode; 1070 uint32_t BSliceSpatialInterConcealmentMode; 1071 uint32_t BSliceInterDirectTypeConcealmentMode; 1072 uint32_t BSliceConcealmentMode; 1073#define IntraConcealment 1 1074#define InterConcealment 0 1075 uint32_t PSliceInterConcealmentMode; 1076 uint32_t PSliceConcealmentMode; 1077#define IntraConcealment 1 1078#define InterConcealment 0 1079 uint32_t ConcealmentReferencePictureFieldBit; 1080 uint32_t ISliceConcealmentMode; 1081#define IntraConcealment 1 1082#define InterConcealment 0 1083}; 1084 1085static inline void 1086GEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 1087 __attribute__((unused)) void * restrict dst, 1088 __attribute__((unused)) const struct GEN10_INLINE_DATA_DESCRIPTION_FOR_MFD_AVC_BSD_OBJECT * restrict values) 1089{ 1090 uint32_t * restrict dw = (uint32_t * restrict) dst; 1091 1092 dw[0] = 1093 __gen_uint(values->MBErrorConcealmentPSliceWeightPredictionDisableFlag, 0, 0) | 1094 __gen_uint(values->MBErrorConcealmentPSliceMotionVectorsOverrideDisableFlag, 1, 1) | 1095 __gen_uint(values->MBErrorConcealmentBSpatialWeightPredictionDisableFlag, 3, 3) | 1096 __gen_uint(values->MBErrorConcealmentBSpatialMotionVectorsOverrideDisableFlag, 4, 4) | 1097 __gen_uint(values->MBErrorConcealmentBSpatialPredictionMode, 6, 7) | 1098 __gen_uint(values->MBHeaderErrorHandling, 8, 8) | 1099 __gen_uint(values->EntropyErrorHandling, 10, 10) | 1100 __gen_uint(values->MPRErrorHandling, 12, 12) | 1101 __gen_uint(values->BSDPrematureCompleteErrorHandling, 14, 14) | 1102 __gen_uint(values->ConcealmentPictureID, 16, 21) | 1103 __gen_uint(values->MBErrorConcealmentBTemporalWeightPredictionDisable, 24, 24) | 1104 __gen_uint(values->MBErrorConcealmentBTemporalMotionVectorsOverrideEnable, 25, 25) | 1105 __gen_uint(values->MBErrorConcealmentBTemporalPredictionMode, 27, 28) | 1106 __gen_uint(values->IntraPredMode4x48x8LumaErrorControl, 29, 29) | 1107 __gen_uint(values->InitCurrentMBNumber, 30, 30) | 1108 __gen_uint(values->ConcealmentMethod, 31, 31); 1109 1110 dw[1] = 1111 __gen_uint(values->FirstMBBitOffset, 0, 2) | 1112 __gen_uint(values->LastSlice, 3, 3) | 1113 __gen_uint(values->EmulationPreventionBytePresent, 4, 4) | 1114 __gen_uint(values->FixPrevMBSkipped, 7, 7) | 1115 __gen_uint(values->FirstMBByteOffsetofSliceDataorSliceHeader, 16, 31); 1116 1117 dw[2] = 1118 __gen_uint(values->IntraPredictionErrorControl, 0, 0) | 1119 __gen_uint(values->Intra8x84x4PredictionErrorConcealmentControl, 1, 1) | 1120 __gen_uint(values->BSliceTemporalInterConcealmentMode, 4, 6) | 1121 __gen_uint(values->BSliceSpatialInterConcealmentMode, 8, 10) | 1122 __gen_uint(values->BSliceInterDirectTypeConcealmentMode, 12, 13) | 1123 __gen_uint(values->BSliceConcealmentMode, 15, 15) | 1124 __gen_uint(values->PSliceInterConcealmentMode, 16, 18) | 1125 __gen_uint(values->PSliceConcealmentMode, 23, 23) | 1126 __gen_uint(values->ConcealmentReferencePictureFieldBit, 24, 29) | 1127 __gen_uint(values->ISliceConcealmentMode, 31, 31); 1128} 1129 1130#define GEN10_INTERFACE_DESCRIPTOR_DATA_length 8 1131struct GEN10_INTERFACE_DESCRIPTOR_DATA { 1132 uint64_t KernelStartPointer; 1133 bool SoftwareExceptionEnable; 1134 bool MaskStackExceptionEnable; 1135 bool IllegalOpcodeExceptionEnable; 1136 uint32_t FloatingPointMode; 1137#define IEEE754 0 1138#define Alternate 1 1139 uint32_t ThreadPriority; 1140#define NormalPriority 0 1141#define HighPriority 1 1142 bool SingleProgramFlow; 1143 uint32_t DenormMode; 1144#define Ftz 0 1145#define SetByKernel 1 1146 bool ThreadPreemptiondisable; 1147 uint32_t SamplerCount; 1148#define Nosamplersused 0 1149#define Between1and4samplersused 1 1150#define Between5and8samplersused 2 1151#define Between9and12samplersused 3 1152#define Between13and16samplersused 4 1153 uint64_t SamplerStatePointer; 1154 uint32_t BindingTableEntryCount; 1155 uint64_t BindingTablePointer; 1156 uint32_t ConstantURBEntryReadOffset; 1157 uint32_t ConstantURBEntryReadLength; 1158 uint32_t NumberofThreadsinGPGPUThreadGroup; 1159 bool GlobalBarrierEnable; 1160 uint32_t SharedLocalMemorySize; 1161#define Encodes0K 0 1162#define Encodes1K 1 1163#define Encodes2K 2 1164#define Encodes4K 3 1165#define Encodes8K 4 1166#define Encodes16K 5 1167#define Encodes32K 6 1168#define Encodes64K 7 1169 bool BarrierEnable; 1170 uint32_t RoundingMode; 1171#define RTNE 0 1172#define RU 1 1173#define RD 2 1174#define RTZ 3 1175 uint32_t CrossThreadConstantDataReadLength; 1176}; 1177 1178static inline void 1179GEN10_INTERFACE_DESCRIPTOR_DATA_pack(__attribute__((unused)) __gen_user_data *data, 1180 __attribute__((unused)) void * restrict dst, 1181 __attribute__((unused)) const struct GEN10_INTERFACE_DESCRIPTOR_DATA * restrict values) 1182{ 1183 uint32_t * restrict dw = (uint32_t * restrict) dst; 1184 1185 const uint64_t v0 = 1186 __gen_offset(values->KernelStartPointer, 6, 47); 1187 dw[0] = v0; 1188 dw[1] = v0 >> 32; 1189 1190 dw[2] = 1191 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 1192 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 1193 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 1194 __gen_uint(values->FloatingPointMode, 16, 16) | 1195 __gen_uint(values->ThreadPriority, 17, 17) | 1196 __gen_uint(values->SingleProgramFlow, 18, 18) | 1197 __gen_uint(values->DenormMode, 19, 19) | 1198 __gen_uint(values->ThreadPreemptiondisable, 20, 20); 1199 1200 dw[3] = 1201 __gen_uint(values->SamplerCount, 2, 4) | 1202 __gen_offset(values->SamplerStatePointer, 5, 31); 1203 1204 dw[4] = 1205 __gen_uint(values->BindingTableEntryCount, 0, 4) | 1206 __gen_offset(values->BindingTablePointer, 5, 15); 1207 1208 dw[5] = 1209 __gen_uint(values->ConstantURBEntryReadOffset, 0, 15) | 1210 __gen_uint(values->ConstantURBEntryReadLength, 16, 31); 1211 1212 dw[6] = 1213 __gen_uint(values->NumberofThreadsinGPGPUThreadGroup, 0, 9) | 1214 __gen_uint(values->GlobalBarrierEnable, 15, 15) | 1215 __gen_uint(values->SharedLocalMemorySize, 16, 20) | 1216 __gen_uint(values->BarrierEnable, 21, 21) | 1217 __gen_uint(values->RoundingMode, 22, 23); 1218 1219 dw[7] = 1220 __gen_uint(values->CrossThreadConstantDataReadLength, 0, 7); 1221} 1222 1223#define GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_length 4 1224struct GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY { 1225 float Table0XFilterCoefficientn0; 1226 float Table0YFilterCoefficientn0; 1227 float Table0XFilterCoefficientn1; 1228 float Table0YFilterCoefficientn1; 1229 float Table0XFilterCoefficientn2; 1230 float Table0YFilterCoefficientn2; 1231 float Table0XFilterCoefficientn3; 1232 float Table0YFilterCoefficientn3; 1233 float Table0XFilterCoefficientn4; 1234 float Table0YFilterCoefficientn4; 1235 float Table0XFilterCoefficientn5; 1236 float Table0YFilterCoefficientn5; 1237 float Table0XFilterCoefficientn6; 1238 float Table0YFilterCoefficientn6; 1239 float Table0XFilterCoefficientn7; 1240 float Table0YFilterCoefficientn7; 1241}; 1242 1243static inline void 1244GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(__attribute__((unused)) __gen_user_data *data, 1245 __attribute__((unused)) void * restrict dst, 1246 __attribute__((unused)) const struct GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY * restrict values) 1247{ 1248 uint32_t * restrict dw = (uint32_t * restrict) dst; 1249 1250 dw[0] = 1251 __gen_sfixed(values->Table0XFilterCoefficientn0, 0, 7, 6) | 1252 __gen_sfixed(values->Table0YFilterCoefficientn0, 8, 15, 6) | 1253 __gen_sfixed(values->Table0XFilterCoefficientn1, 16, 23, 6) | 1254 __gen_sfixed(values->Table0YFilterCoefficientn1, 24, 31, 6); 1255 1256 dw[1] = 1257 __gen_sfixed(values->Table0XFilterCoefficientn2, 0, 7, 6) | 1258 __gen_sfixed(values->Table0YFilterCoefficientn2, 8, 15, 6) | 1259 __gen_sfixed(values->Table0XFilterCoefficientn3, 16, 23, 6) | 1260 __gen_sfixed(values->Table0YFilterCoefficientn3, 24, 31, 6); 1261 1262 dw[2] = 1263 __gen_sfixed(values->Table0XFilterCoefficientn4, 0, 7, 6) | 1264 __gen_sfixed(values->Table0YFilterCoefficientn4, 8, 15, 6) | 1265 __gen_sfixed(values->Table0XFilterCoefficientn5, 16, 23, 6) | 1266 __gen_sfixed(values->Table0YFilterCoefficientn5, 24, 31, 6); 1267 1268 dw[3] = 1269 __gen_sfixed(values->Table0XFilterCoefficientn6, 0, 7, 6) | 1270 __gen_sfixed(values->Table0YFilterCoefficientn6, 8, 15, 6) | 1271 __gen_sfixed(values->Table0XFilterCoefficientn7, 16, 23, 6) | 1272 __gen_sfixed(values->Table0YFilterCoefficientn7, 24, 31, 6); 1273} 1274 1275#define GEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_length 2 1276struct GEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION { 1277 uint32_t FirstMBBitOffset; 1278 bool LastMB; 1279 bool LastPicSlice; 1280 uint32_t SliceConcealmentType; 1281 uint32_t SliceConcealmentOverride; 1282 uint32_t MBCount; 1283 uint32_t SliceVerticalPosition; 1284 uint32_t SliceHorizontalPosition; 1285 uint32_t NextSliceHorizontalPosition; 1286 uint32_t NextSliceVerticalPosition; 1287 uint32_t QuantizerScaleCode; 1288}; 1289 1290static inline void 1291GEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION_pack(__attribute__((unused)) __gen_user_data *data, 1292 __attribute__((unused)) void * restrict dst, 1293 __attribute__((unused)) const struct GEN10_MFD_MPEG2_BSD_OBJECT_INLINE_DATA_DESCRIPTION * restrict values) 1294{ 1295 uint32_t * restrict dw = (uint32_t * restrict) dst; 1296 1297 dw[0] = 1298 __gen_uint(values->FirstMBBitOffset, 0, 2) | 1299 __gen_uint(values->LastMB, 3, 3) | 1300 __gen_uint(values->LastPicSlice, 5, 5) | 1301 __gen_uint(values->SliceConcealmentType, 6, 6) | 1302 __gen_uint(values->SliceConcealmentOverride, 7, 7) | 1303 __gen_uint(values->MBCount, 8, 15) | 1304 __gen_uint(values->SliceVerticalPosition, 16, 23) | 1305 __gen_uint(values->SliceHorizontalPosition, 24, 31); 1306 1307 dw[1] = 1308 __gen_uint(values->NextSliceHorizontalPosition, 0, 7) | 1309 __gen_uint(values->NextSliceVerticalPosition, 8, 16) | 1310 __gen_uint(values->QuantizerScaleCode, 24, 28); 1311} 1312 1313#define GEN10_MI_MATH_ALU_INSTRUCTION_length 1 1314struct GEN10_MI_MATH_ALU_INSTRUCTION { 1315 uint32_t Operand2; 1316#define MI_ALU_REG0 0 1317#define MI_ALU_REG1 1 1318#define MI_ALU_REG2 2 1319#define MI_ALU_REG3 3 1320#define MI_ALU_REG4 4 1321#define MI_ALU_REG5 5 1322#define MI_ALU_REG6 6 1323#define MI_ALU_REG7 7 1324#define MI_ALU_REG8 8 1325#define MI_ALU_REG9 9 1326#define MI_ALU_REG10 10 1327#define MI_ALU_REG11 11 1328#define MI_ALU_REG12 12 1329#define MI_ALU_REG13 13 1330#define MI_ALU_REG14 14 1331#define MI_ALU_REG15 15 1332#define MI_ALU_SRCA 32 1333#define MI_ALU_SRCB 33 1334#define MI_ALU_ACCU 49 1335#define MI_ALU_ZF 50 1336#define MI_ALU_CF 51 1337 uint32_t Operand1; 1338#define MI_ALU_REG0 0 1339#define MI_ALU_REG1 1 1340#define MI_ALU_REG2 2 1341#define MI_ALU_REG3 3 1342#define MI_ALU_REG4 4 1343#define MI_ALU_REG5 5 1344#define MI_ALU_REG6 6 1345#define MI_ALU_REG7 7 1346#define MI_ALU_REG8 8 1347#define MI_ALU_REG9 9 1348#define MI_ALU_REG10 10 1349#define MI_ALU_REG11 11 1350#define MI_ALU_REG12 12 1351#define MI_ALU_REG13 13 1352#define MI_ALU_REG14 14 1353#define MI_ALU_REG15 15 1354#define MI_ALU_SRCA 32 1355#define MI_ALU_SRCB 33 1356#define MI_ALU_ACCU 49 1357#define MI_ALU_ZF 50 1358#define MI_ALU_CF 51 1359 uint32_t ALUOpcode; 1360#define MI_ALU_NOOP 0 1361#define MI_ALU_LOAD 128 1362#define MI_ALU_LOADINV 1152 1363#define MI_ALU_LOAD0 129 1364#define MI_ALU_LOAD1 1153 1365#define MI_ALU_ADD 256 1366#define MI_ALU_SUB 257 1367#define MI_ALU_AND 258 1368#define MI_ALU_OR 259 1369#define MI_ALU_XOR 260 1370#define MI_ALU_STORE 384 1371#define MI_ALU_STOREINV 1408 1372}; 1373 1374static inline void 1375GEN10_MI_MATH_ALU_INSTRUCTION_pack(__attribute__((unused)) __gen_user_data *data, 1376 __attribute__((unused)) void * restrict dst, 1377 __attribute__((unused)) const struct GEN10_MI_MATH_ALU_INSTRUCTION * restrict values) 1378{ 1379 uint32_t * restrict dw = (uint32_t * restrict) dst; 1380 1381 dw[0] = 1382 __gen_uint(values->Operand2, 0, 9) | 1383 __gen_uint(values->Operand1, 10, 19) | 1384 __gen_uint(values->ALUOpcode, 20, 31); 1385} 1386 1387#define GEN10_PALETTE_ENTRY_length 1 1388struct GEN10_PALETTE_ENTRY { 1389 uint32_t Blue; 1390 uint32_t Green; 1391 uint32_t Red; 1392 uint32_t Alpha; 1393}; 1394 1395static inline void 1396GEN10_PALETTE_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 1397 __attribute__((unused)) void * restrict dst, 1398 __attribute__((unused)) const struct GEN10_PALETTE_ENTRY * restrict values) 1399{ 1400 uint32_t * restrict dw = (uint32_t * restrict) dst; 1401 1402 dw[0] = 1403 __gen_uint(values->Blue, 0, 7) | 1404 __gen_uint(values->Green, 8, 15) | 1405 __gen_uint(values->Red, 16, 23) | 1406 __gen_uint(values->Alpha, 24, 31); 1407} 1408 1409#define GEN10_RENDER_SURFACE_STATE_length 16 1410struct GEN10_RENDER_SURFACE_STATE { 1411 bool CubeFaceEnablePositiveZ; 1412 bool CubeFaceEnableNegativeZ; 1413 bool CubeFaceEnablePositiveY; 1414 bool CubeFaceEnableNegativeY; 1415 bool CubeFaceEnablePositiveX; 1416 bool CubeFaceEnableNegativeX; 1417 uint32_t MediaBoundaryPixelMode; 1418#define NORMAL_MODE 0 1419#define PROGRESSIVE_FRAME 2 1420#define INTERLACED_FRAME 3 1421 uint32_t RenderCacheReadWriteMode; 1422#define WriteOnlyCache 0 1423#define ReadWriteCache 1 1424 bool SamplerL2BypassModeDisable; 1425 uint32_t VerticalLineStrideOffset; 1426 uint32_t VerticalLineStride; 1427 uint32_t TileMode; 1428#define LINEAR 0 1429#define WMAJOR 1 1430#define XMAJOR 2 1431#define YMAJOR 3 1432 uint32_t SurfaceHorizontalAlignment; 1433#define HALIGN4 1 1434#define HALIGN8 2 1435#define HALIGN16 3 1436 uint32_t SurfaceVerticalAlignment; 1437#define VALIGN4 1 1438#define VALIGN8 2 1439#define VALIGN16 3 1440 uint32_t SurfaceFormat; 1441 bool SurfaceArray; 1442 uint32_t SurfaceType; 1443#define SURFTYPE_1D 0 1444#define SURFTYPE_2D 1 1445#define SURFTYPE_3D 2 1446#define SURFTYPE_CUBE 3 1447#define SURFTYPE_BUFFER 4 1448#define SURFTYPE_STRBUF 5 1449#define SURFTYPE_NULL 7 1450 uint32_t SurfaceQPitch; 1451 float BaseMipLevel; 1452 uint32_t MOCS; 1453 uint32_t Width; 1454 uint32_t Height; 1455 uint32_t SurfacePitch; 1456 uint32_t TileAddressMappingMode; 1457#define Gen9 0 1458#define Gen10 1 1459 uint32_t Depth; 1460 uint32_t MultisamplePositionPaletteIndex; 1461 uint32_t NumberofMultisamples; 1462#define MULTISAMPLECOUNT_1 0 1463#define MULTISAMPLECOUNT_2 1 1464#define MULTISAMPLECOUNT_4 2 1465#define MULTISAMPLECOUNT_8 3 1466#define MULTISAMPLECOUNT_16 4 1467 uint32_t MultisampledSurfaceStorageFormat; 1468#define MSFMT_MSS 0 1469#define MSFMT_DEPTH_STENCIL 1 1470 uint32_t RenderTargetViewExtent; 1471 uint32_t MinimumArrayElement; 1472 uint32_t RenderTargetAndSampleUnormRotation; 1473#define _0DEG 0 1474#define _90DEG 1 1475#define _180DEG 2 1476#define _270DEG 3 1477 bool ForceNonComparisonReductionType; 1478 uint32_t MIPCountLOD; 1479 uint32_t SurfaceMinLOD; 1480 uint32_t MipTailStartLOD; 1481 uint32_t CoherencyType; 1482#define GPUcoherent 0 1483#define IAcoherent 1 1484 uint32_t TiledResourceMode; 1485#define NONE 0 1486#define _4KB 1 1487#define _64KB 2 1488#define TILEYF 1 1489#define TILEYS 2 1490 bool EWADisableForCube; 1491 uint32_t YOffset; 1492 uint32_t XOffset; 1493 uint32_t AuxiliarySurfaceMode; 1494#define AUX_NONE 0 1495#define AUX_CCS_D 1 1496#define AUX_APPEND 2 1497#define AUX_HIZ 3 1498#define AUX_CCS_E 5 1499 uint32_t YOffsetforUorUVPlane; 1500 uint32_t AuxiliarySurfacePitch; 1501 uint32_t AuxiliarySurfaceQPitch; 1502 uint32_t XOffsetforUorUVPlane; 1503 bool SeparateUVPlaneEnable; 1504 float ResourceMinLOD; 1505 enum GEN10_ShaderChannelSelect ShaderChannelSelectAlpha; 1506 enum GEN10_ShaderChannelSelect ShaderChannelSelectBlue; 1507 enum GEN10_ShaderChannelSelect ShaderChannelSelectGreen; 1508 enum GEN10_ShaderChannelSelect ShaderChannelSelectRed; 1509 bool MemoryCompressionEnable; 1510 uint32_t MemoryCompressionMode; 1511#define Horizontal 0 1512#define Vertical 1 1513 __gen_address_type SurfaceBaseAddress; 1514 uint32_t QuiltWidth; 1515 uint32_t QuiltHeight; 1516 bool ClearValueAddressEnable; 1517 __gen_address_type AuxiliarySurfaceBaseAddress; 1518 uint32_t AuxiliaryTableIndexforMediaCompressedSurface; 1519 uint32_t YOffsetforVPlane; 1520 uint32_t XOffsetforVPlane; 1521 int32_t RedClearColor; 1522 __gen_address_type ClearValueAddress; 1523 int32_t GreenClearColor; 1524 int32_t BlueClearColor; 1525 int32_t AlphaClearColor; 1526}; 1527 1528static inline void 1529GEN10_RENDER_SURFACE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1530 __attribute__((unused)) void * restrict dst, 1531 __attribute__((unused)) const struct GEN10_RENDER_SURFACE_STATE * restrict values) 1532{ 1533 uint32_t * restrict dw = (uint32_t * restrict) dst; 1534 1535 dw[0] = 1536 __gen_uint(values->CubeFaceEnablePositiveZ, 0, 0) | 1537 __gen_uint(values->CubeFaceEnableNegativeZ, 1, 1) | 1538 __gen_uint(values->CubeFaceEnablePositiveY, 2, 2) | 1539 __gen_uint(values->CubeFaceEnableNegativeY, 3, 3) | 1540 __gen_uint(values->CubeFaceEnablePositiveX, 4, 4) | 1541 __gen_uint(values->CubeFaceEnableNegativeX, 5, 5) | 1542 __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | 1543 __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | 1544 __gen_uint(values->SamplerL2BypassModeDisable, 9, 9) | 1545 __gen_uint(values->VerticalLineStrideOffset, 10, 10) | 1546 __gen_uint(values->VerticalLineStride, 11, 11) | 1547 __gen_uint(values->TileMode, 12, 13) | 1548 __gen_uint(values->SurfaceHorizontalAlignment, 14, 15) | 1549 __gen_uint(values->SurfaceVerticalAlignment, 16, 17) | 1550 __gen_uint(values->SurfaceFormat, 18, 27) | 1551 __gen_uint(values->SurfaceArray, 28, 28) | 1552 __gen_uint(values->SurfaceType, 29, 31); 1553 1554 dw[1] = 1555 __gen_uint(values->SurfaceQPitch, 0, 14) | 1556 __gen_ufixed(values->BaseMipLevel, 19, 23, 1) | 1557 __gen_uint(values->MOCS, 24, 30); 1558 1559 dw[2] = 1560 __gen_uint(values->Width, 0, 13) | 1561 __gen_uint(values->Height, 16, 29); 1562 1563 dw[3] = 1564 __gen_uint(values->SurfacePitch, 0, 17) | 1565 __gen_uint(values->TileAddressMappingMode, 20, 20) | 1566 __gen_uint(values->Depth, 21, 31); 1567 1568 dw[4] = 1569 __gen_uint(values->MultisamplePositionPaletteIndex, 0, 2) | 1570 __gen_uint(values->NumberofMultisamples, 3, 5) | 1571 __gen_uint(values->MultisampledSurfaceStorageFormat, 6, 6) | 1572 __gen_uint(values->RenderTargetViewExtent, 7, 17) | 1573 __gen_uint(values->MinimumArrayElement, 18, 28) | 1574 __gen_uint(values->RenderTargetAndSampleUnormRotation, 29, 30) | 1575 __gen_uint(values->ForceNonComparisonReductionType, 31, 31); 1576 1577 dw[5] = 1578 __gen_uint(values->MIPCountLOD, 0, 3) | 1579 __gen_uint(values->SurfaceMinLOD, 4, 7) | 1580 __gen_uint(values->MipTailStartLOD, 8, 11) | 1581 __gen_uint(values->CoherencyType, 14, 14) | 1582 __gen_uint(values->TiledResourceMode, 18, 19) | 1583 __gen_uint(values->EWADisableForCube, 20, 20) | 1584 __gen_uint(values->YOffset, 21, 23) | 1585 __gen_uint(values->XOffset, 25, 31); 1586 1587 dw[6] = 1588 __gen_uint(values->AuxiliarySurfaceMode, 0, 2) | 1589 __gen_uint(values->YOffsetforUorUVPlane, 0, 13) | 1590 __gen_uint(values->AuxiliarySurfacePitch, 3, 11) | 1591 __gen_uint(values->AuxiliarySurfaceQPitch, 16, 30) | 1592 __gen_uint(values->XOffsetforUorUVPlane, 16, 29) | 1593 __gen_uint(values->SeparateUVPlaneEnable, 31, 31); 1594 1595 dw[7] = 1596 __gen_ufixed(values->ResourceMinLOD, 0, 11, 8) | 1597 __gen_uint(values->ShaderChannelSelectAlpha, 16, 18) | 1598 __gen_uint(values->ShaderChannelSelectBlue, 19, 21) | 1599 __gen_uint(values->ShaderChannelSelectGreen, 22, 24) | 1600 __gen_uint(values->ShaderChannelSelectRed, 25, 27) | 1601 __gen_uint(values->MemoryCompressionEnable, 30, 30) | 1602 __gen_uint(values->MemoryCompressionMode, 31, 31); 1603 1604 const uint64_t v8_address = 1605 __gen_combine_address(data, &dw[8], values->SurfaceBaseAddress, 0); 1606 dw[8] = v8_address; 1607 dw[9] = v8_address >> 32; 1608 1609 const uint64_t v10 = 1610 __gen_uint(values->QuiltWidth, 0, 4) | 1611 __gen_uint(values->QuiltHeight, 5, 9) | 1612 __gen_uint(values->ClearValueAddressEnable, 10, 10) | 1613 __gen_uint(values->AuxiliaryTableIndexforMediaCompressedSurface, 21, 31) | 1614 __gen_uint(values->YOffsetforVPlane, 32, 45) | 1615 __gen_uint(values->XOffsetforVPlane, 48, 61); 1616 const uint64_t v10_address = 1617 __gen_combine_address(data, &dw[10], values->AuxiliarySurfaceBaseAddress, v10); 1618 dw[10] = v10_address; 1619 dw[11] = (v10_address >> 32) | (v10 >> 32); 1620 1621 const uint64_t v12 = 1622 __gen_sint(values->RedClearColor, 0, 31) | 1623 __gen_sint(values->GreenClearColor, 32, 63); 1624 const uint64_t v12_address = 1625 __gen_combine_address(data, &dw[12], values->ClearValueAddress, v12); 1626 dw[12] = v12_address; 1627 dw[13] = (v12_address >> 32) | (v12 >> 32); 1628 1629 dw[14] = 1630 __gen_sint(values->BlueClearColor, 0, 31); 1631 1632 dw[15] = 1633 __gen_sint(values->AlphaClearColor, 0, 31); 1634} 1635 1636#define GEN10_ROUNDINGPRECISIONTABLE_3_BITS_length 1 1637struct GEN10_ROUNDINGPRECISIONTABLE_3_BITS { 1638 uint32_t RoundingPrecision; 1639#define _116 0 1640#define _216 1 1641#define _316 2 1642#define _416 3 1643#define _516 4 1644#define _616 5 1645#define _716 6 1646#define _816 7 1647}; 1648 1649static inline void 1650GEN10_ROUNDINGPRECISIONTABLE_3_BITS_pack(__attribute__((unused)) __gen_user_data *data, 1651 __attribute__((unused)) void * restrict dst, 1652 __attribute__((unused)) const struct GEN10_ROUNDINGPRECISIONTABLE_3_BITS * restrict values) 1653{ 1654 uint32_t * restrict dw = (uint32_t * restrict) dst; 1655 1656 dw[0] = 1657 __gen_uint(values->RoundingPrecision, 0, 2); 1658} 1659 1660#define GEN10_SAMPLER_BORDER_COLOR_STATE_length 4 1661struct GEN10_SAMPLER_BORDER_COLOR_STATE { 1662 float BorderColorFloatRed; 1663 uint32_t BorderColor32bitRed; 1664 float BorderColorFloatGreen; 1665 uint32_t BorderColor32bitGreen; 1666 float BorderColorFloatBlue; 1667 uint32_t BorderColor32bitBlue; 1668 float BorderColorFloatAlpha; 1669 uint32_t BorderColor32bitAlpha; 1670}; 1671 1672static inline void 1673GEN10_SAMPLER_BORDER_COLOR_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1674 __attribute__((unused)) void * restrict dst, 1675 __attribute__((unused)) const struct GEN10_SAMPLER_BORDER_COLOR_STATE * restrict values) 1676{ 1677 uint32_t * restrict dw = (uint32_t * restrict) dst; 1678 1679 dw[0] = 1680 __gen_float(values->BorderColorFloatRed) | 1681 __gen_uint(values->BorderColor32bitRed, 0, 31); 1682 1683 dw[1] = 1684 __gen_float(values->BorderColorFloatGreen) | 1685 __gen_uint(values->BorderColor32bitGreen, 0, 31); 1686 1687 dw[2] = 1688 __gen_float(values->BorderColorFloatBlue) | 1689 __gen_uint(values->BorderColor32bitBlue, 0, 31); 1690 1691 dw[3] = 1692 __gen_float(values->BorderColorFloatAlpha) | 1693 __gen_uint(values->BorderColor32bitAlpha, 0, 31); 1694} 1695 1696#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_length 4 1697struct GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR { 1698 int32_t BorderColorRedAsS31; 1699 uint32_t BorderColorRedAsU32; 1700 float BorderColorRedAsFloat; 1701 uint32_t BorderColorRedAsU8; 1702 uint32_t BorderColorGreenAsU8; 1703 uint32_t BorderColorBlueAsU8; 1704 uint32_t BorderColorAlphaAsU8; 1705 int32_t BorderColorGreenAsS31; 1706 uint32_t BorderColorGreenAsU32; 1707 float BorderColorGreenAsFloat; 1708 int32_t BorderColorBlueAsS31; 1709 uint32_t BorderColorBlueAsU32; 1710 float BorderColorBlueAsFloat; 1711 int32_t BorderColorAlphaAsS31; 1712 uint32_t BorderColorAlphaAsU32; 1713 float BorderColorAlphaAsFloat; 1714}; 1715 1716static inline void 1717GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_pack(__attribute__((unused)) __gen_user_data *data, 1718 __attribute__((unused)) void * restrict dst, 1719 __attribute__((unused)) const struct GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR * restrict values) 1720{ 1721 uint32_t * restrict dw = (uint32_t * restrict) dst; 1722 1723 dw[0] = 1724 __gen_sint(values->BorderColorRedAsS31, 0, 31) | 1725 __gen_uint(values->BorderColorRedAsU32, 0, 31) | 1726 __gen_float(values->BorderColorRedAsFloat) | 1727 __gen_uint(values->BorderColorRedAsU8, 0, 7) | 1728 __gen_uint(values->BorderColorGreenAsU8, 8, 15) | 1729 __gen_uint(values->BorderColorBlueAsU8, 16, 23) | 1730 __gen_uint(values->BorderColorAlphaAsU8, 24, 31); 1731 1732 dw[1] = 1733 __gen_sint(values->BorderColorGreenAsS31, 0, 31) | 1734 __gen_uint(values->BorderColorGreenAsU32, 0, 31) | 1735 __gen_float(values->BorderColorGreenAsFloat); 1736 1737 dw[2] = 1738 __gen_sint(values->BorderColorBlueAsS31, 0, 31) | 1739 __gen_uint(values->BorderColorBlueAsU32, 0, 31) | 1740 __gen_float(values->BorderColorBlueAsFloat); 1741 1742 dw[3] = 1743 __gen_sint(values->BorderColorAlphaAsS31, 0, 31) | 1744 __gen_uint(values->BorderColorAlphaAsU32, 0, 31) | 1745 __gen_float(values->BorderColorAlphaAsFloat); 1746} 1747 1748#define GEN10_SAMPLER_STATE_length 4 1749struct GEN10_SAMPLER_STATE { 1750 uint32_t AnisotropicAlgorithm; 1751#define LEGACY 0 1752#define EWAApproximation 1 1753 float TextureLODBias; 1754 uint32_t MinModeFilter; 1755#define MAPFILTER_NEAREST 0 1756#define MAPFILTER_LINEAR 1 1757#define MAPFILTER_ANISOTROPIC 2 1758#define MAPFILTER_MONO 6 1759 uint32_t MagModeFilter; 1760#define MAPFILTER_NEAREST 0 1761#define MAPFILTER_LINEAR 1 1762#define MAPFILTER_ANISOTROPIC 2 1763#define MAPFILTER_MONO 6 1764 uint32_t MipModeFilter; 1765#define MIPFILTER_NONE 0 1766#define MIPFILTER_NEAREST 1 1767#define MIPFILTER_LINEAR 3 1768 uint32_t CoarseLODQualityMode; 1769 uint32_t LODPreClampMode; 1770#define CLAMP_MODE_NONE 0 1771#define CLAMP_MODE_OGL 2 1772 uint32_t TextureBorderColorMode; 1773#define DX10OGL 0 1774#define DX9 1 1775 bool SamplerDisable; 1776 uint32_t CubeSurfaceControlMode; 1777#define PROGRAMMED 0 1778#define OVERRIDE 1 1779 uint32_t ShadowFunction; 1780#define PREFILTEROPALWAYS 0 1781#define PREFILTEROPNEVER 1 1782#define PREFILTEROPLESS 2 1783#define PREFILTEROPEQUAL 3 1784#define PREFILTEROPLEQUAL 4 1785#define PREFILTEROPGREATER 5 1786#define PREFILTEROPNOTEQUAL 6 1787#define PREFILTEROPGEQUAL 7 1788 uint32_t ChromaKeyMode; 1789#define KEYFILTER_KILL_ON_ANY_MATCH 0 1790#define KEYFILTER_REPLACE_BLACK 1 1791 uint32_t ChromaKeyIndex; 1792 bool ChromaKeyEnable; 1793 float MaxLOD; 1794 float MinLOD; 1795 uint32_t LODClampMagnificationMode; 1796#define MIPNONE 0 1797#define MIPFILTER 1 1798 bool Forcegather4Behavior; 1799 uint64_t BorderColorPointer; 1800 enum GEN10_TextureCoordinateMode TCZAddressControlMode; 1801 enum GEN10_TextureCoordinateMode TCYAddressControlMode; 1802 enum GEN10_TextureCoordinateMode TCXAddressControlMode; 1803 bool ReductionTypeEnable; 1804 bool NonnormalizedCoordinateEnable; 1805 uint32_t TrilinearFilterQuality; 1806#define FULL 0 1807#define HIGH 1 1808#define MED 2 1809#define LOW 3 1810 bool RAddressMinFilterRoundingEnable; 1811 bool RAddressMagFilterRoundingEnable; 1812 bool VAddressMinFilterRoundingEnable; 1813 bool VAddressMagFilterRoundingEnable; 1814 bool UAddressMinFilterRoundingEnable; 1815 bool UAddressMagFilterRoundingEnable; 1816 uint32_t MaximumAnisotropy; 1817#define RATIO21 0 1818#define RATIO41 1 1819#define RATIO61 2 1820#define RATIO81 3 1821#define RATIO101 4 1822#define RATIO121 5 1823#define RATIO141 6 1824#define RATIO161 7 1825 uint32_t ReductionType; 1826#define STD_FILTER 0 1827#define COMPARISON 1 1828#define MINIMUM 2 1829#define MAXIMUM 3 1830}; 1831 1832static inline void 1833GEN10_SAMPLER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 1834 __attribute__((unused)) void * restrict dst, 1835 __attribute__((unused)) const struct GEN10_SAMPLER_STATE * restrict values) 1836{ 1837 uint32_t * restrict dw = (uint32_t * restrict) dst; 1838 1839 dw[0] = 1840 __gen_uint(values->AnisotropicAlgorithm, 0, 0) | 1841 __gen_sfixed(values->TextureLODBias, 1, 13, 8) | 1842 __gen_uint(values->MinModeFilter, 14, 16) | 1843 __gen_uint(values->MagModeFilter, 17, 19) | 1844 __gen_uint(values->MipModeFilter, 20, 21) | 1845 __gen_uint(values->CoarseLODQualityMode, 22, 26) | 1846 __gen_uint(values->LODPreClampMode, 27, 28) | 1847 __gen_uint(values->TextureBorderColorMode, 29, 29) | 1848 __gen_uint(values->SamplerDisable, 31, 31); 1849 1850 dw[1] = 1851 __gen_uint(values->CubeSurfaceControlMode, 0, 0) | 1852 __gen_uint(values->ShadowFunction, 1, 3) | 1853 __gen_uint(values->ChromaKeyMode, 4, 4) | 1854 __gen_uint(values->ChromaKeyIndex, 5, 6) | 1855 __gen_uint(values->ChromaKeyEnable, 7, 7) | 1856 __gen_ufixed(values->MaxLOD, 8, 19, 8) | 1857 __gen_ufixed(values->MinLOD, 20, 31, 8); 1858 1859 dw[2] = 1860 __gen_uint(values->LODClampMagnificationMode, 0, 0) | 1861 __gen_uint(values->Forcegather4Behavior, 5, 5) | 1862 __gen_offset(values->BorderColorPointer, 6, 23); 1863 1864 dw[3] = 1865 __gen_uint(values->TCZAddressControlMode, 0, 2) | 1866 __gen_uint(values->TCYAddressControlMode, 3, 5) | 1867 __gen_uint(values->TCXAddressControlMode, 6, 8) | 1868 __gen_uint(values->ReductionTypeEnable, 9, 9) | 1869 __gen_uint(values->NonnormalizedCoordinateEnable, 10, 10) | 1870 __gen_uint(values->TrilinearFilterQuality, 11, 12) | 1871 __gen_uint(values->RAddressMinFilterRoundingEnable, 13, 13) | 1872 __gen_uint(values->RAddressMagFilterRoundingEnable, 14, 14) | 1873 __gen_uint(values->VAddressMinFilterRoundingEnable, 15, 15) | 1874 __gen_uint(values->VAddressMagFilterRoundingEnable, 16, 16) | 1875 __gen_uint(values->UAddressMinFilterRoundingEnable, 17, 17) | 1876 __gen_uint(values->UAddressMagFilterRoundingEnable, 18, 18) | 1877 __gen_uint(values->MaximumAnisotropy, 19, 21) | 1878 __gen_uint(values->ReductionType, 22, 23); 1879} 1880 1881#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 8 1882struct GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS { 1883 float Table0FilterCoefficient[4]; 1884 float Table1FilterCoefficient0[4]; 1885 float Table1FilterCoefficient1[4]; 1886}; 1887 1888static inline void 1889GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_pack(__attribute__((unused)) __gen_user_data *data, 1890 __attribute__((unused)) void * restrict dst, 1891 __attribute__((unused)) const struct GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS * restrict values) 1892{ 1893 uint32_t * restrict dw = (uint32_t * restrict) dst; 1894 1895 dw[0] = 1896 __gen_sfixed(values->Table0FilterCoefficient[0], 0, 7, 6) | 1897 __gen_sfixed(values->Table0FilterCoefficient[1], 8, 15, 6) | 1898 __gen_sfixed(values->Table0FilterCoefficient[2], 16, 23, 6) | 1899 __gen_sfixed(values->Table0FilterCoefficient[3], 24, 31, 6) | 1900 __gen_sfixed(values->Table1FilterCoefficient0[0], 0, 7, 6) | 1901 __gen_sfixed(values->Table1FilterCoefficient1[0], 8, 15, 6); 1902 1903 dw[1] = 1904 __gen_sfixed(values->Table1FilterCoefficient0[1], 0, 7, 6) | 1905 __gen_sfixed(values->Table1FilterCoefficient1[1], 8, 15, 6); 1906 1907 dw[2] = 1908 __gen_sfixed(values->Table1FilterCoefficient0[2], 0, 7, 6) | 1909 __gen_sfixed(values->Table1FilterCoefficient1[2], 8, 15, 6); 1910 1911 dw[3] = 1912 __gen_sfixed(values->Table1FilterCoefficient0[3], 0, 7, 6) | 1913 __gen_sfixed(values->Table1FilterCoefficient1[3], 8, 15, 6); 1914 1915 dw[4] = 0; 1916 1917 dw[5] = 0; 1918 1919 dw[6] = 0; 1920 1921 dw[7] = 0; 1922} 1923 1924#define GEN10_SCISSOR_RECT_length 2 1925struct GEN10_SCISSOR_RECT { 1926 uint32_t ScissorRectangleXMin; 1927 uint32_t ScissorRectangleYMin; 1928 uint32_t ScissorRectangleXMax; 1929 uint32_t ScissorRectangleYMax; 1930}; 1931 1932static inline void 1933GEN10_SCISSOR_RECT_pack(__attribute__((unused)) __gen_user_data *data, 1934 __attribute__((unused)) void * restrict dst, 1935 __attribute__((unused)) const struct GEN10_SCISSOR_RECT * restrict values) 1936{ 1937 uint32_t * restrict dw = (uint32_t * restrict) dst; 1938 1939 dw[0] = 1940 __gen_uint(values->ScissorRectangleXMin, 0, 15) | 1941 __gen_uint(values->ScissorRectangleYMin, 16, 31); 1942 1943 dw[1] = 1944 __gen_uint(values->ScissorRectangleXMax, 0, 15) | 1945 __gen_uint(values->ScissorRectangleYMax, 16, 31); 1946} 1947 1948#define GEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY_length 64 1949struct GEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY { 1950 float Table1XFilterCoefficientn2; 1951 float Table1YFilterCoefficientn2; 1952 float Table1XFilterCoefficientn3; 1953 float Table1YFilterCoefficientn3; 1954 float Table1XFilterCoefficientn4; 1955 float Table1YFilterCoefficientn4; 1956 float Table1XFilterCoefficientn5; 1957 float Table1YFilterCoefficientn5; 1958 struct GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY FilterCoefficients[31]; 1959}; 1960 1961static inline void 1962GEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 1963 __attribute__((unused)) void * restrict dst, 1964 __attribute__((unused)) const struct GEN10_SFC_AVS_CHROMA_COEFF_TABLE_BODY * restrict values) 1965{ 1966 uint32_t * restrict dw = (uint32_t * restrict) dst; 1967 1968 dw[0] = 1969 __gen_sfixed(values->Table1XFilterCoefficientn2, 0, 7, 6) | 1970 __gen_sfixed(values->Table1YFilterCoefficientn2, 8, 15, 6) | 1971 __gen_sfixed(values->Table1XFilterCoefficientn3, 16, 23, 6) | 1972 __gen_sfixed(values->Table1YFilterCoefficientn3, 24, 31, 6); 1973 1974 dw[1] = 1975 __gen_sfixed(values->Table1XFilterCoefficientn4, 0, 7, 6) | 1976 __gen_sfixed(values->Table1YFilterCoefficientn4, 8, 15, 6) | 1977 __gen_sfixed(values->Table1XFilterCoefficientn5, 16, 23, 6) | 1978 __gen_sfixed(values->Table1YFilterCoefficientn5, 24, 31, 6); 1979 1980 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[2], &values->FilterCoefficients[0]); 1981 1982 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[4], &values->FilterCoefficients[1]); 1983 1984 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[6], &values->FilterCoefficients[2]); 1985 1986 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[8], &values->FilterCoefficients[3]); 1987 1988 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[10], &values->FilterCoefficients[4]); 1989 1990 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[12], &values->FilterCoefficients[5]); 1991 1992 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[14], &values->FilterCoefficients[6]); 1993 1994 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[16], &values->FilterCoefficients[7]); 1995 1996 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[18], &values->FilterCoefficients[8]); 1997 1998 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[20], &values->FilterCoefficients[9]); 1999 2000 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[22], &values->FilterCoefficients[10]); 2001 2002 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[24], &values->FilterCoefficients[11]); 2003 2004 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[26], &values->FilterCoefficients[12]); 2005 2006 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[28], &values->FilterCoefficients[13]); 2007 2008 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[30], &values->FilterCoefficients[14]); 2009 2010 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[32], &values->FilterCoefficients[15]); 2011 2012 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[34], &values->FilterCoefficients[16]); 2013 2014 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[36], &values->FilterCoefficients[17]); 2015 2016 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[38], &values->FilterCoefficients[18]); 2017 2018 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[40], &values->FilterCoefficients[19]); 2019 2020 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[42], &values->FilterCoefficients[20]); 2021 2022 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[44], &values->FilterCoefficients[21]); 2023 2024 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[46], &values->FilterCoefficients[22]); 2025 2026 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[48], &values->FilterCoefficients[23]); 2027 2028 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[50], &values->FilterCoefficients[24]); 2029 2030 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[52], &values->FilterCoefficients[25]); 2031 2032 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[54], &values->FilterCoefficients[26]); 2033 2034 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[56], &values->FilterCoefficients[27]); 2035 2036 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[58], &values->FilterCoefficients[28]); 2037 2038 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[60], &values->FilterCoefficients[29]); 2039 2040 GEN10_CHROMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[62], &values->FilterCoefficients[30]); 2041} 2042 2043#define GEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY_length 128 2044struct GEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY { 2045 float Table0XFilterCoefficientn0; 2046 float Table0YFilterCoefficientn0; 2047 float Table0XFilterCoefficientn1; 2048 float Table0YFilterCoefficientn1; 2049 float Table0XFilterCoefficientn2; 2050 float Table0YFilterCoefficientn2; 2051 float Table0XFilterCoefficientn3; 2052 float Table0YFilterCoefficientn3; 2053 float Table0XFilterCoefficientn4; 2054 float Table0YFilterCoefficientn4; 2055 float Table0XFilterCoefficientn5; 2056 float Table0YFilterCoefficientn5; 2057 float Table0XFilterCoefficientn6; 2058 float Table0YFilterCoefficientn6; 2059 float Table0XFilterCoefficientn7; 2060 float Table0YFilterCoefficientn7; 2061 struct GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY FilterCoefficients[31]; 2062}; 2063 2064static inline void 2065GEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2066 __attribute__((unused)) void * restrict dst, 2067 __attribute__((unused)) const struct GEN10_SFC_AVS_LUMA_COEFF_TABLE_BODY * restrict values) 2068{ 2069 uint32_t * restrict dw = (uint32_t * restrict) dst; 2070 2071 dw[0] = 2072 __gen_sfixed(values->Table0XFilterCoefficientn0, 0, 7, 6) | 2073 __gen_sfixed(values->Table0YFilterCoefficientn0, 8, 15, 6) | 2074 __gen_sfixed(values->Table0XFilterCoefficientn1, 16, 23, 6) | 2075 __gen_sfixed(values->Table0YFilterCoefficientn1, 24, 31, 6); 2076 2077 dw[1] = 2078 __gen_sfixed(values->Table0XFilterCoefficientn2, 0, 7, 6) | 2079 __gen_sfixed(values->Table0YFilterCoefficientn2, 8, 15, 6) | 2080 __gen_sfixed(values->Table0XFilterCoefficientn3, 16, 23, 6) | 2081 __gen_sfixed(values->Table0YFilterCoefficientn3, 24, 31, 6); 2082 2083 dw[2] = 2084 __gen_sfixed(values->Table0XFilterCoefficientn4, 0, 7, 6) | 2085 __gen_sfixed(values->Table0YFilterCoefficientn4, 8, 15, 6) | 2086 __gen_sfixed(values->Table0XFilterCoefficientn5, 16, 23, 6) | 2087 __gen_sfixed(values->Table0YFilterCoefficientn5, 24, 31, 6); 2088 2089 dw[3] = 2090 __gen_sfixed(values->Table0XFilterCoefficientn6, 0, 7, 6) | 2091 __gen_sfixed(values->Table0YFilterCoefficientn6, 8, 15, 6) | 2092 __gen_sfixed(values->Table0XFilterCoefficientn7, 16, 23, 6) | 2093 __gen_sfixed(values->Table0YFilterCoefficientn7, 24, 31, 6); 2094 2095 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[4], &values->FilterCoefficients[0]); 2096 2097 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[8], &values->FilterCoefficients[1]); 2098 2099 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[12], &values->FilterCoefficients[2]); 2100 2101 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[16], &values->FilterCoefficients[3]); 2102 2103 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[20], &values->FilterCoefficients[4]); 2104 2105 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[24], &values->FilterCoefficients[5]); 2106 2107 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[28], &values->FilterCoefficients[6]); 2108 2109 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[32], &values->FilterCoefficients[7]); 2110 2111 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[36], &values->FilterCoefficients[8]); 2112 2113 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[40], &values->FilterCoefficients[9]); 2114 2115 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[44], &values->FilterCoefficients[10]); 2116 2117 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[48], &values->FilterCoefficients[11]); 2118 2119 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[52], &values->FilterCoefficients[12]); 2120 2121 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[56], &values->FilterCoefficients[13]); 2122 2123 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[60], &values->FilterCoefficients[14]); 2124 2125 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[64], &values->FilterCoefficients[15]); 2126 2127 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[68], &values->FilterCoefficients[16]); 2128 2129 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[72], &values->FilterCoefficients[17]); 2130 2131 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[76], &values->FilterCoefficients[18]); 2132 2133 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[80], &values->FilterCoefficients[19]); 2134 2135 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[84], &values->FilterCoefficients[20]); 2136 2137 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[88], &values->FilterCoefficients[21]); 2138 2139 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[92], &values->FilterCoefficients[22]); 2140 2141 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[96], &values->FilterCoefficients[23]); 2142 2143 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[100], &values->FilterCoefficients[24]); 2144 2145 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[104], &values->FilterCoefficients[25]); 2146 2147 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[108], &values->FilterCoefficients[26]); 2148 2149 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[112], &values->FilterCoefficients[27]); 2150 2151 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[116], &values->FilterCoefficients[28]); 2152 2153 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[120], &values->FilterCoefficients[29]); 2154 2155 GEN10_LUMA_FILTER_COEFFICIENTS_ARRAY_pack(data, &dw[124], &values->FilterCoefficients[30]); 2156} 2157 2158#define GEN10_SFC_AVS_STATE_BODY_length 2 2159struct GEN10_SFC_AVS_STATE_BODY { 2160 uint32_t TransitionAreawith8Pixels; 2161 uint32_t TransitionAreawith4Pixels; 2162 uint32_t SharpnessLevel; 2163 uint32_t MaxDerivative8Pixels; 2164 uint32_t MaxDerivative4Pixels; 2165}; 2166 2167static inline void 2168GEN10_SFC_AVS_STATE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2169 __attribute__((unused)) void * restrict dst, 2170 __attribute__((unused)) const struct GEN10_SFC_AVS_STATE_BODY * restrict values) 2171{ 2172 uint32_t * restrict dw = (uint32_t * restrict) dst; 2173 2174 dw[0] = 2175 __gen_uint(values->TransitionAreawith8Pixels, 0, 2) | 2176 __gen_uint(values->TransitionAreawith4Pixels, 4, 6) | 2177 __gen_uint(values->SharpnessLevel, 24, 31); 2178 2179 dw[1] = 2180 __gen_uint(values->MaxDerivative8Pixels, 0, 7) | 2181 __gen_uint(values->MaxDerivative4Pixels, 16, 23); 2182} 2183 2184#define GEN10_SFC_IEF_STATE_BODY_length 23 2185struct GEN10_SFC_IEF_STATE_BODY { 2186 uint32_t GainFactor; 2187 uint32_t WeakEdgeThreshold; 2188 uint32_t StrongEdgeThreshold; 2189 float R3xCoefficient; 2190 float R3cCoefficient; 2191 uint32_t GlobalNoiseEstimation; 2192 uint32_t NonEdgeWeight; 2193 uint32_t RegularWeight; 2194 uint32_t StrongEdgeWeight; 2195 float R5xCoefficient; 2196 float R5cxCoefficient; 2197 float R5cCoefficient; 2198 float STDSinalpha; 2199 float STDCosalpha; 2200 uint32_t Sat_Max; 2201 uint32_t Hue_Max; 2202 float S3U; 2203 uint32_t DiamondMargin; 2204 bool VY_STD_Enable; 2205 uint32_t U_Mid; 2206 uint32_t V_Mid; 2207 int32_t Diamond_dv; 2208 uint32_t Diamond_Th; 2209 float Diamond_alpha; 2210 uint32_t HS_margin; 2211 int32_t Diamond_du; 2212 uint32_t SkinDetailFactor; 2213#define DetailRevealed 0 2214#define NotDetailRevealed 1 2215 uint32_t Y_point_1; 2216 uint32_t Y_point_2; 2217 uint32_t Y_point_3; 2218 uint32_t Y_point_4; 2219 float INV_Margin_VYL; 2220 float INV_Margin_VYU; 2221 uint32_t P0L; 2222 uint32_t P1L; 2223 uint32_t P2L; 2224 uint32_t P3L; 2225 uint32_t B0L; 2226 uint32_t B1L; 2227 uint32_t B2L; 2228 uint32_t B3L; 2229 float S0L; 2230 float Y_Slope_2; 2231 float S1L; 2232 float S2L; 2233 float S3L; 2234 uint32_t P0U; 2235 uint32_t P1U; 2236 float Y_Slope1; 2237 uint32_t P2U; 2238 uint32_t P3U; 2239 uint32_t B0U; 2240 uint32_t B1U; 2241 uint32_t B2U; 2242 uint32_t B3U; 2243 float S0U; 2244 float S1U; 2245 float S2U; 2246 bool TransformEnable; 2247 bool YUVChannelSwap; 2248 float C0; 2249 float C1; 2250 float C2; 2251 float C3; 2252 float C4; 2253 float C5; 2254 float C6; 2255 float C7; 2256 float C8; 2257 float OffsetIn1; 2258 float OffsetOut1; 2259 float OffsetIn2; 2260 float OffsetOut2; 2261 float OffsetIn3; 2262 float OffsetOut3; 2263}; 2264 2265static inline void 2266GEN10_SFC_IEF_STATE_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2267 __attribute__((unused)) void * restrict dst, 2268 __attribute__((unused)) const struct GEN10_SFC_IEF_STATE_BODY * restrict values) 2269{ 2270 uint32_t * restrict dw = (uint32_t * restrict) dst; 2271 2272 dw[0] = 2273 __gen_uint(values->GainFactor, 0, 5) | 2274 __gen_uint(values->WeakEdgeThreshold, 6, 11) | 2275 __gen_uint(values->StrongEdgeThreshold, 12, 17) | 2276 __gen_ufixed(values->R3xCoefficient, 18, 22, 5) | 2277 __gen_ufixed(values->R3cCoefficient, 23, 27, 5); 2278 2279 dw[1] = 2280 __gen_uint(values->GlobalNoiseEstimation, 0, 7) | 2281 __gen_uint(values->NonEdgeWeight, 8, 10) | 2282 __gen_uint(values->RegularWeight, 11, 13) | 2283 __gen_uint(values->StrongEdgeWeight, 14, 16) | 2284 __gen_ufixed(values->R5xCoefficient, 17, 21, 5) | 2285 __gen_ufixed(values->R5cxCoefficient, 22, 26, 5) | 2286 __gen_ufixed(values->R5cCoefficient, 27, 31, 5); 2287 2288 dw[2] = 2289 __gen_sfixed(values->STDSinalpha, 0, 7, 7) | 2290 __gen_sfixed(values->STDCosalpha, 8, 15, 7) | 2291 __gen_uint(values->Sat_Max, 16, 21) | 2292 __gen_uint(values->Hue_Max, 22, 27); 2293 2294 dw[3] = 2295 __gen_sfixed(values->S3U, 0, 10, 8) | 2296 __gen_uint(values->DiamondMargin, 12, 14) | 2297 __gen_uint(values->VY_STD_Enable, 15, 15) | 2298 __gen_uint(values->U_Mid, 16, 23) | 2299 __gen_uint(values->V_Mid, 24, 31); 2300 2301 dw[4] = 2302 __gen_sint(values->Diamond_dv, 0, 6) | 2303 __gen_uint(values->Diamond_Th, 7, 12) | 2304 __gen_ufixed(values->Diamond_alpha, 13, 20, 6) | 2305 __gen_uint(values->HS_margin, 21, 23) | 2306 __gen_sint(values->Diamond_du, 24, 30) | 2307 __gen_uint(values->SkinDetailFactor, 31, 31); 2308 2309 dw[5] = 2310 __gen_uint(values->Y_point_1, 0, 7) | 2311 __gen_uint(values->Y_point_2, 8, 15) | 2312 __gen_uint(values->Y_point_3, 16, 23) | 2313 __gen_uint(values->Y_point_4, 24, 31); 2314 2315 dw[6] = 2316 __gen_ufixed(values->INV_Margin_VYL, 0, 15, 16); 2317 2318 dw[7] = 2319 __gen_ufixed(values->INV_Margin_VYU, 0, 15, 16) | 2320 __gen_uint(values->P0L, 16, 23) | 2321 __gen_uint(values->P1L, 24, 31); 2322 2323 dw[8] = 2324 __gen_uint(values->P2L, 0, 7) | 2325 __gen_uint(values->P3L, 8, 15) | 2326 __gen_uint(values->B0L, 16, 23) | 2327 __gen_uint(values->B1L, 24, 31); 2328 2329 dw[9] = 2330 __gen_uint(values->B2L, 0, 7) | 2331 __gen_uint(values->B3L, 8, 15) | 2332 __gen_sfixed(values->S0L, 16, 26, 8) | 2333 __gen_ufixed(values->Y_Slope_2, 27, 31, 3); 2334 2335 dw[10] = 2336 __gen_sfixed(values->S1L, 0, 10, 8) | 2337 __gen_sfixed(values->S2L, 11, 21, 8); 2338 2339 dw[11] = 2340 __gen_sfixed(values->S3L, 0, 10, 8) | 2341 __gen_uint(values->P0U, 11, 18) | 2342 __gen_uint(values->P1U, 19, 26) | 2343 __gen_ufixed(values->Y_Slope1, 27, 31, 3); 2344 2345 dw[12] = 2346 __gen_uint(values->P2U, 0, 7) | 2347 __gen_uint(values->P3U, 8, 15) | 2348 __gen_uint(values->B0U, 16, 23) | 2349 __gen_uint(values->B1U, 24, 31); 2350 2351 dw[13] = 2352 __gen_uint(values->B2U, 0, 7) | 2353 __gen_uint(values->B3U, 8, 15) | 2354 __gen_sfixed(values->S0U, 16, 26, 8); 2355 2356 dw[14] = 2357 __gen_sfixed(values->S1U, 0, 10, 8) | 2358 __gen_sfixed(values->S2U, 11, 21, 8); 2359 2360 dw[15] = 2361 __gen_uint(values->TransformEnable, 0, 0) | 2362 __gen_uint(values->YUVChannelSwap, 1, 1) | 2363 __gen_sfixed(values->C0, 3, 15, 10) | 2364 __gen_sfixed(values->C1, 16, 28, 10); 2365 2366 dw[16] = 2367 __gen_sfixed(values->C2, 0, 12, 10) | 2368 __gen_sfixed(values->C3, 13, 25, 10); 2369 2370 dw[17] = 2371 __gen_sfixed(values->C4, 0, 12, 10) | 2372 __gen_sfixed(values->C5, 13, 25, 10); 2373 2374 dw[18] = 2375 __gen_sfixed(values->C6, 0, 12, 10) | 2376 __gen_sfixed(values->C7, 13, 25, 10); 2377 2378 dw[19] = 2379 __gen_sfixed(values->C8, 0, 12, 10); 2380 2381 dw[20] = 2382 __gen_sfixed(values->OffsetIn1, 0, 10, 8) | 2383 __gen_sfixed(values->OffsetOut1, 11, 21, 8); 2384 2385 dw[21] = 2386 __gen_sfixed(values->OffsetIn2, 0, 10, 8) | 2387 __gen_sfixed(values->OffsetOut2, 11, 21, 8); 2388 2389 dw[22] = 2390 __gen_sfixed(values->OffsetIn3, 0, 10, 8) | 2391 __gen_sfixed(values->OffsetOut3, 11, 21, 8); 2392} 2393 2394#define GEN10_SFC_LOCK_BODY_length 1 2395struct GEN10_SFC_LOCK_BODY { 2396 uint32_t VESFCPipeSelect; 2397 bool PreScaledOutputSurfaceOutputEnable; 2398}; 2399 2400static inline void 2401GEN10_SFC_LOCK_BODY_pack(__attribute__((unused)) __gen_user_data *data, 2402 __attribute__((unused)) void * restrict dst, 2403 __attribute__((unused)) const struct GEN10_SFC_LOCK_BODY * restrict values) 2404{ 2405 uint32_t * restrict dw = (uint32_t * restrict) dst; 2406 2407 dw[0] = 2408 __gen_uint(values->VESFCPipeSelect, 0, 0) | 2409 __gen_uint(values->PreScaledOutputSurfaceOutputEnable, 1, 1); 2410} 2411 2412#define GEN10_SF_CLIP_VIEWPORT_length 16 2413struct GEN10_SF_CLIP_VIEWPORT { 2414 float ViewportMatrixElementm00; 2415 float ViewportMatrixElementm11; 2416 float ViewportMatrixElementm22; 2417 float ViewportMatrixElementm30; 2418 float ViewportMatrixElementm31; 2419 float ViewportMatrixElementm32; 2420 float XMinClipGuardband; 2421 float XMaxClipGuardband; 2422 float YMinClipGuardband; 2423 float YMaxClipGuardband; 2424 float XMinViewPort; 2425 float XMaxViewPort; 2426 float YMinViewPort; 2427 float YMaxViewPort; 2428}; 2429 2430static inline void 2431GEN10_SF_CLIP_VIEWPORT_pack(__attribute__((unused)) __gen_user_data *data, 2432 __attribute__((unused)) void * restrict dst, 2433 __attribute__((unused)) const struct GEN10_SF_CLIP_VIEWPORT * restrict values) 2434{ 2435 uint32_t * restrict dw = (uint32_t * restrict) dst; 2436 2437 dw[0] = 2438 __gen_float(values->ViewportMatrixElementm00); 2439 2440 dw[1] = 2441 __gen_float(values->ViewportMatrixElementm11); 2442 2443 dw[2] = 2444 __gen_float(values->ViewportMatrixElementm22); 2445 2446 dw[3] = 2447 __gen_float(values->ViewportMatrixElementm30); 2448 2449 dw[4] = 2450 __gen_float(values->ViewportMatrixElementm31); 2451 2452 dw[5] = 2453 __gen_float(values->ViewportMatrixElementm32); 2454 2455 dw[6] = 0; 2456 2457 dw[7] = 0; 2458 2459 dw[8] = 2460 __gen_float(values->XMinClipGuardband); 2461 2462 dw[9] = 2463 __gen_float(values->XMaxClipGuardband); 2464 2465 dw[10] = 2466 __gen_float(values->YMinClipGuardband); 2467 2468 dw[11] = 2469 __gen_float(values->YMaxClipGuardband); 2470 2471 dw[12] = 2472 __gen_float(values->XMinViewPort); 2473 2474 dw[13] = 2475 __gen_float(values->XMaxViewPort); 2476 2477 dw[14] = 2478 __gen_float(values->YMinViewPort); 2479 2480 dw[15] = 2481 __gen_float(values->YMaxViewPort); 2482} 2483 2484#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1 2485struct GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL { 2486 uint32_t SourceAttribute; 2487 uint32_t SwizzleSelect; 2488#define INPUTATTR 0 2489#define INPUTATTR_FACING 1 2490#define INPUTATTR_W 2 2491#define INPUTATTR_FACING_W 3 2492 uint32_t ConstantSource; 2493#define CONST_0000 0 2494#define CONST_0001_FLOAT 1 2495#define CONST_1111_FLOAT 2 2496#define PRIM_ID 3 2497 uint32_t SwizzleControlMode; 2498 bool ComponentOverrideX; 2499 bool ComponentOverrideY; 2500 bool ComponentOverrideZ; 2501 bool ComponentOverrideW; 2502}; 2503 2504static inline void 2505GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(__attribute__((unused)) __gen_user_data *data, 2506 __attribute__((unused)) void * restrict dst, 2507 __attribute__((unused)) const struct GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL * restrict values) 2508{ 2509 uint32_t * restrict dw = (uint32_t * restrict) dst; 2510 2511 dw[0] = 2512 __gen_uint(values->SourceAttribute, 0, 4) | 2513 __gen_uint(values->SwizzleSelect, 6, 7) | 2514 __gen_uint(values->ConstantSource, 9, 10) | 2515 __gen_uint(values->SwizzleControlMode, 11, 11) | 2516 __gen_uint(values->ComponentOverrideX, 12, 12) | 2517 __gen_uint(values->ComponentOverrideY, 13, 13) | 2518 __gen_uint(values->ComponentOverrideZ, 14, 14) | 2519 __gen_uint(values->ComponentOverrideW, 15, 15); 2520} 2521 2522#define GEN10_SO_DECL_length 1 2523struct GEN10_SO_DECL { 2524 uint32_t ComponentMask; 2525 uint32_t RegisterIndex; 2526 uint32_t HoleFlag; 2527 uint32_t OutputBufferSlot; 2528}; 2529 2530static inline void 2531GEN10_SO_DECL_pack(__attribute__((unused)) __gen_user_data *data, 2532 __attribute__((unused)) void * restrict dst, 2533 __attribute__((unused)) const struct GEN10_SO_DECL * restrict values) 2534{ 2535 uint32_t * restrict dw = (uint32_t * restrict) dst; 2536 2537 dw[0] = 2538 __gen_uint(values->ComponentMask, 0, 3) | 2539 __gen_uint(values->RegisterIndex, 4, 9) | 2540 __gen_uint(values->HoleFlag, 11, 11) | 2541 __gen_uint(values->OutputBufferSlot, 12, 13); 2542} 2543 2544#define GEN10_SO_DECL_ENTRY_length 2 2545struct GEN10_SO_DECL_ENTRY { 2546 struct GEN10_SO_DECL Stream0Decl; 2547 struct GEN10_SO_DECL Stream1Decl; 2548 struct GEN10_SO_DECL Stream2Decl; 2549 struct GEN10_SO_DECL Stream3Decl; 2550}; 2551 2552static inline void 2553GEN10_SO_DECL_ENTRY_pack(__attribute__((unused)) __gen_user_data *data, 2554 __attribute__((unused)) void * restrict dst, 2555 __attribute__((unused)) const struct GEN10_SO_DECL_ENTRY * restrict values) 2556{ 2557 uint32_t * restrict dw = (uint32_t * restrict) dst; 2558 2559 uint32_t v0_0; 2560 GEN10_SO_DECL_pack(data, &v0_0, &values->Stream0Decl); 2561 2562 uint32_t v0_1; 2563 GEN10_SO_DECL_pack(data, &v0_1, &values->Stream1Decl); 2564 2565 dw[0] = 2566 __gen_uint(v0_0, 0, 15) | 2567 __gen_uint(v0_1, 16, 31); 2568 2569 uint32_t v1_0; 2570 GEN10_SO_DECL_pack(data, &v1_0, &values->Stream2Decl); 2571 2572 uint32_t v1_1; 2573 GEN10_SO_DECL_pack(data, &v1_1, &values->Stream3Decl); 2574 2575 dw[1] = 2576 __gen_uint(v1_0, 0, 15) | 2577 __gen_uint(v1_1, 16, 31); 2578} 2579 2580#define GEN10_VDENC_SURFACE_CONTROL_BITS_length 1 2581struct GEN10_VDENC_SURFACE_CONTROL_BITS { 2582 uint32_t MOCS; 2583 uint32_t ArbitrationPriorityControl; 2584#define Highestpriority 0 2585#define Secondhighestpriority 1 2586#define Thirdhighestpriority 2 2587#define Lowestpriority 3 2588 bool MemoryCompressionEnable; 2589 uint32_t MemoryCompressionMode; 2590 uint32_t CacheSelect; 2591 uint32_t TiledResourceMode; 2592#define TRMODE_NONE 0 2593#define TRMODE_TILEYF 1 2594#define TRMODE_TILEYS 2 2595}; 2596 2597static inline void 2598GEN10_VDENC_SURFACE_CONTROL_BITS_pack(__attribute__((unused)) __gen_user_data *data, 2599 __attribute__((unused)) void * restrict dst, 2600 __attribute__((unused)) const struct GEN10_VDENC_SURFACE_CONTROL_BITS * restrict values) 2601{ 2602 uint32_t * restrict dw = (uint32_t * restrict) dst; 2603 2604 dw[0] = 2605 __gen_uint(values->MOCS, 1, 6) | 2606 __gen_uint(values->ArbitrationPriorityControl, 7, 8) | 2607 __gen_uint(values->MemoryCompressionEnable, 9, 9) | 2608 __gen_uint(values->MemoryCompressionMode, 10, 10) | 2609 __gen_uint(values->CacheSelect, 12, 12) | 2610 __gen_uint(values->TiledResourceMode, 13, 14); 2611} 2612 2613#define GEN10_VDENC_PICTURE_length 3 2614struct GEN10_VDENC_PICTURE { 2615 __gen_address_type Address; 2616 struct GEN10_VDENC_SURFACE_CONTROL_BITS PictureFields; 2617}; 2618 2619static inline void 2620GEN10_VDENC_PICTURE_pack(__attribute__((unused)) __gen_user_data *data, 2621 __attribute__((unused)) void * restrict dst, 2622 __attribute__((unused)) const struct GEN10_VDENC_PICTURE * restrict values) 2623{ 2624 uint32_t * restrict dw = (uint32_t * restrict) dst; 2625 2626 const uint64_t v0_address = 2627 __gen_combine_address(data, &dw[0], values->Address, 0); 2628 dw[0] = v0_address; 2629 dw[1] = v0_address >> 32; 2630 2631 GEN10_VDENC_SURFACE_CONTROL_BITS_pack(data, &dw[2], &values->PictureFields); 2632} 2633 2634#define GEN10_VDENC_SURFACE_STATE_FIELDS_length 4 2635struct GEN10_VDENC_SURFACE_STATE_FIELDS { 2636 float CrVCbUPixelOffsetVDirection; 2637 bool SurfaceFormatByteSwizzle; 2638 uint32_t ColorSpaceSelection; 2639 uint32_t Width; 2640 uint32_t Height; 2641 uint32_t TileWalk; 2642#define TW_XMAJOR 0 2643#define TW_YMAJOR 1 2644 uint32_t TiledSurface; 2645 bool HalfPitchforChroma; 2646 uint32_t SurfacePitch; 2647 uint32_t ChromaDownsampleFilterControl; 2648 uint32_t Format; 2649 uint32_t SurfaceFormat; 2650#define VDENC_YUV422 0 2651#define VDENC_RGBA4444 1 2652#define VDENC_YUV444 2 2653#define VDENC_Y8_UNORM 3 2654#define VDENC_PLANAR_420_8 4 2655#define VDENC_YCRCB_SwapY422 5 2656#define VDENC_YCRCB_SwapUV422 6 2657#define VDENC_YCRCB_SwapUVY422 7 2658#define VDENC_P010 8 2659#define VDENC_RGBA10bitpacked 9 2660#define VDENC_Y410 10 2661#define VDENC_NV21 11 2662#define VDENC_P010Variant 12 2663 uint32_t YOffsetforUCb; 2664 uint32_t XOffsetforUCb; 2665 uint32_t YOffsetforVCr; 2666 uint32_t XOffsetforVCr; 2667}; 2668 2669static inline void 2670GEN10_VDENC_SURFACE_STATE_FIELDS_pack(__attribute__((unused)) __gen_user_data *data, 2671 __attribute__((unused)) void * restrict dst, 2672 __attribute__((unused)) const struct GEN10_VDENC_SURFACE_STATE_FIELDS * restrict values) 2673{ 2674 uint32_t * restrict dw = (uint32_t * restrict) dst; 2675 2676 dw[0] = 2677 __gen_ufixed(values->CrVCbUPixelOffsetVDirection, 0, 1, 2) | 2678 __gen_uint(values->SurfaceFormatByteSwizzle, 2, 2) | 2679 __gen_uint(values->ColorSpaceSelection, 3, 3) | 2680 __gen_uint(values->Width, 4, 17) | 2681 __gen_uint(values->Height, 18, 31); 2682 2683 dw[1] = 2684 __gen_uint(values->TileWalk, 0, 0) | 2685 __gen_uint(values->TiledSurface, 1, 1) | 2686 __gen_uint(values->HalfPitchforChroma, 2, 2) | 2687 __gen_uint(values->SurfacePitch, 3, 19) | 2688 __gen_uint(values->ChromaDownsampleFilterControl, 20, 22) | 2689 __gen_uint(values->Format, 27, 31) | 2690 __gen_uint(values->SurfaceFormat, 28, 31); 2691 2692 dw[2] = 2693 __gen_uint(values->YOffsetforUCb, 0, 14) | 2694 __gen_uint(values->XOffsetforUCb, 16, 30); 2695 2696 dw[3] = 2697 __gen_uint(values->YOffsetforVCr, 0, 15) | 2698 __gen_uint(values->XOffsetforVCr, 16, 28); 2699} 2700 2701#define GEN10_VERTEX_BUFFER_STATE_length 4 2702struct GEN10_VERTEX_BUFFER_STATE { 2703 uint32_t BufferPitch; 2704 bool NullVertexBuffer; 2705 bool AddressModifyEnable; 2706 uint32_t MOCS; 2707 uint32_t VertexBufferIndex; 2708 __gen_address_type BufferStartingAddress; 2709 uint32_t BufferSize; 2710}; 2711 2712static inline void 2713GEN10_VERTEX_BUFFER_STATE_pack(__attribute__((unused)) __gen_user_data *data, 2714 __attribute__((unused)) void * restrict dst, 2715 __attribute__((unused)) const struct GEN10_VERTEX_BUFFER_STATE * restrict values) 2716{ 2717 uint32_t * restrict dw = (uint32_t * restrict) dst; 2718 2719 dw[0] = 2720 __gen_uint(values->BufferPitch, 0, 11) | 2721 __gen_uint(values->NullVertexBuffer, 13, 13) | 2722 __gen_uint(values->AddressModifyEnable, 14, 14) | 2723 __gen_uint(values->MOCS, 16, 22) | 2724 __gen_uint(values->VertexBufferIndex, 26, 31); 2725 2726 const uint64_t v1_address = 2727 __gen_combine_address(data, &dw[1], values->BufferStartingAddress, 0); 2728 dw[1] = v1_address; 2729 dw[2] = v1_address >> 32; 2730 2731 dw[3] = 2732 __gen_uint(values->BufferSize, 0, 31); 2733} 2734 2735#define GEN10_VERTEX_ELEMENT_STATE_length 2 2736struct GEN10_VERTEX_ELEMENT_STATE { 2737 uint32_t SourceElementOffset; 2738 bool EdgeFlagEnable; 2739 uint32_t SourceElementFormat; 2740 bool Valid; 2741 uint32_t VertexBufferIndex; 2742 enum GEN10_3D_Vertex_Component_Control Component3Control; 2743 enum GEN10_3D_Vertex_Component_Control Component2Control; 2744 enum GEN10_3D_Vertex_Component_Control Component1Control; 2745 enum GEN10_3D_Vertex_Component_Control Component0Control; 2746}; 2747 2748static inline void 2749GEN10_VERTEX_ELEMENT_STATE_pack(__attribute__((unused)) __gen_user_data *data, 2750 __attribute__((unused)) void * restrict dst, 2751 __attribute__((unused)) const struct GEN10_VERTEX_ELEMENT_STATE * restrict values) 2752{ 2753 uint32_t * restrict dw = (uint32_t * restrict) dst; 2754 2755 dw[0] = 2756 __gen_uint(values->SourceElementOffset, 0, 11) | 2757 __gen_uint(values->EdgeFlagEnable, 15, 15) | 2758 __gen_uint(values->SourceElementFormat, 16, 24) | 2759 __gen_uint(values->Valid, 25, 25) | 2760 __gen_uint(values->VertexBufferIndex, 26, 31); 2761 2762 dw[1] = 2763 __gen_uint(values->Component3Control, 16, 18) | 2764 __gen_uint(values->Component2Control, 20, 22) | 2765 __gen_uint(values->Component1Control, 24, 26) | 2766 __gen_uint(values->Component0Control, 28, 30); 2767} 2768 2769#define GEN10_3DPRIMITIVE_length 7 2770#define GEN10_3DPRIMITIVE_length_bias 2 2771#define GEN10_3DPRIMITIVE_header \ 2772 .DWordLength = 5, \ 2773 ._3DCommandSubOpcode = 0, \ 2774 ._3DCommandOpcode = 3, \ 2775 .CommandSubType = 3, \ 2776 .CommandType = 3 2777 2778struct GEN10_3DPRIMITIVE { 2779 uint32_t DWordLength; 2780 bool PredicateEnable; 2781 bool UAVCoherencyRequired; 2782 bool IndirectParameterEnable; 2783 uint32_t ExtendedParametersPresent; 2784 uint32_t _3DCommandSubOpcode; 2785 uint32_t _3DCommandOpcode; 2786 uint32_t CommandSubType; 2787 uint32_t CommandType; 2788 enum GEN10_3D_Prim_Topo_Type PrimitiveTopologyType; 2789 uint32_t VertexAccessType; 2790#define SEQUENTIAL 0 2791#define RANDOM 1 2792 bool EndOffsetEnable; 2793 uint32_t VertexCountPerInstance; 2794 uint32_t StartVertexLocation; 2795 uint32_t InstanceCount; 2796 uint32_t StartInstanceLocation; 2797 int32_t BaseVertexLocation; 2798 uint32_t ExtendedParameter0; 2799 uint32_t ExtendedParameter1; 2800 uint32_t ExtendedParameter2; 2801}; 2802 2803static inline void 2804GEN10_3DPRIMITIVE_pack(__attribute__((unused)) __gen_user_data *data, 2805 __attribute__((unused)) void * restrict dst, 2806 __attribute__((unused)) const struct GEN10_3DPRIMITIVE * restrict values) 2807{ 2808 uint32_t * restrict dw = (uint32_t * restrict) dst; 2809 2810 dw[0] = 2811 __gen_uint(values->DWordLength, 0, 7) | 2812 __gen_uint(values->PredicateEnable, 8, 8) | 2813 __gen_uint(values->UAVCoherencyRequired, 9, 9) | 2814 __gen_uint(values->IndirectParameterEnable, 10, 10) | 2815 __gen_uint(values->ExtendedParametersPresent, 11, 11) | 2816 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2817 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2818 __gen_uint(values->CommandSubType, 27, 28) | 2819 __gen_uint(values->CommandType, 29, 31); 2820 2821 dw[1] = 2822 __gen_uint(values->PrimitiveTopologyType, 0, 5) | 2823 __gen_uint(values->VertexAccessType, 8, 8) | 2824 __gen_uint(values->EndOffsetEnable, 9, 9); 2825 2826 dw[2] = 2827 __gen_uint(values->VertexCountPerInstance, 0, 31); 2828 2829 dw[3] = 2830 __gen_uint(values->StartVertexLocation, 0, 31); 2831 2832 dw[4] = 2833 __gen_uint(values->InstanceCount, 0, 31); 2834 2835 dw[5] = 2836 __gen_uint(values->StartInstanceLocation, 0, 31); 2837 2838 dw[6] = 2839 __gen_sint(values->BaseVertexLocation, 0, 31); 2840} 2841 2842#define GEN10_3DSTATE_AA_LINE_PARAMETERS_length 3 2843#define GEN10_3DSTATE_AA_LINE_PARAMETERS_length_bias 2 2844#define GEN10_3DSTATE_AA_LINE_PARAMETERS_header \ 2845 .DWordLength = 1, \ 2846 ._3DCommandSubOpcode = 10, \ 2847 ._3DCommandOpcode = 1, \ 2848 .CommandSubType = 3, \ 2849 .CommandType = 3 2850 2851struct GEN10_3DSTATE_AA_LINE_PARAMETERS { 2852 uint32_t DWordLength; 2853 uint32_t _3DCommandSubOpcode; 2854 uint32_t _3DCommandOpcode; 2855 uint32_t CommandSubType; 2856 uint32_t CommandType; 2857 float AACoverageSlope; 2858 float AAPointCoverageSlope; 2859 float AACoverageBias; 2860 float AAPointCoverageBias; 2861 float AACoverageEndCapSlope; 2862 float AAPointCoverageEndCapSlope; 2863 float AACoverageEndCapBias; 2864 float AAPointCoverageEndCapBias; 2865}; 2866 2867static inline void 2868GEN10_3DSTATE_AA_LINE_PARAMETERS_pack(__attribute__((unused)) __gen_user_data *data, 2869 __attribute__((unused)) void * restrict dst, 2870 __attribute__((unused)) const struct GEN10_3DSTATE_AA_LINE_PARAMETERS * restrict values) 2871{ 2872 uint32_t * restrict dw = (uint32_t * restrict) dst; 2873 2874 dw[0] = 2875 __gen_uint(values->DWordLength, 0, 7) | 2876 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2877 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2878 __gen_uint(values->CommandSubType, 27, 28) | 2879 __gen_uint(values->CommandType, 29, 31); 2880 2881 dw[1] = 2882 __gen_ufixed(values->AACoverageSlope, 0, 7, 8) | 2883 __gen_ufixed(values->AAPointCoverageSlope, 8, 15, 8) | 2884 __gen_ufixed(values->AACoverageBias, 16, 23, 8) | 2885 __gen_ufixed(values->AAPointCoverageBias, 24, 31, 8); 2886 2887 dw[2] = 2888 __gen_ufixed(values->AACoverageEndCapSlope, 0, 7, 8) | 2889 __gen_ufixed(values->AAPointCoverageEndCapSlope, 8, 15, 8) | 2890 __gen_ufixed(values->AACoverageEndCapBias, 16, 23, 8) | 2891 __gen_ufixed(values->AAPointCoverageEndCapBias, 24, 31, 8); 2892} 2893 2894#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_length_bias 2 2895#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_header\ 2896 .DWordLength = 0, \ 2897 ._3DCommandSubOpcode = 70, \ 2898 ._3DCommandOpcode = 0, \ 2899 .CommandSubType = 3, \ 2900 .CommandType = 3 2901 2902struct GEN10_3DSTATE_BINDING_TABLE_EDIT_DS { 2903 uint32_t DWordLength; 2904 uint32_t _3DCommandSubOpcode; 2905 uint32_t _3DCommandOpcode; 2906 uint32_t CommandSubType; 2907 uint32_t CommandType; 2908 uint32_t BindingTableEditTarget; 2909#define AllCores 3 2910#define Core1 2 2911#define Core0 1 2912 uint32_t BindingTableBlockClear; 2913 /* variable length fields follow */ 2914}; 2915 2916static inline void 2917GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_pack(__attribute__((unused)) __gen_user_data *data, 2918 __attribute__((unused)) void * restrict dst, 2919 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_DS * restrict values) 2920{ 2921 uint32_t * restrict dw = (uint32_t * restrict) dst; 2922 2923 dw[0] = 2924 __gen_uint(values->DWordLength, 0, 8) | 2925 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2926 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2927 __gen_uint(values->CommandSubType, 27, 28) | 2928 __gen_uint(values->CommandType, 29, 31); 2929 2930 dw[1] = 2931 __gen_uint(values->BindingTableEditTarget, 0, 1) | 2932 __gen_uint(values->BindingTableBlockClear, 16, 31); 2933} 2934 2935#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_length_bias 2 2936#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_header\ 2937 .DWordLength = 0, \ 2938 ._3DCommandSubOpcode = 68, \ 2939 ._3DCommandOpcode = 0, \ 2940 .CommandSubType = 3, \ 2941 .CommandType = 3 2942 2943struct GEN10_3DSTATE_BINDING_TABLE_EDIT_GS { 2944 uint32_t DWordLength; 2945 uint32_t _3DCommandSubOpcode; 2946 uint32_t _3DCommandOpcode; 2947 uint32_t CommandSubType; 2948 uint32_t CommandType; 2949 uint32_t BindingTableEditTarget; 2950#define AllCores 3 2951#define Core1 2 2952#define Core0 1 2953 uint32_t BindingTableBlockClear; 2954 /* variable length fields follow */ 2955}; 2956 2957static inline void 2958GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_pack(__attribute__((unused)) __gen_user_data *data, 2959 __attribute__((unused)) void * restrict dst, 2960 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_GS * restrict values) 2961{ 2962 uint32_t * restrict dw = (uint32_t * restrict) dst; 2963 2964 dw[0] = 2965 __gen_uint(values->DWordLength, 0, 8) | 2966 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 2967 __gen_uint(values->_3DCommandOpcode, 24, 26) | 2968 __gen_uint(values->CommandSubType, 27, 28) | 2969 __gen_uint(values->CommandType, 29, 31); 2970 2971 dw[1] = 2972 __gen_uint(values->BindingTableEditTarget, 0, 1) | 2973 __gen_uint(values->BindingTableBlockClear, 16, 31); 2974} 2975 2976#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_length_bias 2 2977#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_header\ 2978 .DWordLength = 0, \ 2979 ._3DCommandSubOpcode = 69, \ 2980 ._3DCommandOpcode = 0, \ 2981 .CommandSubType = 3, \ 2982 .CommandType = 3 2983 2984struct GEN10_3DSTATE_BINDING_TABLE_EDIT_HS { 2985 uint32_t DWordLength; 2986 uint32_t _3DCommandSubOpcode; 2987 uint32_t _3DCommandOpcode; 2988 uint32_t CommandSubType; 2989 uint32_t CommandType; 2990 uint32_t BindingTableEditTarget; 2991#define AllCores 3 2992#define Core1 2 2993#define Core0 1 2994 uint32_t BindingTableBlockClear; 2995 /* variable length fields follow */ 2996}; 2997 2998static inline void 2999GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_pack(__attribute__((unused)) __gen_user_data *data, 3000 __attribute__((unused)) void * restrict dst, 3001 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_HS * restrict values) 3002{ 3003 uint32_t * restrict dw = (uint32_t * restrict) dst; 3004 3005 dw[0] = 3006 __gen_uint(values->DWordLength, 0, 8) | 3007 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3008 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3009 __gen_uint(values->CommandSubType, 27, 28) | 3010 __gen_uint(values->CommandType, 29, 31); 3011 3012 dw[1] = 3013 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3014 __gen_uint(values->BindingTableBlockClear, 16, 31); 3015} 3016 3017#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_length_bias 2 3018#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_header\ 3019 .DWordLength = 0, \ 3020 ._3DCommandSubOpcode = 71, \ 3021 ._3DCommandOpcode = 0, \ 3022 .CommandSubType = 3, \ 3023 .CommandType = 3 3024 3025struct GEN10_3DSTATE_BINDING_TABLE_EDIT_PS { 3026 uint32_t DWordLength; 3027 uint32_t _3DCommandSubOpcode; 3028 uint32_t _3DCommandOpcode; 3029 uint32_t CommandSubType; 3030 uint32_t CommandType; 3031 uint32_t BindingTableEditTarget; 3032#define AllCores 3 3033#define Core1 2 3034#define Core0 1 3035 uint32_t BindingTableBlockClear; 3036 /* variable length fields follow */ 3037}; 3038 3039static inline void 3040GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_pack(__attribute__((unused)) __gen_user_data *data, 3041 __attribute__((unused)) void * restrict dst, 3042 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_PS * restrict values) 3043{ 3044 uint32_t * restrict dw = (uint32_t * restrict) dst; 3045 3046 dw[0] = 3047 __gen_uint(values->DWordLength, 0, 8) | 3048 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3049 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3050 __gen_uint(values->CommandSubType, 27, 28) | 3051 __gen_uint(values->CommandType, 29, 31); 3052 3053 dw[1] = 3054 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3055 __gen_uint(values->BindingTableBlockClear, 16, 31); 3056} 3057 3058#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_length_bias 2 3059#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_header\ 3060 .DWordLength = 0, \ 3061 ._3DCommandSubOpcode = 67, \ 3062 ._3DCommandOpcode = 0, \ 3063 .CommandSubType = 3, \ 3064 .CommandType = 3 3065 3066struct GEN10_3DSTATE_BINDING_TABLE_EDIT_VS { 3067 uint32_t DWordLength; 3068 uint32_t _3DCommandSubOpcode; 3069 uint32_t _3DCommandOpcode; 3070 uint32_t CommandSubType; 3071 uint32_t CommandType; 3072 uint32_t BindingTableEditTarget; 3073#define AllCores 3 3074#define Core1 2 3075#define Core0 1 3076 uint32_t BindingTableBlockClear; 3077 /* variable length fields follow */ 3078}; 3079 3080static inline void 3081GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_pack(__attribute__((unused)) __gen_user_data *data, 3082 __attribute__((unused)) void * restrict dst, 3083 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_EDIT_VS * restrict values) 3084{ 3085 uint32_t * restrict dw = (uint32_t * restrict) dst; 3086 3087 dw[0] = 3088 __gen_uint(values->DWordLength, 0, 8) | 3089 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3090 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3091 __gen_uint(values->CommandSubType, 27, 28) | 3092 __gen_uint(values->CommandType, 29, 31); 3093 3094 dw[1] = 3095 __gen_uint(values->BindingTableEditTarget, 0, 1) | 3096 __gen_uint(values->BindingTableBlockClear, 16, 31); 3097} 3098 3099#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2 3100#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_length_bias 2 3101#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_header\ 3102 .DWordLength = 0, \ 3103 ._3DCommandSubOpcode = 40, \ 3104 ._3DCommandOpcode = 0, \ 3105 .CommandSubType = 3, \ 3106 .CommandType = 3 3107 3108struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS { 3109 uint32_t DWordLength; 3110 uint32_t _3DCommandSubOpcode; 3111 uint32_t _3DCommandOpcode; 3112 uint32_t CommandSubType; 3113 uint32_t CommandType; 3114 uint64_t PointertoDSBindingTable; 3115}; 3116 3117static inline void 3118GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 3119 __attribute__((unused)) void * restrict dst, 3120 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS * restrict values) 3121{ 3122 uint32_t * restrict dw = (uint32_t * restrict) dst; 3123 3124 dw[0] = 3125 __gen_uint(values->DWordLength, 0, 7) | 3126 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3127 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3128 __gen_uint(values->CommandSubType, 27, 28) | 3129 __gen_uint(values->CommandType, 29, 31); 3130 3131 dw[1] = 3132 __gen_offset(values->PointertoDSBindingTable, 5, 15); 3133} 3134 3135#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2 3136#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_length_bias 2 3137#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_header\ 3138 .DWordLength = 0, \ 3139 ._3DCommandSubOpcode = 41, \ 3140 ._3DCommandOpcode = 0, \ 3141 .CommandSubType = 3, \ 3142 .CommandType = 3 3143 3144struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS { 3145 uint32_t DWordLength; 3146 uint32_t _3DCommandSubOpcode; 3147 uint32_t _3DCommandOpcode; 3148 uint32_t CommandSubType; 3149 uint32_t CommandType; 3150 uint64_t PointertoGSBindingTable; 3151}; 3152 3153static inline void 3154GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 3155 __attribute__((unused)) void * restrict dst, 3156 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS * restrict values) 3157{ 3158 uint32_t * restrict dw = (uint32_t * restrict) dst; 3159 3160 dw[0] = 3161 __gen_uint(values->DWordLength, 0, 7) | 3162 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3163 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3164 __gen_uint(values->CommandSubType, 27, 28) | 3165 __gen_uint(values->CommandType, 29, 31); 3166 3167 dw[1] = 3168 __gen_offset(values->PointertoGSBindingTable, 5, 15); 3169} 3170 3171#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2 3172#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_length_bias 2 3173#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_header\ 3174 .DWordLength = 0, \ 3175 ._3DCommandSubOpcode = 39, \ 3176 ._3DCommandOpcode = 0, \ 3177 .CommandSubType = 3, \ 3178 .CommandType = 3 3179 3180struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS { 3181 uint32_t DWordLength; 3182 uint32_t _3DCommandSubOpcode; 3183 uint32_t _3DCommandOpcode; 3184 uint32_t CommandSubType; 3185 uint32_t CommandType; 3186 uint64_t PointertoHSBindingTable; 3187}; 3188 3189static inline void 3190GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 3191 __attribute__((unused)) void * restrict dst, 3192 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS * restrict values) 3193{ 3194 uint32_t * restrict dw = (uint32_t * restrict) dst; 3195 3196 dw[0] = 3197 __gen_uint(values->DWordLength, 0, 7) | 3198 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3199 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3200 __gen_uint(values->CommandSubType, 27, 28) | 3201 __gen_uint(values->CommandType, 29, 31); 3202 3203 dw[1] = 3204 __gen_offset(values->PointertoHSBindingTable, 5, 15); 3205} 3206 3207#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2 3208#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_length_bias 2 3209#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_header\ 3210 .DWordLength = 0, \ 3211 ._3DCommandSubOpcode = 42, \ 3212 ._3DCommandOpcode = 0, \ 3213 .CommandSubType = 3, \ 3214 .CommandType = 3 3215 3216struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS { 3217 uint32_t DWordLength; 3218 uint32_t _3DCommandSubOpcode; 3219 uint32_t _3DCommandOpcode; 3220 uint32_t CommandSubType; 3221 uint32_t CommandType; 3222 uint64_t PointertoPSBindingTable; 3223}; 3224 3225static inline void 3226GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 3227 __attribute__((unused)) void * restrict dst, 3228 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS * restrict values) 3229{ 3230 uint32_t * restrict dw = (uint32_t * restrict) dst; 3231 3232 dw[0] = 3233 __gen_uint(values->DWordLength, 0, 7) | 3234 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3235 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3236 __gen_uint(values->CommandSubType, 27, 28) | 3237 __gen_uint(values->CommandType, 29, 31); 3238 3239 dw[1] = 3240 __gen_offset(values->PointertoPSBindingTable, 5, 15); 3241} 3242 3243#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2 3244#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_length_bias 2 3245#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_header\ 3246 .DWordLength = 0, \ 3247 ._3DCommandSubOpcode = 38, \ 3248 ._3DCommandOpcode = 0, \ 3249 .CommandSubType = 3, \ 3250 .CommandType = 3 3251 3252struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS { 3253 uint32_t DWordLength; 3254 uint32_t _3DCommandSubOpcode; 3255 uint32_t _3DCommandOpcode; 3256 uint32_t CommandSubType; 3257 uint32_t CommandType; 3258 uint64_t PointertoVSBindingTable; 3259}; 3260 3261static inline void 3262GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 3263 __attribute__((unused)) void * restrict dst, 3264 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS * restrict values) 3265{ 3266 uint32_t * restrict dw = (uint32_t * restrict) dst; 3267 3268 dw[0] = 3269 __gen_uint(values->DWordLength, 0, 7) | 3270 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3271 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3272 __gen_uint(values->CommandSubType, 27, 28) | 3273 __gen_uint(values->CommandType, 29, 31); 3274 3275 dw[1] = 3276 __gen_offset(values->PointertoVSBindingTable, 5, 15); 3277} 3278 3279#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 4 3280#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_length_bias 2 3281#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_header\ 3282 .DWordLength = 2, \ 3283 ._3DCommandSubOpcode = 25, \ 3284 ._3DCommandOpcode = 1, \ 3285 .CommandSubType = 3, \ 3286 .CommandType = 3 3287 3288struct GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC { 3289 uint32_t DWordLength; 3290 uint32_t _3DCommandSubOpcode; 3291 uint32_t _3DCommandOpcode; 3292 uint32_t CommandSubType; 3293 uint32_t CommandType; 3294 uint32_t MOCS; 3295 uint32_t BindingTablePoolEnable; 3296 __gen_address_type BindingTablePoolBaseAddress; 3297 uint32_t BindingTablePoolBufferSize; 3298#define NoValidData 0 3299}; 3300 3301static inline void 3302GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 3303 __attribute__((unused)) void * restrict dst, 3304 __attribute__((unused)) const struct GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC * restrict values) 3305{ 3306 uint32_t * restrict dw = (uint32_t * restrict) dst; 3307 3308 dw[0] = 3309 __gen_uint(values->DWordLength, 0, 7) | 3310 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3311 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3312 __gen_uint(values->CommandSubType, 27, 28) | 3313 __gen_uint(values->CommandType, 29, 31); 3314 3315 const uint64_t v1 = 3316 __gen_uint(values->MOCS, 0, 6) | 3317 __gen_uint(values->BindingTablePoolEnable, 11, 11); 3318 const uint64_t v1_address = 3319 __gen_combine_address(data, &dw[1], values->BindingTablePoolBaseAddress, v1); 3320 dw[1] = v1_address; 3321 dw[2] = (v1_address >> 32) | (v1 >> 32); 3322 3323 dw[3] = 3324 __gen_uint(values->BindingTablePoolBufferSize, 12, 31); 3325} 3326 3327#define GEN10_3DSTATE_BLEND_STATE_POINTERS_length 2 3328#define GEN10_3DSTATE_BLEND_STATE_POINTERS_length_bias 2 3329#define GEN10_3DSTATE_BLEND_STATE_POINTERS_header\ 3330 .DWordLength = 0, \ 3331 ._3DCommandSubOpcode = 36, \ 3332 ._3DCommandOpcode = 0, \ 3333 .CommandSubType = 3, \ 3334 .CommandType = 3 3335 3336struct GEN10_3DSTATE_BLEND_STATE_POINTERS { 3337 uint32_t DWordLength; 3338 uint32_t _3DCommandSubOpcode; 3339 uint32_t _3DCommandOpcode; 3340 uint32_t CommandSubType; 3341 uint32_t CommandType; 3342 bool BlendStatePointerValid; 3343 uint64_t BlendStatePointer; 3344}; 3345 3346static inline void 3347GEN10_3DSTATE_BLEND_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 3348 __attribute__((unused)) void * restrict dst, 3349 __attribute__((unused)) const struct GEN10_3DSTATE_BLEND_STATE_POINTERS * restrict values) 3350{ 3351 uint32_t * restrict dw = (uint32_t * restrict) dst; 3352 3353 dw[0] = 3354 __gen_uint(values->DWordLength, 0, 7) | 3355 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3356 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3357 __gen_uint(values->CommandSubType, 27, 28) | 3358 __gen_uint(values->CommandType, 29, 31); 3359 3360 dw[1] = 3361 __gen_uint(values->BlendStatePointerValid, 0, 0) | 3362 __gen_offset(values->BlendStatePointer, 6, 31); 3363} 3364 3365#define GEN10_3DSTATE_CC_STATE_POINTERS_length 2 3366#define GEN10_3DSTATE_CC_STATE_POINTERS_length_bias 2 3367#define GEN10_3DSTATE_CC_STATE_POINTERS_header \ 3368 .DWordLength = 0, \ 3369 ._3DCommandSubOpcode = 14, \ 3370 ._3DCommandOpcode = 0, \ 3371 .CommandSubType = 3, \ 3372 .CommandType = 3 3373 3374struct GEN10_3DSTATE_CC_STATE_POINTERS { 3375 uint32_t DWordLength; 3376 uint32_t _3DCommandSubOpcode; 3377 uint32_t _3DCommandOpcode; 3378 uint32_t CommandSubType; 3379 uint32_t CommandType; 3380 bool ColorCalcStatePointerValid; 3381 uint64_t ColorCalcStatePointer; 3382}; 3383 3384static inline void 3385GEN10_3DSTATE_CC_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 3386 __attribute__((unused)) void * restrict dst, 3387 __attribute__((unused)) const struct GEN10_3DSTATE_CC_STATE_POINTERS * restrict values) 3388{ 3389 uint32_t * restrict dw = (uint32_t * restrict) dst; 3390 3391 dw[0] = 3392 __gen_uint(values->DWordLength, 0, 7) | 3393 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3394 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3395 __gen_uint(values->CommandSubType, 27, 28) | 3396 __gen_uint(values->CommandType, 29, 31); 3397 3398 dw[1] = 3399 __gen_uint(values->ColorCalcStatePointerValid, 0, 0) | 3400 __gen_offset(values->ColorCalcStatePointer, 6, 31); 3401} 3402 3403#define GEN10_3DSTATE_CHROMA_KEY_length 4 3404#define GEN10_3DSTATE_CHROMA_KEY_length_bias 2 3405#define GEN10_3DSTATE_CHROMA_KEY_header \ 3406 .DWordLength = 2, \ 3407 ._3DCommandSubOpcode = 4, \ 3408 ._3DCommandOpcode = 1, \ 3409 .CommandSubType = 3, \ 3410 .CommandType = 3 3411 3412struct GEN10_3DSTATE_CHROMA_KEY { 3413 uint32_t DWordLength; 3414 uint32_t _3DCommandSubOpcode; 3415 uint32_t _3DCommandOpcode; 3416 uint32_t CommandSubType; 3417 uint32_t CommandType; 3418 uint32_t ChromaKeyTableIndex; 3419 uint32_t ChromaKeyLowValue; 3420 uint32_t ChromaKeyHighValue; 3421}; 3422 3423static inline void 3424GEN10_3DSTATE_CHROMA_KEY_pack(__attribute__((unused)) __gen_user_data *data, 3425 __attribute__((unused)) void * restrict dst, 3426 __attribute__((unused)) const struct GEN10_3DSTATE_CHROMA_KEY * restrict values) 3427{ 3428 uint32_t * restrict dw = (uint32_t * restrict) dst; 3429 3430 dw[0] = 3431 __gen_uint(values->DWordLength, 0, 7) | 3432 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3433 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3434 __gen_uint(values->CommandSubType, 27, 28) | 3435 __gen_uint(values->CommandType, 29, 31); 3436 3437 dw[1] = 3438 __gen_uint(values->ChromaKeyTableIndex, 30, 31); 3439 3440 dw[2] = 3441 __gen_uint(values->ChromaKeyLowValue, 0, 31); 3442 3443 dw[3] = 3444 __gen_uint(values->ChromaKeyHighValue, 0, 31); 3445} 3446 3447#define GEN10_3DSTATE_CLEAR_PARAMS_length 3 3448#define GEN10_3DSTATE_CLEAR_PARAMS_length_bias 2 3449#define GEN10_3DSTATE_CLEAR_PARAMS_header \ 3450 .DWordLength = 1, \ 3451 ._3DCommandSubOpcode = 4, \ 3452 ._3DCommandOpcode = 0, \ 3453 .CommandSubType = 3, \ 3454 .CommandType = 3 3455 3456struct GEN10_3DSTATE_CLEAR_PARAMS { 3457 uint32_t DWordLength; 3458 uint32_t _3DCommandSubOpcode; 3459 uint32_t _3DCommandOpcode; 3460 uint32_t CommandSubType; 3461 uint32_t CommandType; 3462 float DepthClearValue; 3463 bool DepthClearValueValid; 3464}; 3465 3466static inline void 3467GEN10_3DSTATE_CLEAR_PARAMS_pack(__attribute__((unused)) __gen_user_data *data, 3468 __attribute__((unused)) void * restrict dst, 3469 __attribute__((unused)) const struct GEN10_3DSTATE_CLEAR_PARAMS * restrict values) 3470{ 3471 uint32_t * restrict dw = (uint32_t * restrict) dst; 3472 3473 dw[0] = 3474 __gen_uint(values->DWordLength, 0, 7) | 3475 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3476 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3477 __gen_uint(values->CommandSubType, 27, 28) | 3478 __gen_uint(values->CommandType, 29, 31); 3479 3480 dw[1] = 3481 __gen_float(values->DepthClearValue); 3482 3483 dw[2] = 3484 __gen_uint(values->DepthClearValueValid, 0, 0); 3485} 3486 3487#define GEN10_3DSTATE_CLIP_length 4 3488#define GEN10_3DSTATE_CLIP_length_bias 2 3489#define GEN10_3DSTATE_CLIP_header \ 3490 .DWordLength = 2, \ 3491 ._3DCommandSubOpcode = 18, \ 3492 ._3DCommandOpcode = 0, \ 3493 .CommandSubType = 3, \ 3494 .CommandType = 3 3495 3496struct GEN10_3DSTATE_CLIP { 3497 uint32_t DWordLength; 3498 uint32_t _3DCommandSubOpcode; 3499 uint32_t _3DCommandOpcode; 3500 uint32_t CommandSubType; 3501 uint32_t CommandType; 3502 uint32_t UserClipDistanceCullTestEnableBitmask; 3503 bool StatisticsEnable; 3504 bool ForceClipMode; 3505 bool ForceUserClipDistanceClipTestEnableBitmask; 3506 bool EarlyCullEnable; 3507 uint32_t VertexSubPixelPrecisionSelect; 3508#define _8Bit 0 3509#define _4Bit 1 3510 bool ForceUserClipDistanceCullTestEnableBitmask; 3511 uint32_t TriangleFanProvokingVertexSelect; 3512 uint32_t LineStripListProvokingVertexSelect; 3513 uint32_t TriangleStripListProvokingVertexSelect; 3514 bool NonPerspectiveBarycentricEnable; 3515 bool PerspectiveDivideDisable; 3516 uint32_t ClipMode; 3517#define CLIPMODE_NORMAL 0 3518#define CLIPMODE_REJECT_ALL 3 3519#define CLIPMODE_ACCEPT_ALL 4 3520 uint32_t UserClipDistanceClipTestEnableBitmask; 3521 bool GuardbandClipTestEnable; 3522 bool ViewportXYClipTestEnable; 3523 uint32_t APIMode; 3524#define APIMODE_OGL 0 3525#define APIMODE_D3D 1 3526 bool ClipEnable; 3527 uint32_t MaximumVPIndex; 3528 bool ForceZeroRTAIndexEnable; 3529 float MaximumPointWidth; 3530 float MinimumPointWidth; 3531}; 3532 3533static inline void 3534GEN10_3DSTATE_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 3535 __attribute__((unused)) void * restrict dst, 3536 __attribute__((unused)) const struct GEN10_3DSTATE_CLIP * restrict values) 3537{ 3538 uint32_t * restrict dw = (uint32_t * restrict) dst; 3539 3540 dw[0] = 3541 __gen_uint(values->DWordLength, 0, 7) | 3542 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3543 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3544 __gen_uint(values->CommandSubType, 27, 28) | 3545 __gen_uint(values->CommandType, 29, 31); 3546 3547 dw[1] = 3548 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 3549 __gen_uint(values->StatisticsEnable, 10, 10) | 3550 __gen_uint(values->ForceClipMode, 16, 16) | 3551 __gen_uint(values->ForceUserClipDistanceClipTestEnableBitmask, 17, 17) | 3552 __gen_uint(values->EarlyCullEnable, 18, 18) | 3553 __gen_uint(values->VertexSubPixelPrecisionSelect, 19, 19) | 3554 __gen_uint(values->ForceUserClipDistanceCullTestEnableBitmask, 20, 20); 3555 3556 dw[2] = 3557 __gen_uint(values->TriangleFanProvokingVertexSelect, 0, 1) | 3558 __gen_uint(values->LineStripListProvokingVertexSelect, 2, 3) | 3559 __gen_uint(values->TriangleStripListProvokingVertexSelect, 4, 5) | 3560 __gen_uint(values->NonPerspectiveBarycentricEnable, 8, 8) | 3561 __gen_uint(values->PerspectiveDivideDisable, 9, 9) | 3562 __gen_uint(values->ClipMode, 13, 15) | 3563 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 16, 23) | 3564 __gen_uint(values->GuardbandClipTestEnable, 26, 26) | 3565 __gen_uint(values->ViewportXYClipTestEnable, 28, 28) | 3566 __gen_uint(values->APIMode, 30, 30) | 3567 __gen_uint(values->ClipEnable, 31, 31); 3568 3569 dw[3] = 3570 __gen_uint(values->MaximumVPIndex, 0, 3) | 3571 __gen_uint(values->ForceZeroRTAIndexEnable, 5, 5) | 3572 __gen_ufixed(values->MaximumPointWidth, 6, 16, 3) | 3573 __gen_ufixed(values->MinimumPointWidth, 17, 27, 3); 3574} 3575 3576#define GEN10_3DSTATE_CONSTANT_DS_length 11 3577#define GEN10_3DSTATE_CONSTANT_DS_length_bias 2 3578#define GEN10_3DSTATE_CONSTANT_DS_header \ 3579 .DWordLength = 9, \ 3580 ._3DCommandSubOpcode = 26, \ 3581 ._3DCommandOpcode = 0, \ 3582 .CommandSubType = 3, \ 3583 .CommandType = 3 3584 3585struct GEN10_3DSTATE_CONSTANT_DS { 3586 uint32_t DWordLength; 3587 uint32_t MOCS; 3588 uint32_t _3DCommandSubOpcode; 3589 uint32_t _3DCommandOpcode; 3590 uint32_t CommandSubType; 3591 uint32_t CommandType; 3592 struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3593}; 3594 3595static inline void 3596GEN10_3DSTATE_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 3597 __attribute__((unused)) void * restrict dst, 3598 __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_DS * restrict values) 3599{ 3600 uint32_t * restrict dw = (uint32_t * restrict) dst; 3601 3602 dw[0] = 3603 __gen_uint(values->DWordLength, 0, 7) | 3604 __gen_uint(values->MOCS, 8, 14) | 3605 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3606 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3607 __gen_uint(values->CommandSubType, 27, 28) | 3608 __gen_uint(values->CommandType, 29, 31); 3609 3610 GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3611} 3612 3613#define GEN10_3DSTATE_CONSTANT_GS_length 11 3614#define GEN10_3DSTATE_CONSTANT_GS_length_bias 2 3615#define GEN10_3DSTATE_CONSTANT_GS_header \ 3616 .DWordLength = 9, \ 3617 ._3DCommandSubOpcode = 22, \ 3618 ._3DCommandOpcode = 0, \ 3619 .CommandSubType = 3, \ 3620 .CommandType = 3 3621 3622struct GEN10_3DSTATE_CONSTANT_GS { 3623 uint32_t DWordLength; 3624 uint32_t MOCS; 3625 uint32_t _3DCommandSubOpcode; 3626 uint32_t _3DCommandOpcode; 3627 uint32_t CommandSubType; 3628 uint32_t CommandType; 3629 struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3630}; 3631 3632static inline void 3633GEN10_3DSTATE_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 3634 __attribute__((unused)) void * restrict dst, 3635 __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_GS * restrict values) 3636{ 3637 uint32_t * restrict dw = (uint32_t * restrict) dst; 3638 3639 dw[0] = 3640 __gen_uint(values->DWordLength, 0, 7) | 3641 __gen_uint(values->MOCS, 8, 14) | 3642 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3643 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3644 __gen_uint(values->CommandSubType, 27, 28) | 3645 __gen_uint(values->CommandType, 29, 31); 3646 3647 GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3648} 3649 3650#define GEN10_3DSTATE_CONSTANT_HS_length 11 3651#define GEN10_3DSTATE_CONSTANT_HS_length_bias 2 3652#define GEN10_3DSTATE_CONSTANT_HS_header \ 3653 .DWordLength = 9, \ 3654 ._3DCommandSubOpcode = 25, \ 3655 ._3DCommandOpcode = 0, \ 3656 .CommandSubType = 3, \ 3657 .CommandType = 3 3658 3659struct GEN10_3DSTATE_CONSTANT_HS { 3660 uint32_t DWordLength; 3661 uint32_t MOCS; 3662 uint32_t _3DCommandSubOpcode; 3663 uint32_t _3DCommandOpcode; 3664 uint32_t CommandSubType; 3665 uint32_t CommandType; 3666 struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3667}; 3668 3669static inline void 3670GEN10_3DSTATE_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 3671 __attribute__((unused)) void * restrict dst, 3672 __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_HS * restrict values) 3673{ 3674 uint32_t * restrict dw = (uint32_t * restrict) dst; 3675 3676 dw[0] = 3677 __gen_uint(values->DWordLength, 0, 7) | 3678 __gen_uint(values->MOCS, 8, 14) | 3679 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3680 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3681 __gen_uint(values->CommandSubType, 27, 28) | 3682 __gen_uint(values->CommandType, 29, 31); 3683 3684 GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3685} 3686 3687#define GEN10_3DSTATE_CONSTANT_PS_length 11 3688#define GEN10_3DSTATE_CONSTANT_PS_length_bias 2 3689#define GEN10_3DSTATE_CONSTANT_PS_header \ 3690 .DWordLength = 9, \ 3691 ._3DCommandSubOpcode = 23, \ 3692 ._3DCommandOpcode = 0, \ 3693 .CommandSubType = 3, \ 3694 .CommandType = 3 3695 3696struct GEN10_3DSTATE_CONSTANT_PS { 3697 uint32_t DWordLength; 3698 uint32_t MOCS; 3699 uint32_t DisableGatheratSetShaderHint; 3700 uint32_t _3DCommandSubOpcode; 3701 uint32_t _3DCommandOpcode; 3702 uint32_t CommandSubType; 3703 uint32_t CommandType; 3704 struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3705}; 3706 3707static inline void 3708GEN10_3DSTATE_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 3709 __attribute__((unused)) void * restrict dst, 3710 __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_PS * restrict values) 3711{ 3712 uint32_t * restrict dw = (uint32_t * restrict) dst; 3713 3714 dw[0] = 3715 __gen_uint(values->DWordLength, 0, 7) | 3716 __gen_uint(values->MOCS, 8, 14) | 3717 __gen_uint(values->DisableGatheratSetShaderHint, 15, 15) | 3718 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3719 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3720 __gen_uint(values->CommandSubType, 27, 28) | 3721 __gen_uint(values->CommandType, 29, 31); 3722 3723 GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3724} 3725 3726#define GEN10_3DSTATE_CONSTANT_VS_length 11 3727#define GEN10_3DSTATE_CONSTANT_VS_length_bias 2 3728#define GEN10_3DSTATE_CONSTANT_VS_header \ 3729 .DWordLength = 9, \ 3730 ._3DCommandSubOpcode = 21, \ 3731 ._3DCommandOpcode = 0, \ 3732 .CommandSubType = 3, \ 3733 .CommandType = 3 3734 3735struct GEN10_3DSTATE_CONSTANT_VS { 3736 uint32_t DWordLength; 3737 uint32_t MOCS; 3738 uint32_t _3DCommandSubOpcode; 3739 uint32_t _3DCommandOpcode; 3740 uint32_t CommandSubType; 3741 uint32_t CommandType; 3742 struct GEN10_3DSTATE_CONSTANT_BODY ConstantBody; 3743}; 3744 3745static inline void 3746GEN10_3DSTATE_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 3747 __attribute__((unused)) void * restrict dst, 3748 __attribute__((unused)) const struct GEN10_3DSTATE_CONSTANT_VS * restrict values) 3749{ 3750 uint32_t * restrict dw = (uint32_t * restrict) dst; 3751 3752 dw[0] = 3753 __gen_uint(values->DWordLength, 0, 7) | 3754 __gen_uint(values->MOCS, 8, 14) | 3755 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3756 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3757 __gen_uint(values->CommandSubType, 27, 28) | 3758 __gen_uint(values->CommandType, 29, 31); 3759 3760 GEN10_3DSTATE_CONSTANT_BODY_pack(data, &dw[1], &values->ConstantBody); 3761} 3762 3763#define GEN10_3DSTATE_DEPTH_BUFFER_length 8 3764#define GEN10_3DSTATE_DEPTH_BUFFER_length_bias 2 3765#define GEN10_3DSTATE_DEPTH_BUFFER_header \ 3766 .DWordLength = 6, \ 3767 ._3DCommandSubOpcode = 5, \ 3768 ._3DCommandOpcode = 0, \ 3769 .CommandSubType = 3, \ 3770 .CommandType = 3 3771 3772struct GEN10_3DSTATE_DEPTH_BUFFER { 3773 uint32_t DWordLength; 3774 uint32_t _3DCommandSubOpcode; 3775 uint32_t _3DCommandOpcode; 3776 uint32_t CommandSubType; 3777 uint32_t CommandType; 3778 uint32_t SurfacePitch; 3779 uint32_t SurfaceFormat; 3780#define D32_FLOAT 1 3781#define D24_UNORM_X8_UINT 3 3782#define D16_UNORM 5 3783 bool HierarchicalDepthBufferEnable; 3784 bool StencilWriteEnable; 3785 bool DepthWriteEnable; 3786 uint32_t SurfaceType; 3787#define SURFTYPE_2D 1 3788#define SURFTYPE_CUBE 3 3789#define SURFTYPE_NULL 7 3790 __gen_address_type SurfaceBaseAddress; 3791 uint32_t LOD; 3792 uint32_t Width; 3793 uint32_t Height; 3794 uint32_t MOCS; 3795 uint32_t MinimumArrayElement; 3796 uint32_t Depth; 3797 uint32_t MipTailStartLOD; 3798 uint32_t TiledResourceMode; 3799#define NONE 0 3800#define TILEYF 1 3801#define TILEYS 2 3802 uint32_t SurfaceQPitch; 3803 uint32_t RenderTargetViewExtent; 3804}; 3805 3806static inline void 3807GEN10_3DSTATE_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 3808 __attribute__((unused)) void * restrict dst, 3809 __attribute__((unused)) const struct GEN10_3DSTATE_DEPTH_BUFFER * restrict values) 3810{ 3811 uint32_t * restrict dw = (uint32_t * restrict) dst; 3812 3813 dw[0] = 3814 __gen_uint(values->DWordLength, 0, 7) | 3815 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3816 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3817 __gen_uint(values->CommandSubType, 27, 28) | 3818 __gen_uint(values->CommandType, 29, 31); 3819 3820 dw[1] = 3821 __gen_uint(values->SurfacePitch, 0, 17) | 3822 __gen_uint(values->SurfaceFormat, 18, 20) | 3823 __gen_uint(values->HierarchicalDepthBufferEnable, 22, 22) | 3824 __gen_uint(values->StencilWriteEnable, 27, 27) | 3825 __gen_uint(values->DepthWriteEnable, 28, 28) | 3826 __gen_uint(values->SurfaceType, 29, 31); 3827 3828 const uint64_t v2_address = 3829 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 3830 dw[2] = v2_address; 3831 dw[3] = v2_address >> 32; 3832 3833 dw[4] = 3834 __gen_uint(values->LOD, 0, 3) | 3835 __gen_uint(values->Width, 4, 17) | 3836 __gen_uint(values->Height, 18, 31); 3837 3838 dw[5] = 3839 __gen_uint(values->MOCS, 0, 6) | 3840 __gen_uint(values->MinimumArrayElement, 10, 20) | 3841 __gen_uint(values->Depth, 21, 31); 3842 3843 dw[6] = 3844 __gen_uint(values->MipTailStartLOD, 26, 29) | 3845 __gen_uint(values->TiledResourceMode, 30, 31); 3846 3847 dw[7] = 3848 __gen_uint(values->SurfaceQPitch, 0, 14) | 3849 __gen_uint(values->RenderTargetViewExtent, 21, 31); 3850} 3851 3852#define GEN10_3DSTATE_DRAWING_RECTANGLE_length 4 3853#define GEN10_3DSTATE_DRAWING_RECTANGLE_length_bias 2 3854#define GEN10_3DSTATE_DRAWING_RECTANGLE_header \ 3855 .DWordLength = 2, \ 3856 ._3DCommandSubOpcode = 0, \ 3857 ._3DCommandOpcode = 1, \ 3858 .CommandSubType = 3, \ 3859 .CommandType = 3 3860 3861struct GEN10_3DSTATE_DRAWING_RECTANGLE { 3862 uint32_t DWordLength; 3863 uint32_t CoreModeSelect; 3864#define Legacy 0 3865#define Core0Enabled 1 3866#define Core1Enabled 2 3867 uint32_t _3DCommandSubOpcode; 3868 uint32_t _3DCommandOpcode; 3869 uint32_t CommandSubType; 3870 uint32_t CommandType; 3871 uint32_t ClippedDrawingRectangleXMin; 3872 uint32_t ClippedDrawingRectangleYMin; 3873 uint32_t ClippedDrawingRectangleXMax; 3874 uint32_t ClippedDrawingRectangleYMax; 3875 int32_t DrawingRectangleOriginX; 3876 int32_t DrawingRectangleOriginY; 3877}; 3878 3879static inline void 3880GEN10_3DSTATE_DRAWING_RECTANGLE_pack(__attribute__((unused)) __gen_user_data *data, 3881 __attribute__((unused)) void * restrict dst, 3882 __attribute__((unused)) const struct GEN10_3DSTATE_DRAWING_RECTANGLE * restrict values) 3883{ 3884 uint32_t * restrict dw = (uint32_t * restrict) dst; 3885 3886 dw[0] = 3887 __gen_uint(values->DWordLength, 0, 7) | 3888 __gen_uint(values->CoreModeSelect, 14, 15) | 3889 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3890 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3891 __gen_uint(values->CommandSubType, 27, 28) | 3892 __gen_uint(values->CommandType, 29, 31); 3893 3894 dw[1] = 3895 __gen_uint(values->ClippedDrawingRectangleXMin, 0, 15) | 3896 __gen_uint(values->ClippedDrawingRectangleYMin, 16, 31); 3897 3898 dw[2] = 3899 __gen_uint(values->ClippedDrawingRectangleXMax, 0, 15) | 3900 __gen_uint(values->ClippedDrawingRectangleYMax, 16, 31); 3901 3902 dw[3] = 3903 __gen_sint(values->DrawingRectangleOriginX, 0, 15) | 3904 __gen_sint(values->DrawingRectangleOriginY, 16, 31); 3905} 3906 3907#define GEN10_3DSTATE_DS_length 11 3908#define GEN10_3DSTATE_DS_length_bias 2 3909#define GEN10_3DSTATE_DS_header \ 3910 .DWordLength = 9, \ 3911 ._3DCommandSubOpcode = 29, \ 3912 ._3DCommandOpcode = 0, \ 3913 .CommandSubType = 3, \ 3914 .CommandType = 3 3915 3916struct GEN10_3DSTATE_DS { 3917 uint32_t DWordLength; 3918 uint32_t _3DCommandSubOpcode; 3919 uint32_t _3DCommandOpcode; 3920 uint32_t CommandSubType; 3921 uint32_t CommandType; 3922 uint64_t KernelStartPointer; 3923 bool SoftwareExceptionEnable; 3924 bool IllegalOpcodeExceptionEnable; 3925 bool AccessesUAV; 3926 uint32_t FloatingPointMode; 3927#define IEEE754 0 3928#define Alternate 1 3929 uint32_t ThreadDispatchPriority; 3930#define High 1 3931 uint32_t BindingTableEntryCount; 3932 uint32_t SamplerCount; 3933#define NoSamplers 0 3934#define _14Samplers 1 3935#define _58Samplers 2 3936#define _912Samplers 3 3937#define _1316Samplers 4 3938 bool VectorMaskEnable; 3939 uint32_t PerThreadScratchSpace; 3940 __gen_address_type ScratchSpaceBasePointer; 3941 uint32_t PatchURBEntryReadOffset; 3942 uint32_t PatchURBEntryReadLength; 3943 uint32_t DispatchGRFStartRegisterForURBData; 3944 bool Enable; 3945 bool CacheDisable; 3946 bool ComputeWCoordinateEnable; 3947 uint32_t DispatchMode; 3948#define DISPATCH_MODE_SIMD4X2 0 3949#define DISPATCH_MODE_SIMD8_SINGLE_PATCH 1 3950#define DISPATCH_MODE_SIMD8_SINGLE_OR_DUAL_PATCH 2 3951 bool StatisticsEnable; 3952 uint32_t MaximumNumberofThreads; 3953 uint32_t UserClipDistanceCullTestEnableBitmask; 3954 uint32_t UserClipDistanceClipTestEnableBitmask; 3955 uint32_t VertexURBEntryOutputLength; 3956 uint32_t VertexURBEntryOutputReadOffset; 3957 uint64_t DUAL_PATCHKernelStartPointer; 3958}; 3959 3960static inline void 3961GEN10_3DSTATE_DS_pack(__attribute__((unused)) __gen_user_data *data, 3962 __attribute__((unused)) void * restrict dst, 3963 __attribute__((unused)) const struct GEN10_3DSTATE_DS * restrict values) 3964{ 3965 uint32_t * restrict dw = (uint32_t * restrict) dst; 3966 3967 dw[0] = 3968 __gen_uint(values->DWordLength, 0, 7) | 3969 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 3970 __gen_uint(values->_3DCommandOpcode, 24, 26) | 3971 __gen_uint(values->CommandSubType, 27, 28) | 3972 __gen_uint(values->CommandType, 29, 31); 3973 3974 const uint64_t v1 = 3975 __gen_offset(values->KernelStartPointer, 6, 63); 3976 dw[1] = v1; 3977 dw[2] = v1 >> 32; 3978 3979 dw[3] = 3980 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 3981 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 3982 __gen_uint(values->AccessesUAV, 14, 14) | 3983 __gen_uint(values->FloatingPointMode, 16, 16) | 3984 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 3985 __gen_uint(values->BindingTableEntryCount, 18, 25) | 3986 __gen_uint(values->SamplerCount, 27, 29) | 3987 __gen_uint(values->VectorMaskEnable, 30, 30); 3988 3989 const uint64_t v4 = 3990 __gen_uint(values->PerThreadScratchSpace, 0, 3); 3991 const uint64_t v4_address = 3992 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 3993 dw[4] = v4_address; 3994 dw[5] = (v4_address >> 32) | (v4 >> 32); 3995 3996 dw[6] = 3997 __gen_uint(values->PatchURBEntryReadOffset, 4, 9) | 3998 __gen_uint(values->PatchURBEntryReadLength, 11, 17) | 3999 __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 4000 4001 dw[7] = 4002 __gen_uint(values->Enable, 0, 0) | 4003 __gen_uint(values->CacheDisable, 1, 1) | 4004 __gen_uint(values->ComputeWCoordinateEnable, 2, 2) | 4005 __gen_uint(values->DispatchMode, 3, 4) | 4006 __gen_uint(values->StatisticsEnable, 10, 10) | 4007 __gen_uint(values->MaximumNumberofThreads, 21, 30); 4008 4009 dw[8] = 4010 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 4011 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 4012 __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 4013 __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 4014 4015 const uint64_t v9 = 4016 __gen_offset(values->DUAL_PATCHKernelStartPointer, 6, 63); 4017 dw[9] = v9; 4018 dw[10] = v9 >> 32; 4019} 4020 4021#define GEN10_3DSTATE_GATHER_CONSTANT_DS_length_bias 2 4022#define GEN10_3DSTATE_GATHER_CONSTANT_DS_header \ 4023 .DWordLength = 1, \ 4024 ._3DCommandSubOpcode = 55, \ 4025 ._3DCommandOpcode = 0, \ 4026 .CommandSubType = 3, \ 4027 .CommandType = 3 4028 4029struct GEN10_3DSTATE_GATHER_CONSTANT_DS { 4030 uint32_t DWordLength; 4031 uint32_t _3DCommandSubOpcode; 4032 uint32_t _3DCommandOpcode; 4033 uint32_t CommandSubType; 4034 uint32_t CommandType; 4035 uint32_t UpdateGatherTableOnly; 4036#define CommitGather 0 4037#define NonCommitGather 1 4038 uint32_t ConstantBufferBindingTableBlock; 4039 uint32_t ConstantBufferValid; 4040 uint32_t OnDieTable; 4041#define Load 0 4042#define Read 1 4043 bool ConstantBufferDx9GenerateStall; 4044 uint64_t GatherBufferOffset; 4045 /* variable length fields follow */ 4046}; 4047 4048static inline void 4049GEN10_3DSTATE_GATHER_CONSTANT_DS_pack(__attribute__((unused)) __gen_user_data *data, 4050 __attribute__((unused)) void * restrict dst, 4051 __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_DS * restrict values) 4052{ 4053 uint32_t * restrict dw = (uint32_t * restrict) dst; 4054 4055 dw[0] = 4056 __gen_uint(values->DWordLength, 0, 7) | 4057 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4058 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4059 __gen_uint(values->CommandSubType, 27, 28) | 4060 __gen_uint(values->CommandType, 29, 31); 4061 4062 dw[1] = 4063 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4064 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4065 __gen_uint(values->ConstantBufferValid, 16, 31); 4066 4067 dw[2] = 4068 __gen_uint(values->OnDieTable, 3, 3) | 4069 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4070 __gen_offset(values->GatherBufferOffset, 6, 22); 4071} 4072 4073#define GEN10_3DSTATE_GATHER_CONSTANT_GS_length_bias 2 4074#define GEN10_3DSTATE_GATHER_CONSTANT_GS_header \ 4075 .DWordLength = 1, \ 4076 ._3DCommandSubOpcode = 53, \ 4077 ._3DCommandOpcode = 0, \ 4078 .CommandSubType = 3, \ 4079 .CommandType = 3 4080 4081struct GEN10_3DSTATE_GATHER_CONSTANT_GS { 4082 uint32_t DWordLength; 4083 uint32_t _3DCommandSubOpcode; 4084 uint32_t _3DCommandOpcode; 4085 uint32_t CommandSubType; 4086 uint32_t CommandType; 4087 uint32_t UpdateGatherTableOnly; 4088#define CommitGather 0 4089#define NonCommitGather 1 4090 uint32_t ConstantBufferBindingTableBlock; 4091 uint32_t ConstantBufferValid; 4092 uint32_t OnDieTable; 4093#define Load 0 4094#define Read 1 4095 bool ConstantBufferDx9GenerateStall; 4096 uint64_t GatherBufferOffset; 4097 /* variable length fields follow */ 4098}; 4099 4100static inline void 4101GEN10_3DSTATE_GATHER_CONSTANT_GS_pack(__attribute__((unused)) __gen_user_data *data, 4102 __attribute__((unused)) void * restrict dst, 4103 __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_GS * restrict values) 4104{ 4105 uint32_t * restrict dw = (uint32_t * restrict) dst; 4106 4107 dw[0] = 4108 __gen_uint(values->DWordLength, 0, 7) | 4109 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4110 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4111 __gen_uint(values->CommandSubType, 27, 28) | 4112 __gen_uint(values->CommandType, 29, 31); 4113 4114 dw[1] = 4115 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4116 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4117 __gen_uint(values->ConstantBufferValid, 16, 31); 4118 4119 dw[2] = 4120 __gen_uint(values->OnDieTable, 3, 3) | 4121 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4122 __gen_offset(values->GatherBufferOffset, 6, 22); 4123} 4124 4125#define GEN10_3DSTATE_GATHER_CONSTANT_HS_length_bias 2 4126#define GEN10_3DSTATE_GATHER_CONSTANT_HS_header \ 4127 .DWordLength = 1, \ 4128 ._3DCommandSubOpcode = 54, \ 4129 ._3DCommandOpcode = 0, \ 4130 .CommandSubType = 3, \ 4131 .CommandType = 3 4132 4133struct GEN10_3DSTATE_GATHER_CONSTANT_HS { 4134 uint32_t DWordLength; 4135 uint32_t _3DCommandSubOpcode; 4136 uint32_t _3DCommandOpcode; 4137 uint32_t CommandSubType; 4138 uint32_t CommandType; 4139 uint32_t UpdateGatherTableOnly; 4140#define CommitGather 0 4141#define NonCommitGather 1 4142 uint32_t ConstantBufferBindingTableBlock; 4143 uint32_t ConstantBufferValid; 4144 uint32_t OnDieTable; 4145#define Load 0 4146#define Read 1 4147 bool ConstantBufferDx9GenerateStall; 4148 uint64_t GatherBufferOffset; 4149 /* variable length fields follow */ 4150}; 4151 4152static inline void 4153GEN10_3DSTATE_GATHER_CONSTANT_HS_pack(__attribute__((unused)) __gen_user_data *data, 4154 __attribute__((unused)) void * restrict dst, 4155 __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_HS * restrict values) 4156{ 4157 uint32_t * restrict dw = (uint32_t * restrict) dst; 4158 4159 dw[0] = 4160 __gen_uint(values->DWordLength, 0, 7) | 4161 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4162 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4163 __gen_uint(values->CommandSubType, 27, 28) | 4164 __gen_uint(values->CommandType, 29, 31); 4165 4166 dw[1] = 4167 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4168 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4169 __gen_uint(values->ConstantBufferValid, 16, 31); 4170 4171 dw[2] = 4172 __gen_uint(values->OnDieTable, 3, 3) | 4173 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4174 __gen_offset(values->GatherBufferOffset, 6, 22); 4175} 4176 4177#define GEN10_3DSTATE_GATHER_CONSTANT_PS_length_bias 2 4178#define GEN10_3DSTATE_GATHER_CONSTANT_PS_header \ 4179 .DWordLength = 1, \ 4180 ._3DCommandSubOpcode = 56, \ 4181 ._3DCommandOpcode = 0, \ 4182 .CommandSubType = 3, \ 4183 .CommandType = 3 4184 4185struct GEN10_3DSTATE_GATHER_CONSTANT_PS { 4186 uint32_t DWordLength; 4187 uint32_t _3DCommandSubOpcode; 4188 uint32_t _3DCommandOpcode; 4189 uint32_t CommandSubType; 4190 uint32_t CommandType; 4191 bool DX9OnDieRegisterReadEnable; 4192 uint32_t UpdateGatherTableOnly; 4193#define CommitGather 0 4194#define NonCommitGather 1 4195 uint32_t ConstantBufferBindingTableBlock; 4196 uint32_t ConstantBufferValid; 4197 uint32_t OnDieTable; 4198#define Load 0 4199#define Read 1 4200 bool ConstantBufferDx9Enable; 4201 bool ConstantBufferDx9GenerateStall; 4202 uint64_t GatherBufferOffset; 4203 /* variable length fields follow */ 4204}; 4205 4206static inline void 4207GEN10_3DSTATE_GATHER_CONSTANT_PS_pack(__attribute__((unused)) __gen_user_data *data, 4208 __attribute__((unused)) void * restrict dst, 4209 __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_PS * restrict values) 4210{ 4211 uint32_t * restrict dw = (uint32_t * restrict) dst; 4212 4213 dw[0] = 4214 __gen_uint(values->DWordLength, 0, 7) | 4215 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4216 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4217 __gen_uint(values->CommandSubType, 27, 28) | 4218 __gen_uint(values->CommandType, 29, 31); 4219 4220 dw[1] = 4221 __gen_uint(values->DX9OnDieRegisterReadEnable, 0, 0) | 4222 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4223 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4224 __gen_uint(values->ConstantBufferValid, 16, 31); 4225 4226 dw[2] = 4227 __gen_uint(values->OnDieTable, 3, 3) | 4228 __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 4229 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4230 __gen_offset(values->GatherBufferOffset, 6, 22); 4231} 4232 4233#define GEN10_3DSTATE_GATHER_CONSTANT_VS_length_bias 2 4234#define GEN10_3DSTATE_GATHER_CONSTANT_VS_header \ 4235 .DWordLength = 0, \ 4236 ._3DCommandSubOpcode = 52, \ 4237 ._3DCommandOpcode = 0, \ 4238 .CommandSubType = 3, \ 4239 .CommandType = 3 4240 4241struct GEN10_3DSTATE_GATHER_CONSTANT_VS { 4242 uint32_t DWordLength; 4243 uint32_t _3DCommandSubOpcode; 4244 uint32_t _3DCommandOpcode; 4245 uint32_t CommandSubType; 4246 uint32_t CommandType; 4247 bool DX9OnDieRegisterReadEnable; 4248 uint32_t UpdateGatherTableOnly; 4249#define CommitGather 0 4250#define NonCommitGather 1 4251 uint32_t ConstantBufferBindingTableBlock; 4252 uint32_t ConstantBufferValid; 4253 uint32_t OnDieTable; 4254#define Load 0 4255#define Read 1 4256 bool ConstantBufferDx9Enable; 4257 bool ConstantBufferDx9GenerateStall; 4258 uint64_t GatherBufferOffset; 4259 /* variable length fields follow */ 4260}; 4261 4262static inline void 4263GEN10_3DSTATE_GATHER_CONSTANT_VS_pack(__attribute__((unused)) __gen_user_data *data, 4264 __attribute__((unused)) void * restrict dst, 4265 __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_CONSTANT_VS * restrict values) 4266{ 4267 uint32_t * restrict dw = (uint32_t * restrict) dst; 4268 4269 dw[0] = 4270 __gen_uint(values->DWordLength, 0, 7) | 4271 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4272 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4273 __gen_uint(values->CommandSubType, 27, 28) | 4274 __gen_uint(values->CommandType, 29, 31); 4275 4276 dw[1] = 4277 __gen_uint(values->DX9OnDieRegisterReadEnable, 0, 0) | 4278 __gen_uint(values->UpdateGatherTableOnly, 1, 1) | 4279 __gen_uint(values->ConstantBufferBindingTableBlock, 12, 15) | 4280 __gen_uint(values->ConstantBufferValid, 16, 31); 4281 4282 dw[2] = 4283 __gen_uint(values->OnDieTable, 3, 3) | 4284 __gen_uint(values->ConstantBufferDx9Enable, 4, 4) | 4285 __gen_uint(values->ConstantBufferDx9GenerateStall, 5, 5) | 4286 __gen_offset(values->GatherBufferOffset, 6, 22); 4287} 4288 4289#define GEN10_3DSTATE_GATHER_POOL_ALLOC_length 4 4290#define GEN10_3DSTATE_GATHER_POOL_ALLOC_length_bias 2 4291#define GEN10_3DSTATE_GATHER_POOL_ALLOC_header \ 4292 .DWordLength = 2, \ 4293 ._3DCommandSubOpcode = 26, \ 4294 ._3DCommandOpcode = 1, \ 4295 .CommandSubType = 3, \ 4296 .CommandType = 3 4297 4298struct GEN10_3DSTATE_GATHER_POOL_ALLOC { 4299 uint32_t DWordLength; 4300 uint32_t _3DCommandSubOpcode; 4301 uint32_t _3DCommandOpcode; 4302 uint32_t CommandSubType; 4303 uint32_t CommandType; 4304 uint32_t MOCS; 4305 bool GatherPoolEnable; 4306 __gen_address_type GatherPoolBaseAddress; 4307 uint32_t GatherPoolBufferSize; 4308}; 4309 4310static inline void 4311GEN10_3DSTATE_GATHER_POOL_ALLOC_pack(__attribute__((unused)) __gen_user_data *data, 4312 __attribute__((unused)) void * restrict dst, 4313 __attribute__((unused)) const struct GEN10_3DSTATE_GATHER_POOL_ALLOC * restrict values) 4314{ 4315 uint32_t * restrict dw = (uint32_t * restrict) dst; 4316 4317 dw[0] = 4318 __gen_uint(values->DWordLength, 0, 7) | 4319 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4320 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4321 __gen_uint(values->CommandSubType, 27, 28) | 4322 __gen_uint(values->CommandType, 29, 31); 4323 4324 const uint64_t v1 = 4325 __gen_uint(values->MOCS, 0, 6) | 4326 __gen_uint(values->GatherPoolEnable, 11, 11); 4327 const uint64_t v1_address = 4328 __gen_combine_address(data, &dw[1], values->GatherPoolBaseAddress, v1); 4329 dw[1] = v1_address; 4330 dw[2] = (v1_address >> 32) | (v1 >> 32); 4331 4332 dw[3] = 4333 __gen_uint(values->GatherPoolBufferSize, 12, 31); 4334} 4335 4336#define GEN10_3DSTATE_GS_length 10 4337#define GEN10_3DSTATE_GS_length_bias 2 4338#define GEN10_3DSTATE_GS_header \ 4339 .DWordLength = 8, \ 4340 ._3DCommandSubOpcode = 17, \ 4341 ._3DCommandOpcode = 0, \ 4342 .CommandSubType = 3, \ 4343 .CommandType = 3 4344 4345struct GEN10_3DSTATE_GS { 4346 uint32_t DWordLength; 4347 uint32_t _3DCommandSubOpcode; 4348 uint32_t _3DCommandOpcode; 4349 uint32_t CommandSubType; 4350 uint32_t CommandType; 4351 uint64_t KernelStartPointer; 4352 uint32_t ExpectedVertexCount; 4353 bool SoftwareExceptionEnable; 4354 bool MaskStackExceptionEnable; 4355 bool AccessesUAV; 4356 bool IllegalOpcodeExceptionEnable; 4357 uint32_t FloatingPointMode; 4358#define IEEE754 0 4359#define Alternate 1 4360 uint32_t ThreadDispatchPriority; 4361#define High 1 4362 uint32_t BindingTableEntryCount; 4363 uint32_t SamplerCount; 4364#define NoSamplers 0 4365#define _14Samplers 1 4366#define _58Samplers 2 4367#define _912Samplers 3 4368#define _1316Samplers 4 4369 bool VectorMaskEnable; 4370 bool SingleProgramFlow; 4371 uint32_t PerThreadScratchSpace; 4372 __gen_address_type ScratchSpaceBasePointer; 4373 uint32_t DispatchGRFStartRegisterForURBData; 4374 uint32_t VertexURBEntryReadOffset; 4375 bool IncludeVertexHandles; 4376 uint32_t VertexURBEntryReadLength; 4377 enum GEN10_3D_Prim_Topo_Type OutputTopology; 4378 uint32_t OutputVertexSize; 4379 uint32_t DispatchGRFStartRegisterForURBData54; 4380 bool Enable; 4381 bool DiscardAdjacency; 4382 uint32_t ReorderMode; 4383#define LEADING 0 4384#define TRAILING 1 4385 uint32_t Hint; 4386 bool IncludePrimitiveID; 4387 uint32_t InvocationsIncrementValue; 4388 bool StatisticsEnable; 4389 uint32_t DispatchMode; 4390#define DISPATCH_MODE_DualInstance 1 4391#define DISPATCH_MODE_DualObject 2 4392#define DISPATCH_MODE_SIMD8 3 4393 uint32_t DefaultStreamId; 4394 uint32_t InstanceControl; 4395 uint32_t ControlDataHeaderSize; 4396 uint32_t MaximumNumberofThreads; 4397 uint32_t StaticOutputVertexCount; 4398 bool StaticOutput; 4399 uint32_t ControlDataFormat; 4400#define CUT 0 4401#define SID 1 4402 uint32_t UserClipDistanceCullTestEnableBitmask; 4403 uint32_t UserClipDistanceClipTestEnableBitmask; 4404 uint32_t VertexURBEntryOutputLength; 4405 uint32_t VertexURBEntryOutputReadOffset; 4406}; 4407 4408static inline void 4409GEN10_3DSTATE_GS_pack(__attribute__((unused)) __gen_user_data *data, 4410 __attribute__((unused)) void * restrict dst, 4411 __attribute__((unused)) const struct GEN10_3DSTATE_GS * restrict values) 4412{ 4413 uint32_t * restrict dw = (uint32_t * restrict) dst; 4414 4415 dw[0] = 4416 __gen_uint(values->DWordLength, 0, 7) | 4417 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4418 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4419 __gen_uint(values->CommandSubType, 27, 28) | 4420 __gen_uint(values->CommandType, 29, 31); 4421 4422 const uint64_t v1 = 4423 __gen_offset(values->KernelStartPointer, 6, 63); 4424 dw[1] = v1; 4425 dw[2] = v1 >> 32; 4426 4427 dw[3] = 4428 __gen_uint(values->ExpectedVertexCount, 0, 5) | 4429 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 4430 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 4431 __gen_uint(values->AccessesUAV, 12, 12) | 4432 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 4433 __gen_uint(values->FloatingPointMode, 16, 16) | 4434 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 4435 __gen_uint(values->BindingTableEntryCount, 18, 25) | 4436 __gen_uint(values->SamplerCount, 27, 29) | 4437 __gen_uint(values->VectorMaskEnable, 30, 30) | 4438 __gen_uint(values->SingleProgramFlow, 31, 31); 4439 4440 const uint64_t v4 = 4441 __gen_uint(values->PerThreadScratchSpace, 0, 3); 4442 const uint64_t v4_address = 4443 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 4444 dw[4] = v4_address; 4445 dw[5] = (v4_address >> 32) | (v4 >> 32); 4446 4447 dw[6] = 4448 __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3) | 4449 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 4450 __gen_uint(values->IncludeVertexHandles, 10, 10) | 4451 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 4452 __gen_uint(values->OutputTopology, 17, 22) | 4453 __gen_uint(values->OutputVertexSize, 23, 28) | 4454 __gen_uint(values->DispatchGRFStartRegisterForURBData54, 29, 30); 4455 4456 dw[7] = 4457 __gen_uint(values->Enable, 0, 0) | 4458 __gen_uint(values->DiscardAdjacency, 1, 1) | 4459 __gen_uint(values->ReorderMode, 2, 2) | 4460 __gen_uint(values->Hint, 3, 3) | 4461 __gen_uint(values->IncludePrimitiveID, 4, 4) | 4462 __gen_uint(values->InvocationsIncrementValue, 5, 9) | 4463 __gen_uint(values->StatisticsEnable, 10, 10) | 4464 __gen_uint(values->DispatchMode, 11, 12) | 4465 __gen_uint(values->DefaultStreamId, 13, 14) | 4466 __gen_uint(values->InstanceControl, 15, 19) | 4467 __gen_uint(values->ControlDataHeaderSize, 20, 23); 4468 4469 dw[8] = 4470 __gen_uint(values->MaximumNumberofThreads, 0, 8) | 4471 __gen_uint(values->StaticOutputVertexCount, 16, 26) | 4472 __gen_uint(values->StaticOutput, 30, 30) | 4473 __gen_uint(values->ControlDataFormat, 31, 31); 4474 4475 dw[9] = 4476 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 4477 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 4478 __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 4479 __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 4480} 4481 4482#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_length 5 4483#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_length_bias 2 4484#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_header \ 4485 .DWordLength = 3, \ 4486 ._3DCommandSubOpcode = 7, \ 4487 ._3DCommandOpcode = 0, \ 4488 .CommandSubType = 3, \ 4489 .CommandType = 3 4490 4491struct GEN10_3DSTATE_HIER_DEPTH_BUFFER { 4492 uint32_t DWordLength; 4493 uint32_t _3DCommandSubOpcode; 4494 uint32_t _3DCommandOpcode; 4495 uint32_t CommandSubType; 4496 uint32_t CommandType; 4497 uint32_t SurfacePitch; 4498 uint32_t MOCS; 4499 __gen_address_type SurfaceBaseAddress; 4500 uint32_t SurfaceQPitch; 4501}; 4502 4503static inline void 4504GEN10_3DSTATE_HIER_DEPTH_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4505 __attribute__((unused)) void * restrict dst, 4506 __attribute__((unused)) const struct GEN10_3DSTATE_HIER_DEPTH_BUFFER * restrict values) 4507{ 4508 uint32_t * restrict dw = (uint32_t * restrict) dst; 4509 4510 dw[0] = 4511 __gen_uint(values->DWordLength, 0, 7) | 4512 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4513 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4514 __gen_uint(values->CommandSubType, 27, 28) | 4515 __gen_uint(values->CommandType, 29, 31); 4516 4517 dw[1] = 4518 __gen_uint(values->SurfacePitch, 0, 16) | 4519 __gen_uint(values->MOCS, 25, 31); 4520 4521 const uint64_t v2_address = 4522 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 4523 dw[2] = v2_address; 4524 dw[3] = v2_address >> 32; 4525 4526 dw[4] = 4527 __gen_uint(values->SurfaceQPitch, 0, 14); 4528} 4529 4530#define GEN10_3DSTATE_HS_length 9 4531#define GEN10_3DSTATE_HS_length_bias 2 4532#define GEN10_3DSTATE_HS_header \ 4533 .DWordLength = 7, \ 4534 ._3DCommandSubOpcode = 27, \ 4535 ._3DCommandOpcode = 0, \ 4536 .CommandSubType = 3, \ 4537 .CommandType = 3 4538 4539struct GEN10_3DSTATE_HS { 4540 uint32_t DWordLength; 4541 uint32_t _3DCommandSubOpcode; 4542 uint32_t _3DCommandOpcode; 4543 uint32_t CommandSubType; 4544 uint32_t CommandType; 4545 bool SoftwareExceptionEnable; 4546 bool IllegalOpcodeExceptionEnable; 4547 uint32_t FloatingPointMode; 4548#define IEEE754 0 4549#define alternate 1 4550 uint32_t ThreadDispatchPriority; 4551#define High 1 4552 uint32_t BindingTableEntryCount; 4553 uint32_t SamplerCount; 4554#define NoSamplers 0 4555#define _14Samplers 1 4556#define _58Samplers 2 4557#define _912Samplers 3 4558#define _1316Samplers 4 4559 uint32_t InstanceCount; 4560 uint32_t MaximumNumberofThreads; 4561 bool StatisticsEnable; 4562 bool Enable; 4563 uint64_t KernelStartPointer; 4564 uint32_t PerThreadScratchSpace; 4565 __gen_address_type ScratchSpaceBasePointer; 4566 bool IncludePrimitiveID; 4567 uint32_t VertexURBEntryReadOffset; 4568 uint32_t VertexURBEntryReadLength; 4569 uint32_t DispatchMode; 4570#define DISPATCH_MODE_SINGLE_PATCH 0 4571#define DISPATCH_MODE_DUAL_PATCH 1 4572#define DISPATCH_MODE__8_PATCH 2 4573 uint32_t DispatchGRFStartRegisterForURBData; 4574 bool IncludeVertexHandles; 4575 bool AccessesUAV; 4576 bool VectorMaskEnable; 4577 bool SingleProgramFlow; 4578 uint32_t DispatchGRFStartRegisterForURBData5; 4579}; 4580 4581static inline void 4582GEN10_3DSTATE_HS_pack(__attribute__((unused)) __gen_user_data *data, 4583 __attribute__((unused)) void * restrict dst, 4584 __attribute__((unused)) const struct GEN10_3DSTATE_HS * restrict values) 4585{ 4586 uint32_t * restrict dw = (uint32_t * restrict) dst; 4587 4588 dw[0] = 4589 __gen_uint(values->DWordLength, 0, 7) | 4590 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4591 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4592 __gen_uint(values->CommandSubType, 27, 28) | 4593 __gen_uint(values->CommandType, 29, 31); 4594 4595 dw[1] = 4596 __gen_uint(values->SoftwareExceptionEnable, 12, 12) | 4597 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 4598 __gen_uint(values->FloatingPointMode, 16, 16) | 4599 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 4600 __gen_uint(values->BindingTableEntryCount, 18, 25) | 4601 __gen_uint(values->SamplerCount, 27, 29); 4602 4603 dw[2] = 4604 __gen_uint(values->InstanceCount, 0, 3) | 4605 __gen_uint(values->MaximumNumberofThreads, 8, 16) | 4606 __gen_uint(values->StatisticsEnable, 29, 29) | 4607 __gen_uint(values->Enable, 31, 31); 4608 4609 const uint64_t v3 = 4610 __gen_offset(values->KernelStartPointer, 6, 63); 4611 dw[3] = v3; 4612 dw[4] = v3 >> 32; 4613 4614 const uint64_t v5 = 4615 __gen_uint(values->PerThreadScratchSpace, 0, 3); 4616 const uint64_t v5_address = 4617 __gen_combine_address(data, &dw[5], values->ScratchSpaceBasePointer, v5); 4618 dw[5] = v5_address; 4619 dw[6] = (v5_address >> 32) | (v5 >> 32); 4620 4621 dw[7] = 4622 __gen_uint(values->IncludePrimitiveID, 0, 0) | 4623 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 4624 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 4625 __gen_uint(values->DispatchMode, 17, 18) | 4626 __gen_uint(values->DispatchGRFStartRegisterForURBData, 19, 23) | 4627 __gen_uint(values->IncludeVertexHandles, 24, 24) | 4628 __gen_uint(values->AccessesUAV, 25, 25) | 4629 __gen_uint(values->VectorMaskEnable, 26, 26) | 4630 __gen_uint(values->SingleProgramFlow, 27, 27) | 4631 __gen_uint(values->DispatchGRFStartRegisterForURBData5, 28, 28); 4632 4633 dw[8] = 0; 4634} 4635 4636#define GEN10_3DSTATE_INDEX_BUFFER_length 5 4637#define GEN10_3DSTATE_INDEX_BUFFER_length_bias 2 4638#define GEN10_3DSTATE_INDEX_BUFFER_header \ 4639 .DWordLength = 3, \ 4640 ._3DCommandSubOpcode = 10, \ 4641 ._3DCommandOpcode = 0, \ 4642 .CommandSubType = 3, \ 4643 .CommandType = 3 4644 4645struct GEN10_3DSTATE_INDEX_BUFFER { 4646 uint32_t DWordLength; 4647 uint32_t _3DCommandSubOpcode; 4648 uint32_t _3DCommandOpcode; 4649 uint32_t CommandSubType; 4650 uint32_t CommandType; 4651 uint32_t MOCS; 4652 uint32_t IndexFormat; 4653#define INDEX_BYTE 0 4654#define INDEX_WORD 1 4655#define INDEX_DWORD 2 4656 __gen_address_type BufferStartingAddress; 4657 uint32_t BufferSize; 4658}; 4659 4660static inline void 4661GEN10_3DSTATE_INDEX_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 4662 __attribute__((unused)) void * restrict dst, 4663 __attribute__((unused)) const struct GEN10_3DSTATE_INDEX_BUFFER * restrict values) 4664{ 4665 uint32_t * restrict dw = (uint32_t * restrict) dst; 4666 4667 dw[0] = 4668 __gen_uint(values->DWordLength, 0, 7) | 4669 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4670 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4671 __gen_uint(values->CommandSubType, 27, 28) | 4672 __gen_uint(values->CommandType, 29, 31); 4673 4674 dw[1] = 4675 __gen_uint(values->MOCS, 0, 6) | 4676 __gen_uint(values->IndexFormat, 8, 9); 4677 4678 const uint64_t v2_address = 4679 __gen_combine_address(data, &dw[2], values->BufferStartingAddress, 0); 4680 dw[2] = v2_address; 4681 dw[3] = v2_address >> 32; 4682 4683 dw[4] = 4684 __gen_uint(values->BufferSize, 0, 31); 4685} 4686 4687#define GEN10_3DSTATE_LINE_STIPPLE_length 3 4688#define GEN10_3DSTATE_LINE_STIPPLE_length_bias 2 4689#define GEN10_3DSTATE_LINE_STIPPLE_header \ 4690 .DWordLength = 1, \ 4691 ._3DCommandSubOpcode = 8, \ 4692 ._3DCommandOpcode = 1, \ 4693 .CommandSubType = 3, \ 4694 .CommandType = 3 4695 4696struct GEN10_3DSTATE_LINE_STIPPLE { 4697 uint32_t DWordLength; 4698 uint32_t _3DCommandSubOpcode; 4699 uint32_t _3DCommandOpcode; 4700 uint32_t CommandSubType; 4701 uint32_t CommandType; 4702 uint32_t LineStipplePattern; 4703 uint32_t CurrentStippleIndex; 4704 uint32_t CurrentRepeatCounter; 4705 bool ModifyEnableCurrentRepeatCounterCurrentStippleIndex; 4706 uint32_t LineStippleRepeatCount; 4707 float LineStippleInverseRepeatCount; 4708}; 4709 4710static inline void 4711GEN10_3DSTATE_LINE_STIPPLE_pack(__attribute__((unused)) __gen_user_data *data, 4712 __attribute__((unused)) void * restrict dst, 4713 __attribute__((unused)) const struct GEN10_3DSTATE_LINE_STIPPLE * restrict values) 4714{ 4715 uint32_t * restrict dw = (uint32_t * restrict) dst; 4716 4717 dw[0] = 4718 __gen_uint(values->DWordLength, 0, 7) | 4719 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4720 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4721 __gen_uint(values->CommandSubType, 27, 28) | 4722 __gen_uint(values->CommandType, 29, 31); 4723 4724 dw[1] = 4725 __gen_uint(values->LineStipplePattern, 0, 15) | 4726 __gen_uint(values->CurrentStippleIndex, 16, 19) | 4727 __gen_uint(values->CurrentRepeatCounter, 21, 29) | 4728 __gen_uint(values->ModifyEnableCurrentRepeatCounterCurrentStippleIndex, 31, 31); 4729 4730 dw[2] = 4731 __gen_uint(values->LineStippleRepeatCount, 0, 8) | 4732 __gen_ufixed(values->LineStippleInverseRepeatCount, 15, 31, 16); 4733} 4734 4735#define GEN10_3DSTATE_MONOFILTER_SIZE_length 2 4736#define GEN10_3DSTATE_MONOFILTER_SIZE_length_bias 2 4737#define GEN10_3DSTATE_MONOFILTER_SIZE_header \ 4738 .DWordLength = 0, \ 4739 ._3DCommandSubOpcode = 17, \ 4740 ._3DCommandOpcode = 1, \ 4741 .CommandSubType = 3, \ 4742 .CommandType = 3 4743 4744struct GEN10_3DSTATE_MONOFILTER_SIZE { 4745 uint32_t DWordLength; 4746 uint32_t _3DCommandSubOpcode; 4747 uint32_t _3DCommandOpcode; 4748 uint32_t CommandSubType; 4749 uint32_t CommandType; 4750 uint32_t MonochromeFilterHeight; 4751 uint32_t MonochromeFilterWidth; 4752}; 4753 4754static inline void 4755GEN10_3DSTATE_MONOFILTER_SIZE_pack(__attribute__((unused)) __gen_user_data *data, 4756 __attribute__((unused)) void * restrict dst, 4757 __attribute__((unused)) const struct GEN10_3DSTATE_MONOFILTER_SIZE * restrict values) 4758{ 4759 uint32_t * restrict dw = (uint32_t * restrict) dst; 4760 4761 dw[0] = 4762 __gen_uint(values->DWordLength, 0, 7) | 4763 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4764 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4765 __gen_uint(values->CommandSubType, 27, 28) | 4766 __gen_uint(values->CommandType, 29, 31); 4767 4768 dw[1] = 4769 __gen_uint(values->MonochromeFilterHeight, 0, 2) | 4770 __gen_uint(values->MonochromeFilterWidth, 3, 5); 4771} 4772 4773#define GEN10_3DSTATE_MULTISAMPLE_length 2 4774#define GEN10_3DSTATE_MULTISAMPLE_length_bias 2 4775#define GEN10_3DSTATE_MULTISAMPLE_header \ 4776 .DWordLength = 0, \ 4777 ._3DCommandSubOpcode = 13, \ 4778 ._3DCommandOpcode = 0, \ 4779 .CommandSubType = 3, \ 4780 .CommandType = 3 4781 4782struct GEN10_3DSTATE_MULTISAMPLE { 4783 uint32_t DWordLength; 4784 uint32_t _3DCommandSubOpcode; 4785 uint32_t _3DCommandOpcode; 4786 uint32_t CommandSubType; 4787 uint32_t CommandType; 4788 uint32_t NumberofMultisamples; 4789 uint32_t PixelLocation; 4790#define CENTER 0 4791#define UL_CORNER 1 4792 bool PixelPositionOffsetEnable; 4793}; 4794 4795static inline void 4796GEN10_3DSTATE_MULTISAMPLE_pack(__attribute__((unused)) __gen_user_data *data, 4797 __attribute__((unused)) void * restrict dst, 4798 __attribute__((unused)) const struct GEN10_3DSTATE_MULTISAMPLE * restrict values) 4799{ 4800 uint32_t * restrict dw = (uint32_t * restrict) dst; 4801 4802 dw[0] = 4803 __gen_uint(values->DWordLength, 0, 7) | 4804 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4805 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4806 __gen_uint(values->CommandSubType, 27, 28) | 4807 __gen_uint(values->CommandType, 29, 31); 4808 4809 dw[1] = 4810 __gen_uint(values->NumberofMultisamples, 1, 3) | 4811 __gen_uint(values->PixelLocation, 4, 4) | 4812 __gen_uint(values->PixelPositionOffsetEnable, 5, 5); 4813} 4814 4815#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_length 2 4816#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_length_bias 2 4817#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_header\ 4818 .DWordLength = 0, \ 4819 ._3DCommandSubOpcode = 6, \ 4820 ._3DCommandOpcode = 1, \ 4821 .CommandSubType = 3, \ 4822 .CommandType = 3 4823 4824struct GEN10_3DSTATE_POLY_STIPPLE_OFFSET { 4825 uint32_t DWordLength; 4826 uint32_t _3DCommandSubOpcode; 4827 uint32_t _3DCommandOpcode; 4828 uint32_t CommandSubType; 4829 uint32_t CommandType; 4830 uint32_t PolygonStippleYOffset; 4831 uint32_t PolygonStippleXOffset; 4832}; 4833 4834static inline void 4835GEN10_3DSTATE_POLY_STIPPLE_OFFSET_pack(__attribute__((unused)) __gen_user_data *data, 4836 __attribute__((unused)) void * restrict dst, 4837 __attribute__((unused)) const struct GEN10_3DSTATE_POLY_STIPPLE_OFFSET * restrict values) 4838{ 4839 uint32_t * restrict dw = (uint32_t * restrict) dst; 4840 4841 dw[0] = 4842 __gen_uint(values->DWordLength, 0, 7) | 4843 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4844 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4845 __gen_uint(values->CommandSubType, 27, 28) | 4846 __gen_uint(values->CommandType, 29, 31); 4847 4848 dw[1] = 4849 __gen_uint(values->PolygonStippleYOffset, 0, 4) | 4850 __gen_uint(values->PolygonStippleXOffset, 8, 12); 4851} 4852 4853#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_length 33 4854#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_length_bias 2 4855#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_header\ 4856 .DWordLength = 31, \ 4857 ._3DCommandSubOpcode = 7, \ 4858 ._3DCommandOpcode = 1, \ 4859 .CommandSubType = 3, \ 4860 .CommandType = 3 4861 4862struct GEN10_3DSTATE_POLY_STIPPLE_PATTERN { 4863 uint32_t DWordLength; 4864 uint32_t _3DCommandSubOpcode; 4865 uint32_t _3DCommandOpcode; 4866 uint32_t CommandSubType; 4867 uint32_t CommandType; 4868 uint32_t PatternRow[32]; 4869}; 4870 4871static inline void 4872GEN10_3DSTATE_POLY_STIPPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 4873 __attribute__((unused)) void * restrict dst, 4874 __attribute__((unused)) const struct GEN10_3DSTATE_POLY_STIPPLE_PATTERN * restrict values) 4875{ 4876 uint32_t * restrict dw = (uint32_t * restrict) dst; 4877 4878 dw[0] = 4879 __gen_uint(values->DWordLength, 0, 7) | 4880 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 4881 __gen_uint(values->_3DCommandOpcode, 24, 26) | 4882 __gen_uint(values->CommandSubType, 27, 28) | 4883 __gen_uint(values->CommandType, 29, 31); 4884 4885 dw[1] = 4886 __gen_uint(values->PatternRow[0], 0, 31); 4887 4888 dw[2] = 4889 __gen_uint(values->PatternRow[1], 0, 31); 4890 4891 dw[3] = 4892 __gen_uint(values->PatternRow[2], 0, 31); 4893 4894 dw[4] = 4895 __gen_uint(values->PatternRow[3], 0, 31); 4896 4897 dw[5] = 4898 __gen_uint(values->PatternRow[4], 0, 31); 4899 4900 dw[6] = 4901 __gen_uint(values->PatternRow[5], 0, 31); 4902 4903 dw[7] = 4904 __gen_uint(values->PatternRow[6], 0, 31); 4905 4906 dw[8] = 4907 __gen_uint(values->PatternRow[7], 0, 31); 4908 4909 dw[9] = 4910 __gen_uint(values->PatternRow[8], 0, 31); 4911 4912 dw[10] = 4913 __gen_uint(values->PatternRow[9], 0, 31); 4914 4915 dw[11] = 4916 __gen_uint(values->PatternRow[10], 0, 31); 4917 4918 dw[12] = 4919 __gen_uint(values->PatternRow[11], 0, 31); 4920 4921 dw[13] = 4922 __gen_uint(values->PatternRow[12], 0, 31); 4923 4924 dw[14] = 4925 __gen_uint(values->PatternRow[13], 0, 31); 4926 4927 dw[15] = 4928 __gen_uint(values->PatternRow[14], 0, 31); 4929 4930 dw[16] = 4931 __gen_uint(values->PatternRow[15], 0, 31); 4932 4933 dw[17] = 4934 __gen_uint(values->PatternRow[16], 0, 31); 4935 4936 dw[18] = 4937 __gen_uint(values->PatternRow[17], 0, 31); 4938 4939 dw[19] = 4940 __gen_uint(values->PatternRow[18], 0, 31); 4941 4942 dw[20] = 4943 __gen_uint(values->PatternRow[19], 0, 31); 4944 4945 dw[21] = 4946 __gen_uint(values->PatternRow[20], 0, 31); 4947 4948 dw[22] = 4949 __gen_uint(values->PatternRow[21], 0, 31); 4950 4951 dw[23] = 4952 __gen_uint(values->PatternRow[22], 0, 31); 4953 4954 dw[24] = 4955 __gen_uint(values->PatternRow[23], 0, 31); 4956 4957 dw[25] = 4958 __gen_uint(values->PatternRow[24], 0, 31); 4959 4960 dw[26] = 4961 __gen_uint(values->PatternRow[25], 0, 31); 4962 4963 dw[27] = 4964 __gen_uint(values->PatternRow[26], 0, 31); 4965 4966 dw[28] = 4967 __gen_uint(values->PatternRow[27], 0, 31); 4968 4969 dw[29] = 4970 __gen_uint(values->PatternRow[28], 0, 31); 4971 4972 dw[30] = 4973 __gen_uint(values->PatternRow[29], 0, 31); 4974 4975 dw[31] = 4976 __gen_uint(values->PatternRow[30], 0, 31); 4977 4978 dw[32] = 4979 __gen_uint(values->PatternRow[31], 0, 31); 4980} 4981 4982#define GEN10_3DSTATE_PS_length 12 4983#define GEN10_3DSTATE_PS_length_bias 2 4984#define GEN10_3DSTATE_PS_header \ 4985 .DWordLength = 10, \ 4986 ._3DCommandSubOpcode = 32, \ 4987 ._3DCommandOpcode = 0, \ 4988 .CommandSubType = 3, \ 4989 .CommandType = 3 4990 4991struct GEN10_3DSTATE_PS { 4992 uint32_t DWordLength; 4993 uint32_t _3DCommandSubOpcode; 4994 uint32_t _3DCommandOpcode; 4995 uint32_t CommandSubType; 4996 uint32_t CommandType; 4997 uint64_t KernelStartPointer0; 4998 bool SoftwareExceptionEnable; 4999 bool MaskStackExceptionEnable; 5000 bool IllegalOpcodeExceptionEnable; 5001 uint32_t RoundingMode; 5002#define RTNE 0 5003#define RU 1 5004#define RD 2 5005#define RTZ 3 5006 uint32_t FloatingPointMode; 5007#define IEEE754 0 5008#define Alternate 1 5009 uint32_t ThreadDispatchPriority; 5010#define High 1 5011 uint32_t BindingTableEntryCount; 5012 uint32_t SinglePrecisionDenormalMode; 5013#define FlushedtoZero 0 5014#define Retained 1 5015 uint32_t SamplerCount; 5016#define NoSamplers 0 5017#define _14Samplers 1 5018#define _58Samplers 2 5019#define _912Samplers 3 5020#define _1316Samplers 4 5021 bool VectorMaskEnable; 5022 bool SingleProgramFlow; 5023 uint32_t PerThreadScratchSpace; 5024 __gen_address_type ScratchSpaceBasePointer; 5025 bool _8PixelDispatchEnable; 5026 bool _16PixelDispatchEnable; 5027 bool _32PixelDispatchEnable; 5028 uint32_t PositionXYOffsetSelect; 5029#define POSOFFSET_NONE 0 5030#define POSOFFSET_CENTROID 2 5031#define POSOFFSET_SAMPLE 3 5032 uint32_t RenderTargetResolveType; 5033#define RESOLVE_DISABLED 0 5034#define RESOLVE_PARTIAL 1 5035#define FAST_CLEAR_0 2 5036#define RESOLVE_FULL 3 5037 bool RenderTargetFastClearEnable; 5038 bool PushConstantEnable; 5039 uint32_t MaximumNumberofThreadsPerPSD; 5040 uint32_t DispatchGRFStartRegisterForConstantSetupData2; 5041 uint32_t DispatchGRFStartRegisterForConstantSetupData1; 5042 uint32_t DispatchGRFStartRegisterForConstantSetupData0; 5043 uint64_t KernelStartPointer1; 5044 uint64_t KernelStartPointer2; 5045}; 5046 5047static inline void 5048GEN10_3DSTATE_PS_pack(__attribute__((unused)) __gen_user_data *data, 5049 __attribute__((unused)) void * restrict dst, 5050 __attribute__((unused)) const struct GEN10_3DSTATE_PS * restrict values) 5051{ 5052 uint32_t * restrict dw = (uint32_t * restrict) dst; 5053 5054 dw[0] = 5055 __gen_uint(values->DWordLength, 0, 7) | 5056 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5057 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5058 __gen_uint(values->CommandSubType, 27, 28) | 5059 __gen_uint(values->CommandType, 29, 31); 5060 5061 const uint64_t v1 = 5062 __gen_offset(values->KernelStartPointer0, 6, 63); 5063 dw[1] = v1; 5064 dw[2] = v1 >> 32; 5065 5066 dw[3] = 5067 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 5068 __gen_uint(values->MaskStackExceptionEnable, 11, 11) | 5069 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 5070 __gen_uint(values->RoundingMode, 14, 15) | 5071 __gen_uint(values->FloatingPointMode, 16, 16) | 5072 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 5073 __gen_uint(values->BindingTableEntryCount, 18, 25) | 5074 __gen_uint(values->SinglePrecisionDenormalMode, 26, 26) | 5075 __gen_uint(values->SamplerCount, 27, 29) | 5076 __gen_uint(values->VectorMaskEnable, 30, 30) | 5077 __gen_uint(values->SingleProgramFlow, 31, 31); 5078 5079 const uint64_t v4 = 5080 __gen_uint(values->PerThreadScratchSpace, 0, 3); 5081 const uint64_t v4_address = 5082 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 5083 dw[4] = v4_address; 5084 dw[5] = (v4_address >> 32) | (v4 >> 32); 5085 5086 dw[6] = 5087 __gen_uint(values->_8PixelDispatchEnable, 0, 0) | 5088 __gen_uint(values->_16PixelDispatchEnable, 1, 1) | 5089 __gen_uint(values->_32PixelDispatchEnable, 2, 2) | 5090 __gen_uint(values->PositionXYOffsetSelect, 3, 4) | 5091 __gen_uint(values->RenderTargetResolveType, 6, 7) | 5092 __gen_uint(values->RenderTargetFastClearEnable, 8, 8) | 5093 __gen_uint(values->PushConstantEnable, 11, 11) | 5094 __gen_uint(values->MaximumNumberofThreadsPerPSD, 23, 31); 5095 5096 dw[7] = 5097 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6) | 5098 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) | 5099 __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22); 5100 5101 const uint64_t v8 = 5102 __gen_offset(values->KernelStartPointer1, 6, 63); 5103 dw[8] = v8; 5104 dw[9] = v8 >> 32; 5105 5106 const uint64_t v10 = 5107 __gen_offset(values->KernelStartPointer2, 6, 63); 5108 dw[10] = v10; 5109 dw[11] = v10 >> 32; 5110} 5111 5112#define GEN10_3DSTATE_PS_BLEND_length 2 5113#define GEN10_3DSTATE_PS_BLEND_length_bias 2 5114#define GEN10_3DSTATE_PS_BLEND_header \ 5115 .DWordLength = 0, \ 5116 ._3DCommandSubOpcode = 77, \ 5117 ._3DCommandOpcode = 0, \ 5118 .CommandSubType = 3, \ 5119 .CommandType = 3 5120 5121struct GEN10_3DSTATE_PS_BLEND { 5122 uint32_t DWordLength; 5123 uint32_t _3DCommandSubOpcode; 5124 uint32_t _3DCommandOpcode; 5125 uint32_t CommandSubType; 5126 uint32_t CommandType; 5127 bool IndependentAlphaBlendEnable; 5128 bool AlphaTestEnable; 5129 enum GEN10_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; 5130 enum GEN10_3D_Color_Buffer_Blend_Factor SourceBlendFactor; 5131 enum GEN10_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; 5132 enum GEN10_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; 5133 bool ColorBufferBlendEnable; 5134 bool HasWriteableRT; 5135 bool AlphaToCoverageEnable; 5136}; 5137 5138static inline void 5139GEN10_3DSTATE_PS_BLEND_pack(__attribute__((unused)) __gen_user_data *data, 5140 __attribute__((unused)) void * restrict dst, 5141 __attribute__((unused)) const struct GEN10_3DSTATE_PS_BLEND * restrict values) 5142{ 5143 uint32_t * restrict dw = (uint32_t * restrict) dst; 5144 5145 dw[0] = 5146 __gen_uint(values->DWordLength, 0, 7) | 5147 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5148 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5149 __gen_uint(values->CommandSubType, 27, 28) | 5150 __gen_uint(values->CommandType, 29, 31); 5151 5152 dw[1] = 5153 __gen_uint(values->IndependentAlphaBlendEnable, 7, 7) | 5154 __gen_uint(values->AlphaTestEnable, 8, 8) | 5155 __gen_uint(values->DestinationBlendFactor, 9, 13) | 5156 __gen_uint(values->SourceBlendFactor, 14, 18) | 5157 __gen_uint(values->DestinationAlphaBlendFactor, 19, 23) | 5158 __gen_uint(values->SourceAlphaBlendFactor, 24, 28) | 5159 __gen_uint(values->ColorBufferBlendEnable, 29, 29) | 5160 __gen_uint(values->HasWriteableRT, 30, 30) | 5161 __gen_uint(values->AlphaToCoverageEnable, 31, 31); 5162} 5163 5164#define GEN10_3DSTATE_PS_EXTRA_length 2 5165#define GEN10_3DSTATE_PS_EXTRA_length_bias 2 5166#define GEN10_3DSTATE_PS_EXTRA_header \ 5167 .DWordLength = 0, \ 5168 ._3DCommandSubOpcode = 79, \ 5169 ._3DCommandOpcode = 0, \ 5170 .CommandSubType = 3, \ 5171 .CommandType = 3 5172 5173struct GEN10_3DSTATE_PS_EXTRA { 5174 uint32_t DWordLength; 5175 uint32_t _3DCommandSubOpcode; 5176 uint32_t _3DCommandOpcode; 5177 uint32_t CommandSubType; 5178 uint32_t CommandType; 5179 uint32_t InputCoverageMaskState; 5180#define ICMS_NONE 0 5181#define ICMS_NORMAL 1 5182#define ICMS_INNER_CONSERVATIVE 2 5183#define ICMS_DEPTH_COVERAGE 3 5184 bool PixelShaderHasUAV; 5185 bool PixelShaderPullsBary; 5186 bool PixelShaderComputesStencil; 5187 bool PixelShaderIsPerSample; 5188 bool PixelShaderDisablesAlphaToCoverage; 5189 bool AttributeEnable; 5190 bool SimplePSHint; 5191 bool PixelShaderRequiresSubpixelSampleOffsets; 5192 bool PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients; 5193 bool PixelShaderRequiresPerspectiveBaryPlaneCoefficients; 5194 bool PixelShaderRequiresSourceDepthandorWPlaneCoefficients; 5195 bool PixelShaderUsesSourceW; 5196 bool PixelShaderUsesSourceDepth; 5197 bool ForceComputedDepth; 5198 uint32_t PixelShaderComputedDepthMode; 5199#define PSCDEPTH_OFF 0 5200#define PSCDEPTH_ON 1 5201#define PSCDEPTH_ON_GE 2 5202#define PSCDEPTH_ON_LE 3 5203 bool PixelShaderKillsPixel; 5204 bool oMaskPresenttoRenderTarget; 5205 bool PixelShaderDoesnotwritetoRT; 5206 bool PixelShaderValid; 5207}; 5208 5209static inline void 5210GEN10_3DSTATE_PS_EXTRA_pack(__attribute__((unused)) __gen_user_data *data, 5211 __attribute__((unused)) void * restrict dst, 5212 __attribute__((unused)) const struct GEN10_3DSTATE_PS_EXTRA * restrict values) 5213{ 5214 uint32_t * restrict dw = (uint32_t * restrict) dst; 5215 5216 dw[0] = 5217 __gen_uint(values->DWordLength, 0, 7) | 5218 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5219 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5220 __gen_uint(values->CommandSubType, 27, 28) | 5221 __gen_uint(values->CommandType, 29, 31); 5222 5223 dw[1] = 5224 __gen_uint(values->InputCoverageMaskState, 0, 1) | 5225 __gen_uint(values->PixelShaderHasUAV, 2, 2) | 5226 __gen_uint(values->PixelShaderPullsBary, 3, 3) | 5227 __gen_uint(values->PixelShaderComputesStencil, 5, 5) | 5228 __gen_uint(values->PixelShaderIsPerSample, 6, 6) | 5229 __gen_uint(values->PixelShaderDisablesAlphaToCoverage, 7, 7) | 5230 __gen_uint(values->AttributeEnable, 8, 8) | 5231 __gen_uint(values->SimplePSHint, 9, 9) | 5232 __gen_uint(values->PixelShaderRequiresSubpixelSampleOffsets, 18, 18) | 5233 __gen_uint(values->PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients, 19, 19) | 5234 __gen_uint(values->PixelShaderRequiresPerspectiveBaryPlaneCoefficients, 20, 20) | 5235 __gen_uint(values->PixelShaderRequiresSourceDepthandorWPlaneCoefficients, 21, 21) | 5236 __gen_uint(values->PixelShaderUsesSourceW, 23, 23) | 5237 __gen_uint(values->PixelShaderUsesSourceDepth, 24, 24) | 5238 __gen_uint(values->ForceComputedDepth, 25, 25) | 5239 __gen_uint(values->PixelShaderComputedDepthMode, 26, 27) | 5240 __gen_uint(values->PixelShaderKillsPixel, 28, 28) | 5241 __gen_uint(values->oMaskPresenttoRenderTarget, 29, 29) | 5242 __gen_uint(values->PixelShaderDoesnotwritetoRT, 30, 30) | 5243 __gen_uint(values->PixelShaderValid, 31, 31); 5244} 5245 5246#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2 5247#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length_bias 2 5248#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_header\ 5249 .DWordLength = 0, \ 5250 ._3DCommandSubOpcode = 20, \ 5251 ._3DCommandOpcode = 1, \ 5252 .CommandSubType = 3, \ 5253 .CommandType = 3 5254 5255struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS { 5256 uint32_t DWordLength; 5257 uint32_t _3DCommandSubOpcode; 5258 uint32_t _3DCommandOpcode; 5259 uint32_t CommandSubType; 5260 uint32_t CommandType; 5261 uint32_t ConstantBufferSize; 5262 uint32_t ConstantBufferOffset; 5263}; 5264 5265static inline void 5266GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_pack(__attribute__((unused)) __gen_user_data *data, 5267 __attribute__((unused)) void * restrict dst, 5268 __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS * restrict values) 5269{ 5270 uint32_t * restrict dw = (uint32_t * restrict) dst; 5271 5272 dw[0] = 5273 __gen_uint(values->DWordLength, 0, 7) | 5274 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5275 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5276 __gen_uint(values->CommandSubType, 27, 28) | 5277 __gen_uint(values->CommandType, 29, 31); 5278 5279 dw[1] = 5280 __gen_uint(values->ConstantBufferSize, 0, 5) | 5281 __gen_uint(values->ConstantBufferOffset, 16, 20); 5282} 5283 5284#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2 5285#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length_bias 2 5286#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_header\ 5287 .DWordLength = 0, \ 5288 ._3DCommandSubOpcode = 21, \ 5289 ._3DCommandOpcode = 1, \ 5290 .CommandSubType = 3, \ 5291 .CommandType = 3 5292 5293struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS { 5294 uint32_t DWordLength; 5295 uint32_t _3DCommandSubOpcode; 5296 uint32_t _3DCommandOpcode; 5297 uint32_t CommandSubType; 5298 uint32_t CommandType; 5299 uint32_t ConstantBufferSize; 5300 uint32_t ConstantBufferOffset; 5301}; 5302 5303static inline void 5304GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_pack(__attribute__((unused)) __gen_user_data *data, 5305 __attribute__((unused)) void * restrict dst, 5306 __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS * restrict values) 5307{ 5308 uint32_t * restrict dw = (uint32_t * restrict) dst; 5309 5310 dw[0] = 5311 __gen_uint(values->DWordLength, 0, 7) | 5312 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5313 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5314 __gen_uint(values->CommandSubType, 27, 28) | 5315 __gen_uint(values->CommandType, 29, 31); 5316 5317 dw[1] = 5318 __gen_uint(values->ConstantBufferSize, 0, 5) | 5319 __gen_uint(values->ConstantBufferOffset, 16, 20); 5320} 5321 5322#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2 5323#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length_bias 2 5324#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_header\ 5325 .DWordLength = 0, \ 5326 ._3DCommandSubOpcode = 19, \ 5327 ._3DCommandOpcode = 1, \ 5328 .CommandSubType = 3, \ 5329 .CommandType = 3 5330 5331struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS { 5332 uint32_t DWordLength; 5333 uint32_t _3DCommandSubOpcode; 5334 uint32_t _3DCommandOpcode; 5335 uint32_t CommandSubType; 5336 uint32_t CommandType; 5337 uint32_t ConstantBufferSize; 5338 uint32_t ConstantBufferOffset; 5339}; 5340 5341static inline void 5342GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_pack(__attribute__((unused)) __gen_user_data *data, 5343 __attribute__((unused)) void * restrict dst, 5344 __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS * restrict values) 5345{ 5346 uint32_t * restrict dw = (uint32_t * restrict) dst; 5347 5348 dw[0] = 5349 __gen_uint(values->DWordLength, 0, 7) | 5350 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5351 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5352 __gen_uint(values->CommandSubType, 27, 28) | 5353 __gen_uint(values->CommandType, 29, 31); 5354 5355 dw[1] = 5356 __gen_uint(values->ConstantBufferSize, 0, 5) | 5357 __gen_uint(values->ConstantBufferOffset, 16, 20); 5358} 5359 5360#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2 5361#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length_bias 2 5362#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_header\ 5363 .DWordLength = 0, \ 5364 ._3DCommandSubOpcode = 22, \ 5365 ._3DCommandOpcode = 1, \ 5366 .CommandSubType = 3, \ 5367 .CommandType = 3 5368 5369struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS { 5370 uint32_t DWordLength; 5371 uint32_t _3DCommandSubOpcode; 5372 uint32_t _3DCommandOpcode; 5373 uint32_t CommandSubType; 5374 uint32_t CommandType; 5375 uint32_t ConstantBufferSize; 5376 uint32_t ConstantBufferOffset; 5377}; 5378 5379static inline void 5380GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_pack(__attribute__((unused)) __gen_user_data *data, 5381 __attribute__((unused)) void * restrict dst, 5382 __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS * restrict values) 5383{ 5384 uint32_t * restrict dw = (uint32_t * restrict) dst; 5385 5386 dw[0] = 5387 __gen_uint(values->DWordLength, 0, 7) | 5388 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5389 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5390 __gen_uint(values->CommandSubType, 27, 28) | 5391 __gen_uint(values->CommandType, 29, 31); 5392 5393 dw[1] = 5394 __gen_uint(values->ConstantBufferSize, 0, 5) | 5395 __gen_uint(values->ConstantBufferOffset, 16, 20); 5396} 5397 5398#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2 5399#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length_bias 2 5400#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_header\ 5401 .DWordLength = 0, \ 5402 ._3DCommandSubOpcode = 18, \ 5403 ._3DCommandOpcode = 1, \ 5404 .CommandSubType = 3, \ 5405 .CommandType = 3 5406 5407struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS { 5408 uint32_t DWordLength; 5409 uint32_t _3DCommandSubOpcode; 5410 uint32_t _3DCommandOpcode; 5411 uint32_t CommandSubType; 5412 uint32_t CommandType; 5413 uint32_t ConstantBufferSize; 5414 uint32_t ConstantBufferOffset; 5415}; 5416 5417static inline void 5418GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_pack(__attribute__((unused)) __gen_user_data *data, 5419 __attribute__((unused)) void * restrict dst, 5420 __attribute__((unused)) const struct GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS * restrict values) 5421{ 5422 uint32_t * restrict dw = (uint32_t * restrict) dst; 5423 5424 dw[0] = 5425 __gen_uint(values->DWordLength, 0, 7) | 5426 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5427 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5428 __gen_uint(values->CommandSubType, 27, 28) | 5429 __gen_uint(values->CommandType, 29, 31); 5430 5431 dw[1] = 5432 __gen_uint(values->ConstantBufferSize, 0, 5) | 5433 __gen_uint(values->ConstantBufferOffset, 16, 20); 5434} 5435 5436#define GEN10_3DSTATE_RASTER_length 5 5437#define GEN10_3DSTATE_RASTER_length_bias 2 5438#define GEN10_3DSTATE_RASTER_header \ 5439 .DWordLength = 3, \ 5440 ._3DCommandSubOpcode = 80, \ 5441 ._3DCommandOpcode = 0, \ 5442 .CommandSubType = 3, \ 5443 .CommandType = 3 5444 5445struct GEN10_3DSTATE_RASTER { 5446 uint32_t DWordLength; 5447 uint32_t _3DCommandSubOpcode; 5448 uint32_t _3DCommandOpcode; 5449 uint32_t CommandSubType; 5450 uint32_t CommandType; 5451 bool ViewportZNearClipTestEnable; 5452 bool ScissorRectangleEnable; 5453 bool AntialiasingEnable; 5454 uint32_t BackFaceFillMode; 5455#define FILL_MODE_SOLID 0 5456#define FILL_MODE_WIREFRAME 1 5457#define FILL_MODE_POINT 2 5458 uint32_t FrontFaceFillMode; 5459#define FILL_MODE_SOLID 0 5460#define FILL_MODE_WIREFRAME 1 5461#define FILL_MODE_POINT 2 5462 bool GlobalDepthOffsetEnablePoint; 5463 bool GlobalDepthOffsetEnableWireframe; 5464 bool GlobalDepthOffsetEnableSolid; 5465 uint32_t DXMultisampleRasterizationMode; 5466#define MSRASTMODE_OFF_PIXEL 0 5467#define MSRASTMODE_OFF_PATTERN 1 5468#define MSRASTMODE_ON_PIXEL 2 5469#define MSRASTMODE_ON_PATTERN 3 5470 bool DXMultisampleRasterizationEnable; 5471 bool SmoothPointEnable; 5472 uint32_t ForceMultisampling; 5473 uint32_t CullMode; 5474#define CULLMODE_BOTH 0 5475#define CULLMODE_NONE 1 5476#define CULLMODE_FRONT 2 5477#define CULLMODE_BACK 3 5478 uint32_t ForcedSampleCount; 5479#define FSC_NUMRASTSAMPLES_0 0 5480#define FSC_NUMRASTSAMPLES_1 1 5481#define FSC_NUMRASTSAMPLES_2 2 5482#define FSC_NUMRASTSAMPLES_4 3 5483#define FSC_NUMRASTSAMPLES_8 4 5484#define FSC_NUMRASTSAMPLES_16 5 5485 uint32_t FrontWinding; 5486#define Clockwise 0 5487#define CounterClockwise 1 5488 uint32_t APIMode; 5489#define DX9OGL 0 5490#define DX100 1 5491#define DX101 2 5492 bool ConservativeRasterizationEnable; 5493 bool ViewportZFarClipTestEnable; 5494 float GlobalDepthOffsetConstant; 5495 float GlobalDepthOffsetScale; 5496 float GlobalDepthOffsetClamp; 5497}; 5498 5499static inline void 5500GEN10_3DSTATE_RASTER_pack(__attribute__((unused)) __gen_user_data *data, 5501 __attribute__((unused)) void * restrict dst, 5502 __attribute__((unused)) const struct GEN10_3DSTATE_RASTER * restrict values) 5503{ 5504 uint32_t * restrict dw = (uint32_t * restrict) dst; 5505 5506 dw[0] = 5507 __gen_uint(values->DWordLength, 0, 7) | 5508 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5509 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5510 __gen_uint(values->CommandSubType, 27, 28) | 5511 __gen_uint(values->CommandType, 29, 31); 5512 5513 dw[1] = 5514 __gen_uint(values->ViewportZNearClipTestEnable, 0, 0) | 5515 __gen_uint(values->ScissorRectangleEnable, 1, 1) | 5516 __gen_uint(values->AntialiasingEnable, 2, 2) | 5517 __gen_uint(values->BackFaceFillMode, 3, 4) | 5518 __gen_uint(values->FrontFaceFillMode, 5, 6) | 5519 __gen_uint(values->GlobalDepthOffsetEnablePoint, 7, 7) | 5520 __gen_uint(values->GlobalDepthOffsetEnableWireframe, 8, 8) | 5521 __gen_uint(values->GlobalDepthOffsetEnableSolid, 9, 9) | 5522 __gen_uint(values->DXMultisampleRasterizationMode, 10, 11) | 5523 __gen_uint(values->DXMultisampleRasterizationEnable, 12, 12) | 5524 __gen_uint(values->SmoothPointEnable, 13, 13) | 5525 __gen_uint(values->ForceMultisampling, 14, 14) | 5526 __gen_uint(values->CullMode, 16, 17) | 5527 __gen_uint(values->ForcedSampleCount, 18, 20) | 5528 __gen_uint(values->FrontWinding, 21, 21) | 5529 __gen_uint(values->APIMode, 22, 23) | 5530 __gen_uint(values->ConservativeRasterizationEnable, 24, 24) | 5531 __gen_uint(values->ViewportZFarClipTestEnable, 26, 26); 5532 5533 dw[2] = 5534 __gen_float(values->GlobalDepthOffsetConstant); 5535 5536 dw[3] = 5537 __gen_float(values->GlobalDepthOffsetScale); 5538 5539 dw[4] = 5540 __gen_float(values->GlobalDepthOffsetClamp); 5541} 5542 5543#define GEN10_3DSTATE_RS_CONSTANT_POINTER_length 4 5544#define GEN10_3DSTATE_RS_CONSTANT_POINTER_length_bias 2 5545#define GEN10_3DSTATE_RS_CONSTANT_POINTER_header\ 5546 .DWordLength = 2, \ 5547 ._3DCommandSubOpcode = 84, \ 5548 ._3DCommandOpcode = 0, \ 5549 .CommandSubType = 3, \ 5550 .CommandType = 3 5551 5552struct GEN10_3DSTATE_RS_CONSTANT_POINTER { 5553 uint32_t DWordLength; 5554 uint32_t _3DCommandSubOpcode; 5555 uint32_t _3DCommandOpcode; 5556 uint32_t CommandSubType; 5557 uint32_t CommandType; 5558 uint32_t OperationLoadorStore; 5559#define RS_Store 0 5560#define RS_Load 1 5561 uint32_t ShaderSelect; 5562#define VS 0 5563#define PS 4 5564 __gen_address_type GlobalConstantBufferAddress; 5565 __gen_address_type GlobalConstantBufferAddressHigh; 5566}; 5567 5568static inline void 5569GEN10_3DSTATE_RS_CONSTANT_POINTER_pack(__attribute__((unused)) __gen_user_data *data, 5570 __attribute__((unused)) void * restrict dst, 5571 __attribute__((unused)) const struct GEN10_3DSTATE_RS_CONSTANT_POINTER * restrict values) 5572{ 5573 uint32_t * restrict dw = (uint32_t * restrict) dst; 5574 5575 dw[0] = 5576 __gen_uint(values->DWordLength, 0, 7) | 5577 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5578 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5579 __gen_uint(values->CommandSubType, 27, 28) | 5580 __gen_uint(values->CommandType, 29, 31); 5581 5582 dw[1] = 5583 __gen_uint(values->OperationLoadorStore, 12, 12) | 5584 __gen_uint(values->ShaderSelect, 28, 30); 5585 5586 dw[2] = __gen_combine_address(data, &dw[2], values->GlobalConstantBufferAddress, 0); 5587 5588 dw[3] = __gen_combine_address(data, &dw[3], values->GlobalConstantBufferAddressHigh, 0); 5589} 5590 5591#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_length_bias 2 5592#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_header\ 5593 ._3DCommandSubOpcode = 2, \ 5594 ._3DCommandOpcode = 1, \ 5595 .CommandSubType = 3, \ 5596 .CommandType = 3 5597 5598struct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0 { 5599 uint32_t DWordLength; 5600 uint32_t _3DCommandSubOpcode; 5601 uint32_t _3DCommandOpcode; 5602 uint32_t CommandSubType; 5603 uint32_t CommandType; 5604 /* variable length fields follow */ 5605}; 5606 5607static inline void 5608GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_pack(__attribute__((unused)) __gen_user_data *data, 5609 __attribute__((unused)) void * restrict dst, 5610 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0 * restrict values) 5611{ 5612 uint32_t * restrict dw = (uint32_t * restrict) dst; 5613 5614 dw[0] = 5615 __gen_uint(values->DWordLength, 0, 7) | 5616 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5617 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5618 __gen_uint(values->CommandSubType, 27, 28) | 5619 __gen_uint(values->CommandType, 29, 31); 5620} 5621 5622#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_length_bias 2 5623#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_header\ 5624 .DWordLength = 0, \ 5625 ._3DCommandSubOpcode = 12, \ 5626 ._3DCommandOpcode = 1, \ 5627 .CommandSubType = 3, \ 5628 .CommandType = 3 5629 5630struct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1 { 5631 uint32_t DWordLength; 5632 uint32_t _3DCommandSubOpcode; 5633 uint32_t _3DCommandOpcode; 5634 uint32_t CommandSubType; 5635 uint32_t CommandType; 5636 /* variable length fields follow */ 5637}; 5638 5639static inline void 5640GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_pack(__attribute__((unused)) __gen_user_data *data, 5641 __attribute__((unused)) void * restrict dst, 5642 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1 * restrict values) 5643{ 5644 uint32_t * restrict dw = (uint32_t * restrict) dst; 5645 5646 dw[0] = 5647 __gen_uint(values->DWordLength, 0, 7) | 5648 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5649 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5650 __gen_uint(values->CommandSubType, 27, 28) | 5651 __gen_uint(values->CommandType, 29, 31); 5652} 5653 5654#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2 5655#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_length_bias 2 5656#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_header\ 5657 .DWordLength = 0, \ 5658 ._3DCommandSubOpcode = 45, \ 5659 ._3DCommandOpcode = 0, \ 5660 .CommandSubType = 3, \ 5661 .CommandType = 3 5662 5663struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS { 5664 uint32_t DWordLength; 5665 uint32_t _3DCommandSubOpcode; 5666 uint32_t _3DCommandOpcode; 5667 uint32_t CommandSubType; 5668 uint32_t CommandType; 5669 uint64_t PointertoDSSamplerState; 5670}; 5671 5672static inline void 5673GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_pack(__attribute__((unused)) __gen_user_data *data, 5674 __attribute__((unused)) void * restrict dst, 5675 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS * restrict values) 5676{ 5677 uint32_t * restrict dw = (uint32_t * restrict) dst; 5678 5679 dw[0] = 5680 __gen_uint(values->DWordLength, 0, 7) | 5681 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5682 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5683 __gen_uint(values->CommandSubType, 27, 28) | 5684 __gen_uint(values->CommandType, 29, 31); 5685 5686 dw[1] = 5687 __gen_offset(values->PointertoDSSamplerState, 5, 31); 5688} 5689 5690#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2 5691#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_length_bias 2 5692#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_header\ 5693 .DWordLength = 0, \ 5694 ._3DCommandSubOpcode = 46, \ 5695 ._3DCommandOpcode = 0, \ 5696 .CommandSubType = 3, \ 5697 .CommandType = 3 5698 5699struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS { 5700 uint32_t DWordLength; 5701 uint32_t _3DCommandSubOpcode; 5702 uint32_t _3DCommandOpcode; 5703 uint32_t CommandSubType; 5704 uint32_t CommandType; 5705 uint64_t PointertoGSSamplerState; 5706}; 5707 5708static inline void 5709GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_pack(__attribute__((unused)) __gen_user_data *data, 5710 __attribute__((unused)) void * restrict dst, 5711 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS * restrict values) 5712{ 5713 uint32_t * restrict dw = (uint32_t * restrict) dst; 5714 5715 dw[0] = 5716 __gen_uint(values->DWordLength, 0, 7) | 5717 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5718 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5719 __gen_uint(values->CommandSubType, 27, 28) | 5720 __gen_uint(values->CommandType, 29, 31); 5721 5722 dw[1] = 5723 __gen_offset(values->PointertoGSSamplerState, 5, 31); 5724} 5725 5726#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2 5727#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_length_bias 2 5728#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_header\ 5729 .DWordLength = 0, \ 5730 ._3DCommandSubOpcode = 44, \ 5731 ._3DCommandOpcode = 0, \ 5732 .CommandSubType = 3, \ 5733 .CommandType = 3 5734 5735struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS { 5736 uint32_t DWordLength; 5737 uint32_t _3DCommandSubOpcode; 5738 uint32_t _3DCommandOpcode; 5739 uint32_t CommandSubType; 5740 uint32_t CommandType; 5741 uint64_t PointertoHSSamplerState; 5742}; 5743 5744static inline void 5745GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_pack(__attribute__((unused)) __gen_user_data *data, 5746 __attribute__((unused)) void * restrict dst, 5747 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS * restrict values) 5748{ 5749 uint32_t * restrict dw = (uint32_t * restrict) dst; 5750 5751 dw[0] = 5752 __gen_uint(values->DWordLength, 0, 7) | 5753 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5754 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5755 __gen_uint(values->CommandSubType, 27, 28) | 5756 __gen_uint(values->CommandType, 29, 31); 5757 5758 dw[1] = 5759 __gen_offset(values->PointertoHSSamplerState, 5, 31); 5760} 5761 5762#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2 5763#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_length_bias 2 5764#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_header\ 5765 .DWordLength = 0, \ 5766 ._3DCommandSubOpcode = 47, \ 5767 ._3DCommandOpcode = 0, \ 5768 .CommandSubType = 3, \ 5769 .CommandType = 3 5770 5771struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS { 5772 uint32_t DWordLength; 5773 uint32_t _3DCommandSubOpcode; 5774 uint32_t _3DCommandOpcode; 5775 uint32_t CommandSubType; 5776 uint32_t CommandType; 5777 uint64_t PointertoPSSamplerState; 5778}; 5779 5780static inline void 5781GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_pack(__attribute__((unused)) __gen_user_data *data, 5782 __attribute__((unused)) void * restrict dst, 5783 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS * restrict values) 5784{ 5785 uint32_t * restrict dw = (uint32_t * restrict) dst; 5786 5787 dw[0] = 5788 __gen_uint(values->DWordLength, 0, 7) | 5789 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5790 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5791 __gen_uint(values->CommandSubType, 27, 28) | 5792 __gen_uint(values->CommandType, 29, 31); 5793 5794 dw[1] = 5795 __gen_offset(values->PointertoPSSamplerState, 5, 31); 5796} 5797 5798#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2 5799#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_length_bias 2 5800#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_header\ 5801 .DWordLength = 0, \ 5802 ._3DCommandSubOpcode = 43, \ 5803 ._3DCommandOpcode = 0, \ 5804 .CommandSubType = 3, \ 5805 .CommandType = 3 5806 5807struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS { 5808 uint32_t DWordLength; 5809 uint32_t _3DCommandSubOpcode; 5810 uint32_t _3DCommandOpcode; 5811 uint32_t CommandSubType; 5812 uint32_t CommandType; 5813 uint64_t PointertoVSSamplerState; 5814}; 5815 5816static inline void 5817GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_pack(__attribute__((unused)) __gen_user_data *data, 5818 __attribute__((unused)) void * restrict dst, 5819 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS * restrict values) 5820{ 5821 uint32_t * restrict dw = (uint32_t * restrict) dst; 5822 5823 dw[0] = 5824 __gen_uint(values->DWordLength, 0, 7) | 5825 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5826 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5827 __gen_uint(values->CommandSubType, 27, 28) | 5828 __gen_uint(values->CommandType, 29, 31); 5829 5830 dw[1] = 5831 __gen_offset(values->PointertoVSSamplerState, 5, 31); 5832} 5833 5834#define GEN10_3DSTATE_SAMPLE_MASK_length 2 5835#define GEN10_3DSTATE_SAMPLE_MASK_length_bias 2 5836#define GEN10_3DSTATE_SAMPLE_MASK_header \ 5837 .DWordLength = 0, \ 5838 ._3DCommandSubOpcode = 24, \ 5839 ._3DCommandOpcode = 0, \ 5840 .CommandSubType = 3, \ 5841 .CommandType = 3 5842 5843struct GEN10_3DSTATE_SAMPLE_MASK { 5844 uint32_t DWordLength; 5845 uint32_t _3DCommandSubOpcode; 5846 uint32_t _3DCommandOpcode; 5847 uint32_t CommandSubType; 5848 uint32_t CommandType; 5849 uint32_t SampleMask; 5850}; 5851 5852static inline void 5853GEN10_3DSTATE_SAMPLE_MASK_pack(__attribute__((unused)) __gen_user_data *data, 5854 __attribute__((unused)) void * restrict dst, 5855 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLE_MASK * restrict values) 5856{ 5857 uint32_t * restrict dw = (uint32_t * restrict) dst; 5858 5859 dw[0] = 5860 __gen_uint(values->DWordLength, 0, 7) | 5861 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5862 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5863 __gen_uint(values->CommandSubType, 27, 28) | 5864 __gen_uint(values->CommandType, 29, 31); 5865 5866 dw[1] = 5867 __gen_uint(values->SampleMask, 0, 15); 5868} 5869 5870#define GEN10_3DSTATE_SAMPLE_PATTERN_length 9 5871#define GEN10_3DSTATE_SAMPLE_PATTERN_length_bias 2 5872#define GEN10_3DSTATE_SAMPLE_PATTERN_header \ 5873 .DWordLength = 7, \ 5874 ._3DCommandSubOpcode = 28, \ 5875 ._3DCommandOpcode = 1, \ 5876 .CommandSubType = 3, \ 5877 .CommandType = 3 5878 5879struct GEN10_3DSTATE_SAMPLE_PATTERN { 5880 uint32_t DWordLength; 5881 uint32_t _3DCommandSubOpcode; 5882 uint32_t _3DCommandOpcode; 5883 uint32_t CommandSubType; 5884 uint32_t CommandType; 5885 float _16xSample0YOffset; 5886 float _16xSample0XOffset; 5887 float _16xSample1YOffset; 5888 float _16xSample1XOffset; 5889 float _16xSample2YOffset; 5890 float _16xSample2XOffset; 5891 float _16xSample3YOffset; 5892 float _16xSample3XOffset; 5893 float _16xSample4YOffset; 5894 float _16xSample4XOffset; 5895 float _16xSample5YOffset; 5896 float _16xSample5XOffset; 5897 float _16xSample6YOffset; 5898 float _16xSample6XOffset; 5899 float _16xSample7YOffset; 5900 float _16xSample7XOffset; 5901 float _16xSample8YOffset; 5902 float _16xSample8XOffset; 5903 float _16xSample9YOffset; 5904 float _16xSample9XOffset; 5905 float _16xSample10YOffset; 5906 float _16xSample10XOffset; 5907 float _16xSample11YOffset; 5908 float _16xSample11XOffset; 5909 float _16xSample12YOffset; 5910 float _16xSample12XOffset; 5911 float _16xSample13YOffset; 5912 float _16xSample13XOffset; 5913 float _16xSample14YOffset; 5914 float _16xSample14XOffset; 5915 float _16xSample15YOffset; 5916 float _16xSample15XOffset; 5917 float _8xSample4YOffset; 5918 float _8xSample4XOffset; 5919 float _8xSample5YOffset; 5920 float _8xSample5XOffset; 5921 float _8xSample6YOffset; 5922 float _8xSample6XOffset; 5923 float _8xSample7YOffset; 5924 float _8xSample7XOffset; 5925 float _8xSample0YOffset; 5926 float _8xSample0XOffset; 5927 float _8xSample1YOffset; 5928 float _8xSample1XOffset; 5929 float _8xSample2YOffset; 5930 float _8xSample2XOffset; 5931 float _8xSample3YOffset; 5932 float _8xSample3XOffset; 5933 float _4xSample0YOffset; 5934 float _4xSample0XOffset; 5935 float _4xSample1YOffset; 5936 float _4xSample1XOffset; 5937 float _4xSample2YOffset; 5938 float _4xSample2XOffset; 5939 float _4xSample3YOffset; 5940 float _4xSample3XOffset; 5941 float _2xSample0YOffset; 5942 float _2xSample0XOffset; 5943 float _2xSample1YOffset; 5944 float _2xSample1XOffset; 5945 float _1xSample0YOffset; 5946 float _1xSample0XOffset; 5947}; 5948 5949static inline void 5950GEN10_3DSTATE_SAMPLE_PATTERN_pack(__attribute__((unused)) __gen_user_data *data, 5951 __attribute__((unused)) void * restrict dst, 5952 __attribute__((unused)) const struct GEN10_3DSTATE_SAMPLE_PATTERN * restrict values) 5953{ 5954 uint32_t * restrict dw = (uint32_t * restrict) dst; 5955 5956 dw[0] = 5957 __gen_uint(values->DWordLength, 0, 7) | 5958 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 5959 __gen_uint(values->_3DCommandOpcode, 24, 26) | 5960 __gen_uint(values->CommandSubType, 27, 28) | 5961 __gen_uint(values->CommandType, 29, 31); 5962 5963 dw[1] = 5964 __gen_ufixed(values->_16xSample0YOffset, 0, 3, 4) | 5965 __gen_ufixed(values->_16xSample0XOffset, 4, 7, 4) | 5966 __gen_ufixed(values->_16xSample1YOffset, 8, 11, 4) | 5967 __gen_ufixed(values->_16xSample1XOffset, 12, 15, 4) | 5968 __gen_ufixed(values->_16xSample2YOffset, 16, 19, 4) | 5969 __gen_ufixed(values->_16xSample2XOffset, 20, 23, 4) | 5970 __gen_ufixed(values->_16xSample3YOffset, 24, 27, 4) | 5971 __gen_ufixed(values->_16xSample3XOffset, 28, 31, 4); 5972 5973 dw[2] = 5974 __gen_ufixed(values->_16xSample4YOffset, 0, 3, 4) | 5975 __gen_ufixed(values->_16xSample4XOffset, 4, 7, 4) | 5976 __gen_ufixed(values->_16xSample5YOffset, 8, 11, 4) | 5977 __gen_ufixed(values->_16xSample5XOffset, 12, 15, 4) | 5978 __gen_ufixed(values->_16xSample6YOffset, 16, 19, 4) | 5979 __gen_ufixed(values->_16xSample6XOffset, 20, 23, 4) | 5980 __gen_ufixed(values->_16xSample7YOffset, 24, 27, 4) | 5981 __gen_ufixed(values->_16xSample7XOffset, 28, 31, 4); 5982 5983 dw[3] = 5984 __gen_ufixed(values->_16xSample8YOffset, 0, 3, 4) | 5985 __gen_ufixed(values->_16xSample8XOffset, 4, 7, 4) | 5986 __gen_ufixed(values->_16xSample9YOffset, 8, 11, 4) | 5987 __gen_ufixed(values->_16xSample9XOffset, 12, 15, 4) | 5988 __gen_ufixed(values->_16xSample10YOffset, 16, 19, 4) | 5989 __gen_ufixed(values->_16xSample10XOffset, 20, 23, 4) | 5990 __gen_ufixed(values->_16xSample11YOffset, 24, 27, 4) | 5991 __gen_ufixed(values->_16xSample11XOffset, 28, 31, 4); 5992 5993 dw[4] = 5994 __gen_ufixed(values->_16xSample12YOffset, 0, 3, 4) | 5995 __gen_ufixed(values->_16xSample12XOffset, 4, 7, 4) | 5996 __gen_ufixed(values->_16xSample13YOffset, 8, 11, 4) | 5997 __gen_ufixed(values->_16xSample13XOffset, 12, 15, 4) | 5998 __gen_ufixed(values->_16xSample14YOffset, 16, 19, 4) | 5999 __gen_ufixed(values->_16xSample14XOffset, 20, 23, 4) | 6000 __gen_ufixed(values->_16xSample15YOffset, 24, 27, 4) | 6001 __gen_ufixed(values->_16xSample15XOffset, 28, 31, 4); 6002 6003 dw[5] = 6004 __gen_ufixed(values->_8xSample4YOffset, 0, 3, 4) | 6005 __gen_ufixed(values->_8xSample4XOffset, 4, 7, 4) | 6006 __gen_ufixed(values->_8xSample5YOffset, 8, 11, 4) | 6007 __gen_ufixed(values->_8xSample5XOffset, 12, 15, 4) | 6008 __gen_ufixed(values->_8xSample6YOffset, 16, 19, 4) | 6009 __gen_ufixed(values->_8xSample6XOffset, 20, 23, 4) | 6010 __gen_ufixed(values->_8xSample7YOffset, 24, 27, 4) | 6011 __gen_ufixed(values->_8xSample7XOffset, 28, 31, 4); 6012 6013 dw[6] = 6014 __gen_ufixed(values->_8xSample0YOffset, 0, 3, 4) | 6015 __gen_ufixed(values->_8xSample0XOffset, 4, 7, 4) | 6016 __gen_ufixed(values->_8xSample1YOffset, 8, 11, 4) | 6017 __gen_ufixed(values->_8xSample1XOffset, 12, 15, 4) | 6018 __gen_ufixed(values->_8xSample2YOffset, 16, 19, 4) | 6019 __gen_ufixed(values->_8xSample2XOffset, 20, 23, 4) | 6020 __gen_ufixed(values->_8xSample3YOffset, 24, 27, 4) | 6021 __gen_ufixed(values->_8xSample3XOffset, 28, 31, 4); 6022 6023 dw[7] = 6024 __gen_ufixed(values->_4xSample0YOffset, 0, 3, 4) | 6025 __gen_ufixed(values->_4xSample0XOffset, 4, 7, 4) | 6026 __gen_ufixed(values->_4xSample1YOffset, 8, 11, 4) | 6027 __gen_ufixed(values->_4xSample1XOffset, 12, 15, 4) | 6028 __gen_ufixed(values->_4xSample2YOffset, 16, 19, 4) | 6029 __gen_ufixed(values->_4xSample2XOffset, 20, 23, 4) | 6030 __gen_ufixed(values->_4xSample3YOffset, 24, 27, 4) | 6031 __gen_ufixed(values->_4xSample3XOffset, 28, 31, 4); 6032 6033 dw[8] = 6034 __gen_ufixed(values->_2xSample0YOffset, 0, 3, 4) | 6035 __gen_ufixed(values->_2xSample0XOffset, 4, 7, 4) | 6036 __gen_ufixed(values->_2xSample1YOffset, 8, 11, 4) | 6037 __gen_ufixed(values->_2xSample1XOffset, 12, 15, 4) | 6038 __gen_ufixed(values->_1xSample0YOffset, 16, 19, 4) | 6039 __gen_ufixed(values->_1xSample0XOffset, 20, 23, 4); 6040} 6041 6042#define GEN10_3DSTATE_SBE_length 6 6043#define GEN10_3DSTATE_SBE_length_bias 2 6044#define GEN10_3DSTATE_SBE_header \ 6045 .DWordLength = 4, \ 6046 ._3DCommandSubOpcode = 31, \ 6047 ._3DCommandOpcode = 0, \ 6048 .CommandSubType = 3, \ 6049 .CommandType = 3 6050 6051struct GEN10_3DSTATE_SBE { 6052 uint32_t DWordLength; 6053 uint32_t _3DCommandSubOpcode; 6054 uint32_t _3DCommandOpcode; 6055 uint32_t CommandSubType; 6056 uint32_t CommandType; 6057 uint32_t PrimitiveIDOverrideAttributeSelect; 6058 uint32_t VertexURBEntryReadOffset; 6059 uint32_t VertexURBEntryReadLength; 6060 bool PrimitiveIDOverrideComponentX; 6061 bool PrimitiveIDOverrideComponentY; 6062 bool PrimitiveIDOverrideComponentZ; 6063 bool PrimitiveIDOverrideComponentW; 6064 uint32_t PointSpriteTextureCoordinateOrigin; 6065#define UPPERLEFT 0 6066#define LOWERLEFT 1 6067 bool AttributeSwizzleEnable; 6068 uint32_t NumberofSFOutputAttributes; 6069 bool ForceVertexURBEntryReadOffset; 6070 bool ForceVertexURBEntryReadLength; 6071 uint32_t PointSpriteTextureCoordinateEnable; 6072 uint32_t ConstantInterpolationEnable; 6073 uint32_t AttributeActiveComponentFormat[32]; 6074#define ACTIVE_COMPONENT_DISABLED 0 6075#define ACTIVE_COMPONENT_XY 1 6076#define ACTIVE_COMPONENT_XYZ 2 6077#define ACTIVE_COMPONENT_XYZW 3 6078}; 6079 6080static inline void 6081GEN10_3DSTATE_SBE_pack(__attribute__((unused)) __gen_user_data *data, 6082 __attribute__((unused)) void * restrict dst, 6083 __attribute__((unused)) const struct GEN10_3DSTATE_SBE * restrict values) 6084{ 6085 uint32_t * restrict dw = (uint32_t * restrict) dst; 6086 6087 dw[0] = 6088 __gen_uint(values->DWordLength, 0, 7) | 6089 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6090 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6091 __gen_uint(values->CommandSubType, 27, 28) | 6092 __gen_uint(values->CommandType, 29, 31); 6093 6094 dw[1] = 6095 __gen_uint(values->PrimitiveIDOverrideAttributeSelect, 0, 4) | 6096 __gen_uint(values->VertexURBEntryReadOffset, 5, 10) | 6097 __gen_uint(values->VertexURBEntryReadLength, 11, 15) | 6098 __gen_uint(values->PrimitiveIDOverrideComponentX, 16, 16) | 6099 __gen_uint(values->PrimitiveIDOverrideComponentY, 17, 17) | 6100 __gen_uint(values->PrimitiveIDOverrideComponentZ, 18, 18) | 6101 __gen_uint(values->PrimitiveIDOverrideComponentW, 19, 19) | 6102 __gen_uint(values->PointSpriteTextureCoordinateOrigin, 20, 20) | 6103 __gen_uint(values->AttributeSwizzleEnable, 21, 21) | 6104 __gen_uint(values->NumberofSFOutputAttributes, 22, 27) | 6105 __gen_uint(values->ForceVertexURBEntryReadOffset, 28, 28) | 6106 __gen_uint(values->ForceVertexURBEntryReadLength, 29, 29); 6107 6108 dw[2] = 6109 __gen_uint(values->PointSpriteTextureCoordinateEnable, 0, 31); 6110 6111 dw[3] = 6112 __gen_uint(values->ConstantInterpolationEnable, 0, 31); 6113 6114 dw[4] = 6115 __gen_uint(values->AttributeActiveComponentFormat[0], 0, 1) | 6116 __gen_uint(values->AttributeActiveComponentFormat[1], 2, 3) | 6117 __gen_uint(values->AttributeActiveComponentFormat[2], 4, 5) | 6118 __gen_uint(values->AttributeActiveComponentFormat[3], 6, 7) | 6119 __gen_uint(values->AttributeActiveComponentFormat[4], 8, 9) | 6120 __gen_uint(values->AttributeActiveComponentFormat[5], 10, 11) | 6121 __gen_uint(values->AttributeActiveComponentFormat[6], 12, 13) | 6122 __gen_uint(values->AttributeActiveComponentFormat[7], 14, 15) | 6123 __gen_uint(values->AttributeActiveComponentFormat[8], 16, 17) | 6124 __gen_uint(values->AttributeActiveComponentFormat[9], 18, 19) | 6125 __gen_uint(values->AttributeActiveComponentFormat[10], 20, 21) | 6126 __gen_uint(values->AttributeActiveComponentFormat[11], 22, 23) | 6127 __gen_uint(values->AttributeActiveComponentFormat[12], 24, 25) | 6128 __gen_uint(values->AttributeActiveComponentFormat[13], 26, 27) | 6129 __gen_uint(values->AttributeActiveComponentFormat[14], 28, 29) | 6130 __gen_uint(values->AttributeActiveComponentFormat[15], 30, 31); 6131 6132 dw[5] = 6133 __gen_uint(values->AttributeActiveComponentFormat[16], 0, 1) | 6134 __gen_uint(values->AttributeActiveComponentFormat[17], 2, 3) | 6135 __gen_uint(values->AttributeActiveComponentFormat[18], 4, 5) | 6136 __gen_uint(values->AttributeActiveComponentFormat[19], 6, 7) | 6137 __gen_uint(values->AttributeActiveComponentFormat[20], 8, 9) | 6138 __gen_uint(values->AttributeActiveComponentFormat[21], 10, 11) | 6139 __gen_uint(values->AttributeActiveComponentFormat[22], 12, 13) | 6140 __gen_uint(values->AttributeActiveComponentFormat[23], 14, 15) | 6141 __gen_uint(values->AttributeActiveComponentFormat[24], 16, 17) | 6142 __gen_uint(values->AttributeActiveComponentFormat[25], 18, 19) | 6143 __gen_uint(values->AttributeActiveComponentFormat[26], 20, 21) | 6144 __gen_uint(values->AttributeActiveComponentFormat[27], 22, 23) | 6145 __gen_uint(values->AttributeActiveComponentFormat[28], 24, 25) | 6146 __gen_uint(values->AttributeActiveComponentFormat[29], 26, 27) | 6147 __gen_uint(values->AttributeActiveComponentFormat[30], 28, 29) | 6148 __gen_uint(values->AttributeActiveComponentFormat[31], 30, 31); 6149} 6150 6151#define GEN10_3DSTATE_SBE_SWIZ_length 11 6152#define GEN10_3DSTATE_SBE_SWIZ_length_bias 2 6153#define GEN10_3DSTATE_SBE_SWIZ_header \ 6154 .DWordLength = 9, \ 6155 ._3DCommandSubOpcode = 81, \ 6156 ._3DCommandOpcode = 0, \ 6157 .CommandSubType = 3, \ 6158 .CommandType = 3 6159 6160struct GEN10_3DSTATE_SBE_SWIZ { 6161 uint32_t DWordLength; 6162 uint32_t _3DCommandSubOpcode; 6163 uint32_t _3DCommandOpcode; 6164 uint32_t CommandSubType; 6165 uint32_t CommandType; 6166 struct GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL Attribute[16]; 6167 uint32_t AttributeWrapShortestEnables[16]; 6168}; 6169 6170static inline void 6171GEN10_3DSTATE_SBE_SWIZ_pack(__attribute__((unused)) __gen_user_data *data, 6172 __attribute__((unused)) void * restrict dst, 6173 __attribute__((unused)) const struct GEN10_3DSTATE_SBE_SWIZ * restrict values) 6174{ 6175 uint32_t * restrict dw = (uint32_t * restrict) dst; 6176 6177 dw[0] = 6178 __gen_uint(values->DWordLength, 0, 7) | 6179 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6180 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6181 __gen_uint(values->CommandSubType, 27, 28) | 6182 __gen_uint(values->CommandType, 29, 31); 6183 6184 uint32_t v1_0; 6185 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v1_0, &values->Attribute[0]); 6186 6187 uint32_t v1_1; 6188 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v1_1, &values->Attribute[1]); 6189 6190 dw[1] = 6191 __gen_uint(v1_0, 0, 15) | 6192 __gen_uint(v1_1, 16, 31); 6193 6194 uint32_t v2_0; 6195 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_0, &values->Attribute[2]); 6196 6197 uint32_t v2_1; 6198 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v2_1, &values->Attribute[3]); 6199 6200 dw[2] = 6201 __gen_uint(v2_0, 0, 15) | 6202 __gen_uint(v2_1, 16, 31); 6203 6204 uint32_t v3_0; 6205 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_0, &values->Attribute[4]); 6206 6207 uint32_t v3_1; 6208 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v3_1, &values->Attribute[5]); 6209 6210 dw[3] = 6211 __gen_uint(v3_0, 0, 15) | 6212 __gen_uint(v3_1, 16, 31); 6213 6214 uint32_t v4_0; 6215 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_0, &values->Attribute[6]); 6216 6217 uint32_t v4_1; 6218 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v4_1, &values->Attribute[7]); 6219 6220 dw[4] = 6221 __gen_uint(v4_0, 0, 15) | 6222 __gen_uint(v4_1, 16, 31); 6223 6224 uint32_t v5_0; 6225 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_0, &values->Attribute[8]); 6226 6227 uint32_t v5_1; 6228 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v5_1, &values->Attribute[9]); 6229 6230 dw[5] = 6231 __gen_uint(v5_0, 0, 15) | 6232 __gen_uint(v5_1, 16, 31); 6233 6234 uint32_t v6_0; 6235 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_0, &values->Attribute[10]); 6236 6237 uint32_t v6_1; 6238 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v6_1, &values->Attribute[11]); 6239 6240 dw[6] = 6241 __gen_uint(v6_0, 0, 15) | 6242 __gen_uint(v6_1, 16, 31); 6243 6244 uint32_t v7_0; 6245 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_0, &values->Attribute[12]); 6246 6247 uint32_t v7_1; 6248 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v7_1, &values->Attribute[13]); 6249 6250 dw[7] = 6251 __gen_uint(v7_0, 0, 15) | 6252 __gen_uint(v7_1, 16, 31); 6253 6254 uint32_t v8_0; 6255 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_0, &values->Attribute[14]); 6256 6257 uint32_t v8_1; 6258 GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_pack(data, &v8_1, &values->Attribute[15]); 6259 6260 dw[8] = 6261 __gen_uint(v8_0, 0, 15) | 6262 __gen_uint(v8_1, 16, 31); 6263 6264 dw[9] = 6265 __gen_uint(values->AttributeWrapShortestEnables[0], 0, 3) | 6266 __gen_uint(values->AttributeWrapShortestEnables[1], 4, 7) | 6267 __gen_uint(values->AttributeWrapShortestEnables[2], 8, 11) | 6268 __gen_uint(values->AttributeWrapShortestEnables[3], 12, 15) | 6269 __gen_uint(values->AttributeWrapShortestEnables[4], 16, 19) | 6270 __gen_uint(values->AttributeWrapShortestEnables[5], 20, 23) | 6271 __gen_uint(values->AttributeWrapShortestEnables[6], 24, 27) | 6272 __gen_uint(values->AttributeWrapShortestEnables[7], 28, 31); 6273 6274 dw[10] = 6275 __gen_uint(values->AttributeWrapShortestEnables[8], 0, 3) | 6276 __gen_uint(values->AttributeWrapShortestEnables[9], 4, 7) | 6277 __gen_uint(values->AttributeWrapShortestEnables[10], 8, 11) | 6278 __gen_uint(values->AttributeWrapShortestEnables[11], 12, 15) | 6279 __gen_uint(values->AttributeWrapShortestEnables[12], 16, 19) | 6280 __gen_uint(values->AttributeWrapShortestEnables[13], 20, 23) | 6281 __gen_uint(values->AttributeWrapShortestEnables[14], 24, 27) | 6282 __gen_uint(values->AttributeWrapShortestEnables[15], 28, 31); 6283} 6284 6285#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_length 2 6286#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_length_bias 2 6287#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_header\ 6288 .DWordLength = 0, \ 6289 ._3DCommandSubOpcode = 15, \ 6290 ._3DCommandOpcode = 0, \ 6291 .CommandSubType = 3, \ 6292 .CommandType = 3 6293 6294struct GEN10_3DSTATE_SCISSOR_STATE_POINTERS { 6295 uint32_t DWordLength; 6296 uint32_t _3DCommandSubOpcode; 6297 uint32_t _3DCommandOpcode; 6298 uint32_t CommandSubType; 6299 uint32_t CommandType; 6300 uint64_t ScissorRectPointer; 6301}; 6302 6303static inline void 6304GEN10_3DSTATE_SCISSOR_STATE_POINTERS_pack(__attribute__((unused)) __gen_user_data *data, 6305 __attribute__((unused)) void * restrict dst, 6306 __attribute__((unused)) const struct GEN10_3DSTATE_SCISSOR_STATE_POINTERS * restrict values) 6307{ 6308 uint32_t * restrict dw = (uint32_t * restrict) dst; 6309 6310 dw[0] = 6311 __gen_uint(values->DWordLength, 0, 7) | 6312 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6313 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6314 __gen_uint(values->CommandSubType, 27, 28) | 6315 __gen_uint(values->CommandType, 29, 31); 6316 6317 dw[1] = 6318 __gen_offset(values->ScissorRectPointer, 5, 31); 6319} 6320 6321#define GEN10_3DSTATE_SF_length 4 6322#define GEN10_3DSTATE_SF_length_bias 2 6323#define GEN10_3DSTATE_SF_header \ 6324 .DWordLength = 2, \ 6325 ._3DCommandSubOpcode = 19, \ 6326 ._3DCommandOpcode = 0, \ 6327 .CommandSubType = 3, \ 6328 .CommandType = 3 6329 6330struct GEN10_3DSTATE_SF { 6331 uint32_t DWordLength; 6332 uint32_t _3DCommandSubOpcode; 6333 uint32_t _3DCommandOpcode; 6334 uint32_t CommandSubType; 6335 uint32_t CommandType; 6336 bool ViewportTransformEnable; 6337 bool StatisticsEnable; 6338 bool LegacyGlobalDepthBiasEnable; 6339 float LineWidth; 6340 uint32_t LineEndCapAntialiasingRegionWidth; 6341#define _05pixels 0 6342#define _10pixels 1 6343#define _20pixels 2 6344#define _40pixels 3 6345 float PointWidth; 6346 uint32_t PointWidthSource; 6347#define Vertex 0 6348#define State 1 6349 uint32_t VertexSubPixelPrecisionSelect; 6350#define _8Bit 0 6351#define _4Bit 1 6352 bool SmoothPointEnable; 6353 uint32_t AALineDistanceMode; 6354#define AALINEDISTANCE_TRUE 1 6355 uint32_t TriangleFanProvokingVertexSelect; 6356 uint32_t LineStripListProvokingVertexSelect; 6357 uint32_t TriangleStripListProvokingVertexSelect; 6358 bool LastPixelEnable; 6359}; 6360 6361static inline void 6362GEN10_3DSTATE_SF_pack(__attribute__((unused)) __gen_user_data *data, 6363 __attribute__((unused)) void * restrict dst, 6364 __attribute__((unused)) const struct GEN10_3DSTATE_SF * restrict values) 6365{ 6366 uint32_t * restrict dw = (uint32_t * restrict) dst; 6367 6368 dw[0] = 6369 __gen_uint(values->DWordLength, 0, 7) | 6370 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6371 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6372 __gen_uint(values->CommandSubType, 27, 28) | 6373 __gen_uint(values->CommandType, 29, 31); 6374 6375 dw[1] = 6376 __gen_uint(values->ViewportTransformEnable, 1, 1) | 6377 __gen_uint(values->StatisticsEnable, 10, 10) | 6378 __gen_uint(values->LegacyGlobalDepthBiasEnable, 11, 11) | 6379 __gen_ufixed(values->LineWidth, 12, 29, 7); 6380 6381 dw[2] = 6382 __gen_uint(values->LineEndCapAntialiasingRegionWidth, 16, 17); 6383 6384 dw[3] = 6385 __gen_ufixed(values->PointWidth, 0, 10, 3) | 6386 __gen_uint(values->PointWidthSource, 11, 11) | 6387 __gen_uint(values->VertexSubPixelPrecisionSelect, 12, 12) | 6388 __gen_uint(values->SmoothPointEnable, 13, 13) | 6389 __gen_uint(values->AALineDistanceMode, 14, 14) | 6390 __gen_uint(values->TriangleFanProvokingVertexSelect, 25, 26) | 6391 __gen_uint(values->LineStripListProvokingVertexSelect, 27, 28) | 6392 __gen_uint(values->TriangleStripListProvokingVertexSelect, 29, 30) | 6393 __gen_uint(values->LastPixelEnable, 31, 31); 6394} 6395 6396#define GEN10_3DSTATE_SO_BUFFER_length 8 6397#define GEN10_3DSTATE_SO_BUFFER_length_bias 2 6398#define GEN10_3DSTATE_SO_BUFFER_header \ 6399 .DWordLength = 6, \ 6400 ._3DCommandSubOpcode = 24, \ 6401 ._3DCommandOpcode = 1, \ 6402 .CommandSubType = 3, \ 6403 .CommandType = 3 6404 6405struct GEN10_3DSTATE_SO_BUFFER { 6406 uint32_t DWordLength; 6407 uint32_t _3DCommandSubOpcode; 6408 uint32_t _3DCommandOpcode; 6409 uint32_t CommandSubType; 6410 uint32_t CommandType; 6411 bool StreamOutputBufferOffsetAddressEnable; 6412 bool StreamOffsetWriteEnable; 6413 uint32_t MOCS; 6414 uint32_t SOBufferIndex; 6415 bool SOBufferEnable; 6416 __gen_address_type SurfaceBaseAddress; 6417 uint32_t SurfaceSize; 6418 __gen_address_type StreamOutputBufferOffsetAddress; 6419 uint32_t StreamOffset; 6420}; 6421 6422static inline void 6423GEN10_3DSTATE_SO_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 6424 __attribute__((unused)) void * restrict dst, 6425 __attribute__((unused)) const struct GEN10_3DSTATE_SO_BUFFER * restrict values) 6426{ 6427 uint32_t * restrict dw = (uint32_t * restrict) dst; 6428 6429 dw[0] = 6430 __gen_uint(values->DWordLength, 0, 7) | 6431 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6432 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6433 __gen_uint(values->CommandSubType, 27, 28) | 6434 __gen_uint(values->CommandType, 29, 31); 6435 6436 dw[1] = 6437 __gen_uint(values->StreamOutputBufferOffsetAddressEnable, 20, 20) | 6438 __gen_uint(values->StreamOffsetWriteEnable, 21, 21) | 6439 __gen_uint(values->MOCS, 22, 28) | 6440 __gen_uint(values->SOBufferIndex, 29, 30) | 6441 __gen_uint(values->SOBufferEnable, 31, 31); 6442 6443 const uint64_t v2_address = 6444 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 6445 dw[2] = v2_address; 6446 dw[3] = v2_address >> 32; 6447 6448 dw[4] = 6449 __gen_uint(values->SurfaceSize, 0, 29); 6450 6451 const uint64_t v5_address = 6452 __gen_combine_address(data, &dw[5], values->StreamOutputBufferOffsetAddress, 0); 6453 dw[5] = v5_address; 6454 dw[6] = v5_address >> 32; 6455 6456 dw[7] = 6457 __gen_uint(values->StreamOffset, 0, 31); 6458} 6459 6460#define GEN10_3DSTATE_SO_DECL_LIST_length_bias 2 6461#define GEN10_3DSTATE_SO_DECL_LIST_header \ 6462 ._3DCommandSubOpcode = 23, \ 6463 ._3DCommandOpcode = 1, \ 6464 .CommandSubType = 3, \ 6465 .CommandType = 3 6466 6467struct GEN10_3DSTATE_SO_DECL_LIST { 6468 uint32_t DWordLength; 6469 uint32_t _3DCommandSubOpcode; 6470 uint32_t _3DCommandOpcode; 6471 uint32_t CommandSubType; 6472 uint32_t CommandType; 6473 uint32_t StreamtoBufferSelects0; 6474 uint32_t StreamtoBufferSelects1; 6475 uint32_t StreamtoBufferSelects2; 6476 uint32_t StreamtoBufferSelects3; 6477 uint32_t NumEntries0; 6478 uint32_t NumEntries1; 6479 uint32_t NumEntries2; 6480 uint32_t NumEntries3; 6481 /* variable length fields follow */ 6482}; 6483 6484static inline void 6485GEN10_3DSTATE_SO_DECL_LIST_pack(__attribute__((unused)) __gen_user_data *data, 6486 __attribute__((unused)) void * restrict dst, 6487 __attribute__((unused)) const struct GEN10_3DSTATE_SO_DECL_LIST * restrict values) 6488{ 6489 uint32_t * restrict dw = (uint32_t * restrict) dst; 6490 6491 dw[0] = 6492 __gen_uint(values->DWordLength, 0, 8) | 6493 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6494 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6495 __gen_uint(values->CommandSubType, 27, 28) | 6496 __gen_uint(values->CommandType, 29, 31); 6497 6498 dw[1] = 6499 __gen_uint(values->StreamtoBufferSelects0, 0, 3) | 6500 __gen_uint(values->StreamtoBufferSelects1, 4, 7) | 6501 __gen_uint(values->StreamtoBufferSelects2, 8, 11) | 6502 __gen_uint(values->StreamtoBufferSelects3, 12, 15); 6503 6504 dw[2] = 6505 __gen_uint(values->NumEntries0, 0, 7) | 6506 __gen_uint(values->NumEntries1, 8, 15) | 6507 __gen_uint(values->NumEntries2, 16, 23) | 6508 __gen_uint(values->NumEntries3, 24, 31); 6509} 6510 6511#define GEN10_3DSTATE_STENCIL_BUFFER_length 5 6512#define GEN10_3DSTATE_STENCIL_BUFFER_length_bias 2 6513#define GEN10_3DSTATE_STENCIL_BUFFER_header \ 6514 .DWordLength = 3, \ 6515 ._3DCommandSubOpcode = 6, \ 6516 ._3DCommandOpcode = 0, \ 6517 .CommandSubType = 3, \ 6518 .CommandType = 3 6519 6520struct GEN10_3DSTATE_STENCIL_BUFFER { 6521 uint32_t DWordLength; 6522 uint32_t _3DCommandSubOpcode; 6523 uint32_t _3DCommandOpcode; 6524 uint32_t CommandSubType; 6525 uint32_t CommandType; 6526 uint32_t SurfacePitch; 6527 uint32_t MOCS; 6528 bool StencilBufferEnable; 6529 __gen_address_type SurfaceBaseAddress; 6530 uint32_t SurfaceQPitch; 6531}; 6532 6533static inline void 6534GEN10_3DSTATE_STENCIL_BUFFER_pack(__attribute__((unused)) __gen_user_data *data, 6535 __attribute__((unused)) void * restrict dst, 6536 __attribute__((unused)) const struct GEN10_3DSTATE_STENCIL_BUFFER * restrict values) 6537{ 6538 uint32_t * restrict dw = (uint32_t * restrict) dst; 6539 6540 dw[0] = 6541 __gen_uint(values->DWordLength, 0, 7) | 6542 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6543 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6544 __gen_uint(values->CommandSubType, 27, 28) | 6545 __gen_uint(values->CommandType, 29, 31); 6546 6547 dw[1] = 6548 __gen_uint(values->SurfacePitch, 0, 16) | 6549 __gen_uint(values->MOCS, 22, 28) | 6550 __gen_uint(values->StencilBufferEnable, 31, 31); 6551 6552 const uint64_t v2_address = 6553 __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); 6554 dw[2] = v2_address; 6555 dw[3] = v2_address >> 32; 6556 6557 dw[4] = 6558 __gen_uint(values->SurfaceQPitch, 0, 14); 6559} 6560 6561#define GEN10_3DSTATE_STREAMOUT_length 5 6562#define GEN10_3DSTATE_STREAMOUT_length_bias 2 6563#define GEN10_3DSTATE_STREAMOUT_header \ 6564 .DWordLength = 3, \ 6565 ._3DCommandSubOpcode = 30, \ 6566 ._3DCommandOpcode = 0, \ 6567 .CommandSubType = 3, \ 6568 .CommandType = 3 6569 6570struct GEN10_3DSTATE_STREAMOUT { 6571 uint32_t DWordLength; 6572 uint32_t _3DCommandSubOpcode; 6573 uint32_t _3DCommandOpcode; 6574 uint32_t CommandSubType; 6575 uint32_t CommandType; 6576 uint32_t ForceRendering; 6577#define Resreved 1 6578#define Force_Off 2 6579#define Force_on 3 6580 bool SOStatisticsEnable; 6581 uint32_t ReorderMode; 6582#define LEADING 0 6583#define TRAILING 1 6584 uint32_t RenderStreamSelect; 6585 bool RenderingDisable; 6586 bool SOFunctionEnable; 6587 uint32_t Stream0VertexReadLength; 6588 uint32_t Stream0VertexReadOffset; 6589 uint32_t Stream1VertexReadLength; 6590 uint32_t Stream1VertexReadOffset; 6591 uint32_t Stream2VertexReadLength; 6592 uint32_t Stream2VertexReadOffset; 6593 uint32_t Stream3VertexReadLength; 6594 uint32_t Stream3VertexReadOffset; 6595 uint32_t Buffer0SurfacePitch; 6596 uint32_t Buffer1SurfacePitch; 6597 uint32_t Buffer2SurfacePitch; 6598 uint32_t Buffer3SurfacePitch; 6599}; 6600 6601static inline void 6602GEN10_3DSTATE_STREAMOUT_pack(__attribute__((unused)) __gen_user_data *data, 6603 __attribute__((unused)) void * restrict dst, 6604 __attribute__((unused)) const struct GEN10_3DSTATE_STREAMOUT * restrict values) 6605{ 6606 uint32_t * restrict dw = (uint32_t * restrict) dst; 6607 6608 dw[0] = 6609 __gen_uint(values->DWordLength, 0, 7) | 6610 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6611 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6612 __gen_uint(values->CommandSubType, 27, 28) | 6613 __gen_uint(values->CommandType, 29, 31); 6614 6615 dw[1] = 6616 __gen_uint(values->ForceRendering, 23, 24) | 6617 __gen_uint(values->SOStatisticsEnable, 25, 25) | 6618 __gen_uint(values->ReorderMode, 26, 26) | 6619 __gen_uint(values->RenderStreamSelect, 27, 28) | 6620 __gen_uint(values->RenderingDisable, 30, 30) | 6621 __gen_uint(values->SOFunctionEnable, 31, 31); 6622 6623 dw[2] = 6624 __gen_uint(values->Stream0VertexReadLength, 0, 4) | 6625 __gen_uint(values->Stream0VertexReadOffset, 5, 5) | 6626 __gen_uint(values->Stream1VertexReadLength, 8, 12) | 6627 __gen_uint(values->Stream1VertexReadOffset, 13, 13) | 6628 __gen_uint(values->Stream2VertexReadLength, 16, 20) | 6629 __gen_uint(values->Stream2VertexReadOffset, 21, 21) | 6630 __gen_uint(values->Stream3VertexReadLength, 24, 28) | 6631 __gen_uint(values->Stream3VertexReadOffset, 29, 29); 6632 6633 dw[3] = 6634 __gen_uint(values->Buffer0SurfacePitch, 0, 11) | 6635 __gen_uint(values->Buffer1SurfacePitch, 16, 27); 6636 6637 dw[4] = 6638 __gen_uint(values->Buffer2SurfacePitch, 0, 11) | 6639 __gen_uint(values->Buffer3SurfacePitch, 16, 27); 6640} 6641 6642#define GEN10_3DSTATE_TE_length 4 6643#define GEN10_3DSTATE_TE_length_bias 2 6644#define GEN10_3DSTATE_TE_header \ 6645 .DWordLength = 2, \ 6646 ._3DCommandSubOpcode = 28, \ 6647 ._3DCommandOpcode = 0, \ 6648 .CommandSubType = 3, \ 6649 .CommandType = 3 6650 6651struct GEN10_3DSTATE_TE { 6652 uint32_t DWordLength; 6653 uint32_t _3DCommandSubOpcode; 6654 uint32_t _3DCommandOpcode; 6655 uint32_t CommandSubType; 6656 uint32_t CommandType; 6657 bool TEEnable; 6658 uint32_t TEMode; 6659#define HW_TESS 0 6660 uint32_t TEDomain; 6661#define QUAD 0 6662#define TRI 1 6663#define ISOLINE 2 6664 uint32_t OutputTopology; 6665#define OUTPUT_POINT 0 6666#define OUTPUT_LINE 1 6667#define OUTPUT_TRI_CW 2 6668#define OUTPUT_TRI_CCW 3 6669 uint32_t Partitioning; 6670#define INTEGER 0 6671#define ODD_FRACTIONAL 1 6672#define EVEN_FRACTIONAL 2 6673 float MaximumTessellationFactorOdd; 6674 float MaximumTessellationFactorNotOdd; 6675}; 6676 6677static inline void 6678GEN10_3DSTATE_TE_pack(__attribute__((unused)) __gen_user_data *data, 6679 __attribute__((unused)) void * restrict dst, 6680 __attribute__((unused)) const struct GEN10_3DSTATE_TE * restrict values) 6681{ 6682 uint32_t * restrict dw = (uint32_t * restrict) dst; 6683 6684 dw[0] = 6685 __gen_uint(values->DWordLength, 0, 7) | 6686 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6687 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6688 __gen_uint(values->CommandSubType, 27, 28) | 6689 __gen_uint(values->CommandType, 29, 31); 6690 6691 dw[1] = 6692 __gen_uint(values->TEEnable, 0, 0) | 6693 __gen_uint(values->TEMode, 1, 2) | 6694 __gen_uint(values->TEDomain, 4, 5) | 6695 __gen_uint(values->OutputTopology, 8, 9) | 6696 __gen_uint(values->Partitioning, 12, 13); 6697 6698 dw[2] = 6699 __gen_float(values->MaximumTessellationFactorOdd); 6700 6701 dw[3] = 6702 __gen_float(values->MaximumTessellationFactorNotOdd); 6703} 6704 6705#define GEN10_3DSTATE_URB_CLEAR_length 2 6706#define GEN10_3DSTATE_URB_CLEAR_length_bias 2 6707#define GEN10_3DSTATE_URB_CLEAR_header \ 6708 .DWordLength = 0, \ 6709 ._3DCommandSubOpcode = 29, \ 6710 ._3DCommandOpcode = 1, \ 6711 .CommandSubType = 3, \ 6712 .CommandType = 3 6713 6714struct GEN10_3DSTATE_URB_CLEAR { 6715 uint32_t DWordLength; 6716 uint32_t _3DCommandSubOpcode; 6717 uint32_t _3DCommandOpcode; 6718 uint32_t CommandSubType; 6719 uint32_t CommandType; 6720 uint64_t URBAddress; 6721 uint32_t URBClearLength; 6722}; 6723 6724static inline void 6725GEN10_3DSTATE_URB_CLEAR_pack(__attribute__((unused)) __gen_user_data *data, 6726 __attribute__((unused)) void * restrict dst, 6727 __attribute__((unused)) const struct GEN10_3DSTATE_URB_CLEAR * restrict values) 6728{ 6729 uint32_t * restrict dw = (uint32_t * restrict) dst; 6730 6731 dw[0] = 6732 __gen_uint(values->DWordLength, 0, 7) | 6733 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6734 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6735 __gen_uint(values->CommandSubType, 27, 28) | 6736 __gen_uint(values->CommandType, 29, 31); 6737 6738 dw[1] = 6739 __gen_offset(values->URBAddress, 0, 14) | 6740 __gen_uint(values->URBClearLength, 16, 29); 6741} 6742 6743#define GEN10_3DSTATE_URB_DS_length 2 6744#define GEN10_3DSTATE_URB_DS_length_bias 2 6745#define GEN10_3DSTATE_URB_DS_header \ 6746 .DWordLength = 0, \ 6747 ._3DCommandSubOpcode = 50, \ 6748 ._3DCommandOpcode = 0, \ 6749 .CommandSubType = 3, \ 6750 .CommandType = 3 6751 6752struct GEN10_3DSTATE_URB_DS { 6753 uint32_t DWordLength; 6754 uint32_t _3DCommandSubOpcode; 6755 uint32_t _3DCommandOpcode; 6756 uint32_t CommandSubType; 6757 uint32_t CommandType; 6758 uint32_t DSNumberofURBEntries; 6759 uint32_t DSURBEntryAllocationSize; 6760 uint32_t DSURBStartingAddress; 6761}; 6762 6763static inline void 6764GEN10_3DSTATE_URB_DS_pack(__attribute__((unused)) __gen_user_data *data, 6765 __attribute__((unused)) void * restrict dst, 6766 __attribute__((unused)) const struct GEN10_3DSTATE_URB_DS * restrict values) 6767{ 6768 uint32_t * restrict dw = (uint32_t * restrict) dst; 6769 6770 dw[0] = 6771 __gen_uint(values->DWordLength, 0, 7) | 6772 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6773 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6774 __gen_uint(values->CommandSubType, 27, 28) | 6775 __gen_uint(values->CommandType, 29, 31); 6776 6777 dw[1] = 6778 __gen_uint(values->DSNumberofURBEntries, 0, 15) | 6779 __gen_uint(values->DSURBEntryAllocationSize, 16, 24) | 6780 __gen_uint(values->DSURBStartingAddress, 25, 31); 6781} 6782 6783#define GEN10_3DSTATE_URB_GS_length 2 6784#define GEN10_3DSTATE_URB_GS_length_bias 2 6785#define GEN10_3DSTATE_URB_GS_header \ 6786 .DWordLength = 0, \ 6787 ._3DCommandSubOpcode = 51, \ 6788 ._3DCommandOpcode = 0, \ 6789 .CommandSubType = 3, \ 6790 .CommandType = 3 6791 6792struct GEN10_3DSTATE_URB_GS { 6793 uint32_t DWordLength; 6794 uint32_t _3DCommandSubOpcode; 6795 uint32_t _3DCommandOpcode; 6796 uint32_t CommandSubType; 6797 uint32_t CommandType; 6798 uint32_t GSNumberofURBEntries; 6799 uint32_t GSURBEntryAllocationSize; 6800 uint32_t GSURBStartingAddress; 6801}; 6802 6803static inline void 6804GEN10_3DSTATE_URB_GS_pack(__attribute__((unused)) __gen_user_data *data, 6805 __attribute__((unused)) void * restrict dst, 6806 __attribute__((unused)) const struct GEN10_3DSTATE_URB_GS * restrict values) 6807{ 6808 uint32_t * restrict dw = (uint32_t * restrict) dst; 6809 6810 dw[0] = 6811 __gen_uint(values->DWordLength, 0, 7) | 6812 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6813 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6814 __gen_uint(values->CommandSubType, 27, 28) | 6815 __gen_uint(values->CommandType, 29, 31); 6816 6817 dw[1] = 6818 __gen_uint(values->GSNumberofURBEntries, 0, 15) | 6819 __gen_uint(values->GSURBEntryAllocationSize, 16, 24) | 6820 __gen_uint(values->GSURBStartingAddress, 25, 31); 6821} 6822 6823#define GEN10_3DSTATE_URB_HS_length 2 6824#define GEN10_3DSTATE_URB_HS_length_bias 2 6825#define GEN10_3DSTATE_URB_HS_header \ 6826 .DWordLength = 0, \ 6827 ._3DCommandSubOpcode = 49, \ 6828 ._3DCommandOpcode = 0, \ 6829 .CommandSubType = 3, \ 6830 .CommandType = 3 6831 6832struct GEN10_3DSTATE_URB_HS { 6833 uint32_t DWordLength; 6834 uint32_t _3DCommandSubOpcode; 6835 uint32_t _3DCommandOpcode; 6836 uint32_t CommandSubType; 6837 uint32_t CommandType; 6838 uint32_t HSNumberofURBEntries; 6839 uint32_t HSURBEntryAllocationSize; 6840 uint32_t HSURBStartingAddress; 6841}; 6842 6843static inline void 6844GEN10_3DSTATE_URB_HS_pack(__attribute__((unused)) __gen_user_data *data, 6845 __attribute__((unused)) void * restrict dst, 6846 __attribute__((unused)) const struct GEN10_3DSTATE_URB_HS * restrict values) 6847{ 6848 uint32_t * restrict dw = (uint32_t * restrict) dst; 6849 6850 dw[0] = 6851 __gen_uint(values->DWordLength, 0, 7) | 6852 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6853 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6854 __gen_uint(values->CommandSubType, 27, 28) | 6855 __gen_uint(values->CommandType, 29, 31); 6856 6857 dw[1] = 6858 __gen_uint(values->HSNumberofURBEntries, 0, 15) | 6859 __gen_uint(values->HSURBEntryAllocationSize, 16, 24) | 6860 __gen_uint(values->HSURBStartingAddress, 25, 31); 6861} 6862 6863#define GEN10_3DSTATE_URB_VS_length 2 6864#define GEN10_3DSTATE_URB_VS_length_bias 2 6865#define GEN10_3DSTATE_URB_VS_header \ 6866 .DWordLength = 0, \ 6867 ._3DCommandSubOpcode = 48, \ 6868 ._3DCommandOpcode = 0, \ 6869 .CommandSubType = 3, \ 6870 .CommandType = 3 6871 6872struct GEN10_3DSTATE_URB_VS { 6873 uint32_t DWordLength; 6874 uint32_t _3DCommandSubOpcode; 6875 uint32_t _3DCommandOpcode; 6876 uint32_t CommandSubType; 6877 uint32_t CommandType; 6878 uint32_t VSNumberofURBEntries; 6879 uint32_t VSURBEntryAllocationSize; 6880 uint32_t VSURBStartingAddress; 6881}; 6882 6883static inline void 6884GEN10_3DSTATE_URB_VS_pack(__attribute__((unused)) __gen_user_data *data, 6885 __attribute__((unused)) void * restrict dst, 6886 __attribute__((unused)) const struct GEN10_3DSTATE_URB_VS * restrict values) 6887{ 6888 uint32_t * restrict dw = (uint32_t * restrict) dst; 6889 6890 dw[0] = 6891 __gen_uint(values->DWordLength, 0, 7) | 6892 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6893 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6894 __gen_uint(values->CommandSubType, 27, 28) | 6895 __gen_uint(values->CommandType, 29, 31); 6896 6897 dw[1] = 6898 __gen_uint(values->VSNumberofURBEntries, 0, 15) | 6899 __gen_uint(values->VSURBEntryAllocationSize, 16, 24) | 6900 __gen_uint(values->VSURBStartingAddress, 25, 31); 6901} 6902 6903#define GEN10_3DSTATE_VERTEX_BUFFERS_length_bias 2 6904#define GEN10_3DSTATE_VERTEX_BUFFERS_header \ 6905 .DWordLength = 3, \ 6906 ._3DCommandSubOpcode = 8, \ 6907 ._3DCommandOpcode = 0, \ 6908 .CommandSubType = 3, \ 6909 .CommandType = 3 6910 6911struct GEN10_3DSTATE_VERTEX_BUFFERS { 6912 uint32_t DWordLength; 6913 uint32_t _3DCommandSubOpcode; 6914 uint32_t _3DCommandOpcode; 6915 uint32_t CommandSubType; 6916 uint32_t CommandType; 6917 /* variable length fields follow */ 6918}; 6919 6920static inline void 6921GEN10_3DSTATE_VERTEX_BUFFERS_pack(__attribute__((unused)) __gen_user_data *data, 6922 __attribute__((unused)) void * restrict dst, 6923 __attribute__((unused)) const struct GEN10_3DSTATE_VERTEX_BUFFERS * restrict values) 6924{ 6925 uint32_t * restrict dw = (uint32_t * restrict) dst; 6926 6927 dw[0] = 6928 __gen_uint(values->DWordLength, 0, 7) | 6929 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6930 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6931 __gen_uint(values->CommandSubType, 27, 28) | 6932 __gen_uint(values->CommandType, 29, 31); 6933} 6934 6935#define GEN10_3DSTATE_VERTEX_ELEMENTS_length_bias 2 6936#define GEN10_3DSTATE_VERTEX_ELEMENTS_header \ 6937 .DWordLength = 1, \ 6938 ._3DCommandSubOpcode = 9, \ 6939 ._3DCommandOpcode = 0, \ 6940 .CommandSubType = 3, \ 6941 .CommandType = 3 6942 6943struct GEN10_3DSTATE_VERTEX_ELEMENTS { 6944 uint32_t DWordLength; 6945 uint32_t _3DCommandSubOpcode; 6946 uint32_t _3DCommandOpcode; 6947 uint32_t CommandSubType; 6948 uint32_t CommandType; 6949 /* variable length fields follow */ 6950}; 6951 6952static inline void 6953GEN10_3DSTATE_VERTEX_ELEMENTS_pack(__attribute__((unused)) __gen_user_data *data, 6954 __attribute__((unused)) void * restrict dst, 6955 __attribute__((unused)) const struct GEN10_3DSTATE_VERTEX_ELEMENTS * restrict values) 6956{ 6957 uint32_t * restrict dw = (uint32_t * restrict) dst; 6958 6959 dw[0] = 6960 __gen_uint(values->DWordLength, 0, 7) | 6961 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 6962 __gen_uint(values->_3DCommandOpcode, 24, 26) | 6963 __gen_uint(values->CommandSubType, 27, 28) | 6964 __gen_uint(values->CommandType, 29, 31); 6965} 6966 6967#define GEN10_3DSTATE_VF_length 2 6968#define GEN10_3DSTATE_VF_length_bias 2 6969#define GEN10_3DSTATE_VF_header \ 6970 .DWordLength = 0, \ 6971 ._3DCommandSubOpcode = 12, \ 6972 ._3DCommandOpcode = 0, \ 6973 .CommandSubType = 3, \ 6974 .CommandType = 3 6975 6976struct GEN10_3DSTATE_VF { 6977 uint32_t DWordLength; 6978 bool IndexedDrawCutIndexEnable; 6979 bool ComponentPackingEnable; 6980 bool SequentialDrawCutIndexEnable; 6981 bool VertexIDOffsetEnable; 6982 uint32_t _3DCommandSubOpcode; 6983 uint32_t _3DCommandOpcode; 6984 uint32_t CommandSubType; 6985 uint32_t CommandType; 6986 uint32_t CutIndex; 6987}; 6988 6989static inline void 6990GEN10_3DSTATE_VF_pack(__attribute__((unused)) __gen_user_data *data, 6991 __attribute__((unused)) void * restrict dst, 6992 __attribute__((unused)) const struct GEN10_3DSTATE_VF * restrict values) 6993{ 6994 uint32_t * restrict dw = (uint32_t * restrict) dst; 6995 6996 dw[0] = 6997 __gen_uint(values->DWordLength, 0, 7) | 6998 __gen_uint(values->IndexedDrawCutIndexEnable, 8, 8) | 6999 __gen_uint(values->ComponentPackingEnable, 9, 9) | 7000 __gen_uint(values->SequentialDrawCutIndexEnable, 10, 10) | 7001 __gen_uint(values->VertexIDOffsetEnable, 11, 11) | 7002 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7003 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7004 __gen_uint(values->CommandSubType, 27, 28) | 7005 __gen_uint(values->CommandType, 29, 31); 7006 7007 dw[1] = 7008 __gen_uint(values->CutIndex, 0, 31); 7009} 7010 7011#define GEN10_3DSTATE_VF_COMPONENT_PACKING_length 5 7012#define GEN10_3DSTATE_VF_COMPONENT_PACKING_length_bias 2 7013#define GEN10_3DSTATE_VF_COMPONENT_PACKING_header\ 7014 .DWordLength = 3, \ 7015 ._3DCommandSubOpcode = 85, \ 7016 ._3DCommandOpcode = 0, \ 7017 .CommandSubType = 3, \ 7018 .CommandType = 3 7019 7020struct GEN10_3DSTATE_VF_COMPONENT_PACKING { 7021 uint32_t DWordLength; 7022 uint32_t _3DCommandSubOpcode; 7023 uint32_t _3DCommandOpcode; 7024 uint32_t CommandSubType; 7025 uint32_t CommandType; 7026 uint32_t VertexElement00Enables; 7027 uint32_t VertexElement01Enables; 7028 uint32_t VertexElement02Enables; 7029 uint32_t VertexElement03Enables; 7030 uint32_t VertexElement04Enables; 7031 uint32_t VertexElement05Enables; 7032 uint32_t VertexElement06Enables; 7033 uint32_t VertexElement07Enables; 7034 uint32_t VertexElement08Enables; 7035 uint32_t VertexElement09Enables; 7036 uint32_t VertexElement10Enables; 7037 uint32_t VertexElement11Enables; 7038 uint32_t VertexElement12Enables; 7039 uint32_t VertexElement13Enables; 7040 uint32_t VertexElement14Enables; 7041 uint32_t VertexElement15Enables; 7042 uint32_t VertexElement16Enables; 7043 uint32_t VertexElement17Enables; 7044 uint32_t VertexElement18Enables; 7045 uint32_t VertexElement19Enables; 7046 uint32_t VertexElement20Enables; 7047 uint32_t VertexElement21Enables; 7048 uint32_t VertexElement22Enables; 7049 uint32_t VertexElement23Enables; 7050 uint32_t VertexElement24Enables; 7051 uint32_t VertexElement25Enables; 7052 uint32_t VertexElement26Enables; 7053 uint32_t VertexElement27Enables; 7054 uint32_t VertexElement28Enables; 7055 uint32_t VertexElement29Enables; 7056 uint32_t VertexElement30Enables; 7057 uint32_t VertexElement31Enables; 7058}; 7059 7060static inline void 7061GEN10_3DSTATE_VF_COMPONENT_PACKING_pack(__attribute__((unused)) __gen_user_data *data, 7062 __attribute__((unused)) void * restrict dst, 7063 __attribute__((unused)) const struct GEN10_3DSTATE_VF_COMPONENT_PACKING * restrict values) 7064{ 7065 uint32_t * restrict dw = (uint32_t * restrict) dst; 7066 7067 dw[0] = 7068 __gen_uint(values->DWordLength, 0, 7) | 7069 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7070 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7071 __gen_uint(values->CommandSubType, 27, 28) | 7072 __gen_uint(values->CommandType, 29, 31); 7073 7074 dw[1] = 7075 __gen_uint(values->VertexElement00Enables, 0, 3) | 7076 __gen_uint(values->VertexElement01Enables, 4, 7) | 7077 __gen_uint(values->VertexElement02Enables, 8, 11) | 7078 __gen_uint(values->VertexElement03Enables, 12, 15) | 7079 __gen_uint(values->VertexElement04Enables, 16, 19) | 7080 __gen_uint(values->VertexElement05Enables, 20, 23) | 7081 __gen_uint(values->VertexElement06Enables, 24, 27) | 7082 __gen_uint(values->VertexElement07Enables, 28, 31); 7083 7084 dw[2] = 7085 __gen_uint(values->VertexElement08Enables, 0, 3) | 7086 __gen_uint(values->VertexElement09Enables, 4, 7) | 7087 __gen_uint(values->VertexElement10Enables, 8, 11) | 7088 __gen_uint(values->VertexElement11Enables, 12, 15) | 7089 __gen_uint(values->VertexElement12Enables, 16, 19) | 7090 __gen_uint(values->VertexElement13Enables, 20, 23) | 7091 __gen_uint(values->VertexElement14Enables, 24, 27) | 7092 __gen_uint(values->VertexElement15Enables, 28, 31); 7093 7094 dw[3] = 7095 __gen_uint(values->VertexElement16Enables, 0, 3) | 7096 __gen_uint(values->VertexElement17Enables, 4, 7) | 7097 __gen_uint(values->VertexElement18Enables, 8, 11) | 7098 __gen_uint(values->VertexElement19Enables, 12, 15) | 7099 __gen_uint(values->VertexElement20Enables, 16, 19) | 7100 __gen_uint(values->VertexElement21Enables, 20, 23) | 7101 __gen_uint(values->VertexElement22Enables, 24, 27) | 7102 __gen_uint(values->VertexElement23Enables, 28, 31); 7103 7104 dw[4] = 7105 __gen_uint(values->VertexElement24Enables, 0, 3) | 7106 __gen_uint(values->VertexElement25Enables, 4, 7) | 7107 __gen_uint(values->VertexElement26Enables, 8, 11) | 7108 __gen_uint(values->VertexElement27Enables, 12, 15) | 7109 __gen_uint(values->VertexElement28Enables, 16, 19) | 7110 __gen_uint(values->VertexElement29Enables, 20, 23) | 7111 __gen_uint(values->VertexElement30Enables, 24, 27) | 7112 __gen_uint(values->VertexElement31Enables, 28, 31); 7113} 7114 7115#define GEN10_3DSTATE_VF_INSTANCING_length 3 7116#define GEN10_3DSTATE_VF_INSTANCING_length_bias 2 7117#define GEN10_3DSTATE_VF_INSTANCING_header \ 7118 .DWordLength = 1, \ 7119 ._3DCommandSubOpcode = 73, \ 7120 ._3DCommandOpcode = 0, \ 7121 .CommandSubType = 3, \ 7122 .CommandType = 3 7123 7124struct GEN10_3DSTATE_VF_INSTANCING { 7125 uint32_t DWordLength; 7126 uint32_t _3DCommandSubOpcode; 7127 uint32_t _3DCommandOpcode; 7128 uint32_t CommandSubType; 7129 uint32_t CommandType; 7130 uint32_t VertexElementIndex; 7131 bool InstancingEnable; 7132 uint32_t InstanceDataStepRate; 7133}; 7134 7135static inline void 7136GEN10_3DSTATE_VF_INSTANCING_pack(__attribute__((unused)) __gen_user_data *data, 7137 __attribute__((unused)) void * restrict dst, 7138 __attribute__((unused)) const struct GEN10_3DSTATE_VF_INSTANCING * restrict values) 7139{ 7140 uint32_t * restrict dw = (uint32_t * restrict) dst; 7141 7142 dw[0] = 7143 __gen_uint(values->DWordLength, 0, 7) | 7144 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7145 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7146 __gen_uint(values->CommandSubType, 27, 28) | 7147 __gen_uint(values->CommandType, 29, 31); 7148 7149 dw[1] = 7150 __gen_uint(values->VertexElementIndex, 0, 5) | 7151 __gen_uint(values->InstancingEnable, 8, 8); 7152 7153 dw[2] = 7154 __gen_uint(values->InstanceDataStepRate, 0, 31); 7155} 7156 7157#define GEN10_3DSTATE_VF_SGVS_length 2 7158#define GEN10_3DSTATE_VF_SGVS_length_bias 2 7159#define GEN10_3DSTATE_VF_SGVS_header \ 7160 .DWordLength = 0, \ 7161 ._3DCommandSubOpcode = 74, \ 7162 ._3DCommandOpcode = 0, \ 7163 .CommandSubType = 3, \ 7164 .CommandType = 3 7165 7166struct GEN10_3DSTATE_VF_SGVS { 7167 uint32_t DWordLength; 7168 uint32_t _3DCommandSubOpcode; 7169 uint32_t _3DCommandOpcode; 7170 uint32_t CommandSubType; 7171 uint32_t CommandType; 7172 uint32_t VertexIDElementOffset; 7173 uint32_t VertexIDComponentNumber; 7174#define COMP_0 0 7175#define COMP_1 1 7176#define COMP_2 2 7177#define COMP_3 3 7178 bool VertexIDEnable; 7179 uint32_t InstanceIDElementOffset; 7180 uint32_t InstanceIDComponentNumber; 7181#define COMP_0 0 7182#define COMP_1 1 7183#define COMP_2 2 7184#define COMP_3 3 7185 bool InstanceIDEnable; 7186}; 7187 7188static inline void 7189GEN10_3DSTATE_VF_SGVS_pack(__attribute__((unused)) __gen_user_data *data, 7190 __attribute__((unused)) void * restrict dst, 7191 __attribute__((unused)) const struct GEN10_3DSTATE_VF_SGVS * restrict values) 7192{ 7193 uint32_t * restrict dw = (uint32_t * restrict) dst; 7194 7195 dw[0] = 7196 __gen_uint(values->DWordLength, 0, 7) | 7197 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7198 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7199 __gen_uint(values->CommandSubType, 27, 28) | 7200 __gen_uint(values->CommandType, 29, 31); 7201 7202 dw[1] = 7203 __gen_uint(values->VertexIDElementOffset, 0, 5) | 7204 __gen_uint(values->VertexIDComponentNumber, 13, 14) | 7205 __gen_uint(values->VertexIDEnable, 15, 15) | 7206 __gen_uint(values->InstanceIDElementOffset, 16, 21) | 7207 __gen_uint(values->InstanceIDComponentNumber, 29, 30) | 7208 __gen_uint(values->InstanceIDEnable, 31, 31); 7209} 7210 7211#define GEN10_3DSTATE_VF_SGVS_2_length 3 7212#define GEN10_3DSTATE_VF_SGVS_2_length_bias 2 7213#define GEN10_3DSTATE_VF_SGVS_2_header \ 7214 .DWordLength = 1, \ 7215 ._3DCommandSubOpcode = 86, \ 7216 ._3DCommandOpcode = 0, \ 7217 .CommandSubType = 3, \ 7218 .CommandType = 3 7219 7220struct GEN10_3DSTATE_VF_SGVS_2 { 7221 uint32_t DWordLength; 7222 uint32_t _3DCommandSubOpcode; 7223 uint32_t _3DCommandOpcode; 7224 uint32_t CommandSubType; 7225 uint32_t CommandType; 7226 uint32_t XP0ElementOffset; 7227 uint32_t XP0SourceSelect; 7228#define VERTEX_LOCATION 1 7229#define XP0_PARAMETER 0 7230 uint32_t XP0ComponentNumber; 7231#define COMP_0 0 7232#define COMP_1 1 7233#define COMP_2 2 7234#define COMP_3 3 7235 uint32_t XP0Enable; 7236 uint32_t XP1ElementOffset; 7237 uint32_t XP1SourceSelect; 7238#define StartingInstanceLocation 1 7239#define XP1_PARAMETER 0 7240 uint32_t XP1ComponentNumber; 7241#define COMP_0 0 7242#define COMP_1 1 7243#define COMP_2 2 7244#define COMP_3 3 7245 uint32_t XP1Enable; 7246 uint32_t XP2ElementOffset; 7247 uint32_t XP2ComponentNumber; 7248#define COMP_0 0 7249#define COMP_1 1 7250#define COMP_2 2 7251#define COMP_3 3 7252 uint32_t XP2Enable; 7253}; 7254 7255static inline void 7256GEN10_3DSTATE_VF_SGVS_2_pack(__attribute__((unused)) __gen_user_data *data, 7257 __attribute__((unused)) void * restrict dst, 7258 __attribute__((unused)) const struct GEN10_3DSTATE_VF_SGVS_2 * restrict values) 7259{ 7260 uint32_t * restrict dw = (uint32_t * restrict) dst; 7261 7262 dw[0] = 7263 __gen_uint(values->DWordLength, 0, 7) | 7264 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7265 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7266 __gen_uint(values->CommandSubType, 27, 28) | 7267 __gen_uint(values->CommandType, 29, 31); 7268 7269 dw[1] = 7270 __gen_uint(values->XP0ElementOffset, 0, 5) | 7271 __gen_uint(values->XP0SourceSelect, 12, 12) | 7272 __gen_uint(values->XP0ComponentNumber, 13, 14) | 7273 __gen_uint(values->XP0Enable, 15, 15) | 7274 __gen_uint(values->XP1ElementOffset, 16, 21) | 7275 __gen_uint(values->XP1SourceSelect, 28, 28) | 7276 __gen_uint(values->XP1ComponentNumber, 29, 30) | 7277 __gen_uint(values->XP1Enable, 31, 31); 7278 7279 dw[2] = 7280 __gen_uint(values->XP2ElementOffset, 0, 5) | 7281 __gen_uint(values->XP2ComponentNumber, 13, 14) | 7282 __gen_uint(values->XP2Enable, 15, 15); 7283} 7284 7285#define GEN10_3DSTATE_VF_STATISTICS_length 1 7286#define GEN10_3DSTATE_VF_STATISTICS_length_bias 1 7287#define GEN10_3DSTATE_VF_STATISTICS_header \ 7288 ._3DCommandSubOpcode = 11, \ 7289 ._3DCommandOpcode = 0, \ 7290 .CommandSubType = 1, \ 7291 .CommandType = 3 7292 7293struct GEN10_3DSTATE_VF_STATISTICS { 7294 bool StatisticsEnable; 7295 uint32_t _3DCommandSubOpcode; 7296 uint32_t _3DCommandOpcode; 7297 uint32_t CommandSubType; 7298 uint32_t CommandType; 7299}; 7300 7301static inline void 7302GEN10_3DSTATE_VF_STATISTICS_pack(__attribute__((unused)) __gen_user_data *data, 7303 __attribute__((unused)) void * restrict dst, 7304 __attribute__((unused)) const struct GEN10_3DSTATE_VF_STATISTICS * restrict values) 7305{ 7306 uint32_t * restrict dw = (uint32_t * restrict) dst; 7307 7308 dw[0] = 7309 __gen_uint(values->StatisticsEnable, 0, 0) | 7310 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7311 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7312 __gen_uint(values->CommandSubType, 27, 28) | 7313 __gen_uint(values->CommandType, 29, 31); 7314} 7315 7316#define GEN10_3DSTATE_VF_TOPOLOGY_length 2 7317#define GEN10_3DSTATE_VF_TOPOLOGY_length_bias 2 7318#define GEN10_3DSTATE_VF_TOPOLOGY_header \ 7319 .DWordLength = 0, \ 7320 ._3DCommandSubOpcode = 75, \ 7321 ._3DCommandOpcode = 0, \ 7322 .CommandSubType = 3, \ 7323 .CommandType = 3 7324 7325struct GEN10_3DSTATE_VF_TOPOLOGY { 7326 uint32_t DWordLength; 7327 uint32_t _3DCommandSubOpcode; 7328 uint32_t _3DCommandOpcode; 7329 uint32_t CommandSubType; 7330 uint32_t CommandType; 7331 enum GEN10_3D_Prim_Topo_Type PrimitiveTopologyType; 7332}; 7333 7334static inline void 7335GEN10_3DSTATE_VF_TOPOLOGY_pack(__attribute__((unused)) __gen_user_data *data, 7336 __attribute__((unused)) void * restrict dst, 7337 __attribute__((unused)) const struct GEN10_3DSTATE_VF_TOPOLOGY * restrict values) 7338{ 7339 uint32_t * restrict dw = (uint32_t * restrict) dst; 7340 7341 dw[0] = 7342 __gen_uint(values->DWordLength, 0, 7) | 7343 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7344 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7345 __gen_uint(values->CommandSubType, 27, 28) | 7346 __gen_uint(values->CommandType, 29, 31); 7347 7348 dw[1] = 7349 __gen_uint(values->PrimitiveTopologyType, 0, 5); 7350} 7351 7352#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2 7353#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length_bias 2 7354#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_header\ 7355 .DWordLength = 0, \ 7356 ._3DCommandSubOpcode = 35, \ 7357 ._3DCommandOpcode = 0, \ 7358 .CommandSubType = 3, \ 7359 .CommandType = 3 7360 7361struct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC { 7362 uint32_t DWordLength; 7363 uint32_t _3DCommandSubOpcode; 7364 uint32_t _3DCommandOpcode; 7365 uint32_t CommandSubType; 7366 uint32_t CommandType; 7367 uint64_t CCViewportPointer; 7368}; 7369 7370static inline void 7371GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_pack(__attribute__((unused)) __gen_user_data *data, 7372 __attribute__((unused)) void * restrict dst, 7373 __attribute__((unused)) const struct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC * restrict values) 7374{ 7375 uint32_t * restrict dw = (uint32_t * restrict) dst; 7376 7377 dw[0] = 7378 __gen_uint(values->DWordLength, 0, 7) | 7379 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7380 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7381 __gen_uint(values->CommandSubType, 27, 28) | 7382 __gen_uint(values->CommandType, 29, 31); 7383 7384 dw[1] = 7385 __gen_offset(values->CCViewportPointer, 5, 31); 7386} 7387 7388#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2 7389#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length_bias 2 7390#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_header\ 7391 .DWordLength = 0, \ 7392 ._3DCommandSubOpcode = 33, \ 7393 ._3DCommandOpcode = 0, \ 7394 .CommandSubType = 3, \ 7395 .CommandType = 3 7396 7397struct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP { 7398 uint32_t DWordLength; 7399 uint32_t _3DCommandSubOpcode; 7400 uint32_t _3DCommandOpcode; 7401 uint32_t CommandSubType; 7402 uint32_t CommandType; 7403 uint64_t SFClipViewportPointer; 7404}; 7405 7406static inline void 7407GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_pack(__attribute__((unused)) __gen_user_data *data, 7408 __attribute__((unused)) void * restrict dst, 7409 __attribute__((unused)) const struct GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP * restrict values) 7410{ 7411 uint32_t * restrict dw = (uint32_t * restrict) dst; 7412 7413 dw[0] = 7414 __gen_uint(values->DWordLength, 0, 7) | 7415 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7416 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7417 __gen_uint(values->CommandSubType, 27, 28) | 7418 __gen_uint(values->CommandType, 29, 31); 7419 7420 dw[1] = 7421 __gen_offset(values->SFClipViewportPointer, 6, 31); 7422} 7423 7424#define GEN10_3DSTATE_VS_length 9 7425#define GEN10_3DSTATE_VS_length_bias 2 7426#define GEN10_3DSTATE_VS_header \ 7427 .DWordLength = 7, \ 7428 ._3DCommandSubOpcode = 16, \ 7429 ._3DCommandOpcode = 0, \ 7430 .CommandSubType = 3, \ 7431 .CommandType = 3 7432 7433struct GEN10_3DSTATE_VS { 7434 uint32_t DWordLength; 7435 uint32_t _3DCommandSubOpcode; 7436 uint32_t _3DCommandOpcode; 7437 uint32_t CommandSubType; 7438 uint32_t CommandType; 7439 uint64_t KernelStartPointer; 7440 bool SoftwareExceptionEnable; 7441 bool AccessesUAV; 7442 bool IllegalOpcodeExceptionEnable; 7443 uint32_t FloatingPointMode; 7444#define IEEE754 0 7445#define Alternate 1 7446 uint32_t ThreadDispatchPriority; 7447#define High 1 7448 uint32_t BindingTableEntryCount; 7449 uint32_t SamplerCount; 7450#define NoSamplers 0 7451#define _14Samplers 1 7452#define _58Samplers 2 7453#define _912Samplers 3 7454#define _1316Samplers 4 7455 bool VectorMaskEnable; 7456 bool SingleVertexDispatch; 7457 uint32_t PerThreadScratchSpace; 7458 __gen_address_type ScratchSpaceBasePointer; 7459 uint32_t VertexURBEntryReadOffset; 7460 uint32_t VertexURBEntryReadLength; 7461 uint32_t DispatchGRFStartRegisterForURBData; 7462 bool Enable; 7463 bool VertexCacheDisable; 7464 bool SIMD8DispatchEnable; 7465 bool SIMD8SingleInstanceDispatchEnable; 7466 bool StatisticsEnable; 7467 uint32_t MaximumNumberofThreads; 7468 uint32_t UserClipDistanceCullTestEnableBitmask; 7469 uint32_t UserClipDistanceClipTestEnableBitmask; 7470 uint32_t VertexURBEntryOutputLength; 7471 uint32_t VertexURBEntryOutputReadOffset; 7472}; 7473 7474static inline void 7475GEN10_3DSTATE_VS_pack(__attribute__((unused)) __gen_user_data *data, 7476 __attribute__((unused)) void * restrict dst, 7477 __attribute__((unused)) const struct GEN10_3DSTATE_VS * restrict values) 7478{ 7479 uint32_t * restrict dw = (uint32_t * restrict) dst; 7480 7481 dw[0] = 7482 __gen_uint(values->DWordLength, 0, 7) | 7483 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7484 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7485 __gen_uint(values->CommandSubType, 27, 28) | 7486 __gen_uint(values->CommandType, 29, 31); 7487 7488 const uint64_t v1 = 7489 __gen_offset(values->KernelStartPointer, 6, 63); 7490 dw[1] = v1; 7491 dw[2] = v1 >> 32; 7492 7493 dw[3] = 7494 __gen_uint(values->SoftwareExceptionEnable, 7, 7) | 7495 __gen_uint(values->AccessesUAV, 12, 12) | 7496 __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | 7497 __gen_uint(values->FloatingPointMode, 16, 16) | 7498 __gen_uint(values->ThreadDispatchPriority, 17, 17) | 7499 __gen_uint(values->BindingTableEntryCount, 18, 25) | 7500 __gen_uint(values->SamplerCount, 27, 29) | 7501 __gen_uint(values->VectorMaskEnable, 30, 30) | 7502 __gen_uint(values->SingleVertexDispatch, 31, 31); 7503 7504 const uint64_t v4 = 7505 __gen_uint(values->PerThreadScratchSpace, 0, 3); 7506 const uint64_t v4_address = 7507 __gen_combine_address(data, &dw[4], values->ScratchSpaceBasePointer, v4); 7508 dw[4] = v4_address; 7509 dw[5] = (v4_address >> 32) | (v4 >> 32); 7510 7511 dw[6] = 7512 __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | 7513 __gen_uint(values->VertexURBEntryReadLength, 11, 16) | 7514 __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24); 7515 7516 dw[7] = 7517 __gen_uint(values->Enable, 0, 0) | 7518 __gen_uint(values->VertexCacheDisable, 1, 1) | 7519 __gen_uint(values->SIMD8DispatchEnable, 2, 2) | 7520 __gen_uint(values->SIMD8SingleInstanceDispatchEnable, 9, 9) | 7521 __gen_uint(values->StatisticsEnable, 10, 10) | 7522 __gen_uint(values->MaximumNumberofThreads, 22, 31); 7523 7524 dw[8] = 7525 __gen_uint(values->UserClipDistanceCullTestEnableBitmask, 0, 7) | 7526 __gen_uint(values->UserClipDistanceClipTestEnableBitmask, 8, 15) | 7527 __gen_uint(values->VertexURBEntryOutputLength, 16, 20) | 7528 __gen_uint(values->VertexURBEntryOutputReadOffset, 21, 26); 7529} 7530 7531#define GEN10_3DSTATE_WM_length 2 7532#define GEN10_3DSTATE_WM_length_bias 2 7533#define GEN10_3DSTATE_WM_header \ 7534 .DWordLength = 0, \ 7535 ._3DCommandSubOpcode = 20, \ 7536 ._3DCommandOpcode = 0, \ 7537 .CommandSubType = 3, \ 7538 .CommandType = 3 7539 7540struct GEN10_3DSTATE_WM { 7541 uint32_t DWordLength; 7542 uint32_t _3DCommandSubOpcode; 7543 uint32_t _3DCommandOpcode; 7544 uint32_t CommandSubType; 7545 uint32_t CommandType; 7546 uint32_t ForceKillPixelEnable; 7547#define ForceOff 1 7548#define ForceON 2 7549 uint32_t PointRasterizationRule; 7550#define RASTRULE_UPPER_LEFT 0 7551#define RASTRULE_UPPER_RIGHT 1 7552 bool LineStippleEnable; 7553 bool PolygonStippleEnable; 7554 uint32_t LineAntialiasingRegionWidth; 7555#define _05pixels 0 7556#define _10pixels 1 7557#define _20pixels 2 7558#define _40pixels 3 7559 uint32_t LineEndCapAntialiasingRegionWidth; 7560#define _05pixels 0 7561#define _10pixels 1 7562#define _20pixels 2 7563#define _40pixels 3 7564 uint32_t BarycentricInterpolationMode; 7565#define BIM_PERSPECTIVE_PIXEL 1 7566#define BIM_PERSPECTIVE_CENTROID 2 7567#define BIM_PERSPECTIVE_SAMPLE 4 7568#define BIM_LINEAR_PIXEL 8 7569#define BIM_LINEAR_CENTROID 16 7570#define BIM_LINEAR_SAMPLE 32 7571 uint32_t PositionZWInterpolationMode; 7572#define INTERP_PIXEL 0 7573#define INTERP_CENTROID 2 7574#define INTERP_SAMPLE 3 7575 uint32_t ForceThreadDispatchEnable; 7576#define ForceOff 1 7577#define ForceON 2 7578 uint32_t EarlyDepthStencilControl; 7579#define EDSC_NORMAL 0 7580#define EDSC_PSEXEC 1 7581#define EDSC_PREPS 2 7582 bool LegacyDiamondLineRasterization; 7583 bool LegacyHierarchicalDepthBufferResolveEnable; 7584 bool LegacyDepthBufferResolveEnable; 7585 bool LegacyDepthBufferClearEnable; 7586 bool StatisticsEnable; 7587}; 7588 7589static inline void 7590GEN10_3DSTATE_WM_pack(__attribute__((unused)) __gen_user_data *data, 7591 __attribute__((unused)) void * restrict dst, 7592 __attribute__((unused)) const struct GEN10_3DSTATE_WM * restrict values) 7593{ 7594 uint32_t * restrict dw = (uint32_t * restrict) dst; 7595 7596 dw[0] = 7597 __gen_uint(values->DWordLength, 0, 7) | 7598 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7599 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7600 __gen_uint(values->CommandSubType, 27, 28) | 7601 __gen_uint(values->CommandType, 29, 31); 7602 7603 dw[1] = 7604 __gen_uint(values->ForceKillPixelEnable, 0, 1) | 7605 __gen_uint(values->PointRasterizationRule, 2, 2) | 7606 __gen_uint(values->LineStippleEnable, 3, 3) | 7607 __gen_uint(values->PolygonStippleEnable, 4, 4) | 7608 __gen_uint(values->LineAntialiasingRegionWidth, 6, 7) | 7609 __gen_uint(values->LineEndCapAntialiasingRegionWidth, 8, 9) | 7610 __gen_uint(values->BarycentricInterpolationMode, 11, 16) | 7611 __gen_uint(values->PositionZWInterpolationMode, 17, 18) | 7612 __gen_uint(values->ForceThreadDispatchEnable, 19, 20) | 7613 __gen_uint(values->EarlyDepthStencilControl, 21, 22) | 7614 __gen_uint(values->LegacyDiamondLineRasterization, 26, 26) | 7615 __gen_uint(values->LegacyHierarchicalDepthBufferResolveEnable, 27, 27) | 7616 __gen_uint(values->LegacyDepthBufferResolveEnable, 28, 28) | 7617 __gen_uint(values->LegacyDepthBufferClearEnable, 30, 30) | 7618 __gen_uint(values->StatisticsEnable, 31, 31); 7619} 7620 7621#define GEN10_3DSTATE_WM_CHROMAKEY_length 2 7622#define GEN10_3DSTATE_WM_CHROMAKEY_length_bias 2 7623#define GEN10_3DSTATE_WM_CHROMAKEY_header \ 7624 .DWordLength = 0, \ 7625 ._3DCommandSubOpcode = 76, \ 7626 ._3DCommandOpcode = 0, \ 7627 .CommandSubType = 3, \ 7628 .CommandType = 3 7629 7630struct GEN10_3DSTATE_WM_CHROMAKEY { 7631 uint32_t DWordLength; 7632 uint32_t _3DCommandSubOpcode; 7633 uint32_t _3DCommandOpcode; 7634 uint32_t CommandSubType; 7635 uint32_t CommandType; 7636 bool ChromaKeyKillEnable; 7637}; 7638 7639static inline void 7640GEN10_3DSTATE_WM_CHROMAKEY_pack(__attribute__((unused)) __gen_user_data *data, 7641 __attribute__((unused)) void * restrict dst, 7642 __attribute__((unused)) const struct GEN10_3DSTATE_WM_CHROMAKEY * restrict values) 7643{ 7644 uint32_t * restrict dw = (uint32_t * restrict) dst; 7645 7646 dw[0] = 7647 __gen_uint(values->DWordLength, 0, 7) | 7648 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7649 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7650 __gen_uint(values->CommandSubType, 27, 28) | 7651 __gen_uint(values->CommandType, 29, 31); 7652 7653 dw[1] = 7654 __gen_uint(values->ChromaKeyKillEnable, 31, 31); 7655} 7656 7657#define GEN10_3DSTATE_WM_DEPTH_STENCIL_length 4 7658#define GEN10_3DSTATE_WM_DEPTH_STENCIL_length_bias 2 7659#define GEN10_3DSTATE_WM_DEPTH_STENCIL_header \ 7660 .DWordLength = 2, \ 7661 ._3DCommandSubOpcode = 78, \ 7662 ._3DCommandOpcode = 0, \ 7663 .CommandSubType = 3, \ 7664 .CommandType = 3 7665 7666struct GEN10_3DSTATE_WM_DEPTH_STENCIL { 7667 uint32_t DWordLength; 7668 uint32_t _3DCommandSubOpcode; 7669 uint32_t _3DCommandOpcode; 7670 uint32_t CommandSubType; 7671 uint32_t CommandType; 7672 bool DepthBufferWriteEnable; 7673 bool DepthTestEnable; 7674 bool StencilBufferWriteEnable; 7675 bool StencilTestEnable; 7676 bool DoubleSidedStencilEnable; 7677 enum GEN10_3D_Compare_Function DepthTestFunction; 7678 enum GEN10_3D_Compare_Function StencilTestFunction; 7679 enum GEN10_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; 7680 enum GEN10_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; 7681 enum GEN10_3D_Stencil_Operation BackfaceStencilFailOp; 7682 enum GEN10_3D_Compare_Function BackfaceStencilTestFunction; 7683 enum GEN10_3D_Stencil_Operation StencilPassDepthPassOp; 7684 enum GEN10_3D_Stencil_Operation StencilPassDepthFailOp; 7685 enum GEN10_3D_Stencil_Operation StencilFailOp; 7686 uint32_t BackfaceStencilWriteMask; 7687 uint32_t BackfaceStencilTestMask; 7688 uint32_t StencilWriteMask; 7689 uint32_t StencilTestMask; 7690 uint32_t BackfaceStencilReferenceValue; 7691 uint32_t StencilReferenceValue; 7692}; 7693 7694static inline void 7695GEN10_3DSTATE_WM_DEPTH_STENCIL_pack(__attribute__((unused)) __gen_user_data *data, 7696 __attribute__((unused)) void * restrict dst, 7697 __attribute__((unused)) const struct GEN10_3DSTATE_WM_DEPTH_STENCIL * restrict values) 7698{ 7699 uint32_t * restrict dw = (uint32_t * restrict) dst; 7700 7701 dw[0] = 7702 __gen_uint(values->DWordLength, 0, 7) | 7703 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7704 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7705 __gen_uint(values->CommandSubType, 27, 28) | 7706 __gen_uint(values->CommandType, 29, 31); 7707 7708 dw[1] = 7709 __gen_uint(values->DepthBufferWriteEnable, 0, 0) | 7710 __gen_uint(values->DepthTestEnable, 1, 1) | 7711 __gen_uint(values->StencilBufferWriteEnable, 2, 2) | 7712 __gen_uint(values->StencilTestEnable, 3, 3) | 7713 __gen_uint(values->DoubleSidedStencilEnable, 4, 4) | 7714 __gen_uint(values->DepthTestFunction, 5, 7) | 7715 __gen_uint(values->StencilTestFunction, 8, 10) | 7716 __gen_uint(values->BackfaceStencilPassDepthPassOp, 11, 13) | 7717 __gen_uint(values->BackfaceStencilPassDepthFailOp, 14, 16) | 7718 __gen_uint(values->BackfaceStencilFailOp, 17, 19) | 7719 __gen_uint(values->BackfaceStencilTestFunction, 20, 22) | 7720 __gen_uint(values->StencilPassDepthPassOp, 23, 25) | 7721 __gen_uint(values->StencilPassDepthFailOp, 26, 28) | 7722 __gen_uint(values->StencilFailOp, 29, 31); 7723 7724 dw[2] = 7725 __gen_uint(values->BackfaceStencilWriteMask, 0, 7) | 7726 __gen_uint(values->BackfaceStencilTestMask, 8, 15) | 7727 __gen_uint(values->StencilWriteMask, 16, 23) | 7728 __gen_uint(values->StencilTestMask, 24, 31); 7729 7730 dw[3] = 7731 __gen_uint(values->BackfaceStencilReferenceValue, 0, 7) | 7732 __gen_uint(values->StencilReferenceValue, 8, 15); 7733} 7734 7735#define GEN10_3DSTATE_WM_HZ_OP_length 5 7736#define GEN10_3DSTATE_WM_HZ_OP_length_bias 2 7737#define GEN10_3DSTATE_WM_HZ_OP_header \ 7738 .DWordLength = 3, \ 7739 ._3DCommandSubOpcode = 82, \ 7740 ._3DCommandOpcode = 0, \ 7741 .CommandSubType = 3, \ 7742 .CommandType = 3 7743 7744struct GEN10_3DSTATE_WM_HZ_OP { 7745 uint32_t DWordLength; 7746 uint32_t _3DCommandSubOpcode; 7747 uint32_t _3DCommandOpcode; 7748 uint32_t CommandSubType; 7749 uint32_t CommandType; 7750 uint32_t NumberofMultisamples; 7751 uint32_t StencilClearValue; 7752 bool FullSurfaceDepthandStencilClear; 7753 bool PixelPositionOffsetEnable; 7754 bool HierarchicalDepthBufferResolveEnable; 7755 bool DepthBufferResolveEnable; 7756 bool ScissorRectangleEnable; 7757 bool DepthBufferClearEnable; 7758 bool StencilBufferClearEnable; 7759 uint32_t ClearRectangleXMin; 7760 uint32_t ClearRectangleYMin; 7761 uint32_t ClearRectangleXMax; 7762 uint32_t ClearRectangleYMax; 7763 uint32_t SampleMask; 7764}; 7765 7766static inline void 7767GEN10_3DSTATE_WM_HZ_OP_pack(__attribute__((unused)) __gen_user_data *data, 7768 __attribute__((unused)) void * restrict dst, 7769 __attribute__((unused)) const struct GEN10_3DSTATE_WM_HZ_OP * restrict values) 7770{ 7771 uint32_t * restrict dw = (uint32_t * restrict) dst; 7772 7773 dw[0] = 7774 __gen_uint(values->DWordLength, 0, 7) | 7775 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 7776 __gen_uint(values->_3DCommandOpcode, 24, 26) | 7777 __gen_uint(values->CommandSubType, 27, 28) | 7778 __gen_uint(values->CommandType, 29, 31); 7779 7780 dw[1] = 7781 __gen_uint(values->NumberofMultisamples, 13, 15) | 7782 __gen_uint(values->StencilClearValue, 16, 23) | 7783 __gen_uint(values->FullSurfaceDepthandStencilClear, 25, 25) | 7784 __gen_uint(values->PixelPositionOffsetEnable, 26, 26) | 7785 __gen_uint(values->HierarchicalDepthBufferResolveEnable, 27, 27) | 7786 __gen_uint(values->DepthBufferResolveEnable, 28, 28) | 7787 __gen_uint(values->ScissorRectangleEnable, 29, 29) | 7788 __gen_uint(values->DepthBufferClearEnable, 30, 30) | 7789 __gen_uint(values->StencilBufferClearEnable, 31, 31); 7790 7791 dw[2] = 7792 __gen_uint(values->ClearRectangleXMin, 0, 15) | 7793 __gen_uint(values->ClearRectangleYMin, 16, 31); 7794 7795 dw[3] = 7796 __gen_uint(values->ClearRectangleXMax, 0, 15) | 7797 __gen_uint(values->ClearRectangleYMax, 16, 31); 7798 7799 dw[4] = 7800 __gen_uint(values->SampleMask, 0, 15); 7801} 7802 7803#define GEN10_GPGPU_WALKER_length 15 7804#define GEN10_GPGPU_WALKER_length_bias 2 7805#define GEN10_GPGPU_WALKER_header \ 7806 .DWordLength = 13, \ 7807 .SubOpcode = 5, \ 7808 .MediaCommandOpcode = 1, \ 7809 .Pipeline = 2, \ 7810 .CommandType = 3 7811 7812struct GEN10_GPGPU_WALKER { 7813 uint32_t DWordLength; 7814 bool PredicateEnable; 7815 bool IndirectParameterEnable; 7816 uint32_t SubOpcode; 7817 uint32_t MediaCommandOpcode; 7818 uint32_t Pipeline; 7819 uint32_t CommandType; 7820 uint32_t InterfaceDescriptorOffset; 7821 uint32_t IndirectDataLength; 7822 uint64_t IndirectDataStartAddress; 7823 uint32_t ThreadWidthCounterMaximum; 7824 uint32_t ThreadHeightCounterMaximum; 7825 uint32_t ThreadDepthCounterMaximum; 7826 uint32_t SIMDSize; 7827#define SIMD8 0 7828#define SIMD16 1 7829#define SIMD32 2 7830 uint32_t ThreadGroupIDStartingX; 7831 uint32_t ThreadGroupIDXDimension; 7832 uint32_t ThreadGroupIDStartingY; 7833 uint32_t ThreadGroupIDYDimension; 7834 uint32_t ThreadGroupIDStartingResumeZ; 7835 uint32_t ThreadGroupIDZDimension; 7836 uint32_t RightExecutionMask; 7837 uint32_t BottomExecutionMask; 7838}; 7839 7840static inline void 7841GEN10_GPGPU_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 7842 __attribute__((unused)) void * restrict dst, 7843 __attribute__((unused)) const struct GEN10_GPGPU_WALKER * restrict values) 7844{ 7845 uint32_t * restrict dw = (uint32_t * restrict) dst; 7846 7847 dw[0] = 7848 __gen_uint(values->DWordLength, 0, 7) | 7849 __gen_uint(values->PredicateEnable, 8, 8) | 7850 __gen_uint(values->IndirectParameterEnable, 10, 10) | 7851 __gen_uint(values->SubOpcode, 16, 23) | 7852 __gen_uint(values->MediaCommandOpcode, 24, 26) | 7853 __gen_uint(values->Pipeline, 27, 28) | 7854 __gen_uint(values->CommandType, 29, 31); 7855 7856 dw[1] = 7857 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 7858 7859 dw[2] = 7860 __gen_uint(values->IndirectDataLength, 0, 16); 7861 7862 dw[3] = 7863 __gen_offset(values->IndirectDataStartAddress, 6, 31); 7864 7865 dw[4] = 7866 __gen_uint(values->ThreadWidthCounterMaximum, 0, 5) | 7867 __gen_uint(values->ThreadHeightCounterMaximum, 8, 13) | 7868 __gen_uint(values->ThreadDepthCounterMaximum, 16, 21) | 7869 __gen_uint(values->SIMDSize, 30, 31); 7870 7871 dw[5] = 7872 __gen_uint(values->ThreadGroupIDStartingX, 0, 31); 7873 7874 dw[6] = 0; 7875 7876 dw[7] = 7877 __gen_uint(values->ThreadGroupIDXDimension, 0, 31); 7878 7879 dw[8] = 7880 __gen_uint(values->ThreadGroupIDStartingY, 0, 31); 7881 7882 dw[9] = 0; 7883 7884 dw[10] = 7885 __gen_uint(values->ThreadGroupIDYDimension, 0, 31); 7886 7887 dw[11] = 7888 __gen_uint(values->ThreadGroupIDStartingResumeZ, 0, 31); 7889 7890 dw[12] = 7891 __gen_uint(values->ThreadGroupIDZDimension, 0, 31); 7892 7893 dw[13] = 7894 __gen_uint(values->RightExecutionMask, 0, 31); 7895 7896 dw[14] = 7897 __gen_uint(values->BottomExecutionMask, 0, 31); 7898} 7899 7900#define GEN10_MEDIA_CURBE_LOAD_length 4 7901#define GEN10_MEDIA_CURBE_LOAD_length_bias 2 7902#define GEN10_MEDIA_CURBE_LOAD_header \ 7903 .DWordLength = 2, \ 7904 .SubOpcode = 1, \ 7905 .MediaCommandOpcode = 0, \ 7906 .Pipeline = 2, \ 7907 .CommandType = 3 7908 7909struct GEN10_MEDIA_CURBE_LOAD { 7910 uint32_t DWordLength; 7911 uint32_t SubOpcode; 7912 uint32_t MediaCommandOpcode; 7913 uint32_t Pipeline; 7914 uint32_t CommandType; 7915 uint32_t CURBETotalDataLength; 7916 uint32_t CURBEDataStartAddress; 7917}; 7918 7919static inline void 7920GEN10_MEDIA_CURBE_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 7921 __attribute__((unused)) void * restrict dst, 7922 __attribute__((unused)) const struct GEN10_MEDIA_CURBE_LOAD * restrict values) 7923{ 7924 uint32_t * restrict dw = (uint32_t * restrict) dst; 7925 7926 dw[0] = 7927 __gen_uint(values->DWordLength, 0, 15) | 7928 __gen_uint(values->SubOpcode, 16, 23) | 7929 __gen_uint(values->MediaCommandOpcode, 24, 26) | 7930 __gen_uint(values->Pipeline, 27, 28) | 7931 __gen_uint(values->CommandType, 29, 31); 7932 7933 dw[1] = 0; 7934 7935 dw[2] = 7936 __gen_uint(values->CURBETotalDataLength, 0, 16); 7937 7938 dw[3] = 7939 __gen_uint(values->CURBEDataStartAddress, 0, 31); 7940} 7941 7942#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4 7943#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length_bias 2 7944#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_header\ 7945 .DWordLength = 2, \ 7946 .SubOpcode = 2, \ 7947 .MediaCommandOpcode = 0, \ 7948 .Pipeline = 2, \ 7949 .CommandType = 3 7950 7951struct GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD { 7952 uint32_t DWordLength; 7953 uint32_t SubOpcode; 7954 uint32_t MediaCommandOpcode; 7955 uint32_t Pipeline; 7956 uint32_t CommandType; 7957 uint32_t InterfaceDescriptorTotalLength; 7958 uint64_t InterfaceDescriptorDataStartAddress; 7959}; 7960 7961static inline void 7962GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_pack(__attribute__((unused)) __gen_user_data *data, 7963 __attribute__((unused)) void * restrict dst, 7964 __attribute__((unused)) const struct GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD * restrict values) 7965{ 7966 uint32_t * restrict dw = (uint32_t * restrict) dst; 7967 7968 dw[0] = 7969 __gen_uint(values->DWordLength, 0, 15) | 7970 __gen_uint(values->SubOpcode, 16, 23) | 7971 __gen_uint(values->MediaCommandOpcode, 24, 26) | 7972 __gen_uint(values->Pipeline, 27, 28) | 7973 __gen_uint(values->CommandType, 29, 31); 7974 7975 dw[1] = 0; 7976 7977 dw[2] = 7978 __gen_uint(values->InterfaceDescriptorTotalLength, 0, 16); 7979 7980 dw[3] = 7981 __gen_offset(values->InterfaceDescriptorDataStartAddress, 0, 31); 7982} 7983 7984#define GEN10_MEDIA_OBJECT_length_bias 2 7985#define GEN10_MEDIA_OBJECT_header \ 7986 .DWordLength = 4, \ 7987 .MediaCommandSubOpcode = 0, \ 7988 .MediaCommandOpcode = 1, \ 7989 .MediaCommandPipeline = 2, \ 7990 .CommandType = 3 7991 7992struct GEN10_MEDIA_OBJECT { 7993 uint32_t DWordLength; 7994 uint32_t MediaCommandSubOpcode; 7995 uint32_t MediaCommandOpcode; 7996 uint32_t MediaCommandPipeline; 7997 uint32_t CommandType; 7998 uint32_t InterfaceDescriptorOffset; 7999 uint32_t IndirectDataLength; 8000 uint32_t SubSliceDestinationSelect; 8001#define Subslice3 3 8002#define SubSlice2 2 8003#define SubSlice1 1 8004#define SubSlice0 0 8005 uint32_t SliceDestinationSelect; 8006#define Slice0 0 8007#define Slice1 1 8008#define Slice2 2 8009 uint32_t UseScoreboard; 8010#define Notusingscoreboard 0 8011#define Usingscoreboard 1 8012 uint32_t ForceDestination; 8013 uint32_t ThreadSynchronization; 8014#define Nothreadsynchronization 0 8015#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 8016 uint32_t SliceDestinationSelectMSBs; 8017 bool ChildrenPresent; 8018 __gen_address_type IndirectDataStartAddress; 8019 uint32_t ScoreboardX; 8020 uint32_t ScoredboardY; 8021 uint32_t ScoreboardMask; 8022 uint32_t ScoreboardColor; 8023 /* variable length fields follow */ 8024}; 8025 8026static inline void 8027GEN10_MEDIA_OBJECT_pack(__attribute__((unused)) __gen_user_data *data, 8028 __attribute__((unused)) void * restrict dst, 8029 __attribute__((unused)) const struct GEN10_MEDIA_OBJECT * restrict values) 8030{ 8031 uint32_t * restrict dw = (uint32_t * restrict) dst; 8032 8033 dw[0] = 8034 __gen_uint(values->DWordLength, 0, 14) | 8035 __gen_uint(values->MediaCommandSubOpcode, 16, 23) | 8036 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8037 __gen_uint(values->MediaCommandPipeline, 27, 28) | 8038 __gen_uint(values->CommandType, 29, 31); 8039 8040 dw[1] = 8041 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8042 8043 dw[2] = 8044 __gen_uint(values->IndirectDataLength, 0, 16) | 8045 __gen_uint(values->SubSliceDestinationSelect, 17, 18) | 8046 __gen_uint(values->SliceDestinationSelect, 19, 20) | 8047 __gen_uint(values->UseScoreboard, 21, 21) | 8048 __gen_uint(values->ForceDestination, 22, 22) | 8049 __gen_uint(values->ThreadSynchronization, 24, 24) | 8050 __gen_uint(values->SliceDestinationSelectMSBs, 25, 26) | 8051 __gen_uint(values->ChildrenPresent, 31, 31); 8052 8053 dw[3] = __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, 0); 8054 8055 dw[4] = 8056 __gen_uint(values->ScoreboardX, 0, 8) | 8057 __gen_uint(values->ScoredboardY, 16, 24); 8058 8059 dw[5] = 8060 __gen_uint(values->ScoreboardMask, 0, 7) | 8061 __gen_uint(values->ScoreboardColor, 16, 19); 8062} 8063 8064#define GEN10_MEDIA_OBJECT_GRPID_length_bias 2 8065#define GEN10_MEDIA_OBJECT_GRPID_header \ 8066 .DWordLength = 5, \ 8067 .MediaCommandSubOpcode = 6, \ 8068 .MediaCommandOpcode = 1, \ 8069 .MediaCommandPipeline = 2, \ 8070 .CommandType = 3 8071 8072struct GEN10_MEDIA_OBJECT_GRPID { 8073 uint32_t DWordLength; 8074 uint32_t MediaCommandSubOpcode; 8075 uint32_t MediaCommandOpcode; 8076 uint32_t MediaCommandPipeline; 8077 uint32_t CommandType; 8078 uint32_t InterfaceDescriptorOffset; 8079 uint32_t IndirectDataLength; 8080 uint32_t UseScoreboard; 8081#define Notusingscoreboard 0 8082#define Usingscoreboard 1 8083 uint32_t EndofThreadGroup; 8084 __gen_address_type IndirectDataStartAddress; 8085 uint32_t ScoreboardX; 8086 uint32_t ScoreboardY; 8087 uint32_t ScoreboardMask; 8088 uint32_t ScoreboardColor; 8089 uint32_t GroupID; 8090 /* variable length fields follow */ 8091}; 8092 8093static inline void 8094GEN10_MEDIA_OBJECT_GRPID_pack(__attribute__((unused)) __gen_user_data *data, 8095 __attribute__((unused)) void * restrict dst, 8096 __attribute__((unused)) const struct GEN10_MEDIA_OBJECT_GRPID * restrict values) 8097{ 8098 uint32_t * restrict dw = (uint32_t * restrict) dst; 8099 8100 dw[0] = 8101 __gen_uint(values->DWordLength, 0, 15) | 8102 __gen_uint(values->MediaCommandSubOpcode, 16, 23) | 8103 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8104 __gen_uint(values->MediaCommandPipeline, 27, 28) | 8105 __gen_uint(values->CommandType, 29, 31); 8106 8107 dw[1] = 8108 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8109 8110 dw[2] = 8111 __gen_uint(values->IndirectDataLength, 0, 16) | 8112 __gen_uint(values->UseScoreboard, 21, 21) | 8113 __gen_uint(values->EndofThreadGroup, 23, 23); 8114 8115 dw[3] = __gen_combine_address(data, &dw[3], values->IndirectDataStartAddress, 0); 8116 8117 dw[4] = 8118 __gen_uint(values->ScoreboardX, 0, 8) | 8119 __gen_uint(values->ScoreboardY, 16, 24); 8120 8121 dw[5] = 8122 __gen_uint(values->ScoreboardMask, 0, 7) | 8123 __gen_uint(values->ScoreboardColor, 16, 19); 8124 8125 dw[6] = 8126 __gen_uint(values->GroupID, 0, 31); 8127} 8128 8129#define GEN10_MEDIA_OBJECT_PRT_length 16 8130#define GEN10_MEDIA_OBJECT_PRT_length_bias 2 8131#define GEN10_MEDIA_OBJECT_PRT_header \ 8132 .DWordLength = 14, \ 8133 .SubOpcode = 2, \ 8134 .MediaCommandOpcode = 1, \ 8135 .Pipeline = 2, \ 8136 .CommandType = 3 8137 8138struct GEN10_MEDIA_OBJECT_PRT { 8139 uint32_t DWordLength; 8140 uint32_t SubOpcode; 8141 uint32_t MediaCommandOpcode; 8142 uint32_t Pipeline; 8143 uint32_t CommandType; 8144 uint32_t InterfaceDescriptorOffset; 8145 uint32_t PRT_FenceType; 8146#define Rootthreadqueue 0 8147#define VFEstateflush 1 8148 bool PRT_FenceNeeded; 8149 bool ChildrenPresent; 8150 uint32_t InlineData[12]; 8151}; 8152 8153static inline void 8154GEN10_MEDIA_OBJECT_PRT_pack(__attribute__((unused)) __gen_user_data *data, 8155 __attribute__((unused)) void * restrict dst, 8156 __attribute__((unused)) const struct GEN10_MEDIA_OBJECT_PRT * restrict values) 8157{ 8158 uint32_t * restrict dw = (uint32_t * restrict) dst; 8159 8160 dw[0] = 8161 __gen_uint(values->DWordLength, 0, 14) | 8162 __gen_uint(values->SubOpcode, 16, 23) | 8163 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8164 __gen_uint(values->Pipeline, 27, 28) | 8165 __gen_uint(values->CommandType, 29, 31); 8166 8167 dw[1] = 8168 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8169 8170 dw[2] = 8171 __gen_uint(values->PRT_FenceType, 22, 22) | 8172 __gen_uint(values->PRT_FenceNeeded, 23, 23) | 8173 __gen_uint(values->ChildrenPresent, 31, 31); 8174 8175 dw[3] = 0; 8176 8177 dw[4] = 8178 __gen_uint(values->InlineData[0], 0, 31); 8179 8180 dw[5] = 8181 __gen_uint(values->InlineData[1], 0, 31); 8182 8183 dw[6] = 8184 __gen_uint(values->InlineData[2], 0, 31); 8185 8186 dw[7] = 8187 __gen_uint(values->InlineData[3], 0, 31); 8188 8189 dw[8] = 8190 __gen_uint(values->InlineData[4], 0, 31); 8191 8192 dw[9] = 8193 __gen_uint(values->InlineData[5], 0, 31); 8194 8195 dw[10] = 8196 __gen_uint(values->InlineData[6], 0, 31); 8197 8198 dw[11] = 8199 __gen_uint(values->InlineData[7], 0, 31); 8200 8201 dw[12] = 8202 __gen_uint(values->InlineData[8], 0, 31); 8203 8204 dw[13] = 8205 __gen_uint(values->InlineData[9], 0, 31); 8206 8207 dw[14] = 8208 __gen_uint(values->InlineData[10], 0, 31); 8209 8210 dw[15] = 8211 __gen_uint(values->InlineData[11], 0, 31); 8212} 8213 8214#define GEN10_MEDIA_OBJECT_WALKER_length_bias 2 8215#define GEN10_MEDIA_OBJECT_WALKER_header \ 8216 .DWordLength = 15, \ 8217 .SubOpcode = 3, \ 8218 .MediaCommandOpcode = 1, \ 8219 .Pipeline = 2, \ 8220 .CommandType = 3 8221 8222struct GEN10_MEDIA_OBJECT_WALKER { 8223 uint32_t DWordLength; 8224 uint32_t SubOpcode; 8225 uint32_t MediaCommandOpcode; 8226 uint32_t Pipeline; 8227 uint32_t CommandType; 8228 uint32_t InterfaceDescriptorOffset; 8229 uint32_t IndirectDataLength; 8230 uint32_t UseScoreboard; 8231#define Notusingscoreboard 0 8232#define Usingscoreboard 1 8233 uint32_t MaskedDispatch; 8234 uint32_t ThreadSynchronization; 8235#define Nothreadsynchronization 0 8236#define Threaddispatchissynchronizedbythespawnrootthreadmessage 1 8237 uint32_t IndirectDataStartAddress; 8238 uint32_t ScoreboardMask; 8239 uint32_t GroupIDLoopSelect; 8240#define No_Groups 0 8241#define Color_Groups 1 8242#define InnerLocal_Groups 2 8243#define MidLocal_Groups 3 8244#define OuterLocal_Groups 4 8245#define InnerGlobal_Groups 5 8246 int32_t MidLoopUnitX; 8247 int32_t LocalMidLoopUnitY; 8248 uint32_t MiddleLoopExtraSteps; 8249 uint32_t ColorCountMinusOne; 8250 uint32_t LocalLoopExecCount; 8251 uint32_t GlobalLoopExecCount; 8252 uint32_t BlockResolutionX; 8253 uint32_t BlockResolutionY; 8254 uint32_t LocalStartX; 8255 uint32_t LocalStartY; 8256 int32_t LocalOuterLoopStrideX; 8257 int32_t LocalOuterLoopStrideY; 8258 int32_t LocalInnerLoopUnitX; 8259 int32_t LocalInnerLoopUnitY; 8260 uint32_t GlobalResolutionX; 8261 uint32_t GlobalResolutionY; 8262 int32_t GlobalStartX; 8263 int32_t GlobalStartY; 8264 int32_t GlobalOuterLoopStrideX; 8265 int32_t GlobalOuterLoopStrideY; 8266 int32_t GlobalInnerLoopUnitX; 8267 int32_t GlobalInnerLoopUnitY; 8268 /* variable length fields follow */ 8269}; 8270 8271static inline void 8272GEN10_MEDIA_OBJECT_WALKER_pack(__attribute__((unused)) __gen_user_data *data, 8273 __attribute__((unused)) void * restrict dst, 8274 __attribute__((unused)) const struct GEN10_MEDIA_OBJECT_WALKER * restrict values) 8275{ 8276 uint32_t * restrict dw = (uint32_t * restrict) dst; 8277 8278 dw[0] = 8279 __gen_uint(values->DWordLength, 0, 14) | 8280 __gen_uint(values->SubOpcode, 16, 23) | 8281 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8282 __gen_uint(values->Pipeline, 27, 28) | 8283 __gen_uint(values->CommandType, 29, 31); 8284 8285 dw[1] = 8286 __gen_uint(values->InterfaceDescriptorOffset, 0, 5); 8287 8288 dw[2] = 8289 __gen_uint(values->IndirectDataLength, 0, 16) | 8290 __gen_uint(values->UseScoreboard, 21, 21) | 8291 __gen_uint(values->MaskedDispatch, 22, 23) | 8292 __gen_uint(values->ThreadSynchronization, 24, 24); 8293 8294 dw[3] = 8295 __gen_uint(values->IndirectDataStartAddress, 0, 31); 8296 8297 dw[4] = 0; 8298 8299 dw[5] = 8300 __gen_uint(values->ScoreboardMask, 0, 7) | 8301 __gen_uint(values->GroupIDLoopSelect, 8, 31); 8302 8303 dw[6] = 8304 __gen_sint(values->MidLoopUnitX, 8, 9) | 8305 __gen_sint(values->LocalMidLoopUnitY, 12, 13) | 8306 __gen_uint(values->MiddleLoopExtraSteps, 16, 20) | 8307 __gen_uint(values->ColorCountMinusOne, 24, 27); 8308 8309 dw[7] = 8310 __gen_uint(values->LocalLoopExecCount, 0, 11) | 8311 __gen_uint(values->GlobalLoopExecCount, 16, 27); 8312 8313 dw[8] = 8314 __gen_uint(values->BlockResolutionX, 0, 10) | 8315 __gen_uint(values->BlockResolutionY, 16, 26); 8316 8317 dw[9] = 8318 __gen_uint(values->LocalStartX, 0, 10) | 8319 __gen_uint(values->LocalStartY, 16, 26); 8320 8321 dw[10] = 0; 8322 8323 dw[11] = 8324 __gen_sint(values->LocalOuterLoopStrideX, 0, 11) | 8325 __gen_sint(values->LocalOuterLoopStrideY, 16, 27); 8326 8327 dw[12] = 8328 __gen_sint(values->LocalInnerLoopUnitX, 0, 11) | 8329 __gen_sint(values->LocalInnerLoopUnitY, 16, 27); 8330 8331 dw[13] = 8332 __gen_uint(values->GlobalResolutionX, 0, 10) | 8333 __gen_uint(values->GlobalResolutionY, 16, 26); 8334 8335 dw[14] = 8336 __gen_sint(values->GlobalStartX, 0, 11) | 8337 __gen_sint(values->GlobalStartY, 16, 27); 8338 8339 dw[15] = 8340 __gen_sint(values->GlobalOuterLoopStrideX, 0, 11) | 8341 __gen_sint(values->GlobalOuterLoopStrideY, 16, 27); 8342 8343 dw[16] = 8344 __gen_sint(values->GlobalInnerLoopUnitX, 0, 11) | 8345 __gen_sint(values->GlobalInnerLoopUnitY, 16, 27); 8346} 8347 8348#define GEN10_MEDIA_STATE_FLUSH_length 2 8349#define GEN10_MEDIA_STATE_FLUSH_length_bias 2 8350#define GEN10_MEDIA_STATE_FLUSH_header \ 8351 .DWordLength = 0, \ 8352 .SubOpcode = 4, \ 8353 .MediaCommandOpcode = 0, \ 8354 .Pipeline = 2, \ 8355 .CommandType = 3 8356 8357struct GEN10_MEDIA_STATE_FLUSH { 8358 uint32_t DWordLength; 8359 uint32_t SubOpcode; 8360 uint32_t MediaCommandOpcode; 8361 uint32_t Pipeline; 8362 uint32_t CommandType; 8363 uint32_t InterfaceDescriptorOffset; 8364 uint32_t WatermarkRequired; 8365 bool FlushtoGO; 8366}; 8367 8368static inline void 8369GEN10_MEDIA_STATE_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 8370 __attribute__((unused)) void * restrict dst, 8371 __attribute__((unused)) const struct GEN10_MEDIA_STATE_FLUSH * restrict values) 8372{ 8373 uint32_t * restrict dw = (uint32_t * restrict) dst; 8374 8375 dw[0] = 8376 __gen_uint(values->DWordLength, 0, 15) | 8377 __gen_uint(values->SubOpcode, 16, 23) | 8378 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8379 __gen_uint(values->Pipeline, 27, 28) | 8380 __gen_uint(values->CommandType, 29, 31); 8381 8382 dw[1] = 8383 __gen_uint(values->InterfaceDescriptorOffset, 0, 5) | 8384 __gen_uint(values->WatermarkRequired, 6, 6) | 8385 __gen_uint(values->FlushtoGO, 7, 7); 8386} 8387 8388#define GEN10_MEDIA_VFE_STATE_length 9 8389#define GEN10_MEDIA_VFE_STATE_length_bias 2 8390#define GEN10_MEDIA_VFE_STATE_header \ 8391 .DWordLength = 7, \ 8392 .SubOpcode = 0, \ 8393 .MediaCommandOpcode = 0, \ 8394 .Pipeline = 2, \ 8395 .CommandType = 3 8396 8397struct GEN10_MEDIA_VFE_STATE { 8398 uint32_t DWordLength; 8399 uint32_t SubOpcode; 8400 uint32_t MediaCommandOpcode; 8401 uint32_t Pipeline; 8402 uint32_t CommandType; 8403 uint32_t PerThreadScratchSpace; 8404 uint32_t StackSize; 8405 __gen_address_type ScratchSpaceBasePointer; 8406 uint32_t SLMBankSelectionPolicy; 8407#define Legacy 0 8408#define SLMLoadBalance 1 8409 uint32_t ThreadDispatchSelectionPolicy; 8410#define Legacy 0 8411#define Prefer1SS 1 8412#define Prefer2SS 2 8413#define LoadBalance 3 8414 uint32_t ResetGatewayTimer; 8415#define Maintainingtheexistingtimestampstate 0 8416#define Resettingrelativetimerandlatchingtheglobaltimestamp 1 8417 uint32_t NumberofURBEntries; 8418 uint32_t MaximumNumberofThreads; 8419 uint32_t SliceDisable; 8420#define AllSubslicesEnabled 0 8421#define OnlySlice0Enabled 1 8422#define OnlySlice0Subslice0Enabled 3 8423 uint32_t CURBEAllocationSize; 8424 uint32_t URBEntryAllocationSize; 8425 uint32_t ScoreboardMask; 8426 uint32_t NumberofMediaObjectsperPreEmptionCheckpoint; 8427 uint32_t ScoreboardType; 8428#define StallingScoreboard 0 8429#define NonStallingScoreboard 1 8430 bool ScoreboardEnable; 8431 int32_t Scoreboard0DeltaX; 8432 int32_t Scoreboard0DeltaY; 8433 int32_t Scoreboard1DeltaX; 8434 int32_t Scoreboard1DeltaY; 8435 int32_t Scoreboard2DeltaX; 8436 int32_t Scoreboard2DeltaY; 8437 int32_t Scoreboard3DeltaX; 8438 int32_t Scoreboard3DeltaY; 8439 int32_t Scoreboard4DeltaX; 8440 int32_t Scoreboard4DeltaY; 8441 int32_t Scoreboard5DeltaX; 8442 int32_t Scoreboard5DeltaY; 8443 int32_t Scoreboard6DeltaX; 8444 int32_t Scoreboard6DeltaY; 8445 int32_t Scoreboard7DeltaX; 8446 int32_t Scoreboard7DeltaY; 8447}; 8448 8449static inline void 8450GEN10_MEDIA_VFE_STATE_pack(__attribute__((unused)) __gen_user_data *data, 8451 __attribute__((unused)) void * restrict dst, 8452 __attribute__((unused)) const struct GEN10_MEDIA_VFE_STATE * restrict values) 8453{ 8454 uint32_t * restrict dw = (uint32_t * restrict) dst; 8455 8456 dw[0] = 8457 __gen_uint(values->DWordLength, 0, 15) | 8458 __gen_uint(values->SubOpcode, 16, 23) | 8459 __gen_uint(values->MediaCommandOpcode, 24, 26) | 8460 __gen_uint(values->Pipeline, 27, 28) | 8461 __gen_uint(values->CommandType, 29, 31); 8462 8463 const uint64_t v1 = 8464 __gen_uint(values->PerThreadScratchSpace, 0, 3) | 8465 __gen_uint(values->StackSize, 4, 7); 8466 const uint64_t v1_address = 8467 __gen_combine_address(data, &dw[1], values->ScratchSpaceBasePointer, v1); 8468 dw[1] = v1_address; 8469 dw[2] = (v1_address >> 32) | (v1 >> 32); 8470 8471 dw[3] = 8472 __gen_uint(values->SLMBankSelectionPolicy, 3, 3) | 8473 __gen_uint(values->ThreadDispatchSelectionPolicy, 4, 5) | 8474 __gen_uint(values->ResetGatewayTimer, 7, 7) | 8475 __gen_uint(values->NumberofURBEntries, 8, 15) | 8476 __gen_uint(values->MaximumNumberofThreads, 16, 31); 8477 8478 dw[4] = 8479 __gen_uint(values->SliceDisable, 0, 1); 8480 8481 dw[5] = 8482 __gen_uint(values->CURBEAllocationSize, 0, 15) | 8483 __gen_uint(values->URBEntryAllocationSize, 16, 31); 8484 8485 dw[6] = 8486 __gen_uint(values->ScoreboardMask, 0, 7) | 8487 __gen_uint(values->NumberofMediaObjectsperPreEmptionCheckpoint, 8, 15) | 8488 __gen_uint(values->ScoreboardType, 30, 30) | 8489 __gen_uint(values->ScoreboardEnable, 31, 31); 8490 8491 dw[7] = 8492 __gen_sint(values->Scoreboard0DeltaX, 0, 3) | 8493 __gen_sint(values->Scoreboard0DeltaY, 4, 7) | 8494 __gen_sint(values->Scoreboard1DeltaX, 8, 11) | 8495 __gen_sint(values->Scoreboard1DeltaY, 12, 15) | 8496 __gen_sint(values->Scoreboard2DeltaX, 16, 19) | 8497 __gen_sint(values->Scoreboard2DeltaY, 20, 23) | 8498 __gen_sint(values->Scoreboard3DeltaX, 24, 27) | 8499 __gen_sint(values->Scoreboard3DeltaY, 28, 31); 8500 8501 dw[8] = 8502 __gen_sint(values->Scoreboard4DeltaX, 0, 3) | 8503 __gen_sint(values->Scoreboard4DeltaY, 4, 7) | 8504 __gen_sint(values->Scoreboard5DeltaX, 8, 11) | 8505 __gen_sint(values->Scoreboard5DeltaY, 12, 15) | 8506 __gen_sint(values->Scoreboard6DeltaX, 16, 19) | 8507 __gen_sint(values->Scoreboard6DeltaY, 20, 23) | 8508 __gen_sint(values->Scoreboard7DeltaX, 24, 27) | 8509 __gen_sint(values->Scoreboard7DeltaY, 28, 31); 8510} 8511 8512#define GEN10_MI_ARB_CHECK_length 1 8513#define GEN10_MI_ARB_CHECK_length_bias 1 8514#define GEN10_MI_ARB_CHECK_header \ 8515 .MICommandOpcode = 5, \ 8516 .CommandType = 0 8517 8518struct GEN10_MI_ARB_CHECK { 8519 uint32_t MICommandOpcode; 8520 uint32_t CommandType; 8521}; 8522 8523static inline void 8524GEN10_MI_ARB_CHECK_pack(__attribute__((unused)) __gen_user_data *data, 8525 __attribute__((unused)) void * restrict dst, 8526 __attribute__((unused)) const struct GEN10_MI_ARB_CHECK * restrict values) 8527{ 8528 uint32_t * restrict dw = (uint32_t * restrict) dst; 8529 8530 dw[0] = 8531 __gen_uint(values->MICommandOpcode, 23, 28) | 8532 __gen_uint(values->CommandType, 29, 31); 8533} 8534 8535#define GEN10_MI_ARB_ON_OFF_length 1 8536#define GEN10_MI_ARB_ON_OFF_length_bias 1 8537#define GEN10_MI_ARB_ON_OFF_header \ 8538 .ArbitrationEnable = 1, \ 8539 .MICommandOpcode = 8, \ 8540 .CommandType = 0 8541 8542struct GEN10_MI_ARB_ON_OFF { 8543 bool ArbitrationEnable; 8544 bool AllowLiteRestore; 8545 uint32_t MICommandOpcode; 8546 uint32_t CommandType; 8547}; 8548 8549static inline void 8550GEN10_MI_ARB_ON_OFF_pack(__attribute__((unused)) __gen_user_data *data, 8551 __attribute__((unused)) void * restrict dst, 8552 __attribute__((unused)) const struct GEN10_MI_ARB_ON_OFF * restrict values) 8553{ 8554 uint32_t * restrict dw = (uint32_t * restrict) dst; 8555 8556 dw[0] = 8557 __gen_uint(values->ArbitrationEnable, 0, 0) | 8558 __gen_uint(values->AllowLiteRestore, 1, 1) | 8559 __gen_uint(values->MICommandOpcode, 23, 28) | 8560 __gen_uint(values->CommandType, 29, 31); 8561} 8562 8563#define GEN10_MI_ATOMIC_length 3 8564#define GEN10_MI_ATOMIC_length_bias 2 8565#define GEN10_MI_ATOMIC_header \ 8566 .DWordLength = 1, \ 8567 .MICommandOpcode = 47, \ 8568 .CommandType = 0 8569 8570struct GEN10_MI_ATOMIC { 8571 uint32_t DWordLength; 8572 enum GEN10_Atomic_OPCODE ATOMICOPCODE; 8573 bool ReturnDataControl; 8574 bool CSSTALL; 8575 bool InlineData; 8576 uint32_t DataSize; 8577#define MI_ATOMIC_DWORD 0 8578#define MI_ATOMIC_QWORD 1 8579#define MI_ATOMIC_OCTWORD 2 8580#define MI_ATOMIC_RESERVED 3 8581 bool PostSyncOperation; 8582 uint32_t MemoryType; 8583#define PerProcessGraphicsAddress 0 8584#define GlobalGraphicsAddress 1 8585 uint32_t MICommandOpcode; 8586 uint32_t CommandType; 8587 __gen_address_type MemoryAddress; 8588 uint32_t Operand1DataDword0; 8589 uint32_t Operand2DataDword0; 8590 uint32_t Operand1DataDword1; 8591 uint32_t Operand2DataDword1; 8592 uint32_t Operand1DataDword2; 8593 uint32_t Operand2DataDword2; 8594 uint32_t Operand1DataDword3; 8595 uint32_t Operand2DataDword3; 8596}; 8597 8598static inline void 8599GEN10_MI_ATOMIC_pack(__attribute__((unused)) __gen_user_data *data, 8600 __attribute__((unused)) void * restrict dst, 8601 __attribute__((unused)) const struct GEN10_MI_ATOMIC * restrict values) 8602{ 8603 uint32_t * restrict dw = (uint32_t * restrict) dst; 8604 8605 dw[0] = 8606 __gen_uint(values->DWordLength, 0, 7) | 8607 __gen_uint(values->ATOMICOPCODE, 8, 15) | 8608 __gen_uint(values->ReturnDataControl, 16, 16) | 8609 __gen_uint(values->CSSTALL, 17, 17) | 8610 __gen_uint(values->InlineData, 18, 18) | 8611 __gen_uint(values->DataSize, 19, 20) | 8612 __gen_uint(values->PostSyncOperation, 21, 21) | 8613 __gen_uint(values->MemoryType, 22, 22) | 8614 __gen_uint(values->MICommandOpcode, 23, 28) | 8615 __gen_uint(values->CommandType, 29, 31); 8616 8617 const uint64_t v1_address = 8618 __gen_combine_address(data, &dw[1], values->MemoryAddress, 0); 8619 dw[1] = v1_address; 8620 dw[2] = v1_address >> 32; 8621} 8622 8623#define GEN10_MI_BATCH_BUFFER_END_length 1 8624#define GEN10_MI_BATCH_BUFFER_END_length_bias 1 8625#define GEN10_MI_BATCH_BUFFER_END_header \ 8626 .MICommandOpcode = 10, \ 8627 .CommandType = 0 8628 8629struct GEN10_MI_BATCH_BUFFER_END { 8630 bool EndContext; 8631 uint32_t MICommandOpcode; 8632 uint32_t CommandType; 8633}; 8634 8635static inline void 8636GEN10_MI_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 8637 __attribute__((unused)) void * restrict dst, 8638 __attribute__((unused)) const struct GEN10_MI_BATCH_BUFFER_END * restrict values) 8639{ 8640 uint32_t * restrict dw = (uint32_t * restrict) dst; 8641 8642 dw[0] = 8643 __gen_uint(values->EndContext, 0, 0) | 8644 __gen_uint(values->MICommandOpcode, 23, 28) | 8645 __gen_uint(values->CommandType, 29, 31); 8646} 8647 8648#define GEN10_MI_BATCH_BUFFER_START_length 3 8649#define GEN10_MI_BATCH_BUFFER_START_length_bias 2 8650#define GEN10_MI_BATCH_BUFFER_START_header \ 8651 .DWordLength = 1, \ 8652 .MICommandOpcode = 49, \ 8653 .CommandType = 0 8654 8655struct GEN10_MI_BATCH_BUFFER_START { 8656 uint32_t DWordLength; 8657 uint32_t AddressSpaceIndicator; 8658#define ASI_GGTT 0 8659#define ASI_PPGTT 1 8660 bool ResourceStreamerEnable; 8661 bool PredicationEnable; 8662 bool AddOffsetEnable; 8663 uint32_t SecondLevelBatchBuffer; 8664#define Firstlevelbatch 0 8665#define Secondlevelbatch 1 8666 uint32_t MICommandOpcode; 8667 uint32_t CommandType; 8668 __gen_address_type BatchBufferStartAddress; 8669}; 8670 8671static inline void 8672GEN10_MI_BATCH_BUFFER_START_pack(__attribute__((unused)) __gen_user_data *data, 8673 __attribute__((unused)) void * restrict dst, 8674 __attribute__((unused)) const struct GEN10_MI_BATCH_BUFFER_START * restrict values) 8675{ 8676 uint32_t * restrict dw = (uint32_t * restrict) dst; 8677 8678 dw[0] = 8679 __gen_uint(values->DWordLength, 0, 7) | 8680 __gen_uint(values->AddressSpaceIndicator, 8, 8) | 8681 __gen_uint(values->ResourceStreamerEnable, 10, 10) | 8682 __gen_uint(values->PredicationEnable, 15, 15) | 8683 __gen_uint(values->AddOffsetEnable, 16, 16) | 8684 __gen_uint(values->SecondLevelBatchBuffer, 22, 22) | 8685 __gen_uint(values->MICommandOpcode, 23, 28) | 8686 __gen_uint(values->CommandType, 29, 31); 8687 8688 const uint64_t v1_address = 8689 __gen_combine_address(data, &dw[1], values->BatchBufferStartAddress, 0); 8690 dw[1] = v1_address; 8691 dw[2] = v1_address >> 32; 8692} 8693 8694#define GEN10_MI_CLFLUSH_length_bias 2 8695#define GEN10_MI_CLFLUSH_header \ 8696 .DWordLength = 1, \ 8697 .MICommandOpcode = 39, \ 8698 .CommandType = 0 8699 8700struct GEN10_MI_CLFLUSH { 8701 uint32_t DWordLength; 8702 bool UseGlobalGTT; 8703 uint32_t MICommandOpcode; 8704 uint32_t CommandType; 8705 uint32_t StartingCachelineOffset; 8706 __gen_address_type PageBaseAddress; 8707 /* variable length fields follow */ 8708}; 8709 8710static inline void 8711GEN10_MI_CLFLUSH_pack(__attribute__((unused)) __gen_user_data *data, 8712 __attribute__((unused)) void * restrict dst, 8713 __attribute__((unused)) const struct GEN10_MI_CLFLUSH * restrict values) 8714{ 8715 uint32_t * restrict dw = (uint32_t * restrict) dst; 8716 8717 dw[0] = 8718 __gen_uint(values->DWordLength, 0, 9) | 8719 __gen_uint(values->UseGlobalGTT, 22, 22) | 8720 __gen_uint(values->MICommandOpcode, 23, 28) | 8721 __gen_uint(values->CommandType, 29, 31); 8722 8723 const uint64_t v1 = 8724 __gen_uint(values->StartingCachelineOffset, 6, 11); 8725 const uint64_t v1_address = 8726 __gen_combine_address(data, &dw[1], values->PageBaseAddress, v1); 8727 dw[1] = v1_address; 8728 dw[2] = (v1_address >> 32) | (v1 >> 32); 8729} 8730 8731#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_length 4 8732#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_length_bias 2 8733#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_header\ 8734 .DWordLength = 2, \ 8735 .CompareSemaphore = 0, \ 8736 .MICommandOpcode = 54, \ 8737 .CommandType = 0 8738 8739struct GEN10_MI_CONDITIONAL_BATCH_BUFFER_END { 8740 uint32_t DWordLength; 8741 uint32_t CompareMaskMode; 8742#define CompareMaskModeDisabled 0 8743#define CompareMaskModeEnabled 1 8744 uint32_t CompareSemaphore; 8745 bool UseGlobalGTT; 8746 uint32_t MICommandOpcode; 8747 uint32_t CommandType; 8748 uint32_t CompareDataDword; 8749 __gen_address_type CompareAddress; 8750}; 8751 8752static inline void 8753GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_pack(__attribute__((unused)) __gen_user_data *data, 8754 __attribute__((unused)) void * restrict dst, 8755 __attribute__((unused)) const struct GEN10_MI_CONDITIONAL_BATCH_BUFFER_END * restrict values) 8756{ 8757 uint32_t * restrict dw = (uint32_t * restrict) dst; 8758 8759 dw[0] = 8760 __gen_uint(values->DWordLength, 0, 7) | 8761 __gen_uint(values->CompareMaskMode, 19, 19) | 8762 __gen_uint(values->CompareSemaphore, 21, 21) | 8763 __gen_uint(values->UseGlobalGTT, 22, 22) | 8764 __gen_uint(values->MICommandOpcode, 23, 28) | 8765 __gen_uint(values->CommandType, 29, 31); 8766 8767 dw[1] = 8768 __gen_uint(values->CompareDataDword, 0, 31); 8769 8770 const uint64_t v2_address = 8771 __gen_combine_address(data, &dw[2], values->CompareAddress, 0); 8772 dw[2] = v2_address; 8773 dw[3] = v2_address >> 32; 8774} 8775 8776#define GEN10_MI_COPY_MEM_MEM_length 5 8777#define GEN10_MI_COPY_MEM_MEM_length_bias 2 8778#define GEN10_MI_COPY_MEM_MEM_header \ 8779 .DWordLength = 3, \ 8780 .MICommandOpcode = 46, \ 8781 .CommandType = 0 8782 8783struct GEN10_MI_COPY_MEM_MEM { 8784 uint32_t DWordLength; 8785 bool UseGlobalGTTDestination; 8786 bool UseGlobalGTTSource; 8787 uint32_t MICommandOpcode; 8788 uint32_t CommandType; 8789 __gen_address_type DestinationMemoryAddress; 8790 __gen_address_type SourceMemoryAddress; 8791}; 8792 8793static inline void 8794GEN10_MI_COPY_MEM_MEM_pack(__attribute__((unused)) __gen_user_data *data, 8795 __attribute__((unused)) void * restrict dst, 8796 __attribute__((unused)) const struct GEN10_MI_COPY_MEM_MEM * restrict values) 8797{ 8798 uint32_t * restrict dw = (uint32_t * restrict) dst; 8799 8800 dw[0] = 8801 __gen_uint(values->DWordLength, 0, 7) | 8802 __gen_uint(values->UseGlobalGTTDestination, 21, 21) | 8803 __gen_uint(values->UseGlobalGTTSource, 22, 22) | 8804 __gen_uint(values->MICommandOpcode, 23, 28) | 8805 __gen_uint(values->CommandType, 29, 31); 8806 8807 const uint64_t v1_address = 8808 __gen_combine_address(data, &dw[1], values->DestinationMemoryAddress, 0); 8809 dw[1] = v1_address; 8810 dw[2] = v1_address >> 32; 8811 8812 const uint64_t v3_address = 8813 __gen_combine_address(data, &dw[3], values->SourceMemoryAddress, 0); 8814 dw[3] = v3_address; 8815 dw[4] = v3_address >> 32; 8816} 8817 8818#define GEN10_MI_DISPLAY_FLIP_length 3 8819#define GEN10_MI_DISPLAY_FLIP_length_bias 2 8820#define GEN10_MI_DISPLAY_FLIP_header \ 8821 .DWordLength = 1, \ 8822 .MICommandOpcode = 20, \ 8823 .CommandType = 0 8824 8825struct GEN10_MI_DISPLAY_FLIP { 8826 uint32_t DWordLength; 8827 uint32_t DisplayPlaneSelect; 8828#define DisplayPlane1 0 8829#define DisplayPlane2 1 8830#define DisplayPlane3 2 8831#define DisplayPlane4 4 8832#define DisplayPlane5 5 8833#define DisplayPlane6 6 8834#define DisplayPlane7 7 8835#define DisplayPlane8 8 8836#define DisplayPlane9 9 8837#define DisplayPlane10 10 8838#define DisplayPlane11 11 8839#define DisplayPlane12 12 8840 bool AsyncFlipIndicator; 8841 uint32_t MICommandOpcode; 8842 uint32_t CommandType; 8843 uint32_t TileParameter; 8844 uint32_t DisplayBufferPitch; 8845 bool Stereoscopic3DMode; 8846 uint32_t FlipType; 8847#define SyncFlip 0 8848#define AsyncFlip 1 8849#define Stereo3DFlip 2 8850 uint32_t VRRMasterFlip; 8851 __gen_address_type DisplayBufferBaseAddress; 8852 __gen_address_type LeftEyeDisplayBufferBaseAddress; 8853}; 8854 8855static inline void 8856GEN10_MI_DISPLAY_FLIP_pack(__attribute__((unused)) __gen_user_data *data, 8857 __attribute__((unused)) void * restrict dst, 8858 __attribute__((unused)) const struct GEN10_MI_DISPLAY_FLIP * restrict values) 8859{ 8860 uint32_t * restrict dw = (uint32_t * restrict) dst; 8861 8862 dw[0] = 8863 __gen_uint(values->DWordLength, 0, 7) | 8864 __gen_uint(values->DisplayPlaneSelect, 8, 12) | 8865 __gen_uint(values->AsyncFlipIndicator, 22, 22) | 8866 __gen_uint(values->MICommandOpcode, 23, 28) | 8867 __gen_uint(values->CommandType, 29, 31); 8868 8869 dw[1] = 8870 __gen_uint(values->TileParameter, 0, 2) | 8871 __gen_uint(values->DisplayBufferPitch, 6, 15) | 8872 __gen_uint(values->Stereoscopic3DMode, 31, 31); 8873 8874 const uint32_t v2 = 8875 __gen_uint(values->FlipType, 0, 1) | 8876 __gen_uint(values->VRRMasterFlip, 11, 11); 8877 dw[2] = __gen_combine_address(data, &dw[2], values->DisplayBufferBaseAddress, v2); 8878} 8879 8880#define GEN10_MI_FORCE_WAKEUP_length 2 8881#define GEN10_MI_FORCE_WAKEUP_length_bias 2 8882#define GEN10_MI_FORCE_WAKEUP_header \ 8883 .DWordLength = 0, \ 8884 .MICommandOpcode = 29, \ 8885 .CommandType = 0 8886 8887struct GEN10_MI_FORCE_WAKEUP { 8888 uint32_t DWordLength; 8889 uint32_t MICommandOpcode; 8890 uint32_t CommandType; 8891 uint32_t ForceMediaAwake; 8892 uint32_t ForceRenderAwake; 8893 uint32_t MaskBits; 8894}; 8895 8896static inline void 8897GEN10_MI_FORCE_WAKEUP_pack(__attribute__((unused)) __gen_user_data *data, 8898 __attribute__((unused)) void * restrict dst, 8899 __attribute__((unused)) const struct GEN10_MI_FORCE_WAKEUP * restrict values) 8900{ 8901 uint32_t * restrict dw = (uint32_t * restrict) dst; 8902 8903 dw[0] = 8904 __gen_uint(values->DWordLength, 0, 7) | 8905 __gen_uint(values->MICommandOpcode, 23, 28) | 8906 __gen_uint(values->CommandType, 29, 31); 8907 8908 dw[1] = 8909 __gen_uint(values->ForceMediaAwake, 0, 0) | 8910 __gen_uint(values->ForceRenderAwake, 1, 1) | 8911 __gen_uint(values->MaskBits, 16, 31); 8912} 8913 8914#define GEN10_MI_LOAD_REGISTER_IMM_length 3 8915#define GEN10_MI_LOAD_REGISTER_IMM_length_bias 2 8916#define GEN10_MI_LOAD_REGISTER_IMM_header \ 8917 .DWordLength = 1, \ 8918 .MICommandOpcode = 34, \ 8919 .CommandType = 0 8920 8921struct GEN10_MI_LOAD_REGISTER_IMM { 8922 uint32_t DWordLength; 8923 uint32_t ByteWriteDisables; 8924 uint32_t MICommandOpcode; 8925 uint32_t CommandType; 8926 uint64_t RegisterOffset; 8927 uint32_t DataDWord; 8928 /* variable length fields follow */ 8929}; 8930 8931static inline void 8932GEN10_MI_LOAD_REGISTER_IMM_pack(__attribute__((unused)) __gen_user_data *data, 8933 __attribute__((unused)) void * restrict dst, 8934 __attribute__((unused)) const struct GEN10_MI_LOAD_REGISTER_IMM * restrict values) 8935{ 8936 uint32_t * restrict dw = (uint32_t * restrict) dst; 8937 8938 dw[0] = 8939 __gen_uint(values->DWordLength, 0, 7) | 8940 __gen_uint(values->ByteWriteDisables, 8, 11) | 8941 __gen_uint(values->MICommandOpcode, 23, 28) | 8942 __gen_uint(values->CommandType, 29, 31); 8943 8944 dw[1] = 8945 __gen_offset(values->RegisterOffset, 2, 22); 8946 8947 dw[2] = 8948 __gen_uint(values->DataDWord, 0, 31); 8949} 8950 8951#define GEN10_MI_LOAD_REGISTER_MEM_length 4 8952#define GEN10_MI_LOAD_REGISTER_MEM_length_bias 2 8953#define GEN10_MI_LOAD_REGISTER_MEM_header \ 8954 .DWordLength = 2, \ 8955 .MICommandOpcode = 41, \ 8956 .CommandType = 0 8957 8958struct GEN10_MI_LOAD_REGISTER_MEM { 8959 uint32_t DWordLength; 8960 bool AsyncModeEnable; 8961 bool UseGlobalGTT; 8962 uint32_t MICommandOpcode; 8963 uint32_t CommandType; 8964 uint64_t RegisterAddress; 8965 __gen_address_type MemoryAddress; 8966}; 8967 8968static inline void 8969GEN10_MI_LOAD_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 8970 __attribute__((unused)) void * restrict dst, 8971 __attribute__((unused)) const struct GEN10_MI_LOAD_REGISTER_MEM * restrict values) 8972{ 8973 uint32_t * restrict dw = (uint32_t * restrict) dst; 8974 8975 dw[0] = 8976 __gen_uint(values->DWordLength, 0, 7) | 8977 __gen_uint(values->AsyncModeEnable, 21, 21) | 8978 __gen_uint(values->UseGlobalGTT, 22, 22) | 8979 __gen_uint(values->MICommandOpcode, 23, 28) | 8980 __gen_uint(values->CommandType, 29, 31); 8981 8982 dw[1] = 8983 __gen_offset(values->RegisterAddress, 2, 22); 8984 8985 const uint64_t v2_address = 8986 __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 8987 dw[2] = v2_address; 8988 dw[3] = v2_address >> 32; 8989} 8990 8991#define GEN10_MI_LOAD_REGISTER_REG_length 3 8992#define GEN10_MI_LOAD_REGISTER_REG_length_bias 2 8993#define GEN10_MI_LOAD_REGISTER_REG_header \ 8994 .DWordLength = 1, \ 8995 .MICommandOpcode = 42, \ 8996 .CommandType = 0 8997 8998struct GEN10_MI_LOAD_REGISTER_REG { 8999 uint32_t DWordLength; 9000 uint32_t MICommandOpcode; 9001 uint32_t CommandType; 9002 uint64_t SourceRegisterAddress; 9003 uint64_t DestinationRegisterAddress; 9004}; 9005 9006static inline void 9007GEN10_MI_LOAD_REGISTER_REG_pack(__attribute__((unused)) __gen_user_data *data, 9008 __attribute__((unused)) void * restrict dst, 9009 __attribute__((unused)) const struct GEN10_MI_LOAD_REGISTER_REG * restrict values) 9010{ 9011 uint32_t * restrict dw = (uint32_t * restrict) dst; 9012 9013 dw[0] = 9014 __gen_uint(values->DWordLength, 0, 7) | 9015 __gen_uint(values->MICommandOpcode, 23, 28) | 9016 __gen_uint(values->CommandType, 29, 31); 9017 9018 dw[1] = 9019 __gen_offset(values->SourceRegisterAddress, 2, 22); 9020 9021 dw[2] = 9022 __gen_offset(values->DestinationRegisterAddress, 2, 22); 9023} 9024 9025#define GEN10_MI_LOAD_SCAN_LINES_EXCL_length 2 9026#define GEN10_MI_LOAD_SCAN_LINES_EXCL_length_bias 2 9027#define GEN10_MI_LOAD_SCAN_LINES_EXCL_header \ 9028 .DWordLength = 0, \ 9029 .MICommandOpcode = 19, \ 9030 .CommandType = 0 9031 9032struct GEN10_MI_LOAD_SCAN_LINES_EXCL { 9033 uint32_t DWordLength; 9034 uint32_t DisplayPlaneSelect; 9035#define DisplayPlaneA 0 9036#define DisplayPlaneB 1 9037#define DisplayPlaneC 4 9038 uint32_t MICommandOpcode; 9039 uint32_t CommandType; 9040 uint32_t EndScanLineNumber; 9041 uint32_t StartScanLineNumber; 9042}; 9043 9044static inline void 9045GEN10_MI_LOAD_SCAN_LINES_EXCL_pack(__attribute__((unused)) __gen_user_data *data, 9046 __attribute__((unused)) void * restrict dst, 9047 __attribute__((unused)) const struct GEN10_MI_LOAD_SCAN_LINES_EXCL * restrict values) 9048{ 9049 uint32_t * restrict dw = (uint32_t * restrict) dst; 9050 9051 dw[0] = 9052 __gen_uint(values->DWordLength, 0, 5) | 9053 __gen_uint(values->DisplayPlaneSelect, 19, 21) | 9054 __gen_uint(values->MICommandOpcode, 23, 28) | 9055 __gen_uint(values->CommandType, 29, 31); 9056 9057 dw[1] = 9058 __gen_uint(values->EndScanLineNumber, 0, 12) | 9059 __gen_uint(values->StartScanLineNumber, 16, 28); 9060} 9061 9062#define GEN10_MI_LOAD_SCAN_LINES_INCL_length 2 9063#define GEN10_MI_LOAD_SCAN_LINES_INCL_length_bias 2 9064#define GEN10_MI_LOAD_SCAN_LINES_INCL_header \ 9065 .DWordLength = 0, \ 9066 .MICommandOpcode = 18, \ 9067 .CommandType = 0 9068 9069struct GEN10_MI_LOAD_SCAN_LINES_INCL { 9070 uint32_t DWordLength; 9071 uint32_t ScanLineEventDoneForward; 9072 uint32_t DisplayPlaneSelect; 9073#define DisplayPlane1A 0 9074#define DisplayPlane1B 1 9075#define DisplayPlane1C 4 9076 uint32_t MICommandOpcode; 9077 uint32_t CommandType; 9078 uint32_t EndScanLineNumber; 9079 uint32_t StartScanLineNumber; 9080}; 9081 9082static inline void 9083GEN10_MI_LOAD_SCAN_LINES_INCL_pack(__attribute__((unused)) __gen_user_data *data, 9084 __attribute__((unused)) void * restrict dst, 9085 __attribute__((unused)) const struct GEN10_MI_LOAD_SCAN_LINES_INCL * restrict values) 9086{ 9087 uint32_t * restrict dw = (uint32_t * restrict) dst; 9088 9089 dw[0] = 9090 __gen_uint(values->DWordLength, 0, 5) | 9091 __gen_uint(values->ScanLineEventDoneForward, 17, 18) | 9092 __gen_uint(values->DisplayPlaneSelect, 19, 21) | 9093 __gen_uint(values->MICommandOpcode, 23, 28) | 9094 __gen_uint(values->CommandType, 29, 31); 9095 9096 dw[1] = 9097 __gen_uint(values->EndScanLineNumber, 0, 12) | 9098 __gen_uint(values->StartScanLineNumber, 16, 28); 9099} 9100 9101#define GEN10_MI_MATH_length_bias 2 9102#define GEN10_MI_MATH_header \ 9103 .DWordLength = 0, \ 9104 .MICommandOpcode = 26, \ 9105 .CommandType = 0 9106 9107struct GEN10_MI_MATH { 9108 uint32_t DWordLength; 9109 uint32_t MICommandOpcode; 9110 uint32_t CommandType; 9111 /* variable length fields follow */ 9112}; 9113 9114static inline void 9115GEN10_MI_MATH_pack(__attribute__((unused)) __gen_user_data *data, 9116 __attribute__((unused)) void * restrict dst, 9117 __attribute__((unused)) const struct GEN10_MI_MATH * restrict values) 9118{ 9119 uint32_t * restrict dw = (uint32_t * restrict) dst; 9120 9121 dw[0] = 9122 __gen_uint(values->DWordLength, 0, 7) | 9123 __gen_uint(values->MICommandOpcode, 23, 28) | 9124 __gen_uint(values->CommandType, 29, 31); 9125} 9126 9127#define GEN10_MI_NOOP_length 1 9128#define GEN10_MI_NOOP_length_bias 1 9129#define GEN10_MI_NOOP_header \ 9130 .MICommandOpcode = 0, \ 9131 .CommandType = 0 9132 9133struct GEN10_MI_NOOP { 9134 uint32_t IdentificationNumber; 9135 bool IdentificationNumberRegisterWriteEnable; 9136 uint32_t MICommandOpcode; 9137 uint32_t CommandType; 9138}; 9139 9140static inline void 9141GEN10_MI_NOOP_pack(__attribute__((unused)) __gen_user_data *data, 9142 __attribute__((unused)) void * restrict dst, 9143 __attribute__((unused)) const struct GEN10_MI_NOOP * restrict values) 9144{ 9145 uint32_t * restrict dw = (uint32_t * restrict) dst; 9146 9147 dw[0] = 9148 __gen_uint(values->IdentificationNumber, 0, 21) | 9149 __gen_uint(values->IdentificationNumberRegisterWriteEnable, 22, 22) | 9150 __gen_uint(values->MICommandOpcode, 23, 28) | 9151 __gen_uint(values->CommandType, 29, 31); 9152} 9153 9154#define GEN10_MI_PREDICATE_length 1 9155#define GEN10_MI_PREDICATE_length_bias 1 9156#define GEN10_MI_PREDICATE_header \ 9157 .MICommandOpcode = 12, \ 9158 .CommandType = 0 9159 9160struct GEN10_MI_PREDICATE { 9161 uint32_t CompareOperation; 9162#define COMPARE_TRUE 0 9163#define COMPARE_FALSE 1 9164#define COMPARE_SRCS_EQUAL 2 9165#define COMPARE_DELTAS_EQUAL 3 9166 uint32_t CombineOperation; 9167#define COMBINE_SET 0 9168#define COMBINE_AND 1 9169#define COMBINE_OR 2 9170#define COMBINE_XOR 3 9171 uint32_t LoadOperation; 9172#define LOAD_KEEP 0 9173#define LOAD_LOAD 2 9174#define LOAD_LOADINV 3 9175 uint32_t MICommandOpcode; 9176 uint32_t CommandType; 9177}; 9178 9179static inline void 9180GEN10_MI_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 9181 __attribute__((unused)) void * restrict dst, 9182 __attribute__((unused)) const struct GEN10_MI_PREDICATE * restrict values) 9183{ 9184 uint32_t * restrict dw = (uint32_t * restrict) dst; 9185 9186 dw[0] = 9187 __gen_uint(values->CompareOperation, 0, 1) | 9188 __gen_uint(values->CombineOperation, 3, 4) | 9189 __gen_uint(values->LoadOperation, 6, 7) | 9190 __gen_uint(values->MICommandOpcode, 23, 28) | 9191 __gen_uint(values->CommandType, 29, 31); 9192} 9193 9194#define GEN10_MI_REPORT_HEAD_length 1 9195#define GEN10_MI_REPORT_HEAD_length_bias 1 9196#define GEN10_MI_REPORT_HEAD_header \ 9197 .MICommandOpcode = 7, \ 9198 .CommandType = 0 9199 9200struct GEN10_MI_REPORT_HEAD { 9201 uint32_t MICommandOpcode; 9202 uint32_t CommandType; 9203}; 9204 9205static inline void 9206GEN10_MI_REPORT_HEAD_pack(__attribute__((unused)) __gen_user_data *data, 9207 __attribute__((unused)) void * restrict dst, 9208 __attribute__((unused)) const struct GEN10_MI_REPORT_HEAD * restrict values) 9209{ 9210 uint32_t * restrict dw = (uint32_t * restrict) dst; 9211 9212 dw[0] = 9213 __gen_uint(values->MICommandOpcode, 23, 28) | 9214 __gen_uint(values->CommandType, 29, 31); 9215} 9216 9217#define GEN10_MI_REPORT_PERF_COUNT_length 4 9218#define GEN10_MI_REPORT_PERF_COUNT_length_bias 2 9219#define GEN10_MI_REPORT_PERF_COUNT_header \ 9220 .DWordLength = 2, \ 9221 .MICommandOpcode = 40, \ 9222 .CommandType = 0 9223 9224struct GEN10_MI_REPORT_PERF_COUNT { 9225 uint32_t DWordLength; 9226 uint32_t MICommandOpcode; 9227 uint32_t CommandType; 9228 bool UseGlobalGTT; 9229 uint32_t CoreModeEnable; 9230 __gen_address_type MemoryAddress; 9231 uint32_t ReportID; 9232}; 9233 9234static inline void 9235GEN10_MI_REPORT_PERF_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 9236 __attribute__((unused)) void * restrict dst, 9237 __attribute__((unused)) const struct GEN10_MI_REPORT_PERF_COUNT * restrict values) 9238{ 9239 uint32_t * restrict dw = (uint32_t * restrict) dst; 9240 9241 dw[0] = 9242 __gen_uint(values->DWordLength, 0, 5) | 9243 __gen_uint(values->MICommandOpcode, 23, 28) | 9244 __gen_uint(values->CommandType, 29, 31); 9245 9246 const uint64_t v1 = 9247 __gen_uint(values->UseGlobalGTT, 0, 0) | 9248 __gen_uint(values->CoreModeEnable, 4, 4); 9249 const uint64_t v1_address = 9250 __gen_combine_address(data, &dw[1], values->MemoryAddress, v1); 9251 dw[1] = v1_address; 9252 dw[2] = (v1_address >> 32) | (v1 >> 32); 9253 9254 dw[3] = 9255 __gen_uint(values->ReportID, 0, 31); 9256} 9257 9258#define GEN10_MI_RS_CONTEXT_length 1 9259#define GEN10_MI_RS_CONTEXT_length_bias 1 9260#define GEN10_MI_RS_CONTEXT_header \ 9261 .MICommandOpcode = 15, \ 9262 .CommandType = 0 9263 9264struct GEN10_MI_RS_CONTEXT { 9265 uint32_t ResourceStreamerSave; 9266#define RS_Restore 0 9267#define RS_Save 1 9268 uint32_t MICommandOpcode; 9269 uint32_t CommandType; 9270}; 9271 9272static inline void 9273GEN10_MI_RS_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 9274 __attribute__((unused)) void * restrict dst, 9275 __attribute__((unused)) const struct GEN10_MI_RS_CONTEXT * restrict values) 9276{ 9277 uint32_t * restrict dw = (uint32_t * restrict) dst; 9278 9279 dw[0] = 9280 __gen_uint(values->ResourceStreamerSave, 0, 0) | 9281 __gen_uint(values->MICommandOpcode, 23, 28) | 9282 __gen_uint(values->CommandType, 29, 31); 9283} 9284 9285#define GEN10_MI_RS_CONTROL_length 1 9286#define GEN10_MI_RS_CONTROL_length_bias 1 9287#define GEN10_MI_RS_CONTROL_header \ 9288 .MICommandOpcode = 6, \ 9289 .CommandType = 0 9290 9291struct GEN10_MI_RS_CONTROL { 9292 uint32_t ResourceStreamerControl; 9293#define RS_Stop 0 9294#define RS_Start 1 9295 uint32_t MICommandOpcode; 9296 uint32_t CommandType; 9297}; 9298 9299static inline void 9300GEN10_MI_RS_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 9301 __attribute__((unused)) void * restrict dst, 9302 __attribute__((unused)) const struct GEN10_MI_RS_CONTROL * restrict values) 9303{ 9304 uint32_t * restrict dw = (uint32_t * restrict) dst; 9305 9306 dw[0] = 9307 __gen_uint(values->ResourceStreamerControl, 0, 0) | 9308 __gen_uint(values->MICommandOpcode, 23, 28) | 9309 __gen_uint(values->CommandType, 29, 31); 9310} 9311 9312#define GEN10_MI_RS_STORE_DATA_IMM_length 4 9313#define GEN10_MI_RS_STORE_DATA_IMM_length_bias 2 9314#define GEN10_MI_RS_STORE_DATA_IMM_header \ 9315 .DWordLength = 2, \ 9316 .MICommandOpcode = 43, \ 9317 .CommandType = 0 9318 9319struct GEN10_MI_RS_STORE_DATA_IMM { 9320 uint32_t DWordLength; 9321 uint32_t MICommandOpcode; 9322 uint32_t CommandType; 9323 uint32_t CoreModeEnable; 9324 __gen_address_type DestinationAddress; 9325 uint32_t DataDWord0; 9326}; 9327 9328static inline void 9329GEN10_MI_RS_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 9330 __attribute__((unused)) void * restrict dst, 9331 __attribute__((unused)) const struct GEN10_MI_RS_STORE_DATA_IMM * restrict values) 9332{ 9333 uint32_t * restrict dw = (uint32_t * restrict) dst; 9334 9335 dw[0] = 9336 __gen_uint(values->DWordLength, 0, 7) | 9337 __gen_uint(values->MICommandOpcode, 23, 28) | 9338 __gen_uint(values->CommandType, 29, 31); 9339 9340 const uint64_t v1 = 9341 __gen_uint(values->CoreModeEnable, 0, 0); 9342 const uint64_t v1_address = 9343 __gen_combine_address(data, &dw[1], values->DestinationAddress, v1); 9344 dw[1] = v1_address; 9345 dw[2] = (v1_address >> 32) | (v1 >> 32); 9346 9347 dw[3] = 9348 __gen_uint(values->DataDWord0, 0, 31); 9349} 9350 9351#define GEN10_MI_SEMAPHORE_SIGNAL_length 2 9352#define GEN10_MI_SEMAPHORE_SIGNAL_length_bias 2 9353#define GEN10_MI_SEMAPHORE_SIGNAL_header \ 9354 .DWordLength = 0, \ 9355 .MICommandOpcode = 27, \ 9356 .CommandType = 0 9357 9358struct GEN10_MI_SEMAPHORE_SIGNAL { 9359 uint32_t DWordLength; 9360 uint32_t TargetEngineSelect; 9361#define RCS 0 9362#define VCS0 1 9363#define BCS 2 9364#define VECS 3 9365#define VCS1 4 9366 bool PostSyncOperation; 9367 uint32_t MICommandOpcode; 9368 uint32_t CommandType; 9369 uint32_t TargetContextID; 9370}; 9371 9372static inline void 9373GEN10_MI_SEMAPHORE_SIGNAL_pack(__attribute__((unused)) __gen_user_data *data, 9374 __attribute__((unused)) void * restrict dst, 9375 __attribute__((unused)) const struct GEN10_MI_SEMAPHORE_SIGNAL * restrict values) 9376{ 9377 uint32_t * restrict dw = (uint32_t * restrict) dst; 9378 9379 dw[0] = 9380 __gen_uint(values->DWordLength, 0, 7) | 9381 __gen_uint(values->TargetEngineSelect, 15, 17) | 9382 __gen_uint(values->PostSyncOperation, 21, 21) | 9383 __gen_uint(values->MICommandOpcode, 23, 28) | 9384 __gen_uint(values->CommandType, 29, 31); 9385 9386 dw[1] = 9387 __gen_uint(values->TargetContextID, 0, 31); 9388} 9389 9390#define GEN10_MI_SEMAPHORE_WAIT_length 4 9391#define GEN10_MI_SEMAPHORE_WAIT_length_bias 2 9392#define GEN10_MI_SEMAPHORE_WAIT_header \ 9393 .DWordLength = 2, \ 9394 .MICommandOpcode = 28, \ 9395 .CommandType = 0 9396 9397struct GEN10_MI_SEMAPHORE_WAIT { 9398 uint32_t DWordLength; 9399 uint32_t CompareOperation; 9400#define COMPARE_SAD_GREATER_THAN_SDD 0 9401#define COMPARE_SAD_GREATER_THAN_OR_EQUAL_SDD 1 9402#define COMPARE_SAD_LESS_THAN_SDD 2 9403#define COMPARE_SAD_LESS_THAN_OR_EQUAL_SDD 3 9404#define COMPARE_SAD_EQUAL_SDD 4 9405#define COMPARE_SAD_NOT_EQUAL_SDD 5 9406 uint32_t WaitMode; 9407#define PollingMode 1 9408#define SignalMode 0 9409 bool RegisterPollMode; 9410 uint32_t MemoryType; 9411#define PerProcessGraphicsAddress 0 9412#define GlobalGraphicsAddress 1 9413 uint32_t MICommandOpcode; 9414 uint32_t CommandType; 9415 uint32_t SemaphoreDataDword; 9416 __gen_address_type SemaphoreAddress; 9417}; 9418 9419static inline void 9420GEN10_MI_SEMAPHORE_WAIT_pack(__attribute__((unused)) __gen_user_data *data, 9421 __attribute__((unused)) void * restrict dst, 9422 __attribute__((unused)) const struct GEN10_MI_SEMAPHORE_WAIT * restrict values) 9423{ 9424 uint32_t * restrict dw = (uint32_t * restrict) dst; 9425 9426 dw[0] = 9427 __gen_uint(values->DWordLength, 0, 7) | 9428 __gen_uint(values->CompareOperation, 12, 14) | 9429 __gen_uint(values->WaitMode, 15, 15) | 9430 __gen_uint(values->RegisterPollMode, 16, 16) | 9431 __gen_uint(values->MemoryType, 22, 22) | 9432 __gen_uint(values->MICommandOpcode, 23, 28) | 9433 __gen_uint(values->CommandType, 29, 31); 9434 9435 dw[1] = 9436 __gen_uint(values->SemaphoreDataDword, 0, 31); 9437 9438 const uint64_t v2_address = 9439 __gen_combine_address(data, &dw[2], values->SemaphoreAddress, 0); 9440 dw[2] = v2_address; 9441 dw[3] = v2_address >> 32; 9442} 9443 9444#define GEN10_MI_SET_CONTEXT_length 2 9445#define GEN10_MI_SET_CONTEXT_length_bias 2 9446#define GEN10_MI_SET_CONTEXT_header \ 9447 .DWordLength = 0, \ 9448 .MICommandOpcode = 24, \ 9449 .CommandType = 0 9450 9451struct GEN10_MI_SET_CONTEXT { 9452 uint32_t DWordLength; 9453 uint32_t MICommandOpcode; 9454 uint32_t CommandType; 9455 uint32_t RestoreInhibit; 9456 uint32_t ForceRestore; 9457 bool ResourceStreamerStateRestoreEnable; 9458 bool ResourceStreamerStateSaveEnable; 9459 bool CoreModeEnable; 9460 uint32_t ReservedMustbe1; 9461 __gen_address_type LogicalContextAddress; 9462}; 9463 9464static inline void 9465GEN10_MI_SET_CONTEXT_pack(__attribute__((unused)) __gen_user_data *data, 9466 __attribute__((unused)) void * restrict dst, 9467 __attribute__((unused)) const struct GEN10_MI_SET_CONTEXT * restrict values) 9468{ 9469 uint32_t * restrict dw = (uint32_t * restrict) dst; 9470 9471 dw[0] = 9472 __gen_uint(values->DWordLength, 0, 7) | 9473 __gen_uint(values->MICommandOpcode, 23, 28) | 9474 __gen_uint(values->CommandType, 29, 31); 9475 9476 const uint32_t v1 = 9477 __gen_uint(values->RestoreInhibit, 0, 0) | 9478 __gen_uint(values->ForceRestore, 1, 1) | 9479 __gen_uint(values->ResourceStreamerStateRestoreEnable, 2, 2) | 9480 __gen_uint(values->ResourceStreamerStateSaveEnable, 3, 3) | 9481 __gen_uint(values->CoreModeEnable, 4, 4) | 9482 __gen_uint(values->ReservedMustbe1, 8, 8); 9483 dw[1] = __gen_combine_address(data, &dw[1], values->LogicalContextAddress, v1); 9484} 9485 9486#define GEN10_MI_SET_PREDICATE_length 1 9487#define GEN10_MI_SET_PREDICATE_length_bias 1 9488#define GEN10_MI_SET_PREDICATE_header \ 9489 .MICommandOpcode = 1, \ 9490 .CommandType = 0 9491 9492struct GEN10_MI_SET_PREDICATE { 9493 uint32_t PREDICATEENABLE; 9494#define NOOPNever 0 9495#define NOOPonResult2clear 1 9496#define NOOPonResult2set 2 9497#define NOOPonResultclear 3 9498#define NOOPonResultset 4 9499#define NOOPAlways 15 9500 uint32_t MICommandOpcode; 9501 uint32_t CommandType; 9502}; 9503 9504static inline void 9505GEN10_MI_SET_PREDICATE_pack(__attribute__((unused)) __gen_user_data *data, 9506 __attribute__((unused)) void * restrict dst, 9507 __attribute__((unused)) const struct GEN10_MI_SET_PREDICATE * restrict values) 9508{ 9509 uint32_t * restrict dw = (uint32_t * restrict) dst; 9510 9511 dw[0] = 9512 __gen_uint(values->PREDICATEENABLE, 0, 3) | 9513 __gen_uint(values->MICommandOpcode, 23, 28) | 9514 __gen_uint(values->CommandType, 29, 31); 9515} 9516 9517#define GEN10_MI_STORE_DATA_IMM_length 4 9518#define GEN10_MI_STORE_DATA_IMM_length_bias 2 9519#define GEN10_MI_STORE_DATA_IMM_header \ 9520 .DWordLength = 2, \ 9521 .MICommandOpcode = 32, \ 9522 .CommandType = 0 9523 9524struct GEN10_MI_STORE_DATA_IMM { 9525 uint32_t DWordLength; 9526 uint32_t StoreQword; 9527 bool UseGlobalGTT; 9528 uint32_t MICommandOpcode; 9529 uint32_t CommandType; 9530 uint32_t CoreModeEnable; 9531 __gen_address_type Address; 9532 uint64_t ImmediateData; 9533}; 9534 9535static inline void 9536GEN10_MI_STORE_DATA_IMM_pack(__attribute__((unused)) __gen_user_data *data, 9537 __attribute__((unused)) void * restrict dst, 9538 __attribute__((unused)) const struct GEN10_MI_STORE_DATA_IMM * restrict values) 9539{ 9540 uint32_t * restrict dw = (uint32_t * restrict) dst; 9541 9542 dw[0] = 9543 __gen_uint(values->DWordLength, 0, 9) | 9544 __gen_uint(values->StoreQword, 21, 21) | 9545 __gen_uint(values->UseGlobalGTT, 22, 22) | 9546 __gen_uint(values->MICommandOpcode, 23, 28) | 9547 __gen_uint(values->CommandType, 29, 31); 9548 9549 const uint64_t v1 = 9550 __gen_uint(values->CoreModeEnable, 0, 0); 9551 const uint64_t v1_address = 9552 __gen_combine_address(data, &dw[1], values->Address, v1); 9553 dw[1] = v1_address; 9554 dw[2] = (v1_address >> 32) | (v1 >> 32); 9555 9556 const uint64_t v3 = 9557 __gen_uint(values->ImmediateData, 0, 63); 9558 dw[3] = v3; 9559 dw[4] = v3 >> 32; 9560} 9561 9562#define GEN10_MI_STORE_DATA_INDEX_length 3 9563#define GEN10_MI_STORE_DATA_INDEX_length_bias 2 9564#define GEN10_MI_STORE_DATA_INDEX_header \ 9565 .DWordLength = 1, \ 9566 .MICommandOpcode = 33, \ 9567 .CommandType = 0 9568 9569struct GEN10_MI_STORE_DATA_INDEX { 9570 uint32_t DWordLength; 9571 uint32_t UsePerProcessHardwareStatusPage; 9572 uint32_t MICommandOpcode; 9573 uint32_t CommandType; 9574 uint32_t Offset; 9575 uint32_t DataDWord0; 9576 uint32_t DataDWord1; 9577}; 9578 9579static inline void 9580GEN10_MI_STORE_DATA_INDEX_pack(__attribute__((unused)) __gen_user_data *data, 9581 __attribute__((unused)) void * restrict dst, 9582 __attribute__((unused)) const struct GEN10_MI_STORE_DATA_INDEX * restrict values) 9583{ 9584 uint32_t * restrict dw = (uint32_t * restrict) dst; 9585 9586 dw[0] = 9587 __gen_uint(values->DWordLength, 0, 7) | 9588 __gen_uint(values->UsePerProcessHardwareStatusPage, 21, 21) | 9589 __gen_uint(values->MICommandOpcode, 23, 28) | 9590 __gen_uint(values->CommandType, 29, 31); 9591 9592 dw[1] = 9593 __gen_uint(values->Offset, 2, 11); 9594 9595 dw[2] = 9596 __gen_uint(values->DataDWord0, 0, 31); 9597} 9598 9599#define GEN10_MI_STORE_REGISTER_MEM_length 4 9600#define GEN10_MI_STORE_REGISTER_MEM_length_bias 2 9601#define GEN10_MI_STORE_REGISTER_MEM_header \ 9602 .DWordLength = 2, \ 9603 .MICommandOpcode = 36, \ 9604 .CommandType = 0 9605 9606struct GEN10_MI_STORE_REGISTER_MEM { 9607 uint32_t DWordLength; 9608 bool PredicateEnable; 9609 bool UseGlobalGTT; 9610 uint32_t MICommandOpcode; 9611 uint32_t CommandType; 9612 uint64_t RegisterAddress; 9613 __gen_address_type MemoryAddress; 9614}; 9615 9616static inline void 9617GEN10_MI_STORE_REGISTER_MEM_pack(__attribute__((unused)) __gen_user_data *data, 9618 __attribute__((unused)) void * restrict dst, 9619 __attribute__((unused)) const struct GEN10_MI_STORE_REGISTER_MEM * restrict values) 9620{ 9621 uint32_t * restrict dw = (uint32_t * restrict) dst; 9622 9623 dw[0] = 9624 __gen_uint(values->DWordLength, 0, 7) | 9625 __gen_uint(values->PredicateEnable, 21, 21) | 9626 __gen_uint(values->UseGlobalGTT, 22, 22) | 9627 __gen_uint(values->MICommandOpcode, 23, 28) | 9628 __gen_uint(values->CommandType, 29, 31); 9629 9630 dw[1] = 9631 __gen_offset(values->RegisterAddress, 2, 22); 9632 9633 const uint64_t v2_address = 9634 __gen_combine_address(data, &dw[2], values->MemoryAddress, 0); 9635 dw[2] = v2_address; 9636 dw[3] = v2_address >> 32; 9637} 9638 9639#define GEN10_MI_SUSPEND_FLUSH_length 1 9640#define GEN10_MI_SUSPEND_FLUSH_length_bias 1 9641#define GEN10_MI_SUSPEND_FLUSH_header \ 9642 .MICommandOpcode = 11, \ 9643 .CommandType = 0 9644 9645struct GEN10_MI_SUSPEND_FLUSH { 9646 bool SuspendFlush; 9647 uint32_t MICommandOpcode; 9648 uint32_t CommandType; 9649}; 9650 9651static inline void 9652GEN10_MI_SUSPEND_FLUSH_pack(__attribute__((unused)) __gen_user_data *data, 9653 __attribute__((unused)) void * restrict dst, 9654 __attribute__((unused)) const struct GEN10_MI_SUSPEND_FLUSH * restrict values) 9655{ 9656 uint32_t * restrict dw = (uint32_t * restrict) dst; 9657 9658 dw[0] = 9659 __gen_uint(values->SuspendFlush, 0, 0) | 9660 __gen_uint(values->MICommandOpcode, 23, 28) | 9661 __gen_uint(values->CommandType, 29, 31); 9662} 9663 9664#define GEN10_MI_TOPOLOGY_FILTER_length 1 9665#define GEN10_MI_TOPOLOGY_FILTER_length_bias 1 9666#define GEN10_MI_TOPOLOGY_FILTER_header \ 9667 .MICommandOpcode = 13, \ 9668 .CommandType = 0 9669 9670struct GEN10_MI_TOPOLOGY_FILTER { 9671 enum GEN10_3D_Prim_Topo_Type TopologyFilterValue; 9672 uint32_t MICommandOpcode; 9673 uint32_t CommandType; 9674}; 9675 9676static inline void 9677GEN10_MI_TOPOLOGY_FILTER_pack(__attribute__((unused)) __gen_user_data *data, 9678 __attribute__((unused)) void * restrict dst, 9679 __attribute__((unused)) const struct GEN10_MI_TOPOLOGY_FILTER * restrict values) 9680{ 9681 uint32_t * restrict dw = (uint32_t * restrict) dst; 9682 9683 dw[0] = 9684 __gen_uint(values->TopologyFilterValue, 0, 5) | 9685 __gen_uint(values->MICommandOpcode, 23, 28) | 9686 __gen_uint(values->CommandType, 29, 31); 9687} 9688 9689#define GEN10_MI_UPDATE_GTT_length_bias 2 9690#define GEN10_MI_UPDATE_GTT_header \ 9691 .DWordLength = 0, \ 9692 .MICommandOpcode = 35, \ 9693 .CommandType = 0 9694 9695struct GEN10_MI_UPDATE_GTT { 9696 uint32_t DWordLength; 9697 uint32_t MICommandOpcode; 9698 uint32_t CommandType; 9699 __gen_address_type EntryAddress; 9700 /* variable length fields follow */ 9701}; 9702 9703static inline void 9704GEN10_MI_UPDATE_GTT_pack(__attribute__((unused)) __gen_user_data *data, 9705 __attribute__((unused)) void * restrict dst, 9706 __attribute__((unused)) const struct GEN10_MI_UPDATE_GTT * restrict values) 9707{ 9708 uint32_t * restrict dw = (uint32_t * restrict) dst; 9709 9710 dw[0] = 9711 __gen_uint(values->DWordLength, 0, 9) | 9712 __gen_uint(values->MICommandOpcode, 23, 28) | 9713 __gen_uint(values->CommandType, 29, 31); 9714 9715 dw[1] = __gen_combine_address(data, &dw[1], values->EntryAddress, 0); 9716} 9717 9718#define GEN10_MI_USER_INTERRUPT_length 1 9719#define GEN10_MI_USER_INTERRUPT_length_bias 1 9720#define GEN10_MI_USER_INTERRUPT_header \ 9721 .MICommandOpcode = 2, \ 9722 .CommandType = 0 9723 9724struct GEN10_MI_USER_INTERRUPT { 9725 uint32_t MICommandOpcode; 9726 uint32_t CommandType; 9727}; 9728 9729static inline void 9730GEN10_MI_USER_INTERRUPT_pack(__attribute__((unused)) __gen_user_data *data, 9731 __attribute__((unused)) void * restrict dst, 9732 __attribute__((unused)) const struct GEN10_MI_USER_INTERRUPT * restrict values) 9733{ 9734 uint32_t * restrict dw = (uint32_t * restrict) dst; 9735 9736 dw[0] = 9737 __gen_uint(values->MICommandOpcode, 23, 28) | 9738 __gen_uint(values->CommandType, 29, 31); 9739} 9740 9741#define GEN10_MI_WAIT_FOR_EVENT_length 1 9742#define GEN10_MI_WAIT_FOR_EVENT_length_bias 1 9743#define GEN10_MI_WAIT_FOR_EVENT_header \ 9744 .MICommandOpcode = 3, \ 9745 .CommandType = 0 9746 9747struct GEN10_MI_WAIT_FOR_EVENT { 9748 bool DisplayPlnae1AScanLineWaitEnable; 9749 bool DisplayPlane1FlipPendingWaitEnable; 9750 bool DisplayPlane4FlipPendingWaitEnable; 9751 bool DisplayPlane1AVerticalBlankWaitEnable; 9752 bool DisplayPlane7FlipPendingWaitEnable; 9753 bool DisplayPlane8FlipPendingWaitEnable; 9754 bool DisplayPlane1BScanLineWaitEnable; 9755 bool DisplayPlane2FlipPendingWaitEnable; 9756 bool DisplayPlane5FlipPendingWaitEnable; 9757 bool DisplayPlane1BVerticalBlankWaitEnable; 9758 bool DisplayPlane1CScanLineWaitEnable; 9759 bool DisplayPlane3FlipPendingWaitEnable; 9760 bool DisplayPlane9FlipPendingWaitEnable; 9761 bool DisplayPlane10FlipPendingWaitEnable; 9762 bool DisplayPlane11FlipPendingWaitEnable; 9763 bool DisplayPlane12FlipPendingWaitEnable; 9764 bool DisplayPlane6FlipPendingWaitEnable; 9765 bool DisplayPlane1CVerticalBlankWaitEnable; 9766 uint32_t MICommandOpcode; 9767 uint32_t CommandType; 9768}; 9769 9770static inline void 9771GEN10_MI_WAIT_FOR_EVENT_pack(__attribute__((unused)) __gen_user_data *data, 9772 __attribute__((unused)) void * restrict dst, 9773 __attribute__((unused)) const struct GEN10_MI_WAIT_FOR_EVENT * restrict values) 9774{ 9775 uint32_t * restrict dw = (uint32_t * restrict) dst; 9776 9777 dw[0] = 9778 __gen_uint(values->DisplayPlnae1AScanLineWaitEnable, 0, 0) | 9779 __gen_uint(values->DisplayPlane1FlipPendingWaitEnable, 1, 1) | 9780 __gen_uint(values->DisplayPlane4FlipPendingWaitEnable, 2, 2) | 9781 __gen_uint(values->DisplayPlane1AVerticalBlankWaitEnable, 3, 3) | 9782 __gen_uint(values->DisplayPlane7FlipPendingWaitEnable, 6, 6) | 9783 __gen_uint(values->DisplayPlane8FlipPendingWaitEnable, 7, 7) | 9784 __gen_uint(values->DisplayPlane1BScanLineWaitEnable, 8, 8) | 9785 __gen_uint(values->DisplayPlane2FlipPendingWaitEnable, 9, 9) | 9786 __gen_uint(values->DisplayPlane5FlipPendingWaitEnable, 10, 10) | 9787 __gen_uint(values->DisplayPlane1BVerticalBlankWaitEnable, 11, 11) | 9788 __gen_uint(values->DisplayPlane1CScanLineWaitEnable, 14, 14) | 9789 __gen_uint(values->DisplayPlane3FlipPendingWaitEnable, 15, 15) | 9790 __gen_uint(values->DisplayPlane9FlipPendingWaitEnable, 16, 16) | 9791 __gen_uint(values->DisplayPlane10FlipPendingWaitEnable, 17, 17) | 9792 __gen_uint(values->DisplayPlane11FlipPendingWaitEnable, 18, 18) | 9793 __gen_uint(values->DisplayPlane12FlipPendingWaitEnable, 19, 19) | 9794 __gen_uint(values->DisplayPlane6FlipPendingWaitEnable, 20, 20) | 9795 __gen_uint(values->DisplayPlane1CVerticalBlankWaitEnable, 21, 21) | 9796 __gen_uint(values->MICommandOpcode, 23, 28) | 9797 __gen_uint(values->CommandType, 29, 31); 9798} 9799 9800#define GEN10_PIPELINE_SELECT_length 1 9801#define GEN10_PIPELINE_SELECT_length_bias 1 9802#define GEN10_PIPELINE_SELECT_header \ 9803 ._3DCommandSubOpcode = 4, \ 9804 ._3DCommandOpcode = 1, \ 9805 .CommandSubType = 1, \ 9806 .CommandType = 3 9807 9808struct GEN10_PIPELINE_SELECT { 9809 uint32_t PipelineSelection; 9810#define _3D 0 9811#define Media 1 9812#define GPGPU 2 9813 bool MediaSamplerDOPClockGateEnable; 9814 bool ForceMediaAwake; 9815 uint32_t MaskBits; 9816 uint32_t _3DCommandSubOpcode; 9817 uint32_t _3DCommandOpcode; 9818 uint32_t CommandSubType; 9819 uint32_t CommandType; 9820}; 9821 9822static inline void 9823GEN10_PIPELINE_SELECT_pack(__attribute__((unused)) __gen_user_data *data, 9824 __attribute__((unused)) void * restrict dst, 9825 __attribute__((unused)) const struct GEN10_PIPELINE_SELECT * restrict values) 9826{ 9827 uint32_t * restrict dw = (uint32_t * restrict) dst; 9828 9829 dw[0] = 9830 __gen_uint(values->PipelineSelection, 0, 1) | 9831 __gen_uint(values->MediaSamplerDOPClockGateEnable, 4, 4) | 9832 __gen_uint(values->ForceMediaAwake, 5, 5) | 9833 __gen_uint(values->MaskBits, 8, 15) | 9834 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9835 __gen_uint(values->_3DCommandOpcode, 24, 26) | 9836 __gen_uint(values->CommandSubType, 27, 28) | 9837 __gen_uint(values->CommandType, 29, 31); 9838} 9839 9840#define GEN10_PIPE_CONTROL_length 6 9841#define GEN10_PIPE_CONTROL_length_bias 2 9842#define GEN10_PIPE_CONTROL_header \ 9843 .DWordLength = 4, \ 9844 ._3DCommandSubOpcode = 0, \ 9845 ._3DCommandOpcode = 2, \ 9846 .CommandSubType = 3, \ 9847 .CommandType = 3 9848 9849struct GEN10_PIPE_CONTROL { 9850 uint32_t DWordLength; 9851 uint32_t _3DCommandSubOpcode; 9852 uint32_t _3DCommandOpcode; 9853 uint32_t CommandSubType; 9854 uint32_t CommandType; 9855 bool DepthCacheFlushEnable; 9856 bool StallAtPixelScoreboard; 9857 bool StateCacheInvalidationEnable; 9858 bool ConstantCacheInvalidationEnable; 9859 bool VFCacheInvalidationEnable; 9860 bool DCFlushEnable; 9861 bool PipeControlFlushEnable; 9862 bool NotifyEnable; 9863 bool IndirectStatePointersDisable; 9864 bool TextureCacheInvalidationEnable; 9865 bool InstructionCacheInvalidateEnable; 9866 bool RenderTargetCacheFlushEnable; 9867 bool DepthStallEnable; 9868 uint32_t PostSyncOperation; 9869#define NoWrite 0 9870#define WriteImmediateData 1 9871#define WritePSDepthCount 2 9872#define WriteTimestamp 3 9873 bool GenericMediaStateClear; 9874 bool PSDSyncEnable; 9875 bool TLBInvalidate; 9876 bool GlobalSnapshotCountReset; 9877 bool CommandStreamerStallEnable; 9878 uint32_t StoreDataIndex; 9879 uint32_t LRIPostSyncOperation; 9880#define NoLRIOperation 0 9881#define MMIOWriteImmediateData 1 9882 uint32_t DestinationAddressType; 9883#define DAT_PPGTT 0 9884#define DAT_GGTT 1 9885 bool FlushLLC; 9886 __gen_address_type Address; 9887 uint64_t ImmediateData; 9888}; 9889 9890static inline void 9891GEN10_PIPE_CONTROL_pack(__attribute__((unused)) __gen_user_data *data, 9892 __attribute__((unused)) void * restrict dst, 9893 __attribute__((unused)) const struct GEN10_PIPE_CONTROL * restrict values) 9894{ 9895 uint32_t * restrict dw = (uint32_t * restrict) dst; 9896 9897 dw[0] = 9898 __gen_uint(values->DWordLength, 0, 7) | 9899 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9900 __gen_uint(values->_3DCommandOpcode, 24, 26) | 9901 __gen_uint(values->CommandSubType, 27, 28) | 9902 __gen_uint(values->CommandType, 29, 31); 9903 9904 dw[1] = 9905 __gen_uint(values->DepthCacheFlushEnable, 0, 0) | 9906 __gen_uint(values->StallAtPixelScoreboard, 1, 1) | 9907 __gen_uint(values->StateCacheInvalidationEnable, 2, 2) | 9908 __gen_uint(values->ConstantCacheInvalidationEnable, 3, 3) | 9909 __gen_uint(values->VFCacheInvalidationEnable, 4, 4) | 9910 __gen_uint(values->DCFlushEnable, 5, 5) | 9911 __gen_uint(values->PipeControlFlushEnable, 7, 7) | 9912 __gen_uint(values->NotifyEnable, 8, 8) | 9913 __gen_uint(values->IndirectStatePointersDisable, 9, 9) | 9914 __gen_uint(values->TextureCacheInvalidationEnable, 10, 10) | 9915 __gen_uint(values->InstructionCacheInvalidateEnable, 11, 11) | 9916 __gen_uint(values->RenderTargetCacheFlushEnable, 12, 12) | 9917 __gen_uint(values->DepthStallEnable, 13, 13) | 9918 __gen_uint(values->PostSyncOperation, 14, 15) | 9919 __gen_uint(values->GenericMediaStateClear, 16, 16) | 9920 __gen_uint(values->PSDSyncEnable, 17, 17) | 9921 __gen_uint(values->TLBInvalidate, 18, 18) | 9922 __gen_uint(values->GlobalSnapshotCountReset, 19, 19) | 9923 __gen_uint(values->CommandStreamerStallEnable, 20, 20) | 9924 __gen_uint(values->StoreDataIndex, 21, 21) | 9925 __gen_uint(values->LRIPostSyncOperation, 23, 23) | 9926 __gen_uint(values->DestinationAddressType, 24, 24) | 9927 __gen_uint(values->FlushLLC, 26, 26); 9928 9929 const uint64_t v2_address = 9930 __gen_combine_address(data, &dw[2], values->Address, 0); 9931 dw[2] = v2_address; 9932 dw[3] = v2_address >> 32; 9933 9934 const uint64_t v4 = 9935 __gen_uint(values->ImmediateData, 0, 63); 9936 dw[4] = v4; 9937 dw[5] = v4 >> 32; 9938} 9939 9940#define GEN10_STATE_BASE_ADDRESS_length 22 9941#define GEN10_STATE_BASE_ADDRESS_length_bias 2 9942#define GEN10_STATE_BASE_ADDRESS_header \ 9943 .DWordLength = 20, \ 9944 ._3DCommandSubOpcode = 1, \ 9945 ._3DCommandOpcode = 1, \ 9946 .CommandSubType = 0, \ 9947 .CommandType = 3 9948 9949struct GEN10_STATE_BASE_ADDRESS { 9950 uint32_t DWordLength; 9951 uint32_t _3DCommandSubOpcode; 9952 uint32_t _3DCommandOpcode; 9953 uint32_t CommandSubType; 9954 uint32_t CommandType; 9955 bool GeneralStateBaseAddressModifyEnable; 9956 uint32_t GeneralStateMOCS; 9957 __gen_address_type GeneralStateBaseAddress; 9958 uint32_t StatelessDataPortAccessMOCS; 9959 bool SurfaceStateBaseAddressModifyEnable; 9960 uint32_t SurfaceStateMOCS; 9961 __gen_address_type SurfaceStateBaseAddress; 9962 bool DynamicStateBaseAddressModifyEnable; 9963 uint32_t DynamicStateMOCS; 9964 __gen_address_type DynamicStateBaseAddress; 9965 bool IndirectObjectBaseAddressModifyEnable; 9966 uint32_t IndirectObjectMOCS; 9967 __gen_address_type IndirectObjectBaseAddress; 9968 bool InstructionBaseAddressModifyEnable; 9969 uint32_t InstructionMOCS; 9970 __gen_address_type InstructionBaseAddress; 9971 bool GeneralStateBufferSizeModifyEnable; 9972 uint32_t GeneralStateBufferSize; 9973 bool DynamicStateBufferSizeModifyEnable; 9974 uint32_t DynamicStateBufferSize; 9975 bool IndirectObjectBufferSizeModifyEnable; 9976 uint32_t IndirectObjectBufferSize; 9977 bool InstructionBuffersizeModifyEnable; 9978 uint32_t InstructionBufferSize; 9979 bool BindlessSurfaceStateBaseAddressModifyEnable; 9980 uint32_t BindlessSurfaceStateMOCS; 9981 __gen_address_type BindlessSurfaceStateBaseAddress; 9982 uint32_t BindlessSurfaceStateSize; 9983 bool BindlessSamplerStateBaseAddressModifyEnable; 9984 uint32_t BindlessSamplerStateMOCS; 9985 __gen_address_type BindlessSamplerStateBaseAddress; 9986 uint32_t BindlessSamplerStateBufferSize; 9987}; 9988 9989static inline void 9990GEN10_STATE_BASE_ADDRESS_pack(__attribute__((unused)) __gen_user_data *data, 9991 __attribute__((unused)) void * restrict dst, 9992 __attribute__((unused)) const struct GEN10_STATE_BASE_ADDRESS * restrict values) 9993{ 9994 uint32_t * restrict dw = (uint32_t * restrict) dst; 9995 9996 dw[0] = 9997 __gen_uint(values->DWordLength, 0, 7) | 9998 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 9999 __gen_uint(values->_3DCommandOpcode, 24, 26) | 10000 __gen_uint(values->CommandSubType, 27, 28) | 10001 __gen_uint(values->CommandType, 29, 31); 10002 10003 const uint64_t v1 = 10004 __gen_uint(values->GeneralStateBaseAddressModifyEnable, 0, 0) | 10005 __gen_uint(values->GeneralStateMOCS, 4, 10); 10006 const uint64_t v1_address = 10007 __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, v1); 10008 dw[1] = v1_address; 10009 dw[2] = (v1_address >> 32) | (v1 >> 32); 10010 10011 dw[3] = 10012 __gen_uint(values->StatelessDataPortAccessMOCS, 16, 22); 10013 10014 const uint64_t v4 = 10015 __gen_uint(values->SurfaceStateBaseAddressModifyEnable, 0, 0) | 10016 __gen_uint(values->SurfaceStateMOCS, 4, 10); 10017 const uint64_t v4_address = 10018 __gen_combine_address(data, &dw[4], values->SurfaceStateBaseAddress, v4); 10019 dw[4] = v4_address; 10020 dw[5] = (v4_address >> 32) | (v4 >> 32); 10021 10022 const uint64_t v6 = 10023 __gen_uint(values->DynamicStateBaseAddressModifyEnable, 0, 0) | 10024 __gen_uint(values->DynamicStateMOCS, 4, 10); 10025 const uint64_t v6_address = 10026 __gen_combine_address(data, &dw[6], values->DynamicStateBaseAddress, v6); 10027 dw[6] = v6_address; 10028 dw[7] = (v6_address >> 32) | (v6 >> 32); 10029 10030 const uint64_t v8 = 10031 __gen_uint(values->IndirectObjectBaseAddressModifyEnable, 0, 0) | 10032 __gen_uint(values->IndirectObjectMOCS, 4, 10); 10033 const uint64_t v8_address = 10034 __gen_combine_address(data, &dw[8], values->IndirectObjectBaseAddress, v8); 10035 dw[8] = v8_address; 10036 dw[9] = (v8_address >> 32) | (v8 >> 32); 10037 10038 const uint64_t v10 = 10039 __gen_uint(values->InstructionBaseAddressModifyEnable, 0, 0) | 10040 __gen_uint(values->InstructionMOCS, 4, 10); 10041 const uint64_t v10_address = 10042 __gen_combine_address(data, &dw[10], values->InstructionBaseAddress, v10); 10043 dw[10] = v10_address; 10044 dw[11] = (v10_address >> 32) | (v10 >> 32); 10045 10046 dw[12] = 10047 __gen_uint(values->GeneralStateBufferSizeModifyEnable, 0, 0) | 10048 __gen_uint(values->GeneralStateBufferSize, 12, 31); 10049 10050 dw[13] = 10051 __gen_uint(values->DynamicStateBufferSizeModifyEnable, 0, 0) | 10052 __gen_uint(values->DynamicStateBufferSize, 12, 31); 10053 10054 dw[14] = 10055 __gen_uint(values->IndirectObjectBufferSizeModifyEnable, 0, 0) | 10056 __gen_uint(values->IndirectObjectBufferSize, 12, 31); 10057 10058 dw[15] = 10059 __gen_uint(values->InstructionBuffersizeModifyEnable, 0, 0) | 10060 __gen_uint(values->InstructionBufferSize, 12, 31); 10061 10062 const uint64_t v16 = 10063 __gen_uint(values->BindlessSurfaceStateBaseAddressModifyEnable, 0, 0) | 10064 __gen_uint(values->BindlessSurfaceStateMOCS, 4, 10); 10065 const uint64_t v16_address = 10066 __gen_combine_address(data, &dw[16], values->BindlessSurfaceStateBaseAddress, v16); 10067 dw[16] = v16_address; 10068 dw[17] = (v16_address >> 32) | (v16 >> 32); 10069 10070 dw[18] = 10071 __gen_uint(values->BindlessSurfaceStateSize, 12, 31); 10072 10073 const uint64_t v19 = 10074 __gen_uint(values->BindlessSamplerStateBaseAddressModifyEnable, 0, 0) | 10075 __gen_uint(values->BindlessSamplerStateMOCS, 4, 10); 10076 const uint64_t v19_address = 10077 __gen_combine_address(data, &dw[19], values->BindlessSamplerStateBaseAddress, v19); 10078 dw[19] = v19_address; 10079 dw[20] = (v19_address >> 32) | (v19 >> 32); 10080 10081 dw[21] = 10082 __gen_uint(values->BindlessSamplerStateBufferSize, 12, 31); 10083} 10084 10085#define GEN10_STATE_SIP_length 3 10086#define GEN10_STATE_SIP_length_bias 2 10087#define GEN10_STATE_SIP_header \ 10088 .DWordLength = 1, \ 10089 ._3DCommandSubOpcode = 2, \ 10090 ._3DCommandOpcode = 1, \ 10091 .CommandSubType = 0, \ 10092 .CommandType = 3 10093 10094struct GEN10_STATE_SIP { 10095 uint32_t DWordLength; 10096 uint32_t _3DCommandSubOpcode; 10097 uint32_t _3DCommandOpcode; 10098 uint32_t CommandSubType; 10099 uint32_t CommandType; 10100 uint64_t SystemInstructionPointer; 10101}; 10102 10103static inline void 10104GEN10_STATE_SIP_pack(__attribute__((unused)) __gen_user_data *data, 10105 __attribute__((unused)) void * restrict dst, 10106 __attribute__((unused)) const struct GEN10_STATE_SIP * restrict values) 10107{ 10108 uint32_t * restrict dw = (uint32_t * restrict) dst; 10109 10110 dw[0] = 10111 __gen_uint(values->DWordLength, 0, 7) | 10112 __gen_uint(values->_3DCommandSubOpcode, 16, 23) | 10113 __gen_uint(values->_3DCommandOpcode, 24, 26) | 10114 __gen_uint(values->CommandSubType, 27, 28) | 10115 __gen_uint(values->CommandType, 29, 31); 10116 10117 const uint64_t v1 = 10118 __gen_offset(values->SystemInstructionPointer, 4, 63); 10119 dw[1] = v1; 10120 dw[2] = v1 >> 32; 10121} 10122 10123#define GEN10_BCS_INSTDONE_num 0x2206c 10124#define GEN10_BCS_INSTDONE_length 1 10125struct GEN10_BCS_INSTDONE { 10126 bool RingEnable; 10127 bool BlitterIDLE; 10128 bool GABIDLE; 10129 bool BCSDone; 10130}; 10131 10132static inline void 10133GEN10_BCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10134 __attribute__((unused)) void * restrict dst, 10135 __attribute__((unused)) const struct GEN10_BCS_INSTDONE * restrict values) 10136{ 10137 uint32_t * restrict dw = (uint32_t * restrict) dst; 10138 10139 dw[0] = 10140 __gen_uint(values->RingEnable, 0, 0) | 10141 __gen_uint(values->BlitterIDLE, 1, 1) | 10142 __gen_uint(values->GABIDLE, 2, 2) | 10143 __gen_uint(values->BCSDone, 3, 3); 10144} 10145 10146#define GEN10_CACHE_MODE_0_num 0x7000 10147#define GEN10_CACHE_MODE_0_length 1 10148struct GEN10_CACHE_MODE_0 { 10149 bool Nulltilefixdisable; 10150 bool Disableclockgatinginthepixelbackend; 10151 bool HierarchicalZRAWStallOptimizationDisable; 10152 bool RCCEvictionPolicy; 10153 bool STCPMAOptimizationEnable; 10154 uint32_t SamplerL2RequestArbitration; 10155#define RoundRobin 0 10156#define FetchareHighestPriority 1 10157#define ConstantsareHighestPriority 2 10158 bool SamplerL2TLBPrefetchEnable; 10159 bool SamplerSetRemappingfor3DDisable; 10160 uint32_t MSAACompressionPlaneNumberThresholdforeLLC; 10161 bool SamplerL2Disable; 10162 bool NulltilefixdisableMask; 10163 bool DisableclockgatinginthepixelbackendMask; 10164 bool HierarchicalZRAWStallOptimizationDisableMask; 10165 bool RCCEvictionPolicyMask; 10166 bool STCPMAOptimizationEnableMask; 10167 uint32_t SamplerL2RequestArbitrationMask; 10168 bool SamplerL2TLBPrefetchEnableMask; 10169 bool SamplerSetRemappingfor3DDisableMask; 10170 uint32_t MSAACompressionPlaneNumberThresholdforeLLCMask; 10171 bool SamplerL2DisableMask; 10172}; 10173 10174static inline void 10175GEN10_CACHE_MODE_0_pack(__attribute__((unused)) __gen_user_data *data, 10176 __attribute__((unused)) void * restrict dst, 10177 __attribute__((unused)) const struct GEN10_CACHE_MODE_0 * restrict values) 10178{ 10179 uint32_t * restrict dw = (uint32_t * restrict) dst; 10180 10181 dw[0] = 10182 __gen_uint(values->Nulltilefixdisable, 0, 0) | 10183 __gen_uint(values->Disableclockgatinginthepixelbackend, 1, 1) | 10184 __gen_uint(values->HierarchicalZRAWStallOptimizationDisable, 2, 2) | 10185 __gen_uint(values->RCCEvictionPolicy, 4, 4) | 10186 __gen_uint(values->STCPMAOptimizationEnable, 5, 5) | 10187 __gen_uint(values->SamplerL2RequestArbitration, 6, 7) | 10188 __gen_uint(values->SamplerL2TLBPrefetchEnable, 9, 9) | 10189 __gen_uint(values->SamplerSetRemappingfor3DDisable, 11, 11) | 10190 __gen_uint(values->MSAACompressionPlaneNumberThresholdforeLLC, 12, 14) | 10191 __gen_uint(values->SamplerL2Disable, 15, 15) | 10192 __gen_uint(values->NulltilefixdisableMask, 16, 16) | 10193 __gen_uint(values->DisableclockgatinginthepixelbackendMask, 17, 17) | 10194 __gen_uint(values->HierarchicalZRAWStallOptimizationDisableMask, 18, 18) | 10195 __gen_uint(values->RCCEvictionPolicyMask, 20, 20) | 10196 __gen_uint(values->STCPMAOptimizationEnableMask, 21, 21) | 10197 __gen_uint(values->SamplerL2RequestArbitrationMask, 22, 23) | 10198 __gen_uint(values->SamplerL2TLBPrefetchEnableMask, 25, 25) | 10199 __gen_uint(values->SamplerSetRemappingfor3DDisableMask, 27, 27) | 10200 __gen_uint(values->MSAACompressionPlaneNumberThresholdforeLLCMask, 28, 30) | 10201 __gen_uint(values->SamplerL2DisableMask, 31, 31); 10202} 10203 10204#define GEN10_CACHE_MODE_1_num 0x7004 10205#define GEN10_CACHE_MODE_1_length 1 10206struct GEN10_CACHE_MODE_1 { 10207 bool PartialResolveDisableInVC; 10208 bool RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable; 10209 bool MCSCacheDisable; 10210 bool MSCRAWHazardAvoidanceBit; 10211 uint32_t NPEarlyZFailsDisable; 10212 bool BlendOptimizationFixDisable; 10213 bool ColorCompressionDisable; 10214 bool PartialResolveDisableInVCMask; 10215 bool RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask; 10216 bool MCSCacheDisableMask; 10217 bool MSCRAWHazardAvoidanceBitMask; 10218 bool NPEarlyZFailsDisableMask; 10219 bool BlendOptimizationFixDisableMask; 10220 bool ColorCompressionDisableMask; 10221}; 10222 10223static inline void 10224GEN10_CACHE_MODE_1_pack(__attribute__((unused)) __gen_user_data *data, 10225 __attribute__((unused)) void * restrict dst, 10226 __attribute__((unused)) const struct GEN10_CACHE_MODE_1 * restrict values) 10227{ 10228 uint32_t * restrict dw = (uint32_t * restrict) dst; 10229 10230 dw[0] = 10231 __gen_uint(values->PartialResolveDisableInVC, 1, 1) | 10232 __gen_uint(values->RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable, 3, 3) | 10233 __gen_uint(values->MCSCacheDisable, 5, 5) | 10234 __gen_uint(values->MSCRAWHazardAvoidanceBit, 9, 9) | 10235 __gen_uint(values->NPEarlyZFailsDisable, 13, 13) | 10236 __gen_uint(values->BlendOptimizationFixDisable, 14, 14) | 10237 __gen_uint(values->ColorCompressionDisable, 15, 15) | 10238 __gen_uint(values->PartialResolveDisableInVCMask, 17, 17) | 10239 __gen_uint(values->RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask, 19, 19) | 10240 __gen_uint(values->MCSCacheDisableMask, 21, 21) | 10241 __gen_uint(values->MSCRAWHazardAvoidanceBitMask, 25, 25) | 10242 __gen_uint(values->NPEarlyZFailsDisableMask, 29, 29) | 10243 __gen_uint(values->BlendOptimizationFixDisableMask, 30, 30) | 10244 __gen_uint(values->ColorCompressionDisableMask, 31, 31); 10245} 10246 10247#define GEN10_CACHE_MODE_SS_num 0xe420 10248#define GEN10_CACHE_MODE_SS_length 1 10249struct GEN10_CACHE_MODE_SS { 10250 bool InstructionLevel1CacheDisable; 10251 bool InstructionLevel1CacheandInFlightQueueDisable; 10252 bool FloatBlendOptimizationEnable; 10253 bool PerSampleBlendOptDisable; 10254 bool InstructionLevel1CacheDisableMask; 10255 bool InstructionLevel1CacheandInFlightQueueDisableMask; 10256 bool FloatBlendOptimizationEnableMask; 10257 bool PerSampleBlendOptDisableMask; 10258}; 10259 10260static inline void 10261GEN10_CACHE_MODE_SS_pack(__attribute__((unused)) __gen_user_data *data, 10262 __attribute__((unused)) void * restrict dst, 10263 __attribute__((unused)) const struct GEN10_CACHE_MODE_SS * restrict values) 10264{ 10265 uint32_t * restrict dw = (uint32_t * restrict) dst; 10266 10267 dw[0] = 10268 __gen_uint(values->InstructionLevel1CacheDisable, 0, 0) | 10269 __gen_uint(values->InstructionLevel1CacheandInFlightQueueDisable, 1, 1) | 10270 __gen_uint(values->FloatBlendOptimizationEnable, 4, 4) | 10271 __gen_uint(values->PerSampleBlendOptDisable, 11, 11) | 10272 __gen_uint(values->InstructionLevel1CacheDisableMask, 16, 16) | 10273 __gen_uint(values->InstructionLevel1CacheandInFlightQueueDisableMask, 17, 17) | 10274 __gen_uint(values->FloatBlendOptimizationEnableMask, 20, 20) | 10275 __gen_uint(values->PerSampleBlendOptDisableMask, 27, 27); 10276} 10277 10278#define GEN10_CL_INVOCATION_COUNT_num 0x2338 10279#define GEN10_CL_INVOCATION_COUNT_length 2 10280struct GEN10_CL_INVOCATION_COUNT { 10281 uint64_t CLInvocationCountReport; 10282}; 10283 10284static inline void 10285GEN10_CL_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10286 __attribute__((unused)) void * restrict dst, 10287 __attribute__((unused)) const struct GEN10_CL_INVOCATION_COUNT * restrict values) 10288{ 10289 uint32_t * restrict dw = (uint32_t * restrict) dst; 10290 10291 const uint64_t v0 = 10292 __gen_uint(values->CLInvocationCountReport, 0, 63); 10293 dw[0] = v0; 10294 dw[1] = v0 >> 32; 10295} 10296 10297#define GEN10_CL_PRIMITIVES_COUNT_num 0x2340 10298#define GEN10_CL_PRIMITIVES_COUNT_length 2 10299struct GEN10_CL_PRIMITIVES_COUNT { 10300 uint64_t CLPrimitivesCountReport; 10301}; 10302 10303static inline void 10304GEN10_CL_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10305 __attribute__((unused)) void * restrict dst, 10306 __attribute__((unused)) const struct GEN10_CL_PRIMITIVES_COUNT * restrict values) 10307{ 10308 uint32_t * restrict dw = (uint32_t * restrict) dst; 10309 10310 const uint64_t v0 = 10311 __gen_uint(values->CLPrimitivesCountReport, 0, 63); 10312 dw[0] = v0; 10313 dw[1] = v0 >> 32; 10314} 10315 10316#define GEN10_CS_CHICKEN1_num 0x2580 10317#define GEN10_CS_CHICKEN1_length 1 10318struct GEN10_CS_CHICKEN1 { 10319 uint32_t ReplayMode; 10320#define MidcmdbufferPreemption 0 10321#define ObjectLevelPreemption 1 10322 bool ReplayModeMask; 10323}; 10324 10325static inline void 10326GEN10_CS_CHICKEN1_pack(__attribute__((unused)) __gen_user_data *data, 10327 __attribute__((unused)) void * restrict dst, 10328 __attribute__((unused)) const struct GEN10_CS_CHICKEN1 * restrict values) 10329{ 10330 uint32_t * restrict dw = (uint32_t * restrict) dst; 10331 10332 dw[0] = 10333 __gen_uint(values->ReplayMode, 0, 0) | 10334 __gen_uint(values->ReplayModeMask, 16, 16); 10335} 10336 10337#define GEN10_CS_DEBUG_MODE2_num 0x20d8 10338#define GEN10_CS_DEBUG_MODE2_length 1 10339struct GEN10_CS_DEBUG_MODE2 { 10340 bool _3DRenderingInstructionDisable; 10341 bool MediaInstructionDisable; 10342 bool CONSTANT_BUFFERAddressOffsetDisable; 10343 bool _3DRenderingInstructionDisableMask; 10344 bool MediaInstructionDisableMask; 10345 bool CONSTANT_BUFFERAddressOffsetDisableMask; 10346}; 10347 10348static inline void 10349GEN10_CS_DEBUG_MODE2_pack(__attribute__((unused)) __gen_user_data *data, 10350 __attribute__((unused)) void * restrict dst, 10351 __attribute__((unused)) const struct GEN10_CS_DEBUG_MODE2 * restrict values) 10352{ 10353 uint32_t * restrict dw = (uint32_t * restrict) dst; 10354 10355 dw[0] = 10356 __gen_uint(values->_3DRenderingInstructionDisable, 0, 0) | 10357 __gen_uint(values->MediaInstructionDisable, 1, 1) | 10358 __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisable, 4, 4) | 10359 __gen_uint(values->_3DRenderingInstructionDisableMask, 16, 16) | 10360 __gen_uint(values->MediaInstructionDisableMask, 17, 17) | 10361 __gen_uint(values->CONSTANT_BUFFERAddressOffsetDisableMask, 20, 20); 10362} 10363 10364#define GEN10_CS_INVOCATION_COUNT_num 0x2290 10365#define GEN10_CS_INVOCATION_COUNT_length 2 10366struct GEN10_CS_INVOCATION_COUNT { 10367 uint64_t CSInvocationCountReport; 10368}; 10369 10370static inline void 10371GEN10_CS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10372 __attribute__((unused)) void * restrict dst, 10373 __attribute__((unused)) const struct GEN10_CS_INVOCATION_COUNT * restrict values) 10374{ 10375 uint32_t * restrict dw = (uint32_t * restrict) dst; 10376 10377 const uint64_t v0 = 10378 __gen_uint(values->CSInvocationCountReport, 0, 63); 10379 dw[0] = v0; 10380 dw[1] = v0 >> 32; 10381} 10382 10383#define GEN10_DS_INVOCATION_COUNT_num 0x2308 10384#define GEN10_DS_INVOCATION_COUNT_length 2 10385struct GEN10_DS_INVOCATION_COUNT { 10386 uint64_t DSInvocationCountReport; 10387}; 10388 10389static inline void 10390GEN10_DS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10391 __attribute__((unused)) void * restrict dst, 10392 __attribute__((unused)) const struct GEN10_DS_INVOCATION_COUNT * restrict values) 10393{ 10394 uint32_t * restrict dw = (uint32_t * restrict) dst; 10395 10396 const uint64_t v0 = 10397 __gen_uint(values->DSInvocationCountReport, 0, 63); 10398 dw[0] = v0; 10399 dw[1] = v0 >> 32; 10400} 10401 10402#define GEN10_GS_INVOCATION_COUNT_num 0x2328 10403#define GEN10_GS_INVOCATION_COUNT_length 2 10404struct GEN10_GS_INVOCATION_COUNT { 10405 uint64_t GSInvocationCountReport; 10406}; 10407 10408static inline void 10409GEN10_GS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10410 __attribute__((unused)) void * restrict dst, 10411 __attribute__((unused)) const struct GEN10_GS_INVOCATION_COUNT * restrict values) 10412{ 10413 uint32_t * restrict dw = (uint32_t * restrict) dst; 10414 10415 const uint64_t v0 = 10416 __gen_uint(values->GSInvocationCountReport, 0, 63); 10417 dw[0] = v0; 10418 dw[1] = v0 >> 32; 10419} 10420 10421#define GEN10_GS_PRIMITIVES_COUNT_num 0x2330 10422#define GEN10_GS_PRIMITIVES_COUNT_length 2 10423struct GEN10_GS_PRIMITIVES_COUNT { 10424 uint64_t GSPrimitivesCountReport; 10425}; 10426 10427static inline void 10428GEN10_GS_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10429 __attribute__((unused)) void * restrict dst, 10430 __attribute__((unused)) const struct GEN10_GS_PRIMITIVES_COUNT * restrict values) 10431{ 10432 uint32_t * restrict dw = (uint32_t * restrict) dst; 10433 10434 const uint64_t v0 = 10435 __gen_uint(values->GSPrimitivesCountReport, 0, 63); 10436 dw[0] = v0; 10437 dw[1] = v0 >> 32; 10438} 10439 10440#define GEN10_HS_INVOCATION_COUNT_num 0x2300 10441#define GEN10_HS_INVOCATION_COUNT_length 2 10442struct GEN10_HS_INVOCATION_COUNT { 10443 uint64_t HSInvocationCountReport; 10444}; 10445 10446static inline void 10447GEN10_HS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10448 __attribute__((unused)) void * restrict dst, 10449 __attribute__((unused)) const struct GEN10_HS_INVOCATION_COUNT * restrict values) 10450{ 10451 uint32_t * restrict dw = (uint32_t * restrict) dst; 10452 10453 const uint64_t v0 = 10454 __gen_uint(values->HSInvocationCountReport, 0, 63); 10455 dw[0] = v0; 10456 dw[1] = v0 >> 32; 10457} 10458 10459#define GEN10_IA_PRIMITIVES_COUNT_num 0x2318 10460#define GEN10_IA_PRIMITIVES_COUNT_length 2 10461struct GEN10_IA_PRIMITIVES_COUNT { 10462 uint64_t IAPrimitivesCountReport; 10463}; 10464 10465static inline void 10466GEN10_IA_PRIMITIVES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10467 __attribute__((unused)) void * restrict dst, 10468 __attribute__((unused)) const struct GEN10_IA_PRIMITIVES_COUNT * restrict values) 10469{ 10470 uint32_t * restrict dw = (uint32_t * restrict) dst; 10471 10472 const uint64_t v0 = 10473 __gen_uint(values->IAPrimitivesCountReport, 0, 63); 10474 dw[0] = v0; 10475 dw[1] = v0 >> 32; 10476} 10477 10478#define GEN10_IA_VERTICES_COUNT_num 0x2310 10479#define GEN10_IA_VERTICES_COUNT_length 2 10480struct GEN10_IA_VERTICES_COUNT { 10481 uint64_t IAVerticesCountReport; 10482}; 10483 10484static inline void 10485GEN10_IA_VERTICES_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10486 __attribute__((unused)) void * restrict dst, 10487 __attribute__((unused)) const struct GEN10_IA_VERTICES_COUNT * restrict values) 10488{ 10489 uint32_t * restrict dw = (uint32_t * restrict) dst; 10490 10491 const uint64_t v0 = 10492 __gen_uint(values->IAVerticesCountReport, 0, 63); 10493 dw[0] = v0; 10494 dw[1] = v0 >> 32; 10495} 10496 10497#define GEN10_INSTDONE_1_num 0x206c 10498#define GEN10_INSTDONE_1_length 1 10499struct GEN10_INSTDONE_1 { 10500 bool PRB0RingEnable; 10501 bool VFGDone; 10502 bool VSDone; 10503 bool HSDone; 10504 bool TEDone; 10505 bool DSDone; 10506 bool GSDone; 10507 bool SOLDone; 10508 bool CLDone; 10509 bool SFDone; 10510 bool TDGDone; 10511 bool URBMDone; 10512 bool SVGDone; 10513 bool GAFSDone; 10514 bool VFEDone; 10515 bool TSGDone; 10516 bool GAFMDone; 10517 bool GAMDone; 10518 bool RSDone; 10519 bool CSDone; 10520 bool SDEDone; 10521 bool RCCFBCCSDone; 10522}; 10523 10524static inline void 10525GEN10_INSTDONE_1_pack(__attribute__((unused)) __gen_user_data *data, 10526 __attribute__((unused)) void * restrict dst, 10527 __attribute__((unused)) const struct GEN10_INSTDONE_1 * restrict values) 10528{ 10529 uint32_t * restrict dw = (uint32_t * restrict) dst; 10530 10531 dw[0] = 10532 __gen_uint(values->PRB0RingEnable, 0, 0) | 10533 __gen_uint(values->VFGDone, 1, 1) | 10534 __gen_uint(values->VSDone, 2, 2) | 10535 __gen_uint(values->HSDone, 3, 3) | 10536 __gen_uint(values->TEDone, 4, 4) | 10537 __gen_uint(values->DSDone, 5, 5) | 10538 __gen_uint(values->GSDone, 6, 6) | 10539 __gen_uint(values->SOLDone, 7, 7) | 10540 __gen_uint(values->CLDone, 8, 8) | 10541 __gen_uint(values->SFDone, 9, 9) | 10542 __gen_uint(values->TDGDone, 12, 12) | 10543 __gen_uint(values->URBMDone, 13, 13) | 10544 __gen_uint(values->SVGDone, 14, 14) | 10545 __gen_uint(values->GAFSDone, 15, 15) | 10546 __gen_uint(values->VFEDone, 16, 16) | 10547 __gen_uint(values->TSGDone, 17, 17) | 10548 __gen_uint(values->GAFMDone, 18, 18) | 10549 __gen_uint(values->GAMDone, 19, 19) | 10550 __gen_uint(values->RSDone, 20, 20) | 10551 __gen_uint(values->CSDone, 21, 21) | 10552 __gen_uint(values->SDEDone, 22, 22) | 10553 __gen_uint(values->RCCFBCCSDone, 23, 23); 10554} 10555 10556#define GEN10_L3CNTLREG_num 0x7034 10557#define GEN10_L3CNTLREG_length 1 10558struct GEN10_L3CNTLREG { 10559 bool SLMEnable; 10560 uint32_t URBAllocation; 10561 uint32_t ROAllocation; 10562 uint32_t DCAllocation; 10563 uint32_t AllAllocation; 10564}; 10565 10566static inline void 10567GEN10_L3CNTLREG_pack(__attribute__((unused)) __gen_user_data *data, 10568 __attribute__((unused)) void * restrict dst, 10569 __attribute__((unused)) const struct GEN10_L3CNTLREG * restrict values) 10570{ 10571 uint32_t * restrict dw = (uint32_t * restrict) dst; 10572 10573 dw[0] = 10574 __gen_uint(values->SLMEnable, 0, 0) | 10575 __gen_uint(values->URBAllocation, 1, 7) | 10576 __gen_uint(values->ROAllocation, 11, 17) | 10577 __gen_uint(values->DCAllocation, 18, 24) | 10578 __gen_uint(values->AllAllocation, 25, 31); 10579} 10580 10581#define GEN10_PS_INVOCATION_COUNT_num 0x2348 10582#define GEN10_PS_INVOCATION_COUNT_length 2 10583struct GEN10_PS_INVOCATION_COUNT { 10584 uint64_t PSInvocationCountReport; 10585}; 10586 10587static inline void 10588GEN10_PS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 10589 __attribute__((unused)) void * restrict dst, 10590 __attribute__((unused)) const struct GEN10_PS_INVOCATION_COUNT * restrict values) 10591{ 10592 uint32_t * restrict dw = (uint32_t * restrict) dst; 10593 10594 const uint64_t v0 = 10595 __gen_uint(values->PSInvocationCountReport, 0, 63); 10596 dw[0] = v0; 10597 dw[1] = v0 >> 32; 10598} 10599 10600#define GEN10_ROW_INSTDONE_num 0xe164 10601#define GEN10_ROW_INSTDONE_length 1 10602struct GEN10_ROW_INSTDONE { 10603 bool BCDone; 10604 bool PSDDone; 10605 bool DAPRDone; 10606 bool TDLDone; 10607 bool ICDone; 10608 bool MA0Done; 10609 bool EU00DoneSS0; 10610 bool EU01DoneSS0; 10611 bool EU02DoneSS0; 10612 bool EU03DoneSS0; 10613 bool EU10DoneSS0; 10614 bool EU11DoneSS0; 10615 bool EU12DoneSS0; 10616 bool EU13DoneSS0; 10617 bool MA1DoneSS0; 10618}; 10619 10620static inline void 10621GEN10_ROW_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10622 __attribute__((unused)) void * restrict dst, 10623 __attribute__((unused)) const struct GEN10_ROW_INSTDONE * restrict values) 10624{ 10625 uint32_t * restrict dw = (uint32_t * restrict) dst; 10626 10627 dw[0] = 10628 __gen_uint(values->BCDone, 0, 0) | 10629 __gen_uint(values->PSDDone, 1, 1) | 10630 __gen_uint(values->DAPRDone, 3, 3) | 10631 __gen_uint(values->TDLDone, 6, 6) | 10632 __gen_uint(values->ICDone, 12, 12) | 10633 __gen_uint(values->MA0Done, 15, 15) | 10634 __gen_uint(values->EU00DoneSS0, 16, 16) | 10635 __gen_uint(values->EU01DoneSS0, 17, 17) | 10636 __gen_uint(values->EU02DoneSS0, 18, 18) | 10637 __gen_uint(values->EU03DoneSS0, 19, 19) | 10638 __gen_uint(values->EU10DoneSS0, 21, 21) | 10639 __gen_uint(values->EU11DoneSS0, 22, 22) | 10640 __gen_uint(values->EU12DoneSS0, 23, 23) | 10641 __gen_uint(values->EU13DoneSS0, 24, 24) | 10642 __gen_uint(values->MA1DoneSS0, 26, 26); 10643} 10644 10645#define GEN10_SAMPLER_INSTDONE_num 0xe160 10646#define GEN10_SAMPLER_INSTDONE_length 1 10647struct GEN10_SAMPLER_INSTDONE { 10648 bool IMEDone; 10649 bool PL0Done; 10650 bool SO0Done; 10651 bool DG0Done; 10652 bool FT0Done; 10653 bool DM0Done; 10654 bool SCDone; 10655 bool FL0Done; 10656 bool QCDone; 10657 bool SVSMDone; 10658 bool SI0Done; 10659 bool MT0Done; 10660 bool AVSDone; 10661 bool IEFDone; 10662 bool CREDone; 10663 bool SVSM_ARB_SIFM; 10664 bool SVSMARB2; 10665 bool SVSMARB1; 10666 bool SVSMAdapter; 10667 bool BDMDone; 10668}; 10669 10670static inline void 10671GEN10_SAMPLER_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10672 __attribute__((unused)) void * restrict dst, 10673 __attribute__((unused)) const struct GEN10_SAMPLER_INSTDONE * restrict values) 10674{ 10675 uint32_t * restrict dw = (uint32_t * restrict) dst; 10676 10677 dw[0] = 10678 __gen_uint(values->IMEDone, 0, 0) | 10679 __gen_uint(values->PL0Done, 1, 1) | 10680 __gen_uint(values->SO0Done, 2, 2) | 10681 __gen_uint(values->DG0Done, 3, 3) | 10682 __gen_uint(values->FT0Done, 4, 4) | 10683 __gen_uint(values->DM0Done, 5, 5) | 10684 __gen_uint(values->SCDone, 6, 6) | 10685 __gen_uint(values->FL0Done, 7, 7) | 10686 __gen_uint(values->QCDone, 8, 8) | 10687 __gen_uint(values->SVSMDone, 9, 9) | 10688 __gen_uint(values->SI0Done, 10, 10) | 10689 __gen_uint(values->MT0Done, 11, 11) | 10690 __gen_uint(values->AVSDone, 12, 12) | 10691 __gen_uint(values->IEFDone, 13, 13) | 10692 __gen_uint(values->CREDone, 14, 14) | 10693 __gen_uint(values->SVSM_ARB_SIFM, 15, 15) | 10694 __gen_uint(values->SVSMARB2, 16, 16) | 10695 __gen_uint(values->SVSMARB1, 17, 17) | 10696 __gen_uint(values->SVSMAdapter, 18, 18) | 10697 __gen_uint(values->BDMDone, 19, 19); 10698} 10699 10700#define GEN10_SC_INSTDONE_num 0x7100 10701#define GEN10_SC_INSTDONE_length 1 10702struct GEN10_SC_INSTDONE { 10703 bool SVLDone; 10704 bool WMFEDone; 10705 bool WMBEDone; 10706 bool HIZDone; 10707 bool STCDone; 10708 bool IZDone; 10709 bool SBEDone; 10710 bool RCZDone; 10711 bool RCCDone; 10712 bool RCPBEDone; 10713 bool RCPFEDone; 10714 bool DAPBDone; 10715 bool DAPRBEDone; 10716 bool SARBDone; 10717 bool DC0Done; 10718 bool DC1Done; 10719 bool DC2Done; 10720 bool DC3Done; 10721 bool GW0Done; 10722 bool GW1Done; 10723 bool GW2Done; 10724 bool GW3Done; 10725 bool TDCDone; 10726 bool SFBEDone; 10727}; 10728 10729static inline void 10730GEN10_SC_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 10731 __attribute__((unused)) void * restrict dst, 10732 __attribute__((unused)) const struct GEN10_SC_INSTDONE * restrict values) 10733{ 10734 uint32_t * restrict dw = (uint32_t * restrict) dst; 10735 10736 dw[0] = 10737 __gen_uint(values->SVLDone, 0, 0) | 10738 __gen_uint(values->WMFEDone, 1, 1) | 10739 __gen_uint(values->WMBEDone, 2, 2) | 10740 __gen_uint(values->HIZDone, 3, 3) | 10741 __gen_uint(values->STCDone, 4, 4) | 10742 __gen_uint(values->IZDone, 5, 5) | 10743 __gen_uint(values->SBEDone, 6, 6) | 10744 __gen_uint(values->RCZDone, 8, 8) | 10745 __gen_uint(values->RCCDone, 9, 9) | 10746 __gen_uint(values->RCPBEDone, 10, 10) | 10747 __gen_uint(values->RCPFEDone, 11, 11) | 10748 __gen_uint(values->DAPBDone, 12, 12) | 10749 __gen_uint(values->DAPRBEDone, 13, 13) | 10750 __gen_uint(values->SARBDone, 15, 15) | 10751 __gen_uint(values->DC0Done, 16, 16) | 10752 __gen_uint(values->DC1Done, 17, 17) | 10753 __gen_uint(values->DC2Done, 18, 18) | 10754 __gen_uint(values->DC3Done, 19, 19) | 10755 __gen_uint(values->GW0Done, 20, 20) | 10756 __gen_uint(values->GW1Done, 21, 21) | 10757 __gen_uint(values->GW2Done, 22, 22) | 10758 __gen_uint(values->GW3Done, 23, 23) | 10759 __gen_uint(values->TDCDone, 24, 24) | 10760 __gen_uint(values->SFBEDone, 25, 25); 10761} 10762 10763#define GEN10_SO_NUM_PRIMS_WRITTEN0_num 0x5200 10764#define GEN10_SO_NUM_PRIMS_WRITTEN0_length 2 10765struct GEN10_SO_NUM_PRIMS_WRITTEN0 { 10766 uint64_t NumPrimsWrittenCount; 10767}; 10768 10769static inline void 10770GEN10_SO_NUM_PRIMS_WRITTEN0_pack(__attribute__((unused)) __gen_user_data *data, 10771 __attribute__((unused)) void * restrict dst, 10772 __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN0 * restrict values) 10773{ 10774 uint32_t * restrict dw = (uint32_t * restrict) dst; 10775 10776 const uint64_t v0 = 10777 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10778 dw[0] = v0; 10779 dw[1] = v0 >> 32; 10780} 10781 10782#define GEN10_SO_NUM_PRIMS_WRITTEN1_num 0x5208 10783#define GEN10_SO_NUM_PRIMS_WRITTEN1_length 2 10784struct GEN10_SO_NUM_PRIMS_WRITTEN1 { 10785 uint64_t NumPrimsWrittenCount; 10786}; 10787 10788static inline void 10789GEN10_SO_NUM_PRIMS_WRITTEN1_pack(__attribute__((unused)) __gen_user_data *data, 10790 __attribute__((unused)) void * restrict dst, 10791 __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN1 * restrict values) 10792{ 10793 uint32_t * restrict dw = (uint32_t * restrict) dst; 10794 10795 const uint64_t v0 = 10796 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10797 dw[0] = v0; 10798 dw[1] = v0 >> 32; 10799} 10800 10801#define GEN10_SO_NUM_PRIMS_WRITTEN2_num 0x5210 10802#define GEN10_SO_NUM_PRIMS_WRITTEN2_length 2 10803struct GEN10_SO_NUM_PRIMS_WRITTEN2 { 10804 uint64_t NumPrimsWrittenCount; 10805}; 10806 10807static inline void 10808GEN10_SO_NUM_PRIMS_WRITTEN2_pack(__attribute__((unused)) __gen_user_data *data, 10809 __attribute__((unused)) void * restrict dst, 10810 __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN2 * restrict values) 10811{ 10812 uint32_t * restrict dw = (uint32_t * restrict) dst; 10813 10814 const uint64_t v0 = 10815 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10816 dw[0] = v0; 10817 dw[1] = v0 >> 32; 10818} 10819 10820#define GEN10_SO_NUM_PRIMS_WRITTEN3_num 0x5218 10821#define GEN10_SO_NUM_PRIMS_WRITTEN3_length 2 10822struct GEN10_SO_NUM_PRIMS_WRITTEN3 { 10823 uint64_t NumPrimsWrittenCount; 10824}; 10825 10826static inline void 10827GEN10_SO_NUM_PRIMS_WRITTEN3_pack(__attribute__((unused)) __gen_user_data *data, 10828 __attribute__((unused)) void * restrict dst, 10829 __attribute__((unused)) const struct GEN10_SO_NUM_PRIMS_WRITTEN3 * restrict values) 10830{ 10831 uint32_t * restrict dw = (uint32_t * restrict) dst; 10832 10833 const uint64_t v0 = 10834 __gen_uint(values->NumPrimsWrittenCount, 0, 63); 10835 dw[0] = v0; 10836 dw[1] = v0 >> 32; 10837} 10838 10839#define GEN10_SO_PRIM_STORAGE_NEEDED0_num 0x5240 10840#define GEN10_SO_PRIM_STORAGE_NEEDED0_length 2 10841struct GEN10_SO_PRIM_STORAGE_NEEDED0 { 10842 uint64_t PrimStorageNeededCount; 10843}; 10844 10845static inline void 10846GEN10_SO_PRIM_STORAGE_NEEDED0_pack(__attribute__((unused)) __gen_user_data *data, 10847 __attribute__((unused)) void * restrict dst, 10848 __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED0 * restrict values) 10849{ 10850 uint32_t * restrict dw = (uint32_t * restrict) dst; 10851 10852 const uint64_t v0 = 10853 __gen_uint(values->PrimStorageNeededCount, 0, 63); 10854 dw[0] = v0; 10855 dw[1] = v0 >> 32; 10856} 10857 10858#define GEN10_SO_PRIM_STORAGE_NEEDED1_num 0x5248 10859#define GEN10_SO_PRIM_STORAGE_NEEDED1_length 2 10860struct GEN10_SO_PRIM_STORAGE_NEEDED1 { 10861 uint64_t PrimStorageNeededCount; 10862}; 10863 10864static inline void 10865GEN10_SO_PRIM_STORAGE_NEEDED1_pack(__attribute__((unused)) __gen_user_data *data, 10866 __attribute__((unused)) void * restrict dst, 10867 __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED1 * restrict values) 10868{ 10869 uint32_t * restrict dw = (uint32_t * restrict) dst; 10870 10871 const uint64_t v0 = 10872 __gen_uint(values->PrimStorageNeededCount, 0, 63); 10873 dw[0] = v0; 10874 dw[1] = v0 >> 32; 10875} 10876 10877#define GEN10_SO_PRIM_STORAGE_NEEDED2_num 0x5250 10878#define GEN10_SO_PRIM_STORAGE_NEEDED2_length 2 10879struct GEN10_SO_PRIM_STORAGE_NEEDED2 { 10880 uint64_t PrimStorageNeededCount; 10881}; 10882 10883static inline void 10884GEN10_SO_PRIM_STORAGE_NEEDED2_pack(__attribute__((unused)) __gen_user_data *data, 10885 __attribute__((unused)) void * restrict dst, 10886 __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED2 * restrict values) 10887{ 10888 uint32_t * restrict dw = (uint32_t * restrict) dst; 10889 10890 const uint64_t v0 = 10891 __gen_uint(values->PrimStorageNeededCount, 0, 63); 10892 dw[0] = v0; 10893 dw[1] = v0 >> 32; 10894} 10895 10896#define GEN10_SO_PRIM_STORAGE_NEEDED3_num 0x5258 10897#define GEN10_SO_PRIM_STORAGE_NEEDED3_length 2 10898struct GEN10_SO_PRIM_STORAGE_NEEDED3 { 10899 uint64_t PrimStorageNeededCount; 10900}; 10901 10902static inline void 10903GEN10_SO_PRIM_STORAGE_NEEDED3_pack(__attribute__((unused)) __gen_user_data *data, 10904 __attribute__((unused)) void * restrict dst, 10905 __attribute__((unused)) const struct GEN10_SO_PRIM_STORAGE_NEEDED3 * restrict values) 10906{ 10907 uint32_t * restrict dw = (uint32_t * restrict) dst; 10908 10909 const uint64_t v0 = 10910 __gen_uint(values->PrimStorageNeededCount, 0, 63); 10911 dw[0] = v0; 10912 dw[1] = v0 >> 32; 10913} 10914 10915#define GEN10_SO_WRITE_OFFSET0_num 0x5280 10916#define GEN10_SO_WRITE_OFFSET0_length 1 10917struct GEN10_SO_WRITE_OFFSET0 { 10918 uint64_t WriteOffset; 10919}; 10920 10921static inline void 10922GEN10_SO_WRITE_OFFSET0_pack(__attribute__((unused)) __gen_user_data *data, 10923 __attribute__((unused)) void * restrict dst, 10924 __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET0 * restrict values) 10925{ 10926 uint32_t * restrict dw = (uint32_t * restrict) dst; 10927 10928 dw[0] = 10929 __gen_offset(values->WriteOffset, 2, 31); 10930} 10931 10932#define GEN10_SO_WRITE_OFFSET1_num 0x5284 10933#define GEN10_SO_WRITE_OFFSET1_length 1 10934struct GEN10_SO_WRITE_OFFSET1 { 10935 uint64_t WriteOffset; 10936}; 10937 10938static inline void 10939GEN10_SO_WRITE_OFFSET1_pack(__attribute__((unused)) __gen_user_data *data, 10940 __attribute__((unused)) void * restrict dst, 10941 __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET1 * restrict values) 10942{ 10943 uint32_t * restrict dw = (uint32_t * restrict) dst; 10944 10945 dw[0] = 10946 __gen_offset(values->WriteOffset, 2, 31); 10947} 10948 10949#define GEN10_SO_WRITE_OFFSET2_num 0x5288 10950#define GEN10_SO_WRITE_OFFSET2_length 1 10951struct GEN10_SO_WRITE_OFFSET2 { 10952 uint64_t WriteOffset; 10953}; 10954 10955static inline void 10956GEN10_SO_WRITE_OFFSET2_pack(__attribute__((unused)) __gen_user_data *data, 10957 __attribute__((unused)) void * restrict dst, 10958 __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET2 * restrict values) 10959{ 10960 uint32_t * restrict dw = (uint32_t * restrict) dst; 10961 10962 dw[0] = 10963 __gen_offset(values->WriteOffset, 2, 31); 10964} 10965 10966#define GEN10_SO_WRITE_OFFSET3_num 0x528c 10967#define GEN10_SO_WRITE_OFFSET3_length 1 10968struct GEN10_SO_WRITE_OFFSET3 { 10969 uint64_t WriteOffset; 10970}; 10971 10972static inline void 10973GEN10_SO_WRITE_OFFSET3_pack(__attribute__((unused)) __gen_user_data *data, 10974 __attribute__((unused)) void * restrict dst, 10975 __attribute__((unused)) const struct GEN10_SO_WRITE_OFFSET3 * restrict values) 10976{ 10977 uint32_t * restrict dw = (uint32_t * restrict) dst; 10978 10979 dw[0] = 10980 __gen_offset(values->WriteOffset, 2, 31); 10981} 10982 10983#define GEN10_VCS_INSTDONE_num 0x1206c 10984#define GEN10_VCS_INSTDONE_length 1 10985struct GEN10_VCS_INSTDONE { 10986 bool RingEnable; 10987 bool USBDone; 10988 bool QRCDone; 10989 bool SECDone; 10990 bool MPCDone; 10991 bool VFTDone; 10992 bool BSPDone; 10993 bool VLFDone; 10994 bool VOPDone; 10995 bool VMCDone; 10996 bool VIPDone; 10997 bool VITDone; 10998 bool VDSDone; 10999 bool VMXDone; 11000 bool VCPDone; 11001 bool VCDDone; 11002 bool VADDone; 11003 bool VMDDone; 11004 bool VISDone; 11005 bool VACDone; 11006 bool VAMDone; 11007 bool JPGDone; 11008 bool VBPDone; 11009 bool VHRDone; 11010 bool VCIDone; 11011 bool VCRDone; 11012 bool VINDone; 11013 bool VPRDone; 11014 bool VTQDone; 11015 bool Reserved; 11016 bool VCSDone; 11017 bool GACDone; 11018}; 11019 11020static inline void 11021GEN10_VCS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 11022 __attribute__((unused)) void * restrict dst, 11023 __attribute__((unused)) const struct GEN10_VCS_INSTDONE * restrict values) 11024{ 11025 uint32_t * restrict dw = (uint32_t * restrict) dst; 11026 11027 dw[0] = 11028 __gen_uint(values->RingEnable, 0, 0) | 11029 __gen_uint(values->USBDone, 1, 1) | 11030 __gen_uint(values->QRCDone, 2, 2) | 11031 __gen_uint(values->SECDone, 3, 3) | 11032 __gen_uint(values->MPCDone, 4, 4) | 11033 __gen_uint(values->VFTDone, 5, 5) | 11034 __gen_uint(values->BSPDone, 6, 6) | 11035 __gen_uint(values->VLFDone, 7, 7) | 11036 __gen_uint(values->VOPDone, 8, 8) | 11037 __gen_uint(values->VMCDone, 9, 9) | 11038 __gen_uint(values->VIPDone, 10, 10) | 11039 __gen_uint(values->VITDone, 11, 11) | 11040 __gen_uint(values->VDSDone, 12, 12) | 11041 __gen_uint(values->VMXDone, 13, 13) | 11042 __gen_uint(values->VCPDone, 14, 14) | 11043 __gen_uint(values->VCDDone, 15, 15) | 11044 __gen_uint(values->VADDone, 16, 16) | 11045 __gen_uint(values->VMDDone, 17, 17) | 11046 __gen_uint(values->VISDone, 18, 18) | 11047 __gen_uint(values->VACDone, 19, 19) | 11048 __gen_uint(values->VAMDone, 20, 20) | 11049 __gen_uint(values->JPGDone, 21, 21) | 11050 __gen_uint(values->VBPDone, 22, 22) | 11051 __gen_uint(values->VHRDone, 23, 23) | 11052 __gen_uint(values->VCIDone, 24, 24) | 11053 __gen_uint(values->VCRDone, 25, 25) | 11054 __gen_uint(values->VINDone, 26, 26) | 11055 __gen_uint(values->VPRDone, 27, 27) | 11056 __gen_uint(values->VTQDone, 28, 28) | 11057 __gen_uint(values->Reserved, 29, 29) | 11058 __gen_uint(values->VCSDone, 30, 30) | 11059 __gen_uint(values->GACDone, 31, 31); 11060} 11061 11062#define GEN10_VECS_INSTDONE_num 0x1a06c 11063#define GEN10_VECS_INSTDONE_length 1 11064struct GEN10_VECS_INSTDONE { 11065 bool RingEnable; 11066 bool VECSDone; 11067 bool GAMDone; 11068}; 11069 11070static inline void 11071GEN10_VECS_INSTDONE_pack(__attribute__((unused)) __gen_user_data *data, 11072 __attribute__((unused)) void * restrict dst, 11073 __attribute__((unused)) const struct GEN10_VECS_INSTDONE * restrict values) 11074{ 11075 uint32_t * restrict dw = (uint32_t * restrict) dst; 11076 11077 dw[0] = 11078 __gen_uint(values->RingEnable, 0, 0) | 11079 __gen_uint(values->VECSDone, 30, 30) | 11080 __gen_uint(values->GAMDone, 31, 31); 11081} 11082 11083#define GEN10_VS_INVOCATION_COUNT_num 0x2320 11084#define GEN10_VS_INVOCATION_COUNT_length 2 11085struct GEN10_VS_INVOCATION_COUNT { 11086 uint64_t VSInvocationCountReport; 11087}; 11088 11089static inline void 11090GEN10_VS_INVOCATION_COUNT_pack(__attribute__((unused)) __gen_user_data *data, 11091 __attribute__((unused)) void * restrict dst, 11092 __attribute__((unused)) const struct GEN10_VS_INVOCATION_COUNT * restrict values) 11093{ 11094 uint32_t * restrict dw = (uint32_t * restrict) dst; 11095 11096 const uint64_t v0 = 11097 __gen_uint(values->VSInvocationCountReport, 0, 63); 11098 dw[0] = v0; 11099 dw[1] = v0 >> 32; 11100} 11101 11102#endif /* GEN10_PACK_H */ 11103