100a23bdaSmrg/* 200a23bdaSmrg * Copyright 2017 Advanced Micro Devices, Inc. 300a23bdaSmrg * 400a23bdaSmrg * Permission is hereby granted, free of charge, to any person obtaining a 500a23bdaSmrg * copy of this software and associated documentation files (the "Software"), 600a23bdaSmrg * to deal in the Software without restriction, including without limitation 700a23bdaSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 800a23bdaSmrg * and/or sell copies of the Software, and to permit persons to whom the 900a23bdaSmrg * Software is furnished to do so, subject to the following conditions: 1000a23bdaSmrg * 1100a23bdaSmrg * The above copyright notice and this permission notice shall be included in 1200a23bdaSmrg * all copies or substantial portions of the Software. 1300a23bdaSmrg * 1400a23bdaSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1500a23bdaSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1600a23bdaSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1700a23bdaSmrg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 1800a23bdaSmrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 1900a23bdaSmrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2000a23bdaSmrg * OTHER DEALINGS IN THE SOFTWARE. 2100a23bdaSmrg * 2200a23bdaSmrg */ 2300a23bdaSmrg 2400a23bdaSmrg#include "amdgpu.h" 2500a23bdaSmrg#include "amdgpu_drm.h" 2600a23bdaSmrg#include "xf86drm.h" 2700a23bdaSmrg#include "amdgpu_internal.h" 2800a23bdaSmrg 297cdc0497Smrgdrm_public int amdgpu_vm_reserve_vmid(amdgpu_device_handle dev, uint32_t flags) 3000a23bdaSmrg{ 3100a23bdaSmrg union drm_amdgpu_vm vm; 3200a23bdaSmrg 3300a23bdaSmrg vm.in.op = AMDGPU_VM_OP_RESERVE_VMID; 3400a23bdaSmrg vm.in.flags = flags; 3500a23bdaSmrg 3600a23bdaSmrg return drmCommandWriteRead(dev->fd, DRM_AMDGPU_VM, 3700a23bdaSmrg &vm, sizeof(vm)); 3800a23bdaSmrg} 3900a23bdaSmrg 407cdc0497Smrgdrm_public int amdgpu_vm_unreserve_vmid(amdgpu_device_handle dev, 417cdc0497Smrg uint32_t flags) 4200a23bdaSmrg{ 4300a23bdaSmrg union drm_amdgpu_vm vm; 4400a23bdaSmrg 4500a23bdaSmrg vm.in.op = AMDGPU_VM_OP_UNRESERVE_VMID; 4600a23bdaSmrg vm.in.flags = flags; 4700a23bdaSmrg 4800a23bdaSmrg return drmCommandWriteRead(dev->fd, DRM_AMDGPU_VM, 4900a23bdaSmrg &vm, sizeof(vm)); 5000a23bdaSmrg} 51