drm_mode.h revision 41687f09
122944501Smrg/*
222944501Smrg * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
322944501Smrg * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
422944501Smrg * Copyright (c) 2008 Red Hat Inc.
522944501Smrg * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
622944501Smrg * Copyright (c) 2007-2008 Intel Corporation
722944501Smrg *
822944501Smrg * Permission is hereby granted, free of charge, to any person obtaining a
922944501Smrg * copy of this software and associated documentation files (the "Software"),
1022944501Smrg * to deal in the Software without restriction, including without limitation
1122944501Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1222944501Smrg * and/or sell copies of the Software, and to permit persons to whom the
1322944501Smrg * Software is furnished to do so, subject to the following conditions:
1422944501Smrg *
1522944501Smrg * The above copyright notice and this permission notice shall be included in
1622944501Smrg * all copies or substantial portions of the Software.
1722944501Smrg *
1822944501Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1922944501Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
2022944501Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
2122944501Smrg * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2222944501Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2322944501Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2422944501Smrg * IN THE SOFTWARE.
2522944501Smrg */
2622944501Smrg
2722944501Smrg#ifndef _DRM_MODE_H
2822944501Smrg#define _DRM_MODE_H
2922944501Smrg
303f012e29Smrg#include "drm.h"
313f012e29Smrg
32037b3c26Smrg#if defined(__cplusplus)
33037b3c26Smrgextern "C" {
34037b3c26Smrg#endif
35037b3c26Smrg
3641687f09Smrg/**
3741687f09Smrg * DOC: overview
3841687f09Smrg *
3941687f09Smrg * DRM exposes many UAPI and structure definition to have a consistent
4041687f09Smrg * and standardized interface with user.
4141687f09Smrg * Userspace can refer to these structure definitions and UAPI formats
4241687f09Smrg * to communicate to driver
4341687f09Smrg */
4441687f09Smrg
4522944501Smrg#define DRM_CONNECTOR_NAME_LEN	32
4622944501Smrg#define DRM_DISPLAY_MODE_LEN	32
4722944501Smrg#define DRM_PROP_NAME_LEN	32
4822944501Smrg
497cdc0497Smrg#define DRM_MODE_TYPE_BUILTIN	(1<<0) /* deprecated */
507cdc0497Smrg#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
517cdc0497Smrg#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
5222944501Smrg#define DRM_MODE_TYPE_PREFERRED	(1<<3)
537cdc0497Smrg#define DRM_MODE_TYPE_DEFAULT	(1<<4) /* deprecated */
5422944501Smrg#define DRM_MODE_TYPE_USERDEF	(1<<5)
5522944501Smrg#define DRM_MODE_TYPE_DRIVER	(1<<6)
5622944501Smrg
577cdc0497Smrg#define DRM_MODE_TYPE_ALL	(DRM_MODE_TYPE_PREFERRED |	\
587cdc0497Smrg				 DRM_MODE_TYPE_USERDEF |	\
597cdc0497Smrg				 DRM_MODE_TYPE_DRIVER)
607cdc0497Smrg
6122944501Smrg/* Video mode flags */
62d8807b2fSmrg/* bit compatible with the xrandr RR_ definitions (bits 0-13)
63d8807b2fSmrg *
64d8807b2fSmrg * ABI warning: Existing userspace really expects
65d8807b2fSmrg * the mode flags to match the xrandr definitions. Any
66d8807b2fSmrg * changes that don't match the xrandr definitions will
67d8807b2fSmrg * likely need a new client cap or some other mechanism
68d8807b2fSmrg * to avoid breaking existing userspace. This includes
69d8807b2fSmrg * allocating new flags in the previously unused bits!
70d8807b2fSmrg */
71e88f27b3Smrg#define DRM_MODE_FLAG_PHSYNC			(1<<0)
72e88f27b3Smrg#define DRM_MODE_FLAG_NHSYNC			(1<<1)
73e88f27b3Smrg#define DRM_MODE_FLAG_PVSYNC			(1<<2)
74e88f27b3Smrg#define DRM_MODE_FLAG_NVSYNC			(1<<3)
75e88f27b3Smrg#define DRM_MODE_FLAG_INTERLACE			(1<<4)
76e88f27b3Smrg#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
77e88f27b3Smrg#define DRM_MODE_FLAG_CSYNC			(1<<6)
78e88f27b3Smrg#define DRM_MODE_FLAG_PCSYNC			(1<<7)
79e88f27b3Smrg#define DRM_MODE_FLAG_NCSYNC			(1<<8)
80e88f27b3Smrg#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
817cdc0497Smrg#define DRM_MODE_FLAG_BCAST			(1<<10) /* deprecated */
827cdc0497Smrg#define DRM_MODE_FLAG_PIXMUX			(1<<11) /* deprecated */
83e88f27b3Smrg#define DRM_MODE_FLAG_DBLCLK			(1<<12)
84e88f27b3Smrg#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
853f012e29Smrg /*
863f012e29Smrg  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
873f012e29Smrg  * (define not exposed to user space).
883f012e29Smrg  */
89e88f27b3Smrg#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
9000a23bdaSmrg#define  DRM_MODE_FLAG_3D_NONE		(0<<14)
91e88f27b3Smrg#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
92e88f27b3Smrg#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
93e88f27b3Smrg#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
94e88f27b3Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
95e88f27b3Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
96e88f27b3Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
97e88f27b3Smrg#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
98e88f27b3Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
99e88f27b3Smrg
10000a23bdaSmrg/* Picture aspect ratio options */
10100a23bdaSmrg#define DRM_MODE_PICTURE_ASPECT_NONE		0
10200a23bdaSmrg#define DRM_MODE_PICTURE_ASPECT_4_3		1
10300a23bdaSmrg#define DRM_MODE_PICTURE_ASPECT_16_9		2
1047cdc0497Smrg#define DRM_MODE_PICTURE_ASPECT_64_27		3
1057cdc0497Smrg#define DRM_MODE_PICTURE_ASPECT_256_135		4
1067cdc0497Smrg
1077cdc0497Smrg/* Content type options */
1087cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_NO_DATA		0
1097cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_GRAPHICS		1
1107cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_PHOTO		2
1117cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_CINEMA		3
1127cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_GAME		4
11300a23bdaSmrg
11400a23bdaSmrg/* Aspect ratio flag bitmask (4 bits 22:19) */
11500a23bdaSmrg#define DRM_MODE_FLAG_PIC_AR_MASK		(0x0F<<19)
11600a23bdaSmrg#define  DRM_MODE_FLAG_PIC_AR_NONE \
11700a23bdaSmrg			(DRM_MODE_PICTURE_ASPECT_NONE<<19)
11800a23bdaSmrg#define  DRM_MODE_FLAG_PIC_AR_4_3 \
11900a23bdaSmrg			(DRM_MODE_PICTURE_ASPECT_4_3<<19)
12000a23bdaSmrg#define  DRM_MODE_FLAG_PIC_AR_16_9 \
12100a23bdaSmrg			(DRM_MODE_PICTURE_ASPECT_16_9<<19)
1227cdc0497Smrg#define  DRM_MODE_FLAG_PIC_AR_64_27 \
1237cdc0497Smrg			(DRM_MODE_PICTURE_ASPECT_64_27<<19)
1247cdc0497Smrg#define  DRM_MODE_FLAG_PIC_AR_256_135 \
1257cdc0497Smrg			(DRM_MODE_PICTURE_ASPECT_256_135<<19)
1267cdc0497Smrg
1277cdc0497Smrg#define  DRM_MODE_FLAG_ALL	(DRM_MODE_FLAG_PHSYNC |		\
1287cdc0497Smrg				 DRM_MODE_FLAG_NHSYNC |		\
1297cdc0497Smrg				 DRM_MODE_FLAG_PVSYNC |		\
1307cdc0497Smrg				 DRM_MODE_FLAG_NVSYNC |		\
1317cdc0497Smrg				 DRM_MODE_FLAG_INTERLACE |	\
1327cdc0497Smrg				 DRM_MODE_FLAG_DBLSCAN |	\
1337cdc0497Smrg				 DRM_MODE_FLAG_CSYNC |		\
1347cdc0497Smrg				 DRM_MODE_FLAG_PCSYNC |		\
1357cdc0497Smrg				 DRM_MODE_FLAG_NCSYNC |		\
1367cdc0497Smrg				 DRM_MODE_FLAG_HSKEW |		\
1377cdc0497Smrg				 DRM_MODE_FLAG_DBLCLK |		\
1387cdc0497Smrg				 DRM_MODE_FLAG_CLKDIV2 |	\
1397cdc0497Smrg				 DRM_MODE_FLAG_3D_MASK)
14022944501Smrg
14122944501Smrg/* DPMS flags */
14222944501Smrg/* bit compatible with the xorg definitions. */
14322944501Smrg#define DRM_MODE_DPMS_ON	0
14422944501Smrg#define DRM_MODE_DPMS_STANDBY	1
14522944501Smrg#define DRM_MODE_DPMS_SUSPEND	2
14622944501Smrg#define DRM_MODE_DPMS_OFF	3
14722944501Smrg
14822944501Smrg/* Scaling mode options */
14922944501Smrg#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
15022944501Smrg					     software can still scale) */
15122944501Smrg#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
15222944501Smrg#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
15322944501Smrg#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
15422944501Smrg
15522944501Smrg/* Dithering mode options */
15622944501Smrg#define DRM_MODE_DITHERING_OFF	0
15722944501Smrg#define DRM_MODE_DITHERING_ON	1
158d049871aSmrg#define DRM_MODE_DITHERING_AUTO 2
15922944501Smrg
16013d1d17dSmrg/* Dirty info options */
16113d1d17dSmrg#define DRM_MODE_DIRTY_OFF      0
16213d1d17dSmrg#define DRM_MODE_DIRTY_ON       1
16313d1d17dSmrg#define DRM_MODE_DIRTY_ANNOTATE 2
16413d1d17dSmrg
165d8807b2fSmrg/* Link Status options */
166d8807b2fSmrg#define DRM_MODE_LINK_STATUS_GOOD	0
167d8807b2fSmrg#define DRM_MODE_LINK_STATUS_BAD	1
168d8807b2fSmrg
16900a23bdaSmrg/*
17000a23bdaSmrg * DRM_MODE_ROTATE_<degrees>
17100a23bdaSmrg *
17200a23bdaSmrg * Signals that a drm plane is been rotated <degrees> degrees in counter
17300a23bdaSmrg * clockwise direction.
17400a23bdaSmrg *
17500a23bdaSmrg * This define is provided as a convenience, looking up the property id
17600a23bdaSmrg * using the name->prop id lookup is the preferred method.
17700a23bdaSmrg */
17800a23bdaSmrg#define DRM_MODE_ROTATE_0       (1<<0)
17900a23bdaSmrg#define DRM_MODE_ROTATE_90      (1<<1)
18000a23bdaSmrg#define DRM_MODE_ROTATE_180     (1<<2)
18100a23bdaSmrg#define DRM_MODE_ROTATE_270     (1<<3)
18200a23bdaSmrg
18300a23bdaSmrg/*
18400a23bdaSmrg * DRM_MODE_ROTATE_MASK
18500a23bdaSmrg *
18600a23bdaSmrg * Bitmask used to look for drm plane rotations.
18700a23bdaSmrg */
18800a23bdaSmrg#define DRM_MODE_ROTATE_MASK (\
18900a23bdaSmrg		DRM_MODE_ROTATE_0  | \
19000a23bdaSmrg		DRM_MODE_ROTATE_90  | \
19100a23bdaSmrg		DRM_MODE_ROTATE_180 | \
19200a23bdaSmrg		DRM_MODE_ROTATE_270)
19300a23bdaSmrg
19400a23bdaSmrg/*
19500a23bdaSmrg * DRM_MODE_REFLECT_<axis>
19600a23bdaSmrg *
1977cdc0497Smrg * Signals that the contents of a drm plane is reflected along the <axis> axis,
19800a23bdaSmrg * in the same way as mirroring.
1997cdc0497Smrg * See kerneldoc chapter "Plane Composition Properties" for more details.
20000a23bdaSmrg *
20100a23bdaSmrg * This define is provided as a convenience, looking up the property id
20200a23bdaSmrg * using the name->prop id lookup is the preferred method.
20300a23bdaSmrg */
20400a23bdaSmrg#define DRM_MODE_REFLECT_X      (1<<4)
20500a23bdaSmrg#define DRM_MODE_REFLECT_Y      (1<<5)
20600a23bdaSmrg
20700a23bdaSmrg/*
20800a23bdaSmrg * DRM_MODE_REFLECT_MASK
20900a23bdaSmrg *
21000a23bdaSmrg * Bitmask used to look for drm plane reflections.
21100a23bdaSmrg */
21200a23bdaSmrg#define DRM_MODE_REFLECT_MASK (\
21300a23bdaSmrg		DRM_MODE_REFLECT_X | \
21400a23bdaSmrg		DRM_MODE_REFLECT_Y)
21500a23bdaSmrg
2167cdc0497Smrg/* Content Protection Flags */
2177cdc0497Smrg#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED	0
2187cdc0497Smrg#define DRM_MODE_CONTENT_PROTECTION_DESIRED     1
2197cdc0497Smrg#define DRM_MODE_CONTENT_PROTECTION_ENABLED     2
22000a23bdaSmrg
22122944501Smrgstruct drm_mode_modeinfo {
22222944501Smrg	__u32 clock;
2233f012e29Smrg	__u16 hdisplay;
2243f012e29Smrg	__u16 hsync_start;
2253f012e29Smrg	__u16 hsync_end;
2263f012e29Smrg	__u16 htotal;
2273f012e29Smrg	__u16 hskew;
2283f012e29Smrg	__u16 vdisplay;
2293f012e29Smrg	__u16 vsync_start;
2303f012e29Smrg	__u16 vsync_end;
2313f012e29Smrg	__u16 vtotal;
2323f012e29Smrg	__u16 vscan;
23322944501Smrg
234d049871aSmrg	__u32 vrefresh;
23522944501Smrg
23622944501Smrg	__u32 flags;
23722944501Smrg	__u32 type;
23822944501Smrg	char name[DRM_DISPLAY_MODE_LEN];
23922944501Smrg};
24022944501Smrg
24122944501Smrgstruct drm_mode_card_res {
24222944501Smrg	__u64 fb_id_ptr;
24322944501Smrg	__u64 crtc_id_ptr;
24422944501Smrg	__u64 connector_id_ptr;
24522944501Smrg	__u64 encoder_id_ptr;
24622944501Smrg	__u32 count_fbs;
24722944501Smrg	__u32 count_crtcs;
24822944501Smrg	__u32 count_connectors;
24922944501Smrg	__u32 count_encoders;
2503f012e29Smrg	__u32 min_width;
2513f012e29Smrg	__u32 max_width;
2523f012e29Smrg	__u32 min_height;
2533f012e29Smrg	__u32 max_height;
25422944501Smrg};
25522944501Smrg
25622944501Smrgstruct drm_mode_crtc {
25722944501Smrg	__u64 set_connectors_ptr;
25822944501Smrg	__u32 count_connectors;
25922944501Smrg
26022944501Smrg	__u32 crtc_id; /**< Id */
26122944501Smrg	__u32 fb_id; /**< Id of framebuffer */
26222944501Smrg
2633f012e29Smrg	__u32 x; /**< x Position on the framebuffer */
2643f012e29Smrg	__u32 y; /**< y Position on the framebuffer */
26522944501Smrg
26622944501Smrg	__u32 gamma_size;
26722944501Smrg	__u32 mode_valid;
26822944501Smrg	struct drm_mode_modeinfo mode;
26922944501Smrg};
27022944501Smrg
2713f012e29Smrg#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
2723f012e29Smrg#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
273e88f27b3Smrg
274e88f27b3Smrg/* Planes blend with or override other bits on the CRTC */
275e88f27b3Smrgstruct drm_mode_set_plane {
276e88f27b3Smrg	__u32 plane_id;
277e88f27b3Smrg	__u32 crtc_id;
278e88f27b3Smrg	__u32 fb_id; /* fb object contains surface format type */
2793f012e29Smrg	__u32 flags; /* see above flags */
280e88f27b3Smrg
281e88f27b3Smrg	/* Signed dest location allows it to be partially off screen */
2823f012e29Smrg	__s32 crtc_x;
2833f012e29Smrg	__s32 crtc_y;
2843f012e29Smrg	__u32 crtc_w;
2853f012e29Smrg	__u32 crtc_h;
286e88f27b3Smrg
287e88f27b3Smrg	/* Source values are 16.16 fixed point */
2883f012e29Smrg	__u32 src_x;
2893f012e29Smrg	__u32 src_y;
2903f012e29Smrg	__u32 src_h;
2913f012e29Smrg	__u32 src_w;
292e88f27b3Smrg};
293e88f27b3Smrg
294e88f27b3Smrgstruct drm_mode_get_plane {
295e88f27b3Smrg	__u32 plane_id;
296e88f27b3Smrg
297e88f27b3Smrg	__u32 crtc_id;
298e88f27b3Smrg	__u32 fb_id;
299e88f27b3Smrg
300e88f27b3Smrg	__u32 possible_crtcs;
301e88f27b3Smrg	__u32 gamma_size;
302e88f27b3Smrg
303e88f27b3Smrg	__u32 count_format_types;
304e88f27b3Smrg	__u64 format_type_ptr;
305e88f27b3Smrg};
306e88f27b3Smrg
307e88f27b3Smrgstruct drm_mode_get_plane_res {
308e88f27b3Smrg	__u64 plane_id_ptr;
309e88f27b3Smrg	__u32 count_planes;
310e88f27b3Smrg};
311e88f27b3Smrg
31222944501Smrg#define DRM_MODE_ENCODER_NONE	0
31322944501Smrg#define DRM_MODE_ENCODER_DAC	1
31422944501Smrg#define DRM_MODE_ENCODER_TMDS	2
31522944501Smrg#define DRM_MODE_ENCODER_LVDS	3
31622944501Smrg#define DRM_MODE_ENCODER_TVDAC	4
31708d7334dSsnj#define DRM_MODE_ENCODER_VIRTUAL 5
31808d7334dSsnj#define DRM_MODE_ENCODER_DSI	6
31908d7334dSsnj#define DRM_MODE_ENCODER_DPMST	7
320037b3c26Smrg#define DRM_MODE_ENCODER_DPI	8
32122944501Smrg
32222944501Smrgstruct drm_mode_get_encoder {
32322944501Smrg	__u32 encoder_id;
32422944501Smrg	__u32 encoder_type;
32522944501Smrg
32622944501Smrg	__u32 crtc_id; /**< Id of crtc */
32722944501Smrg
32822944501Smrg	__u32 possible_crtcs;
32922944501Smrg	__u32 possible_clones;
33022944501Smrg};
33122944501Smrg
33222944501Smrg/* This is for connectors with multiple signal types. */
33322944501Smrg/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
334d8807b2fSmrgenum drm_mode_subconnector {
33541687f09Smrg	DRM_MODE_SUBCONNECTOR_Automatic   = 0,  /* DVI-I, TV     */
33641687f09Smrg	DRM_MODE_SUBCONNECTOR_Unknown     = 0,  /* DVI-I, TV, DP */
33741687f09Smrg	DRM_MODE_SUBCONNECTOR_VGA	  = 1,  /*            DP */
33841687f09Smrg	DRM_MODE_SUBCONNECTOR_DVID	  = 3,  /* DVI-I      DP */
33941687f09Smrg	DRM_MODE_SUBCONNECTOR_DVIA	  = 4,  /* DVI-I         */
34041687f09Smrg	DRM_MODE_SUBCONNECTOR_Composite   = 5,  /*        TV     */
34141687f09Smrg	DRM_MODE_SUBCONNECTOR_SVIDEO	  = 6,  /*        TV     */
34241687f09Smrg	DRM_MODE_SUBCONNECTOR_Component   = 8,  /*        TV     */
34341687f09Smrg	DRM_MODE_SUBCONNECTOR_SCART	  = 9,  /*        TV     */
34441687f09Smrg	DRM_MODE_SUBCONNECTOR_DisplayPort = 10, /*            DP */
34541687f09Smrg	DRM_MODE_SUBCONNECTOR_HDMIA       = 11, /*            DP */
34641687f09Smrg	DRM_MODE_SUBCONNECTOR_Native      = 15, /*            DP */
34741687f09Smrg	DRM_MODE_SUBCONNECTOR_Wireless    = 18, /*            DP */
348d8807b2fSmrg};
34922944501Smrg
35022944501Smrg#define DRM_MODE_CONNECTOR_Unknown	0
35122944501Smrg#define DRM_MODE_CONNECTOR_VGA		1
35222944501Smrg#define DRM_MODE_CONNECTOR_DVII		2
35322944501Smrg#define DRM_MODE_CONNECTOR_DVID		3
35422944501Smrg#define DRM_MODE_CONNECTOR_DVIA		4
35522944501Smrg#define DRM_MODE_CONNECTOR_Composite	5
35622944501Smrg#define DRM_MODE_CONNECTOR_SVIDEO	6
35722944501Smrg#define DRM_MODE_CONNECTOR_LVDS		7
35822944501Smrg#define DRM_MODE_CONNECTOR_Component	8
35922944501Smrg#define DRM_MODE_CONNECTOR_9PinDIN	9
36022944501Smrg#define DRM_MODE_CONNECTOR_DisplayPort	10
36122944501Smrg#define DRM_MODE_CONNECTOR_HDMIA	11
36222944501Smrg#define DRM_MODE_CONNECTOR_HDMIB	12
36322944501Smrg#define DRM_MODE_CONNECTOR_TV		13
364d049871aSmrg#define DRM_MODE_CONNECTOR_eDP		14
36508d7334dSsnj#define DRM_MODE_CONNECTOR_VIRTUAL      15
36608d7334dSsnj#define DRM_MODE_CONNECTOR_DSI		16
367037b3c26Smrg#define DRM_MODE_CONNECTOR_DPI		17
3687cdc0497Smrg#define DRM_MODE_CONNECTOR_WRITEBACK	18
36941687f09Smrg#define DRM_MODE_CONNECTOR_SPI		19
37022944501Smrg
37122944501Smrgstruct drm_mode_get_connector {
37222944501Smrg
37322944501Smrg	__u64 encoders_ptr;
37422944501Smrg	__u64 modes_ptr;
37522944501Smrg	__u64 props_ptr;
37622944501Smrg	__u64 prop_values_ptr;
37722944501Smrg
37822944501Smrg	__u32 count_modes;
37922944501Smrg	__u32 count_props;
38022944501Smrg	__u32 count_encoders;
38122944501Smrg
38222944501Smrg	__u32 encoder_id; /**< Current Encoder */
38322944501Smrg	__u32 connector_id; /**< Id */
38422944501Smrg	__u32 connector_type;
38522944501Smrg	__u32 connector_type_id;
38622944501Smrg
38722944501Smrg	__u32 connection;
3883f012e29Smrg	__u32 mm_width;  /**< width in millimeters */
3893f012e29Smrg	__u32 mm_height; /**< height in millimeters */
39022944501Smrg	__u32 subpixel;
3913f012e29Smrg
3923f012e29Smrg	__u32 pad;
39322944501Smrg};
39422944501Smrg
3957cdc0497Smrg#define DRM_MODE_PROP_PENDING	(1<<0) /* deprecated, do not use */
39622944501Smrg#define DRM_MODE_PROP_RANGE	(1<<1)
39722944501Smrg#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
39822944501Smrg#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
39922944501Smrg#define DRM_MODE_PROP_BLOB	(1<<4)
400e88f27b3Smrg#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
40122944501Smrg
40208d7334dSsnj/* non-extended types: legacy bitmask, one bit per type: */
40308d7334dSsnj#define DRM_MODE_PROP_LEGACY_TYPE  ( \
40408d7334dSsnj		DRM_MODE_PROP_RANGE | \
40508d7334dSsnj		DRM_MODE_PROP_ENUM | \
40608d7334dSsnj		DRM_MODE_PROP_BLOB | \
40708d7334dSsnj		DRM_MODE_PROP_BITMASK)
40808d7334dSsnj
40908d7334dSsnj/* extended-types: rather than continue to consume a bit per type,
41008d7334dSsnj * grab a chunk of the bits to use as integer type id.
41108d7334dSsnj */
41208d7334dSsnj#define DRM_MODE_PROP_EXTENDED_TYPE	0x0000ffc0
41308d7334dSsnj#define DRM_MODE_PROP_TYPE(n)		((n) << 6)
41408d7334dSsnj#define DRM_MODE_PROP_OBJECT		DRM_MODE_PROP_TYPE(1)
41508d7334dSsnj#define DRM_MODE_PROP_SIGNED_RANGE	DRM_MODE_PROP_TYPE(2)
41608d7334dSsnj
4173f012e29Smrg/* the PROP_ATOMIC flag is used to hide properties from userspace that
4183f012e29Smrg * is not aware of atomic properties.  This is mostly to work around
4193f012e29Smrg * older userspace (DDX drivers) that read/write each prop they find,
4205324fb0dSmrg * without being aware that this could be triggering a lengthy modeset.
4213f012e29Smrg */
4223f012e29Smrg#define DRM_MODE_PROP_ATOMIC        0x80000000
4233f012e29Smrg
42422944501Smrgstruct drm_mode_property_enum {
42522944501Smrg	__u64 value;
42622944501Smrg	char name[DRM_PROP_NAME_LEN];
42722944501Smrg};
42822944501Smrg
42922944501Smrgstruct drm_mode_get_property {
43022944501Smrg	__u64 values_ptr; /* values and blob lengths */
43122944501Smrg	__u64 enum_blob_ptr; /* enum and blob id ptrs */
43222944501Smrg
43322944501Smrg	__u32 prop_id;
43422944501Smrg	__u32 flags;
43522944501Smrg	char name[DRM_PROP_NAME_LEN];
43622944501Smrg
43722944501Smrg	__u32 count_values;
4383f012e29Smrg	/* This is only used to count enum values, not blobs. The _blobs is
4393f012e29Smrg	 * simply because of a historical reason, i.e. backwards compat. */
44022944501Smrg	__u32 count_enum_blobs;
44122944501Smrg};
44222944501Smrg
44322944501Smrgstruct drm_mode_connector_set_property {
44422944501Smrg	__u64 value;
44522944501Smrg	__u32 prop_id;
44622944501Smrg	__u32 connector_id;
44722944501Smrg};
44822944501Smrg
449e88f27b3Smrg#define DRM_MODE_OBJECT_CRTC 0xcccccccc
450e88f27b3Smrg#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
451e88f27b3Smrg#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
452e88f27b3Smrg#define DRM_MODE_OBJECT_MODE 0xdededede
453e88f27b3Smrg#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
454e88f27b3Smrg#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
455e88f27b3Smrg#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
456e88f27b3Smrg#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
4573f012e29Smrg#define DRM_MODE_OBJECT_ANY 0
458e88f27b3Smrg
459e88f27b3Smrgstruct drm_mode_obj_get_properties {
460e88f27b3Smrg	__u64 props_ptr;
461e88f27b3Smrg	__u64 prop_values_ptr;
462e88f27b3Smrg	__u32 count_props;
463e88f27b3Smrg	__u32 obj_id;
464e88f27b3Smrg	__u32 obj_type;
465e88f27b3Smrg};
466e88f27b3Smrg
467e88f27b3Smrgstruct drm_mode_obj_set_property {
468e88f27b3Smrg	__u64 value;
469e88f27b3Smrg	__u32 prop_id;
470e88f27b3Smrg	__u32 obj_id;
471e88f27b3Smrg	__u32 obj_type;
472e88f27b3Smrg};
473e88f27b3Smrg
47422944501Smrgstruct drm_mode_get_blob {
47522944501Smrg	__u32 blob_id;
47622944501Smrg	__u32 length;
47722944501Smrg	__u64 data;
47822944501Smrg};
47922944501Smrg
48022944501Smrgstruct drm_mode_fb_cmd {
48122944501Smrg	__u32 fb_id;
4823f012e29Smrg	__u32 width;
4833f012e29Smrg	__u32 height;
48422944501Smrg	__u32 pitch;
48522944501Smrg	__u32 bpp;
48622944501Smrg	__u32 depth;
48722944501Smrg	/* driver specific handle */
48822944501Smrg	__u32 handle;
48922944501Smrg};
49022944501Smrg
4913f012e29Smrg#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
4923f012e29Smrg#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifer[] */
493e88f27b3Smrg
494e88f27b3Smrgstruct drm_mode_fb_cmd2 {
495e88f27b3Smrg	__u32 fb_id;
4963f012e29Smrg	__u32 width;
4973f012e29Smrg	__u32 height;
498e88f27b3Smrg	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
4993f012e29Smrg	__u32 flags; /* see above flags */
500e88f27b3Smrg
501e88f27b3Smrg	/*
502e88f27b3Smrg	 * In case of planar formats, this ioctl allows up to 4
503e88f27b3Smrg	 * buffer objects with offsets and pitches per plane.
504e88f27b3Smrg	 * The pitch and offset order is dictated by the fourcc,
50541687f09Smrg	 * e.g. NV12 (https://fourcc.org/yuv.php#NV12) is described as:
506e88f27b3Smrg	 *
507e88f27b3Smrg	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
508e88f27b3Smrg	 *   followed by an interleaved U/V plane containing
509e88f27b3Smrg	 *   8 bit 2x2 subsampled colour difference samples.
510e88f27b3Smrg	 *
5113f012e29Smrg	 * So it would consist of Y as offsets[0] and UV as
5123f012e29Smrg	 * offsets[1].  Note that offsets[0] will generally
5133f012e29Smrg	 * be 0 (but this is not required).
5143f012e29Smrg	 *
515d8807b2fSmrg	 * To accommodate tiled, compressed, etc formats, a
5163f012e29Smrg	 * modifier can be specified.  The default value of zero
5173f012e29Smrg	 * indicates "native" format as specified by the fourcc.
518d8807b2fSmrg	 * Vendor specific modifier token.  Note that even though
519d8807b2fSmrg	 * it looks like we have a modifier per-plane, we in fact
520d8807b2fSmrg	 * do not. The modifier for each plane must be identical.
521d8807b2fSmrg	 * Thus all combinations of different data layouts for
522d8807b2fSmrg	 * multi plane formats must be enumerated as separate
523d8807b2fSmrg	 * modifiers.
524e88f27b3Smrg	 */
525e88f27b3Smrg	__u32 handles[4];
526e88f27b3Smrg	__u32 pitches[4]; /* pitch for each plane */
527e88f27b3Smrg	__u32 offsets[4]; /* offset of each plane */
528d8807b2fSmrg	__u64 modifier[4]; /* ie, tiling, compress */
529e88f27b3Smrg};
530e88f27b3Smrg
53122944501Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
53222944501Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
53322944501Smrg#define DRM_MODE_FB_DIRTY_FLAGS         0x03
53422944501Smrg
5353f012e29Smrg#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
5363f012e29Smrg
53722944501Smrg/*
53822944501Smrg * Mark a region of a framebuffer as dirty.
53922944501Smrg *
54022944501Smrg * Some hardware does not automatically update display contents
54122944501Smrg * as a hardware or software draw to a framebuffer. This ioctl
54222944501Smrg * allows userspace to tell the kernel and the hardware what
54322944501Smrg * regions of the framebuffer have changed.
54422944501Smrg *
54522944501Smrg * The kernel or hardware is free to update more then just the
54622944501Smrg * region specified by the clip rects. The kernel or hardware
54722944501Smrg * may also delay and/or coalesce several calls to dirty into a
54822944501Smrg * single update.
54922944501Smrg *
55022944501Smrg * Userspace may annotate the updates, the annotates are a
55122944501Smrg * promise made by the caller that the change is either a copy
55222944501Smrg * of pixels or a fill of a single color in the region specified.
55322944501Smrg *
55422944501Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
55522944501Smrg * the number of updated regions are half of num_clips given,
55622944501Smrg * where the clip rects are paired in src and dst. The width and
55722944501Smrg * height of each one of the pairs must match.
55822944501Smrg *
55922944501Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
56022944501Smrg * promises that the region specified of the clip rects is filled
56122944501Smrg * completely with a single color as given in the color argument.
56222944501Smrg */
56322944501Smrg
56422944501Smrgstruct drm_mode_fb_dirty_cmd {
56522944501Smrg	__u32 fb_id;
56622944501Smrg	__u32 flags;
56722944501Smrg	__u32 color;
56822944501Smrg	__u32 num_clips;
56922944501Smrg	__u64 clips_ptr;
57022944501Smrg};
57122944501Smrg
57222944501Smrgstruct drm_mode_mode_cmd {
57322944501Smrg	__u32 connector_id;
57422944501Smrg	struct drm_mode_modeinfo mode;
57522944501Smrg};
57622944501Smrg
5773f012e29Smrg#define DRM_MODE_CURSOR_BO	0x01
5783f012e29Smrg#define DRM_MODE_CURSOR_MOVE	0x02
5793f012e29Smrg#define DRM_MODE_CURSOR_FLAGS	0x03
58022944501Smrg
58122944501Smrg/*
5823f012e29Smrg * depending on the value in flags different members are used.
58322944501Smrg *
58422944501Smrg * CURSOR_BO uses
5853f012e29Smrg *    crtc_id
58622944501Smrg *    width
58722944501Smrg *    height
5883f012e29Smrg *    handle - if 0 turns the cursor off
58922944501Smrg *
59022944501Smrg * CURSOR_MOVE uses
5913f012e29Smrg *    crtc_id
59222944501Smrg *    x
59322944501Smrg *    y
59422944501Smrg */
59522944501Smrgstruct drm_mode_cursor {
59622944501Smrg	__u32 flags;
59722944501Smrg	__u32 crtc_id;
59822944501Smrg	__s32 x;
59922944501Smrg	__s32 y;
60022944501Smrg	__u32 width;
60122944501Smrg	__u32 height;
60222944501Smrg	/* driver specific handle */
60322944501Smrg	__u32 handle;
60422944501Smrg};
60522944501Smrg
606e88f27b3Smrgstruct drm_mode_cursor2 {
607e88f27b3Smrg	__u32 flags;
608e88f27b3Smrg	__u32 crtc_id;
609e88f27b3Smrg	__s32 x;
610e88f27b3Smrg	__s32 y;
611e88f27b3Smrg	__u32 width;
612e88f27b3Smrg	__u32 height;
613e88f27b3Smrg	/* driver specific handle */
614e88f27b3Smrg	__u32 handle;
615e88f27b3Smrg	__s32 hot_x;
616e88f27b3Smrg	__s32 hot_y;
617e88f27b3Smrg};
618e88f27b3Smrg
61922944501Smrgstruct drm_mode_crtc_lut {
62022944501Smrg	__u32 crtc_id;
62122944501Smrg	__u32 gamma_size;
62222944501Smrg
62322944501Smrg	/* pointers to arrays */
62422944501Smrg	__u64 red;
62522944501Smrg	__u64 green;
62622944501Smrg	__u64 blue;
62722944501Smrg};
62822944501Smrg
6293f012e29Smrgstruct drm_color_ctm {
6307cdc0497Smrg	/*
6317cdc0497Smrg	 * Conversion matrix in S31.32 sign-magnitude
6327cdc0497Smrg	 * (not two's complement!) format.
6337cdc0497Smrg	 */
6347cdc0497Smrg	__u64 matrix[9];
6353f012e29Smrg};
6363f012e29Smrg
6373f012e29Smrgstruct drm_color_lut {
6383f012e29Smrg	/*
6395324fb0dSmrg	 * Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and
6405324fb0dSmrg	 * 0xffff == 1.0.
6413f012e29Smrg	 */
6423f012e29Smrg	__u16 red;
6433f012e29Smrg	__u16 green;
6443f012e29Smrg	__u16 blue;
6453f012e29Smrg	__u16 reserved;
6463f012e29Smrg};
6473f012e29Smrg
64841687f09Smrg/**
64941687f09Smrg * struct hdr_metadata_infoframe - HDR Metadata Infoframe Data.
65041687f09Smrg *
65141687f09Smrg * HDR Metadata Infoframe as per CTA 861.G spec. This is expected
65241687f09Smrg * to match exactly with the spec.
65341687f09Smrg *
65441687f09Smrg * Userspace is expected to pass the metadata information as per
65541687f09Smrg * the format described in this structure.
65641687f09Smrg */
65741687f09Smrgstruct hdr_metadata_infoframe {
65841687f09Smrg	/**
65941687f09Smrg	 * @eotf: Electro-Optical Transfer Function (EOTF)
66041687f09Smrg	 * used in the stream.
66141687f09Smrg	 */
66241687f09Smrg	__u8 eotf;
66341687f09Smrg	/**
66441687f09Smrg	 * @metadata_type: Static_Metadata_Descriptor_ID.
66541687f09Smrg	 */
66641687f09Smrg	__u8 metadata_type;
66741687f09Smrg	/**
66841687f09Smrg	 * @display_primaries: Color Primaries of the Data.
66941687f09Smrg	 * These are coded as unsigned 16-bit values in units of
67041687f09Smrg	 * 0.00002, where 0x0000 represents zero and 0xC350
67141687f09Smrg	 * represents 1.0000.
67241687f09Smrg	 * @display_primaries.x: X cordinate of color primary.
67341687f09Smrg	 * @display_primaries.y: Y cordinate of color primary.
67441687f09Smrg	 */
67541687f09Smrg	struct {
67641687f09Smrg		__u16 x, y;
67741687f09Smrg		} display_primaries[3];
67841687f09Smrg	/**
67941687f09Smrg	 * @white_point: White Point of Colorspace Data.
68041687f09Smrg	 * These are coded as unsigned 16-bit values in units of
68141687f09Smrg	 * 0.00002, where 0x0000 represents zero and 0xC350
68241687f09Smrg	 * represents 1.0000.
68341687f09Smrg	 * @white_point.x: X cordinate of whitepoint of color primary.
68441687f09Smrg	 * @white_point.y: Y cordinate of whitepoint of color primary.
68541687f09Smrg	 */
68641687f09Smrg	struct {
68741687f09Smrg		__u16 x, y;
68841687f09Smrg		} white_point;
68941687f09Smrg	/**
69041687f09Smrg	 * @max_display_mastering_luminance: Max Mastering Display Luminance.
69141687f09Smrg	 * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
69241687f09Smrg	 * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
69341687f09Smrg	 */
69441687f09Smrg	__u16 max_display_mastering_luminance;
69541687f09Smrg	/**
69641687f09Smrg	 * @min_display_mastering_luminance: Min Mastering Display Luminance.
69741687f09Smrg	 * This value is coded as an unsigned 16-bit value in units of
69841687f09Smrg	 * 0.0001 cd/m2, where 0x0001 represents 0.0001 cd/m2 and 0xFFFF
69941687f09Smrg	 * represents 6.5535 cd/m2.
70041687f09Smrg	 */
70141687f09Smrg	__u16 min_display_mastering_luminance;
70241687f09Smrg	/**
70341687f09Smrg	 * @max_cll: Max Content Light Level.
70441687f09Smrg	 * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
70541687f09Smrg	 * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
70641687f09Smrg	 */
70741687f09Smrg	__u16 max_cll;
70841687f09Smrg	/**
70941687f09Smrg	 * @max_fall: Max Frame Average Light Level.
71041687f09Smrg	 * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
71141687f09Smrg	 * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
71241687f09Smrg	 */
71341687f09Smrg	__u16 max_fall;
71441687f09Smrg};
71541687f09Smrg
71641687f09Smrg/**
71741687f09Smrg * struct hdr_output_metadata - HDR output metadata
71841687f09Smrg *
71941687f09Smrg * Metadata Information to be passed from userspace
72041687f09Smrg */
72141687f09Smrgstruct hdr_output_metadata {
72241687f09Smrg	/**
72341687f09Smrg	 * @metadata_type: Static_Metadata_Descriptor_ID.
72441687f09Smrg	 */
72541687f09Smrg	__u32 metadata_type;
72641687f09Smrg	/**
72741687f09Smrg	 * @hdmi_metadata_type1: HDR Metadata Infoframe.
72841687f09Smrg	 */
72941687f09Smrg	union {
73041687f09Smrg		struct hdr_metadata_infoframe hdmi_metadata_type1;
73141687f09Smrg	};
73241687f09Smrg};
73341687f09Smrg
73422944501Smrg#define DRM_MODE_PAGE_FLIP_EVENT 0x01
735e88f27b3Smrg#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
736037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
737037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
738037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
739037b3c26Smrg				   DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
740037b3c26Smrg#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
741037b3c26Smrg				  DRM_MODE_PAGE_FLIP_ASYNC | \
742037b3c26Smrg				  DRM_MODE_PAGE_FLIP_TARGET)
74322944501Smrg
74413d1d17dSmrg/*
74513d1d17dSmrg * Request a page flip on the specified crtc.
74613d1d17dSmrg *
74713d1d17dSmrg * This ioctl will ask KMS to schedule a page flip for the specified
74813d1d17dSmrg * crtc.  Once any pending rendering targeting the specified fb (as of
74913d1d17dSmrg * ioctl time) has completed, the crtc will be reprogrammed to display
75013d1d17dSmrg * that fb after the next vertical refresh.  The ioctl returns
75113d1d17dSmrg * immediately, but subsequent rendering to the current fb will block
75213d1d17dSmrg * in the execbuffer ioctl until the page flip happens.  If a page
75313d1d17dSmrg * flip is already pending as the ioctl is called, EBUSY will be
75413d1d17dSmrg * returned.
75513d1d17dSmrg *
7563f012e29Smrg * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
7573f012e29Smrg * event (see drm.h: struct drm_event_vblank) when the page flip is
7583f012e29Smrg * done.  The user_data field passed in with this ioctl will be
7593f012e29Smrg * returned as the user_data field in the vblank event struct.
7603f012e29Smrg *
7613f012e29Smrg * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
7623f012e29Smrg * 'as soon as possible', meaning that it not delay waiting for vblank.
7633f012e29Smrg * This may cause tearing on the screen.
76413d1d17dSmrg *
765037b3c26Smrg * The reserved field must be zero.
76613d1d17dSmrg */
76713d1d17dSmrg
76822944501Smrgstruct drm_mode_crtc_page_flip {
76913d1d17dSmrg	__u32 crtc_id;
77013d1d17dSmrg	__u32 fb_id;
77113d1d17dSmrg	__u32 flags;
77213d1d17dSmrg	__u32 reserved;
77313d1d17dSmrg	__u64 user_data;
77422944501Smrg};
77522944501Smrg
776037b3c26Smrg/*
777037b3c26Smrg * Request a page flip on the specified crtc.
778037b3c26Smrg *
779037b3c26Smrg * Same as struct drm_mode_crtc_page_flip, but supports new flags and
780037b3c26Smrg * re-purposes the reserved field:
781037b3c26Smrg *
782037b3c26Smrg * The sequence field must be zero unless either of the
783037b3c26Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
784037b3c26Smrg * the ABSOLUTE flag is specified, the sequence field denotes the absolute
785037b3c26Smrg * vblank sequence when the flip should take effect. When the RELATIVE
786037b3c26Smrg * flag is specified, the sequence field denotes the relative (to the
787037b3c26Smrg * current one when the ioctl is called) vblank sequence when the flip
788037b3c26Smrg * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
789037b3c26Smrg * make sure the vblank sequence before the target one has passed before
790037b3c26Smrg * calling this ioctl. The purpose of the
791037b3c26Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
792037b3c26Smrg * the target for when code dealing with a page flip runs during a
793037b3c26Smrg * vertical blank period.
794037b3c26Smrg */
795037b3c26Smrg
796037b3c26Smrgstruct drm_mode_crtc_page_flip_target {
797037b3c26Smrg	__u32 crtc_id;
798037b3c26Smrg	__u32 fb_id;
799037b3c26Smrg	__u32 flags;
800037b3c26Smrg	__u32 sequence;
801037b3c26Smrg	__u64 user_data;
802037b3c26Smrg};
803037b3c26Smrg
804e88f27b3Smrg/* create a dumb scanout buffer */
805e88f27b3Smrgstruct drm_mode_create_dumb {
8063f012e29Smrg	__u32 height;
8073f012e29Smrg	__u32 width;
8083f012e29Smrg	__u32 bpp;
8093f012e29Smrg	__u32 flags;
8103f012e29Smrg	/* handle, pitch, size will be returned */
8113f012e29Smrg	__u32 handle;
8123f012e29Smrg	__u32 pitch;
8133f012e29Smrg	__u64 size;
814e88f27b3Smrg};
815e88f27b3Smrg
816e88f27b3Smrg/* set up for mmap of a dumb scanout buffer */
817e88f27b3Smrgstruct drm_mode_map_dumb {
8183f012e29Smrg	/** Handle for the object being mapped. */
8193f012e29Smrg	__u32 handle;
8203f012e29Smrg	__u32 pad;
8213f012e29Smrg	/**
8223f012e29Smrg	 * Fake offset to use for subsequent mmap call
8233f012e29Smrg	 *
8243f012e29Smrg	 * This is a fixed-size type for 32/64 compatibility.
8253f012e29Smrg	 */
8263f012e29Smrg	__u64 offset;
827e88f27b3Smrg};
828e88f27b3Smrg
829e88f27b3Smrgstruct drm_mode_destroy_dumb {
830e88f27b3Smrg	__u32 handle;
831e88f27b3Smrg};
832e88f27b3Smrg
833e6188e58Smrg/* page-flip flags are valid, plus: */
8343f012e29Smrg#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
8353f012e29Smrg#define DRM_MODE_ATOMIC_NONBLOCK  0x0200
8363f012e29Smrg#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
8373f012e29Smrg
8383f012e29Smrg#define DRM_MODE_ATOMIC_FLAGS (\
8393f012e29Smrg		DRM_MODE_PAGE_FLIP_EVENT |\
8403f012e29Smrg		DRM_MODE_PAGE_FLIP_ASYNC |\
8413f012e29Smrg		DRM_MODE_ATOMIC_TEST_ONLY |\
8423f012e29Smrg		DRM_MODE_ATOMIC_NONBLOCK |\
8433f012e29Smrg		DRM_MODE_ATOMIC_ALLOW_MODESET)
844e6188e58Smrg
845e6188e58Smrgstruct drm_mode_atomic {
846e6188e58Smrg	__u32 flags;
847e6188e58Smrg	__u32 count_objs;
848e6188e58Smrg	__u64 objs_ptr;
849e6188e58Smrg	__u64 count_props_ptr;
850e6188e58Smrg	__u64 props_ptr;
851e6188e58Smrg	__u64 prop_values_ptr;
852e6188e58Smrg	__u64 reserved;
853e6188e58Smrg	__u64 user_data;
854e6188e58Smrg};
855e6188e58Smrg
856d8807b2fSmrgstruct drm_format_modifier_blob {
857d8807b2fSmrg#define FORMAT_BLOB_CURRENT 1
858d8807b2fSmrg	/* Version of this blob format */
859d8807b2fSmrg	__u32 version;
860d8807b2fSmrg
861d8807b2fSmrg	/* Flags */
862d8807b2fSmrg	__u32 flags;
863d8807b2fSmrg
864d8807b2fSmrg	/* Number of fourcc formats supported */
865d8807b2fSmrg	__u32 count_formats;
866d8807b2fSmrg
867d8807b2fSmrg	/* Where in this blob the formats exist (in bytes) */
868d8807b2fSmrg	__u32 formats_offset;
869d8807b2fSmrg
870d8807b2fSmrg	/* Number of drm_format_modifiers */
871d8807b2fSmrg	__u32 count_modifiers;
872d8807b2fSmrg
873d8807b2fSmrg	/* Where in this blob the modifiers exist (in bytes) */
874d8807b2fSmrg	__u32 modifiers_offset;
875d8807b2fSmrg
87600a23bdaSmrg	/* __u32 formats[] */
877d8807b2fSmrg	/* struct drm_format_modifier modifiers[] */
878d8807b2fSmrg};
879d8807b2fSmrg
880d8807b2fSmrgstruct drm_format_modifier {
881d8807b2fSmrg	/* Bitmask of formats in get_plane format list this info applies to. The
882d8807b2fSmrg	 * offset allows a sliding window of which 64 formats (bits).
883d8807b2fSmrg	 *
884d8807b2fSmrg	 * Some examples:
885d8807b2fSmrg	 * In today's world with < 65 formats, and formats 0, and 2 are
886d8807b2fSmrg	 * supported
887d8807b2fSmrg	 * 0x0000000000000005
888d8807b2fSmrg	 *		  ^-offset = 0, formats = 5
889d8807b2fSmrg	 *
890d8807b2fSmrg	 * If the number formats grew to 128, and formats 98-102 are
891d8807b2fSmrg	 * supported with the modifier:
892d8807b2fSmrg	 *
89300a23bdaSmrg	 * 0x0000007c00000000 0000000000000000
894d8807b2fSmrg	 *		  ^
89500a23bdaSmrg	 *		  |__offset = 64, formats = 0x7c00000000
896d8807b2fSmrg	 *
897d8807b2fSmrg	 */
898d8807b2fSmrg	__u64 formats;
899d8807b2fSmrg	__u32 offset;
900d8807b2fSmrg	__u32 pad;
901d8807b2fSmrg
902d8807b2fSmrg	/* The modifier that applies to the >get_plane format list bitmask. */
903d8807b2fSmrg	__u64 modifier;
904d8807b2fSmrg};
905d8807b2fSmrg
906e6188e58Smrg/**
90741687f09Smrg * struct drm_mode_create_blob - Create New block property
90841687f09Smrg * @data: Pointer to data to copy.
90941687f09Smrg * @length: Length of data to copy.
91041687f09Smrg * @blob_id: new property ID.
911e6188e58Smrg * Create a new 'blob' data property, copying length bytes from data pointer,
912e6188e58Smrg * and returning new blob ID.
913e6188e58Smrg */
914e6188e58Smrgstruct drm_mode_create_blob {
915e6188e58Smrg	/** Pointer to data to copy. */
916e6188e58Smrg	__u64 data;
917e6188e58Smrg	/** Length of data to copy. */
918e6188e58Smrg	__u32 length;
919e6188e58Smrg	/** Return: new property ID. */
920e6188e58Smrg	__u32 blob_id;
921e6188e58Smrg};
922e6188e58Smrg
923e6188e58Smrg/**
92441687f09Smrg * struct drm_mode_destroy_blob - Destroy user blob
92541687f09Smrg * @blob_id: blob_id to destroy
926e6188e58Smrg * Destroy a user-created blob property.
92741687f09Smrg *
92841687f09Smrg * User-space can release blobs as soon as they do not need to refer to them by
92941687f09Smrg * their blob object ID.  For instance, if you are using a MODE_ID blob in an
93041687f09Smrg * atomic commit and you will not make another commit re-using the same ID, you
93141687f09Smrg * can destroy the blob as soon as the commit has been issued, without waiting
93241687f09Smrg * for it to complete.
933e6188e58Smrg */
934e6188e58Smrgstruct drm_mode_destroy_blob {
935e6188e58Smrg	__u32 blob_id;
936e6188e58Smrg};
937e6188e58Smrg
93800a23bdaSmrg/**
93941687f09Smrg * struct drm_mode_create_lease - Create lease
94041687f09Smrg * @object_ids: Pointer to array of object ids.
94141687f09Smrg * @object_count: Number of object ids.
94241687f09Smrg * @flags: flags for new FD.
94341687f09Smrg * @lessee_id: unique identifier for lessee.
94441687f09Smrg * @fd: file descriptor to new drm_master file.
94500a23bdaSmrg * Lease mode resources, creating another drm_master.
94600a23bdaSmrg */
94700a23bdaSmrgstruct drm_mode_create_lease {
94800a23bdaSmrg	/** Pointer to array of object ids (__u32) */
94900a23bdaSmrg	__u64 object_ids;
95000a23bdaSmrg	/** Number of object ids */
95100a23bdaSmrg	__u32 object_count;
95200a23bdaSmrg	/** flags for new FD (O_CLOEXEC, etc) */
95300a23bdaSmrg	__u32 flags;
95400a23bdaSmrg
95500a23bdaSmrg	/** Return: unique identifier for lessee. */
95600a23bdaSmrg	__u32 lessee_id;
95700a23bdaSmrg	/** Return: file descriptor to new drm_master file */
95800a23bdaSmrg	__u32 fd;
95900a23bdaSmrg};
96000a23bdaSmrg
96100a23bdaSmrg/**
96241687f09Smrg * struct drm_mode_list_lessees - List lessees
96341687f09Smrg * @count_lessees: Number of lessees.
96441687f09Smrg * @pad: pad.
96541687f09Smrg * @lessees_ptr: Pointer to lessess.
96600a23bdaSmrg * List lesses from a drm_master
96700a23bdaSmrg */
96800a23bdaSmrgstruct drm_mode_list_lessees {
96900a23bdaSmrg	/** Number of lessees.
97000a23bdaSmrg	 * On input, provides length of the array.
97100a23bdaSmrg	 * On output, provides total number. No
97200a23bdaSmrg	 * more than the input number will be written
97300a23bdaSmrg	 * back, so two calls can be used to get
97400a23bdaSmrg	 * the size and then the data.
97500a23bdaSmrg	 */
97600a23bdaSmrg	__u32 count_lessees;
97700a23bdaSmrg	__u32 pad;
97800a23bdaSmrg
97900a23bdaSmrg	/** Pointer to lessees.
98000a23bdaSmrg	 * pointer to __u64 array of lessee ids
98100a23bdaSmrg	 */
98200a23bdaSmrg	__u64 lessees_ptr;
98300a23bdaSmrg};
98400a23bdaSmrg
98500a23bdaSmrg/**
98641687f09Smrg * struct drm_mode_get_lease - Get Lease
98741687f09Smrg * @count_objects: Number of leased objects.
98841687f09Smrg * @pad: pad.
98941687f09Smrg * @objects_ptr: Pointer to objects.
99000a23bdaSmrg * Get leased objects
99100a23bdaSmrg */
99200a23bdaSmrgstruct drm_mode_get_lease {
99300a23bdaSmrg	/** Number of leased objects.
99400a23bdaSmrg	 * On input, provides length of the array.
99500a23bdaSmrg	 * On output, provides total number. No
99600a23bdaSmrg	 * more than the input number will be written
99700a23bdaSmrg	 * back, so two calls can be used to get
99800a23bdaSmrg	 * the size and then the data.
99900a23bdaSmrg	 */
100000a23bdaSmrg	__u32 count_objects;
100100a23bdaSmrg	__u32 pad;
100200a23bdaSmrg
100300a23bdaSmrg	/** Pointer to objects.
100400a23bdaSmrg	 * pointer to __u32 array of object ids
100500a23bdaSmrg	 */
100600a23bdaSmrg	__u64 objects_ptr;
100700a23bdaSmrg};
100800a23bdaSmrg
100900a23bdaSmrg/**
101041687f09Smrg * struct drm_mode_revoke_lease - Revoke lease
101141687f09Smrg * @lessee_id: Unique ID of lessee.
101200a23bdaSmrg * Revoke lease
101300a23bdaSmrg */
101400a23bdaSmrgstruct drm_mode_revoke_lease {
101500a23bdaSmrg	/** Unique ID of lessee
101600a23bdaSmrg	 */
101700a23bdaSmrg	__u32 lessee_id;
101800a23bdaSmrg};
101900a23bdaSmrg
10205324fb0dSmrg/**
10215324fb0dSmrg * struct drm_mode_rect - Two dimensional rectangle.
10225324fb0dSmrg * @x1: Horizontal starting coordinate (inclusive).
10235324fb0dSmrg * @y1: Vertical starting coordinate (inclusive).
10245324fb0dSmrg * @x2: Horizontal ending coordinate (exclusive).
10255324fb0dSmrg * @y2: Vertical ending coordinate (exclusive).
10265324fb0dSmrg *
10275324fb0dSmrg * With drm subsystem using struct drm_rect to manage rectangular area this
10285324fb0dSmrg * export it to user-space.
10295324fb0dSmrg *
10305324fb0dSmrg * Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS.
10315324fb0dSmrg */
10325324fb0dSmrgstruct drm_mode_rect {
10335324fb0dSmrg	__s32 x1;
10345324fb0dSmrg	__s32 y1;
10355324fb0dSmrg	__s32 x2;
10365324fb0dSmrg	__s32 y2;
10375324fb0dSmrg};
10385324fb0dSmrg
1039037b3c26Smrg#if defined(__cplusplus)
1040037b3c26Smrg}
1041037b3c26Smrg#endif
1042037b3c26Smrg
104322944501Smrg#endif
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