drm_mode.h revision d8807b2f
122944501Smrg/*
222944501Smrg * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
322944501Smrg * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
422944501Smrg * Copyright (c) 2008 Red Hat Inc.
522944501Smrg * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
622944501Smrg * Copyright (c) 2007-2008 Intel Corporation
722944501Smrg *
822944501Smrg * Permission is hereby granted, free of charge, to any person obtaining a
922944501Smrg * copy of this software and associated documentation files (the "Software"),
1022944501Smrg * to deal in the Software without restriction, including without limitation
1122944501Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1222944501Smrg * and/or sell copies of the Software, and to permit persons to whom the
1322944501Smrg * Software is furnished to do so, subject to the following conditions:
1422944501Smrg *
1522944501Smrg * The above copyright notice and this permission notice shall be included in
1622944501Smrg * all copies or substantial portions of the Software.
1722944501Smrg *
1822944501Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1922944501Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
2022944501Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
2122944501Smrg * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2222944501Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2322944501Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2422944501Smrg * IN THE SOFTWARE.
2522944501Smrg */
2622944501Smrg
2722944501Smrg#ifndef _DRM_MODE_H
2822944501Smrg#define _DRM_MODE_H
2922944501Smrg
303f012e29Smrg#include "drm.h"
313f012e29Smrg
32037b3c26Smrg#if defined(__cplusplus)
33037b3c26Smrgextern "C" {
34037b3c26Smrg#endif
35037b3c26Smrg
3622944501Smrg#define DRM_DISPLAY_INFO_LEN	32
3722944501Smrg#define DRM_CONNECTOR_NAME_LEN	32
3822944501Smrg#define DRM_DISPLAY_MODE_LEN	32
3922944501Smrg#define DRM_PROP_NAME_LEN	32
4022944501Smrg
4122944501Smrg#define DRM_MODE_TYPE_BUILTIN	(1<<0)
4222944501Smrg#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
4322944501Smrg#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
4422944501Smrg#define DRM_MODE_TYPE_PREFERRED	(1<<3)
4522944501Smrg#define DRM_MODE_TYPE_DEFAULT	(1<<4)
4622944501Smrg#define DRM_MODE_TYPE_USERDEF	(1<<5)
4722944501Smrg#define DRM_MODE_TYPE_DRIVER	(1<<6)
4822944501Smrg
4922944501Smrg/* Video mode flags */
50d8807b2fSmrg/* bit compatible with the xrandr RR_ definitions (bits 0-13)
51d8807b2fSmrg *
52d8807b2fSmrg * ABI warning: Existing userspace really expects
53d8807b2fSmrg * the mode flags to match the xrandr definitions. Any
54d8807b2fSmrg * changes that don't match the xrandr definitions will
55d8807b2fSmrg * likely need a new client cap or some other mechanism
56d8807b2fSmrg * to avoid breaking existing userspace. This includes
57d8807b2fSmrg * allocating new flags in the previously unused bits!
58d8807b2fSmrg */
59e88f27b3Smrg#define DRM_MODE_FLAG_PHSYNC			(1<<0)
60e88f27b3Smrg#define DRM_MODE_FLAG_NHSYNC			(1<<1)
61e88f27b3Smrg#define DRM_MODE_FLAG_PVSYNC			(1<<2)
62e88f27b3Smrg#define DRM_MODE_FLAG_NVSYNC			(1<<3)
63e88f27b3Smrg#define DRM_MODE_FLAG_INTERLACE			(1<<4)
64e88f27b3Smrg#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
65e88f27b3Smrg#define DRM_MODE_FLAG_CSYNC			(1<<6)
66e88f27b3Smrg#define DRM_MODE_FLAG_PCSYNC			(1<<7)
67e88f27b3Smrg#define DRM_MODE_FLAG_NCSYNC			(1<<8)
68e88f27b3Smrg#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
69e88f27b3Smrg#define DRM_MODE_FLAG_BCAST			(1<<10)
70e88f27b3Smrg#define DRM_MODE_FLAG_PIXMUX			(1<<11)
71e88f27b3Smrg#define DRM_MODE_FLAG_DBLCLK			(1<<12)
72e88f27b3Smrg#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
733f012e29Smrg /*
743f012e29Smrg  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
753f012e29Smrg  * (define not exposed to user space).
763f012e29Smrg  */
77e88f27b3Smrg#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
78e88f27b3Smrg#define  DRM_MODE_FLAG_3D_NONE			(0<<14)
79e88f27b3Smrg#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
80e88f27b3Smrg#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
81e88f27b3Smrg#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
82e88f27b3Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
83e88f27b3Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
84e88f27b3Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
85e88f27b3Smrg#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
86e88f27b3Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
87e88f27b3Smrg
8822944501Smrg
8922944501Smrg/* DPMS flags */
9022944501Smrg/* bit compatible with the xorg definitions. */
9122944501Smrg#define DRM_MODE_DPMS_ON	0
9222944501Smrg#define DRM_MODE_DPMS_STANDBY	1
9322944501Smrg#define DRM_MODE_DPMS_SUSPEND	2
9422944501Smrg#define DRM_MODE_DPMS_OFF	3
9522944501Smrg
9622944501Smrg/* Scaling mode options */
9722944501Smrg#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
9822944501Smrg					     software can still scale) */
9922944501Smrg#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
10022944501Smrg#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
10122944501Smrg#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
10222944501Smrg
1033f012e29Smrg/* Picture aspect ratio options */
1043f012e29Smrg#define DRM_MODE_PICTURE_ASPECT_NONE	0
1053f012e29Smrg#define DRM_MODE_PICTURE_ASPECT_4_3	1
1063f012e29Smrg#define DRM_MODE_PICTURE_ASPECT_16_9	2
1073f012e29Smrg
10822944501Smrg/* Dithering mode options */
10922944501Smrg#define DRM_MODE_DITHERING_OFF	0
11022944501Smrg#define DRM_MODE_DITHERING_ON	1
111d049871aSmrg#define DRM_MODE_DITHERING_AUTO 2
11222944501Smrg
11313d1d17dSmrg/* Dirty info options */
11413d1d17dSmrg#define DRM_MODE_DIRTY_OFF      0
11513d1d17dSmrg#define DRM_MODE_DIRTY_ON       1
11613d1d17dSmrg#define DRM_MODE_DIRTY_ANNOTATE 2
11713d1d17dSmrg
118d8807b2fSmrg/* Link Status options */
119d8807b2fSmrg#define DRM_MODE_LINK_STATUS_GOOD	0
120d8807b2fSmrg#define DRM_MODE_LINK_STATUS_BAD	1
121d8807b2fSmrg
12222944501Smrgstruct drm_mode_modeinfo {
12322944501Smrg	__u32 clock;
1243f012e29Smrg	__u16 hdisplay;
1253f012e29Smrg	__u16 hsync_start;
1263f012e29Smrg	__u16 hsync_end;
1273f012e29Smrg	__u16 htotal;
1283f012e29Smrg	__u16 hskew;
1293f012e29Smrg	__u16 vdisplay;
1303f012e29Smrg	__u16 vsync_start;
1313f012e29Smrg	__u16 vsync_end;
1323f012e29Smrg	__u16 vtotal;
1333f012e29Smrg	__u16 vscan;
13422944501Smrg
135d049871aSmrg	__u32 vrefresh;
13622944501Smrg
13722944501Smrg	__u32 flags;
13822944501Smrg	__u32 type;
13922944501Smrg	char name[DRM_DISPLAY_MODE_LEN];
14022944501Smrg};
14122944501Smrg
14222944501Smrgstruct drm_mode_card_res {
14322944501Smrg	__u64 fb_id_ptr;
14422944501Smrg	__u64 crtc_id_ptr;
14522944501Smrg	__u64 connector_id_ptr;
14622944501Smrg	__u64 encoder_id_ptr;
14722944501Smrg	__u32 count_fbs;
14822944501Smrg	__u32 count_crtcs;
14922944501Smrg	__u32 count_connectors;
15022944501Smrg	__u32 count_encoders;
1513f012e29Smrg	__u32 min_width;
1523f012e29Smrg	__u32 max_width;
1533f012e29Smrg	__u32 min_height;
1543f012e29Smrg	__u32 max_height;
15522944501Smrg};
15622944501Smrg
15722944501Smrgstruct drm_mode_crtc {
15822944501Smrg	__u64 set_connectors_ptr;
15922944501Smrg	__u32 count_connectors;
16022944501Smrg
16122944501Smrg	__u32 crtc_id; /**< Id */
16222944501Smrg	__u32 fb_id; /**< Id of framebuffer */
16322944501Smrg
1643f012e29Smrg	__u32 x; /**< x Position on the framebuffer */
1653f012e29Smrg	__u32 y; /**< y Position on the framebuffer */
16622944501Smrg
16722944501Smrg	__u32 gamma_size;
16822944501Smrg	__u32 mode_valid;
16922944501Smrg	struct drm_mode_modeinfo mode;
17022944501Smrg};
17122944501Smrg
1723f012e29Smrg#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
1733f012e29Smrg#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
174e88f27b3Smrg
175e88f27b3Smrg/* Planes blend with or override other bits on the CRTC */
176e88f27b3Smrgstruct drm_mode_set_plane {
177e88f27b3Smrg	__u32 plane_id;
178e88f27b3Smrg	__u32 crtc_id;
179e88f27b3Smrg	__u32 fb_id; /* fb object contains surface format type */
1803f012e29Smrg	__u32 flags; /* see above flags */
181e88f27b3Smrg
182e88f27b3Smrg	/* Signed dest location allows it to be partially off screen */
1833f012e29Smrg	__s32 crtc_x;
1843f012e29Smrg	__s32 crtc_y;
1853f012e29Smrg	__u32 crtc_w;
1863f012e29Smrg	__u32 crtc_h;
187e88f27b3Smrg
188e88f27b3Smrg	/* Source values are 16.16 fixed point */
1893f012e29Smrg	__u32 src_x;
1903f012e29Smrg	__u32 src_y;
1913f012e29Smrg	__u32 src_h;
1923f012e29Smrg	__u32 src_w;
193e88f27b3Smrg};
194e88f27b3Smrg
195e88f27b3Smrgstruct drm_mode_get_plane {
196e88f27b3Smrg	__u32 plane_id;
197e88f27b3Smrg
198e88f27b3Smrg	__u32 crtc_id;
199e88f27b3Smrg	__u32 fb_id;
200e88f27b3Smrg
201e88f27b3Smrg	__u32 possible_crtcs;
202e88f27b3Smrg	__u32 gamma_size;
203e88f27b3Smrg
204e88f27b3Smrg	__u32 count_format_types;
205e88f27b3Smrg	__u64 format_type_ptr;
206e88f27b3Smrg};
207e88f27b3Smrg
208e88f27b3Smrgstruct drm_mode_get_plane_res {
209e88f27b3Smrg	__u64 plane_id_ptr;
210e88f27b3Smrg	__u32 count_planes;
211e88f27b3Smrg};
212e88f27b3Smrg
21322944501Smrg#define DRM_MODE_ENCODER_NONE	0
21422944501Smrg#define DRM_MODE_ENCODER_DAC	1
21522944501Smrg#define DRM_MODE_ENCODER_TMDS	2
21622944501Smrg#define DRM_MODE_ENCODER_LVDS	3
21722944501Smrg#define DRM_MODE_ENCODER_TVDAC	4
21808d7334dSsnj#define DRM_MODE_ENCODER_VIRTUAL 5
21908d7334dSsnj#define DRM_MODE_ENCODER_DSI	6
22008d7334dSsnj#define DRM_MODE_ENCODER_DPMST	7
221037b3c26Smrg#define DRM_MODE_ENCODER_DPI	8
22222944501Smrg
22322944501Smrgstruct drm_mode_get_encoder {
22422944501Smrg	__u32 encoder_id;
22522944501Smrg	__u32 encoder_type;
22622944501Smrg
22722944501Smrg	__u32 crtc_id; /**< Id of crtc */
22822944501Smrg
22922944501Smrg	__u32 possible_crtcs;
23022944501Smrg	__u32 possible_clones;
23122944501Smrg};
23222944501Smrg
23322944501Smrg/* This is for connectors with multiple signal types. */
23422944501Smrg/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
235d8807b2fSmrgenum drm_mode_subconnector {
236d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Automatic = 0,
237d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Unknown = 0,
238d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_DVID = 3,
239d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_DVIA = 4,
240d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Composite = 5,
241d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
242d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Component = 8,
243d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_SCART = 9,
244d8807b2fSmrg};
24522944501Smrg
24622944501Smrg#define DRM_MODE_CONNECTOR_Unknown	0
24722944501Smrg#define DRM_MODE_CONNECTOR_VGA		1
24822944501Smrg#define DRM_MODE_CONNECTOR_DVII		2
24922944501Smrg#define DRM_MODE_CONNECTOR_DVID		3
25022944501Smrg#define DRM_MODE_CONNECTOR_DVIA		4
25122944501Smrg#define DRM_MODE_CONNECTOR_Composite	5
25222944501Smrg#define DRM_MODE_CONNECTOR_SVIDEO	6
25322944501Smrg#define DRM_MODE_CONNECTOR_LVDS		7
25422944501Smrg#define DRM_MODE_CONNECTOR_Component	8
25522944501Smrg#define DRM_MODE_CONNECTOR_9PinDIN	9
25622944501Smrg#define DRM_MODE_CONNECTOR_DisplayPort	10
25722944501Smrg#define DRM_MODE_CONNECTOR_HDMIA	11
25822944501Smrg#define DRM_MODE_CONNECTOR_HDMIB	12
25922944501Smrg#define DRM_MODE_CONNECTOR_TV		13
260d049871aSmrg#define DRM_MODE_CONNECTOR_eDP		14
26108d7334dSsnj#define DRM_MODE_CONNECTOR_VIRTUAL      15
26208d7334dSsnj#define DRM_MODE_CONNECTOR_DSI		16
263037b3c26Smrg#define DRM_MODE_CONNECTOR_DPI		17
26422944501Smrg
26522944501Smrgstruct drm_mode_get_connector {
26622944501Smrg
26722944501Smrg	__u64 encoders_ptr;
26822944501Smrg	__u64 modes_ptr;
26922944501Smrg	__u64 props_ptr;
27022944501Smrg	__u64 prop_values_ptr;
27122944501Smrg
27222944501Smrg	__u32 count_modes;
27322944501Smrg	__u32 count_props;
27422944501Smrg	__u32 count_encoders;
27522944501Smrg
27622944501Smrg	__u32 encoder_id; /**< Current Encoder */
27722944501Smrg	__u32 connector_id; /**< Id */
27822944501Smrg	__u32 connector_type;
27922944501Smrg	__u32 connector_type_id;
28022944501Smrg
28122944501Smrg	__u32 connection;
2823f012e29Smrg	__u32 mm_width;  /**< width in millimeters */
2833f012e29Smrg	__u32 mm_height; /**< height in millimeters */
28422944501Smrg	__u32 subpixel;
2853f012e29Smrg
2863f012e29Smrg	__u32 pad;
28722944501Smrg};
28822944501Smrg
28922944501Smrg#define DRM_MODE_PROP_PENDING	(1<<0)
29022944501Smrg#define DRM_MODE_PROP_RANGE	(1<<1)
29122944501Smrg#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
29222944501Smrg#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
29322944501Smrg#define DRM_MODE_PROP_BLOB	(1<<4)
294e88f27b3Smrg#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
29522944501Smrg
29608d7334dSsnj/* non-extended types: legacy bitmask, one bit per type: */
29708d7334dSsnj#define DRM_MODE_PROP_LEGACY_TYPE  ( \
29808d7334dSsnj		DRM_MODE_PROP_RANGE | \
29908d7334dSsnj		DRM_MODE_PROP_ENUM | \
30008d7334dSsnj		DRM_MODE_PROP_BLOB | \
30108d7334dSsnj		DRM_MODE_PROP_BITMASK)
30208d7334dSsnj
30308d7334dSsnj/* extended-types: rather than continue to consume a bit per type,
30408d7334dSsnj * grab a chunk of the bits to use as integer type id.
30508d7334dSsnj */
30608d7334dSsnj#define DRM_MODE_PROP_EXTENDED_TYPE	0x0000ffc0
30708d7334dSsnj#define DRM_MODE_PROP_TYPE(n)		((n) << 6)
30808d7334dSsnj#define DRM_MODE_PROP_OBJECT		DRM_MODE_PROP_TYPE(1)
30908d7334dSsnj#define DRM_MODE_PROP_SIGNED_RANGE	DRM_MODE_PROP_TYPE(2)
31008d7334dSsnj
3113f012e29Smrg/* the PROP_ATOMIC flag is used to hide properties from userspace that
3123f012e29Smrg * is not aware of atomic properties.  This is mostly to work around
3133f012e29Smrg * older userspace (DDX drivers) that read/write each prop they find,
3143f012e29Smrg * witout being aware that this could be triggering a lengthy modeset.
3153f012e29Smrg */
3163f012e29Smrg#define DRM_MODE_PROP_ATOMIC        0x80000000
3173f012e29Smrg
31822944501Smrgstruct drm_mode_property_enum {
31922944501Smrg	__u64 value;
32022944501Smrg	char name[DRM_PROP_NAME_LEN];
32122944501Smrg};
32222944501Smrg
32322944501Smrgstruct drm_mode_get_property {
32422944501Smrg	__u64 values_ptr; /* values and blob lengths */
32522944501Smrg	__u64 enum_blob_ptr; /* enum and blob id ptrs */
32622944501Smrg
32722944501Smrg	__u32 prop_id;
32822944501Smrg	__u32 flags;
32922944501Smrg	char name[DRM_PROP_NAME_LEN];
33022944501Smrg
33122944501Smrg	__u32 count_values;
3323f012e29Smrg	/* This is only used to count enum values, not blobs. The _blobs is
3333f012e29Smrg	 * simply because of a historical reason, i.e. backwards compat. */
33422944501Smrg	__u32 count_enum_blobs;
33522944501Smrg};
33622944501Smrg
33722944501Smrgstruct drm_mode_connector_set_property {
33822944501Smrg	__u64 value;
33922944501Smrg	__u32 prop_id;
34022944501Smrg	__u32 connector_id;
34122944501Smrg};
34222944501Smrg
343e88f27b3Smrg#define DRM_MODE_OBJECT_CRTC 0xcccccccc
344e88f27b3Smrg#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
345e88f27b3Smrg#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
346e88f27b3Smrg#define DRM_MODE_OBJECT_MODE 0xdededede
347e88f27b3Smrg#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
348e88f27b3Smrg#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
349e88f27b3Smrg#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
350e88f27b3Smrg#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
3513f012e29Smrg#define DRM_MODE_OBJECT_ANY 0
352e88f27b3Smrg
353e88f27b3Smrgstruct drm_mode_obj_get_properties {
354e88f27b3Smrg	__u64 props_ptr;
355e88f27b3Smrg	__u64 prop_values_ptr;
356e88f27b3Smrg	__u32 count_props;
357e88f27b3Smrg	__u32 obj_id;
358e88f27b3Smrg	__u32 obj_type;
359e88f27b3Smrg};
360e88f27b3Smrg
361e88f27b3Smrgstruct drm_mode_obj_set_property {
362e88f27b3Smrg	__u64 value;
363e88f27b3Smrg	__u32 prop_id;
364e88f27b3Smrg	__u32 obj_id;
365e88f27b3Smrg	__u32 obj_type;
366e88f27b3Smrg};
367e88f27b3Smrg
36822944501Smrgstruct drm_mode_get_blob {
36922944501Smrg	__u32 blob_id;
37022944501Smrg	__u32 length;
37122944501Smrg	__u64 data;
37222944501Smrg};
37322944501Smrg
37422944501Smrgstruct drm_mode_fb_cmd {
37522944501Smrg	__u32 fb_id;
3763f012e29Smrg	__u32 width;
3773f012e29Smrg	__u32 height;
37822944501Smrg	__u32 pitch;
37922944501Smrg	__u32 bpp;
38022944501Smrg	__u32 depth;
38122944501Smrg	/* driver specific handle */
38222944501Smrg	__u32 handle;
38322944501Smrg};
38422944501Smrg
3853f012e29Smrg#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
3863f012e29Smrg#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifer[] */
387e88f27b3Smrg
388e88f27b3Smrgstruct drm_mode_fb_cmd2 {
389e88f27b3Smrg	__u32 fb_id;
3903f012e29Smrg	__u32 width;
3913f012e29Smrg	__u32 height;
392e88f27b3Smrg	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
3933f012e29Smrg	__u32 flags; /* see above flags */
394e88f27b3Smrg
395e88f27b3Smrg	/*
396e88f27b3Smrg	 * In case of planar formats, this ioctl allows up to 4
397e88f27b3Smrg	 * buffer objects with offsets and pitches per plane.
398e88f27b3Smrg	 * The pitch and offset order is dictated by the fourcc,
399e88f27b3Smrg	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
400e88f27b3Smrg	 *
401e88f27b3Smrg	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
402e88f27b3Smrg	 *   followed by an interleaved U/V plane containing
403e88f27b3Smrg	 *   8 bit 2x2 subsampled colour difference samples.
404e88f27b3Smrg	 *
4053f012e29Smrg	 * So it would consist of Y as offsets[0] and UV as
4063f012e29Smrg	 * offsets[1].  Note that offsets[0] will generally
4073f012e29Smrg	 * be 0 (but this is not required).
4083f012e29Smrg	 *
409d8807b2fSmrg	 * To accommodate tiled, compressed, etc formats, a
4103f012e29Smrg	 * modifier can be specified.  The default value of zero
4113f012e29Smrg	 * indicates "native" format as specified by the fourcc.
412d8807b2fSmrg	 * Vendor specific modifier token.  Note that even though
413d8807b2fSmrg	 * it looks like we have a modifier per-plane, we in fact
414d8807b2fSmrg	 * do not. The modifier for each plane must be identical.
415d8807b2fSmrg	 * Thus all combinations of different data layouts for
416d8807b2fSmrg	 * multi plane formats must be enumerated as separate
417d8807b2fSmrg	 * modifiers.
418e88f27b3Smrg	 */
419e88f27b3Smrg	__u32 handles[4];
420e88f27b3Smrg	__u32 pitches[4]; /* pitch for each plane */
421e88f27b3Smrg	__u32 offsets[4]; /* offset of each plane */
422d8807b2fSmrg	__u64 modifier[4]; /* ie, tiling, compress */
423e88f27b3Smrg};
424e88f27b3Smrg
42522944501Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
42622944501Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
42722944501Smrg#define DRM_MODE_FB_DIRTY_FLAGS         0x03
42822944501Smrg
4293f012e29Smrg#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
4303f012e29Smrg
43122944501Smrg/*
43222944501Smrg * Mark a region of a framebuffer as dirty.
43322944501Smrg *
43422944501Smrg * Some hardware does not automatically update display contents
43522944501Smrg * as a hardware or software draw to a framebuffer. This ioctl
43622944501Smrg * allows userspace to tell the kernel and the hardware what
43722944501Smrg * regions of the framebuffer have changed.
43822944501Smrg *
43922944501Smrg * The kernel or hardware is free to update more then just the
44022944501Smrg * region specified by the clip rects. The kernel or hardware
44122944501Smrg * may also delay and/or coalesce several calls to dirty into a
44222944501Smrg * single update.
44322944501Smrg *
44422944501Smrg * Userspace may annotate the updates, the annotates are a
44522944501Smrg * promise made by the caller that the change is either a copy
44622944501Smrg * of pixels or a fill of a single color in the region specified.
44722944501Smrg *
44822944501Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
44922944501Smrg * the number of updated regions are half of num_clips given,
45022944501Smrg * where the clip rects are paired in src and dst. The width and
45122944501Smrg * height of each one of the pairs must match.
45222944501Smrg *
45322944501Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
45422944501Smrg * promises that the region specified of the clip rects is filled
45522944501Smrg * completely with a single color as given in the color argument.
45622944501Smrg */
45722944501Smrg
45822944501Smrgstruct drm_mode_fb_dirty_cmd {
45922944501Smrg	__u32 fb_id;
46022944501Smrg	__u32 flags;
46122944501Smrg	__u32 color;
46222944501Smrg	__u32 num_clips;
46322944501Smrg	__u64 clips_ptr;
46422944501Smrg};
46522944501Smrg
46622944501Smrgstruct drm_mode_mode_cmd {
46722944501Smrg	__u32 connector_id;
46822944501Smrg	struct drm_mode_modeinfo mode;
46922944501Smrg};
47022944501Smrg
4713f012e29Smrg#define DRM_MODE_CURSOR_BO	0x01
4723f012e29Smrg#define DRM_MODE_CURSOR_MOVE	0x02
4733f012e29Smrg#define DRM_MODE_CURSOR_FLAGS	0x03
47422944501Smrg
47522944501Smrg/*
4763f012e29Smrg * depending on the value in flags different members are used.
47722944501Smrg *
47822944501Smrg * CURSOR_BO uses
4793f012e29Smrg *    crtc_id
48022944501Smrg *    width
48122944501Smrg *    height
4823f012e29Smrg *    handle - if 0 turns the cursor off
48322944501Smrg *
48422944501Smrg * CURSOR_MOVE uses
4853f012e29Smrg *    crtc_id
48622944501Smrg *    x
48722944501Smrg *    y
48822944501Smrg */
48922944501Smrgstruct drm_mode_cursor {
49022944501Smrg	__u32 flags;
49122944501Smrg	__u32 crtc_id;
49222944501Smrg	__s32 x;
49322944501Smrg	__s32 y;
49422944501Smrg	__u32 width;
49522944501Smrg	__u32 height;
49622944501Smrg	/* driver specific handle */
49722944501Smrg	__u32 handle;
49822944501Smrg};
49922944501Smrg
500e88f27b3Smrgstruct drm_mode_cursor2 {
501e88f27b3Smrg	__u32 flags;
502e88f27b3Smrg	__u32 crtc_id;
503e88f27b3Smrg	__s32 x;
504e88f27b3Smrg	__s32 y;
505e88f27b3Smrg	__u32 width;
506e88f27b3Smrg	__u32 height;
507e88f27b3Smrg	/* driver specific handle */
508e88f27b3Smrg	__u32 handle;
509e88f27b3Smrg	__s32 hot_x;
510e88f27b3Smrg	__s32 hot_y;
511e88f27b3Smrg};
512e88f27b3Smrg
51322944501Smrgstruct drm_mode_crtc_lut {
51422944501Smrg	__u32 crtc_id;
51522944501Smrg	__u32 gamma_size;
51622944501Smrg
51722944501Smrg	/* pointers to arrays */
51822944501Smrg	__u64 red;
51922944501Smrg	__u64 green;
52022944501Smrg	__u64 blue;
52122944501Smrg};
52222944501Smrg
5233f012e29Smrgstruct drm_color_ctm {
5243f012e29Smrg	/* Conversion matrix in S31.32 format. */
5253f012e29Smrg	__s64 matrix[9];
5263f012e29Smrg};
5273f012e29Smrg
5283f012e29Smrgstruct drm_color_lut {
5293f012e29Smrg	/*
5303f012e29Smrg	 * Data is U0.16 fixed point format.
5313f012e29Smrg	 */
5323f012e29Smrg	__u16 red;
5333f012e29Smrg	__u16 green;
5343f012e29Smrg	__u16 blue;
5353f012e29Smrg	__u16 reserved;
5363f012e29Smrg};
5373f012e29Smrg
53822944501Smrg#define DRM_MODE_PAGE_FLIP_EVENT 0x01
539e88f27b3Smrg#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
540037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
541037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
542037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
543037b3c26Smrg				   DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
544037b3c26Smrg#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
545037b3c26Smrg				  DRM_MODE_PAGE_FLIP_ASYNC | \
546037b3c26Smrg				  DRM_MODE_PAGE_FLIP_TARGET)
54722944501Smrg
54813d1d17dSmrg/*
54913d1d17dSmrg * Request a page flip on the specified crtc.
55013d1d17dSmrg *
55113d1d17dSmrg * This ioctl will ask KMS to schedule a page flip for the specified
55213d1d17dSmrg * crtc.  Once any pending rendering targeting the specified fb (as of
55313d1d17dSmrg * ioctl time) has completed, the crtc will be reprogrammed to display
55413d1d17dSmrg * that fb after the next vertical refresh.  The ioctl returns
55513d1d17dSmrg * immediately, but subsequent rendering to the current fb will block
55613d1d17dSmrg * in the execbuffer ioctl until the page flip happens.  If a page
55713d1d17dSmrg * flip is already pending as the ioctl is called, EBUSY will be
55813d1d17dSmrg * returned.
55913d1d17dSmrg *
5603f012e29Smrg * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
5613f012e29Smrg * event (see drm.h: struct drm_event_vblank) when the page flip is
5623f012e29Smrg * done.  The user_data field passed in with this ioctl will be
5633f012e29Smrg * returned as the user_data field in the vblank event struct.
5643f012e29Smrg *
5653f012e29Smrg * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
5663f012e29Smrg * 'as soon as possible', meaning that it not delay waiting for vblank.
5673f012e29Smrg * This may cause tearing on the screen.
56813d1d17dSmrg *
569037b3c26Smrg * The reserved field must be zero.
57013d1d17dSmrg */
57113d1d17dSmrg
57222944501Smrgstruct drm_mode_crtc_page_flip {
57313d1d17dSmrg	__u32 crtc_id;
57413d1d17dSmrg	__u32 fb_id;
57513d1d17dSmrg	__u32 flags;
57613d1d17dSmrg	__u32 reserved;
57713d1d17dSmrg	__u64 user_data;
57822944501Smrg};
57922944501Smrg
580037b3c26Smrg/*
581037b3c26Smrg * Request a page flip on the specified crtc.
582037b3c26Smrg *
583037b3c26Smrg * Same as struct drm_mode_crtc_page_flip, but supports new flags and
584037b3c26Smrg * re-purposes the reserved field:
585037b3c26Smrg *
586037b3c26Smrg * The sequence field must be zero unless either of the
587037b3c26Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
588037b3c26Smrg * the ABSOLUTE flag is specified, the sequence field denotes the absolute
589037b3c26Smrg * vblank sequence when the flip should take effect. When the RELATIVE
590037b3c26Smrg * flag is specified, the sequence field denotes the relative (to the
591037b3c26Smrg * current one when the ioctl is called) vblank sequence when the flip
592037b3c26Smrg * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
593037b3c26Smrg * make sure the vblank sequence before the target one has passed before
594037b3c26Smrg * calling this ioctl. The purpose of the
595037b3c26Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
596037b3c26Smrg * the target for when code dealing with a page flip runs during a
597037b3c26Smrg * vertical blank period.
598037b3c26Smrg */
599037b3c26Smrg
600037b3c26Smrgstruct drm_mode_crtc_page_flip_target {
601037b3c26Smrg	__u32 crtc_id;
602037b3c26Smrg	__u32 fb_id;
603037b3c26Smrg	__u32 flags;
604037b3c26Smrg	__u32 sequence;
605037b3c26Smrg	__u64 user_data;
606037b3c26Smrg};
607037b3c26Smrg
608e88f27b3Smrg/* create a dumb scanout buffer */
609e88f27b3Smrgstruct drm_mode_create_dumb {
6103f012e29Smrg	__u32 height;
6113f012e29Smrg	__u32 width;
6123f012e29Smrg	__u32 bpp;
6133f012e29Smrg	__u32 flags;
6143f012e29Smrg	/* handle, pitch, size will be returned */
6153f012e29Smrg	__u32 handle;
6163f012e29Smrg	__u32 pitch;
6173f012e29Smrg	__u64 size;
618e88f27b3Smrg};
619e88f27b3Smrg
620e88f27b3Smrg/* set up for mmap of a dumb scanout buffer */
621e88f27b3Smrgstruct drm_mode_map_dumb {
6223f012e29Smrg	/** Handle for the object being mapped. */
6233f012e29Smrg	__u32 handle;
6243f012e29Smrg	__u32 pad;
6253f012e29Smrg	/**
6263f012e29Smrg	 * Fake offset to use for subsequent mmap call
6273f012e29Smrg	 *
6283f012e29Smrg	 * This is a fixed-size type for 32/64 compatibility.
6293f012e29Smrg	 */
6303f012e29Smrg	__u64 offset;
631e88f27b3Smrg};
632e88f27b3Smrg
633e88f27b3Smrgstruct drm_mode_destroy_dumb {
634e88f27b3Smrg	__u32 handle;
635e88f27b3Smrg};
636e88f27b3Smrg
637e6188e58Smrg/* page-flip flags are valid, plus: */
6383f012e29Smrg#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
6393f012e29Smrg#define DRM_MODE_ATOMIC_NONBLOCK  0x0200
6403f012e29Smrg#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
6413f012e29Smrg
6423f012e29Smrg#define DRM_MODE_ATOMIC_FLAGS (\
6433f012e29Smrg		DRM_MODE_PAGE_FLIP_EVENT |\
6443f012e29Smrg		DRM_MODE_PAGE_FLIP_ASYNC |\
6453f012e29Smrg		DRM_MODE_ATOMIC_TEST_ONLY |\
6463f012e29Smrg		DRM_MODE_ATOMIC_NONBLOCK |\
6473f012e29Smrg		DRM_MODE_ATOMIC_ALLOW_MODESET)
648e6188e58Smrg
649e6188e58Smrgstruct drm_mode_atomic {
650e6188e58Smrg	__u32 flags;
651e6188e58Smrg	__u32 count_objs;
652e6188e58Smrg	__u64 objs_ptr;
653e6188e58Smrg	__u64 count_props_ptr;
654e6188e58Smrg	__u64 props_ptr;
655e6188e58Smrg	__u64 prop_values_ptr;
656e6188e58Smrg	__u64 reserved;
657e6188e58Smrg	__u64 user_data;
658e6188e58Smrg};
659e6188e58Smrg
660d8807b2fSmrgstruct drm_format_modifier_blob {
661d8807b2fSmrg#define FORMAT_BLOB_CURRENT 1
662d8807b2fSmrg	/* Version of this blob format */
663d8807b2fSmrg	__u32 version;
664d8807b2fSmrg
665d8807b2fSmrg	/* Flags */
666d8807b2fSmrg	__u32 flags;
667d8807b2fSmrg
668d8807b2fSmrg	/* Number of fourcc formats supported */
669d8807b2fSmrg	__u32 count_formats;
670d8807b2fSmrg
671d8807b2fSmrg	/* Where in this blob the formats exist (in bytes) */
672d8807b2fSmrg	__u32 formats_offset;
673d8807b2fSmrg
674d8807b2fSmrg	/* Number of drm_format_modifiers */
675d8807b2fSmrg	__u32 count_modifiers;
676d8807b2fSmrg
677d8807b2fSmrg	/* Where in this blob the modifiers exist (in bytes) */
678d8807b2fSmrg	__u32 modifiers_offset;
679d8807b2fSmrg
680d8807b2fSmrg	/* u32 formats[] */
681d8807b2fSmrg	/* struct drm_format_modifier modifiers[] */
682d8807b2fSmrg};
683d8807b2fSmrg
684d8807b2fSmrgstruct drm_format_modifier {
685d8807b2fSmrg	/* Bitmask of formats in get_plane format list this info applies to. The
686d8807b2fSmrg	 * offset allows a sliding window of which 64 formats (bits).
687d8807b2fSmrg	 *
688d8807b2fSmrg	 * Some examples:
689d8807b2fSmrg	 * In today's world with < 65 formats, and formats 0, and 2 are
690d8807b2fSmrg	 * supported
691d8807b2fSmrg	 * 0x0000000000000005
692d8807b2fSmrg	 *		  ^-offset = 0, formats = 5
693d8807b2fSmrg	 *
694d8807b2fSmrg	 * If the number formats grew to 128, and formats 98-102 are
695d8807b2fSmrg	 * supported with the modifier:
696d8807b2fSmrg	 *
697d8807b2fSmrg	 * 0x0000003c00000000 0000000000000000
698d8807b2fSmrg	 *		  ^
699d8807b2fSmrg	 *		  |__offset = 64, formats = 0x3c00000000
700d8807b2fSmrg	 *
701d8807b2fSmrg	 */
702d8807b2fSmrg	__u64 formats;
703d8807b2fSmrg	__u32 offset;
704d8807b2fSmrg	__u32 pad;
705d8807b2fSmrg
706d8807b2fSmrg	/* The modifier that applies to the >get_plane format list bitmask. */
707d8807b2fSmrg	__u64 modifier;
708d8807b2fSmrg};
709d8807b2fSmrg
710e6188e58Smrg/**
711e6188e58Smrg * Create a new 'blob' data property, copying length bytes from data pointer,
712e6188e58Smrg * and returning new blob ID.
713e6188e58Smrg */
714e6188e58Smrgstruct drm_mode_create_blob {
715e6188e58Smrg	/** Pointer to data to copy. */
716e6188e58Smrg	__u64 data;
717e6188e58Smrg	/** Length of data to copy. */
718e6188e58Smrg	__u32 length;
719e6188e58Smrg	/** Return: new property ID. */
720e6188e58Smrg	__u32 blob_id;
721e6188e58Smrg};
722e6188e58Smrg
723e6188e58Smrg/**
724e6188e58Smrg * Destroy a user-created blob property.
725e6188e58Smrg */
726e6188e58Smrgstruct drm_mode_destroy_blob {
727e6188e58Smrg	__u32 blob_id;
728e6188e58Smrg};
729e6188e58Smrg
730037b3c26Smrg#if defined(__cplusplus)
731037b3c26Smrg}
732037b3c26Smrg#endif
733037b3c26Smrg
73422944501Smrg#endif
735