intel_bufmgr.h revision d049871a
1/* 2 * Copyright © 2008 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28/** 29 * @file intel_bufmgr.h 30 * 31 * Public definitions of Intel-specific bufmgr functions. 32 */ 33 34#ifndef INTEL_BUFMGR_H 35#define INTEL_BUFMGR_H 36 37#include <stdint.h> 38 39typedef struct _drm_intel_bufmgr drm_intel_bufmgr; 40typedef struct _drm_intel_bo drm_intel_bo; 41 42struct _drm_intel_bo { 43 /** 44 * Size in bytes of the buffer object. 45 * 46 * The size may be larger than the size originally requested for the 47 * allocation, such as being aligned to page size. 48 */ 49 unsigned long size; 50 51 /** 52 * Alignment requirement for object 53 * 54 * Used for GTT mapping & pinning the object. 55 */ 56 unsigned long align; 57 58 /** 59 * Last seen card virtual address (offset from the beginning of the 60 * aperture) for the object. This should be used to fill relocation 61 * entries when calling drm_intel_bo_emit_reloc() 62 */ 63 unsigned long offset; 64 65 /** 66 * Virtual address for accessing the buffer data. Only valid while 67 * mapped. 68 */ 69#ifdef __cplusplus 70 void *virt; 71#else 72 void *virtual; 73#endif 74 75 /** Buffer manager context associated with this buffer object */ 76 drm_intel_bufmgr *bufmgr; 77 78 /** 79 * MM-specific handle for accessing object 80 */ 81 int handle; 82}; 83 84#define BO_ALLOC_FOR_RENDER (1<<0) 85 86drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name, 87 unsigned long size, unsigned int alignment); 88drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, 89 const char *name, 90 unsigned long size, 91 unsigned int alignment); 92drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, 93 const char *name, 94 int x, int y, int cpp, 95 uint32_t *tiling_mode, 96 unsigned long *pitch, 97 unsigned long flags); 98void drm_intel_bo_reference(drm_intel_bo *bo); 99void drm_intel_bo_unreference(drm_intel_bo *bo); 100int drm_intel_bo_map(drm_intel_bo *bo, int write_enable); 101int drm_intel_bo_unmap(drm_intel_bo *bo); 102 103int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset, 104 unsigned long size, const void *data); 105int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, 106 unsigned long size, void *data); 107void drm_intel_bo_wait_rendering(drm_intel_bo *bo); 108 109void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug); 110void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr); 111int drm_intel_bo_exec(drm_intel_bo *bo, int used, 112 drm_clip_rect_t * cliprects, int num_cliprects, int DR4); 113int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used, 114 drm_clip_rect_t *cliprects, int num_cliprects, int DR4, 115 int ring_flag); 116int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count); 117 118int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, 119 drm_intel_bo *target_bo, uint32_t target_offset, 120 uint32_t read_domains, uint32_t write_domain); 121int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset, 122 drm_intel_bo *target_bo, 123 uint32_t target_offset, 124 uint32_t read_domains, uint32_t write_domain); 125int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment); 126int drm_intel_bo_unpin(drm_intel_bo *bo); 127int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, 128 uint32_t stride); 129int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, 130 uint32_t * swizzle_mode); 131int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name); 132int drm_intel_bo_busy(drm_intel_bo *bo); 133int drm_intel_bo_madvise(drm_intel_bo *bo, int madv); 134 135int drm_intel_bo_disable_reuse(drm_intel_bo *bo); 136int drm_intel_bo_is_reusable(drm_intel_bo *bo); 137int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo); 138 139/* drm_intel_bufmgr_gem.c */ 140drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size); 141drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, 142 const char *name, 143 unsigned int handle); 144void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr); 145void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr); 146int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo); 147int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo); 148void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable); 149 150int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); 151 152/* drm_intel_bufmgr_fake.c */ 153drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, 154 unsigned long low_offset, 155 void *low_virtual, 156 unsigned long size, 157 volatile unsigned int 158 *last_dispatch); 159void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr, 160 volatile unsigned int 161 *last_dispatch); 162void drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr, 163 int (*exec) (drm_intel_bo *bo, 164 unsigned int used, 165 void *priv), 166 void *priv); 167void drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr, 168 unsigned int (*emit) (void *priv), 169 void (*wait) (unsigned int fence, 170 void *priv), 171 void *priv); 172drm_intel_bo *drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr, 173 const char *name, 174 unsigned long offset, 175 unsigned long size, void *virt); 176void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo, 177 void (*invalidate_cb) (drm_intel_bo 178 * bo, 179 void *ptr), 180 void *ptr); 181 182void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr); 183void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr); 184 185/** @{ Compatibility defines to keep old code building despite the symbol rename 186 * from dri_* to drm_intel_* 187 */ 188#define dri_bo drm_intel_bo 189#define dri_bufmgr drm_intel_bufmgr 190#define dri_bo_alloc drm_intel_bo_alloc 191#define dri_bo_reference drm_intel_bo_reference 192#define dri_bo_unreference drm_intel_bo_unreference 193#define dri_bo_map drm_intel_bo_map 194#define dri_bo_unmap drm_intel_bo_unmap 195#define dri_bo_subdata drm_intel_bo_subdata 196#define dri_bo_get_subdata drm_intel_bo_get_subdata 197#define dri_bo_wait_rendering drm_intel_bo_wait_rendering 198#define dri_bufmgr_set_debug drm_intel_bufmgr_set_debug 199#define dri_bufmgr_destroy drm_intel_bufmgr_destroy 200#define dri_bo_exec drm_intel_bo_exec 201#define dri_bufmgr_check_aperture_space drm_intel_bufmgr_check_aperture_space 202#define dri_bo_emit_reloc(reloc_bo, read, write, target_offset, \ 203 reloc_offset, target_bo) \ 204 drm_intel_bo_emit_reloc(reloc_bo, reloc_offset, \ 205 target_bo, target_offset, \ 206 read, write); 207#define dri_bo_pin drm_intel_bo_pin 208#define dri_bo_unpin drm_intel_bo_unpin 209#define dri_bo_get_tiling drm_intel_bo_get_tiling 210#define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0) 211#define dri_bo_flink drm_intel_bo_flink 212#define intel_bufmgr_gem_init drm_intel_bufmgr_gem_init 213#define intel_bo_gem_create_from_name drm_intel_bo_gem_create_from_name 214#define intel_bufmgr_gem_enable_reuse drm_intel_bufmgr_gem_enable_reuse 215#define intel_bufmgr_fake_init drm_intel_bufmgr_fake_init 216#define intel_bufmgr_fake_set_last_dispatch drm_intel_bufmgr_fake_set_last_dispatch 217#define intel_bufmgr_fake_set_exec_callback drm_intel_bufmgr_fake_set_exec_callback 218#define intel_bufmgr_fake_set_fence_callback drm_intel_bufmgr_fake_set_fence_callback 219#define intel_bo_fake_alloc_static drm_intel_bo_fake_alloc_static 220#define intel_bo_fake_disable_backing_store drm_intel_bo_fake_disable_backing_store 221#define intel_bufmgr_fake_contended_lock_take drm_intel_bufmgr_fake_contended_lock_take 222#define intel_bufmgr_fake_evict_all drm_intel_bufmgr_fake_evict_all 223 224/** @{ */ 225 226#endif /* INTEL_BUFMGR_H */ 227