amdgpu_test.h revision 5324fb0d
1/* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22*/ 23 24#ifndef _AMDGPU_TEST_H_ 25#define _AMDGPU_TEST_H_ 26 27#include "amdgpu.h" 28#include "amdgpu_drm.h" 29 30/** 31 * Define max. number of card in system which we are able to handle 32 */ 33#define MAX_CARDS_SUPPORTED 128 34 35/* Forward reference for array to keep "drm" handles */ 36extern int drm_amdgpu[MAX_CARDS_SUPPORTED]; 37 38/* Global variables */ 39extern int open_render_node; 40 41/************************* Basic test suite ********************************/ 42 43/* 44 * Define basic test suite to serve as the starting point for future testing 45*/ 46 47/** 48 * Initialize basic test suite 49 */ 50int suite_basic_tests_init(); 51 52/** 53 * Deinitialize basic test suite 54 */ 55int suite_basic_tests_clean(); 56 57/** 58 * Tests in basic test suite 59 */ 60extern CU_TestInfo basic_tests[]; 61 62/** 63 * Initialize bo test suite 64 */ 65int suite_bo_tests_init(); 66 67/** 68 * Deinitialize bo test suite 69 */ 70int suite_bo_tests_clean(); 71 72/** 73 * Tests in bo test suite 74 */ 75extern CU_TestInfo bo_tests[]; 76 77/** 78 * Initialize cs test suite 79 */ 80int suite_cs_tests_init(); 81 82/** 83 * Deinitialize cs test suite 84 */ 85int suite_cs_tests_clean(); 86 87/** 88 * Decide if the suite is enabled by default or not. 89 */ 90CU_BOOL suite_cs_tests_enable(void); 91 92/** 93 * Tests in cs test suite 94 */ 95extern CU_TestInfo cs_tests[]; 96 97/** 98 * Initialize vce test suite 99 */ 100int suite_vce_tests_init(); 101 102/** 103 * Deinitialize vce test suite 104 */ 105int suite_vce_tests_clean(); 106 107/** 108 * Decide if the suite is enabled by default or not. 109 */ 110CU_BOOL suite_vce_tests_enable(void); 111 112/** 113 * Tests in vce test suite 114 */ 115extern CU_TestInfo vce_tests[]; 116 117/** 118+ * Initialize vcn test suite 119+ */ 120int suite_vcn_tests_init(); 121 122/** 123+ * Deinitialize vcn test suite 124+ */ 125int suite_vcn_tests_clean(); 126 127/** 128 * Decide if the suite is enabled by default or not. 129 */ 130CU_BOOL suite_vcn_tests_enable(void); 131 132/** 133+ * Tests in vcn test suite 134+ */ 135extern CU_TestInfo vcn_tests[]; 136 137/** 138 * Initialize uvd enc test suite 139 */ 140int suite_uvd_enc_tests_init(); 141 142/** 143 * Deinitialize uvd enc test suite 144 */ 145int suite_uvd_enc_tests_clean(); 146 147/** 148 * Decide if the suite is enabled by default or not. 149 */ 150CU_BOOL suite_uvd_enc_tests_enable(void); 151 152/** 153 * Tests in uvd enc test suite 154 */ 155extern CU_TestInfo uvd_enc_tests[]; 156 157/** 158 * Initialize deadlock test suite 159 */ 160int suite_deadlock_tests_init(); 161 162/** 163 * Deinitialize deadlock test suite 164 */ 165int suite_deadlock_tests_clean(); 166 167/** 168 * Decide if the suite is enabled by default or not. 169 */ 170CU_BOOL suite_deadlock_tests_enable(void); 171 172/** 173 * Tests in uvd enc test suite 174 */ 175extern CU_TestInfo deadlock_tests[]; 176 177/** 178 * Initialize vm test suite 179 */ 180int suite_vm_tests_init(); 181 182/** 183 * Deinitialize deadlock test suite 184 */ 185int suite_vm_tests_clean(); 186 187/** 188 * Decide if the suite is enabled by default or not. 189 */ 190CU_BOOL suite_vm_tests_enable(void); 191 192/** 193 * Tests in vm test suite 194 */ 195extern CU_TestInfo vm_tests[]; 196 197 198/** 199 * Initialize ras test suite 200 */ 201int suite_ras_tests_init(); 202 203/** 204 * Deinitialize deadlock test suite 205 */ 206int suite_ras_tests_clean(); 207 208/** 209 * Decide if the suite is enabled by default or not. 210 */ 211CU_BOOL suite_ras_tests_enable(void); 212 213/** 214 * Tests in ras test suite 215 */ 216extern CU_TestInfo ras_tests[]; 217 218 219/** 220 * Initialize syncobj timeline test suite 221 */ 222int suite_syncobj_timeline_tests_init(); 223 224/** 225 * Deinitialize syncobj timeline test suite 226 */ 227int suite_syncobj_timeline_tests_clean(); 228 229/** 230 * Decide if the suite is enabled by default or not. 231 */ 232CU_BOOL suite_syncobj_timeline_tests_enable(void); 233 234/** 235 * Tests in syncobj timeline test suite 236 */ 237extern CU_TestInfo syncobj_timeline_tests[]; 238 239 240/** 241 * Helper functions 242 */ 243static inline amdgpu_bo_handle gpu_mem_alloc( 244 amdgpu_device_handle device_handle, 245 uint64_t size, 246 uint64_t alignment, 247 uint32_t type, 248 uint64_t flags, 249 uint64_t *vmc_addr, 250 amdgpu_va_handle *va_handle) 251{ 252 struct amdgpu_bo_alloc_request req = {0}; 253 amdgpu_bo_handle buf_handle = NULL; 254 int r; 255 256 req.alloc_size = size; 257 req.phys_alignment = alignment; 258 req.preferred_heap = type; 259 req.flags = flags; 260 261 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle); 262 CU_ASSERT_EQUAL(r, 0); 263 if (r) 264 return NULL; 265 266 if (vmc_addr && va_handle) { 267 r = amdgpu_va_range_alloc(device_handle, 268 amdgpu_gpu_va_range_general, 269 size, alignment, 0, vmc_addr, 270 va_handle, 0); 271 CU_ASSERT_EQUAL(r, 0); 272 if (r) 273 goto error_free_bo; 274 275 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0, 276 AMDGPU_VA_OP_MAP); 277 CU_ASSERT_EQUAL(r, 0); 278 if (r) 279 goto error_free_va; 280 } 281 282 return buf_handle; 283 284error_free_va: 285 r = amdgpu_va_range_free(*va_handle); 286 CU_ASSERT_EQUAL(r, 0); 287 288error_free_bo: 289 r = amdgpu_bo_free(buf_handle); 290 CU_ASSERT_EQUAL(r, 0); 291 292 return NULL; 293} 294 295static inline int gpu_mem_free(amdgpu_bo_handle bo, 296 amdgpu_va_handle va_handle, 297 uint64_t vmc_addr, 298 uint64_t size) 299{ 300 int r; 301 302 if (!bo) 303 return 0; 304 305 if (va_handle) { 306 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0, 307 AMDGPU_VA_OP_UNMAP); 308 CU_ASSERT_EQUAL(r, 0); 309 if (r) 310 return r; 311 312 r = amdgpu_va_range_free(va_handle); 313 CU_ASSERT_EQUAL(r, 0); 314 if (r) 315 return r; 316 } 317 318 r = amdgpu_bo_free(bo); 319 CU_ASSERT_EQUAL(r, 0); 320 321 return r; 322} 323 324static inline int 325amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, 326 unsigned alignment, unsigned heap, uint64_t flags, 327 amdgpu_bo_handle *bo) 328{ 329 struct amdgpu_bo_alloc_request request = {}; 330 amdgpu_bo_handle buf_handle; 331 int r; 332 333 request.alloc_size = size; 334 request.phys_alignment = alignment; 335 request.preferred_heap = heap; 336 request.flags = flags; 337 338 r = amdgpu_bo_alloc(dev, &request, &buf_handle); 339 if (r) 340 return r; 341 342 *bo = buf_handle; 343 344 return 0; 345} 346 347int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size, 348 unsigned alignment, unsigned heap, uint64_t alloc_flags, 349 uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu, 350 uint64_t *mc_address, 351 amdgpu_va_handle *va_handle); 352 353static inline int 354amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, 355 unsigned alignment, unsigned heap, uint64_t alloc_flags, 356 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, 357 amdgpu_va_handle *va_handle) 358{ 359 return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap, 360 alloc_flags, 0, bo, cpu, mc_address, va_handle); 361} 362 363static inline int 364amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle, 365 uint64_t mc_addr, uint64_t size) 366{ 367 amdgpu_bo_cpu_unmap(bo); 368 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP); 369 amdgpu_va_range_free(va_handle); 370 amdgpu_bo_free(bo); 371 372 return 0; 373 374} 375 376static inline int 377amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1, 378 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list) 379{ 380 amdgpu_bo_handle resources[] = {bo1, bo2}; 381 382 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list); 383} 384 385 386static inline CU_ErrorCode amdgpu_set_suite_active(const char *suite_name, 387 CU_BOOL active) 388{ 389 CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suite_name), active); 390 391 if (r != CUE_SUCCESS) 392 fprintf(stderr, "Failed to obtain suite %s\n", suite_name); 393 394 return r; 395} 396 397static inline CU_ErrorCode amdgpu_set_test_active(const char *suite_name, 398 const char *test_name, CU_BOOL active) 399{ 400 CU_ErrorCode r; 401 CU_pSuite pSuite = CU_get_suite(suite_name); 402 403 if (!pSuite) { 404 fprintf(stderr, "Failed to obtain suite %s\n", 405 suite_name); 406 return CUE_NOSUITE; 407 } 408 409 r = CU_set_test_active(CU_get_test(pSuite, test_name), active); 410 if (r != CUE_SUCCESS) 411 fprintf(stderr, "Failed to obtain test %s\n", test_name); 412 413 return r; 414} 415 416#endif /* #ifdef _AMDGPU_TEST_H_ */ 417