amdgpu_test.h revision 9bd392ad
1/* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22*/ 23 24#ifndef _AMDGPU_TEST_H_ 25#define _AMDGPU_TEST_H_ 26 27#include "amdgpu.h" 28#include "amdgpu_drm.h" 29 30/** 31 * Define max. number of card in system which we are able to handle 32 */ 33#define MAX_CARDS_SUPPORTED 128 34 35/* Forward reference for array to keep "drm" handles */ 36extern int drm_amdgpu[MAX_CARDS_SUPPORTED]; 37 38/* Global variables */ 39extern int open_render_node; 40 41/************************* Basic test suite ********************************/ 42 43/* 44 * Define basic test suite to serve as the starting point for future testing 45*/ 46 47/** 48 * Initialize basic test suite 49 */ 50int suite_basic_tests_init(); 51 52/** 53 * Deinitialize basic test suite 54 */ 55int suite_basic_tests_clean(); 56 57/** 58 * Tests in basic test suite 59 */ 60extern CU_TestInfo basic_tests[]; 61 62/** 63 * Initialize bo test suite 64 */ 65int suite_bo_tests_init(); 66 67/** 68 * Deinitialize bo test suite 69 */ 70int suite_bo_tests_clean(); 71 72/** 73 * Tests in bo test suite 74 */ 75extern CU_TestInfo bo_tests[]; 76 77/** 78 * Initialize cs test suite 79 */ 80int suite_cs_tests_init(); 81 82/** 83 * Deinitialize cs test suite 84 */ 85int suite_cs_tests_clean(); 86 87/** 88 * Decide if the suite is enabled by default or not. 89 */ 90CU_BOOL suite_cs_tests_enable(void); 91 92/** 93 * Tests in cs test suite 94 */ 95extern CU_TestInfo cs_tests[]; 96 97/** 98 * Initialize vce test suite 99 */ 100int suite_vce_tests_init(); 101 102/** 103 * Deinitialize vce test suite 104 */ 105int suite_vce_tests_clean(); 106 107/** 108 * Decide if the suite is enabled by default or not. 109 */ 110CU_BOOL suite_vce_tests_enable(void); 111 112/** 113 * Tests in vce test suite 114 */ 115extern CU_TestInfo vce_tests[]; 116 117/** 118+ * Initialize vcn test suite 119+ */ 120int suite_vcn_tests_init(); 121 122/** 123+ * Deinitialize vcn test suite 124+ */ 125int suite_vcn_tests_clean(); 126 127/** 128 * Decide if the suite is enabled by default or not. 129 */ 130CU_BOOL suite_vcn_tests_enable(void); 131 132/** 133+ * Tests in vcn test suite 134+ */ 135extern CU_TestInfo vcn_tests[]; 136 137/** 138 * Initialize uvd enc test suite 139 */ 140int suite_uvd_enc_tests_init(); 141 142/** 143 * Deinitialize uvd enc test suite 144 */ 145int suite_uvd_enc_tests_clean(); 146 147/** 148 * Decide if the suite is enabled by default or not. 149 */ 150CU_BOOL suite_uvd_enc_tests_enable(void); 151 152/** 153 * Tests in uvd enc test suite 154 */ 155extern CU_TestInfo uvd_enc_tests[]; 156 157/** 158 * Initialize deadlock test suite 159 */ 160int suite_deadlock_tests_init(); 161 162/** 163 * Deinitialize deadlock test suite 164 */ 165int suite_deadlock_tests_clean(); 166 167/** 168 * Decide if the suite is enabled by default or not. 169 */ 170CU_BOOL suite_deadlock_tests_enable(void); 171 172/** 173 * Tests in uvd enc test suite 174 */ 175extern CU_TestInfo deadlock_tests[]; 176 177/** 178 * Initialize vm test suite 179 */ 180int suite_vm_tests_init(); 181 182/** 183 * Deinitialize deadlock test suite 184 */ 185int suite_vm_tests_clean(); 186 187/** 188 * Decide if the suite is enabled by default or not. 189 */ 190CU_BOOL suite_vm_tests_enable(void); 191 192/** 193 * Tests in vm test suite 194 */ 195extern CU_TestInfo vm_tests[]; 196 197 198/** 199 * Initialize ras test suite 200 */ 201int suite_ras_tests_init(); 202 203/** 204 * Deinitialize deadlock test suite 205 */ 206int suite_ras_tests_clean(); 207 208/** 209 * Decide if the suite is enabled by default or not. 210 */ 211CU_BOOL suite_ras_tests_enable(void); 212 213/** 214 * Tests in ras test suite 215 */ 216extern CU_TestInfo ras_tests[]; 217 218 219/** 220 * Initialize syncobj timeline test suite 221 */ 222int suite_syncobj_timeline_tests_init(); 223 224/** 225 * Deinitialize syncobj timeline test suite 226 */ 227int suite_syncobj_timeline_tests_clean(); 228 229/** 230 * Decide if the suite is enabled by default or not. 231 */ 232CU_BOOL suite_syncobj_timeline_tests_enable(void); 233 234/** 235 * Tests in syncobj timeline test suite 236 */ 237extern CU_TestInfo syncobj_timeline_tests[]; 238 239void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t ip_type); 240void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle, uint32_t ip_type); 241void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring, 242 int hang); 243void amdgpu_memcpy_draw_hang_slow_test(amdgpu_device_handle device_handle, uint32_t ring); 244 245/** 246 * Helper functions 247 */ 248static inline amdgpu_bo_handle gpu_mem_alloc( 249 amdgpu_device_handle device_handle, 250 uint64_t size, 251 uint64_t alignment, 252 uint32_t type, 253 uint64_t flags, 254 uint64_t *vmc_addr, 255 amdgpu_va_handle *va_handle) 256{ 257 struct amdgpu_bo_alloc_request req = {0}; 258 amdgpu_bo_handle buf_handle = NULL; 259 int r; 260 261 req.alloc_size = size; 262 req.phys_alignment = alignment; 263 req.preferred_heap = type; 264 req.flags = flags; 265 266 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle); 267 CU_ASSERT_EQUAL(r, 0); 268 if (r) 269 return NULL; 270 271 if (vmc_addr && va_handle) { 272 r = amdgpu_va_range_alloc(device_handle, 273 amdgpu_gpu_va_range_general, 274 size, alignment, 0, vmc_addr, 275 va_handle, 0); 276 CU_ASSERT_EQUAL(r, 0); 277 if (r) 278 goto error_free_bo; 279 280 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0, 281 AMDGPU_VA_OP_MAP); 282 CU_ASSERT_EQUAL(r, 0); 283 if (r) 284 goto error_free_va; 285 } 286 287 return buf_handle; 288 289error_free_va: 290 r = amdgpu_va_range_free(*va_handle); 291 CU_ASSERT_EQUAL(r, 0); 292 293error_free_bo: 294 r = amdgpu_bo_free(buf_handle); 295 CU_ASSERT_EQUAL(r, 0); 296 297 return NULL; 298} 299 300static inline int gpu_mem_free(amdgpu_bo_handle bo, 301 amdgpu_va_handle va_handle, 302 uint64_t vmc_addr, 303 uint64_t size) 304{ 305 int r; 306 307 if (!bo) 308 return 0; 309 310 if (va_handle) { 311 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0, 312 AMDGPU_VA_OP_UNMAP); 313 CU_ASSERT_EQUAL(r, 0); 314 if (r) 315 return r; 316 317 r = amdgpu_va_range_free(va_handle); 318 CU_ASSERT_EQUAL(r, 0); 319 if (r) 320 return r; 321 } 322 323 r = amdgpu_bo_free(bo); 324 CU_ASSERT_EQUAL(r, 0); 325 326 return r; 327} 328 329static inline int 330amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, 331 unsigned alignment, unsigned heap, uint64_t flags, 332 amdgpu_bo_handle *bo) 333{ 334 struct amdgpu_bo_alloc_request request = {}; 335 amdgpu_bo_handle buf_handle; 336 int r; 337 338 request.alloc_size = size; 339 request.phys_alignment = alignment; 340 request.preferred_heap = heap; 341 request.flags = flags; 342 343 r = amdgpu_bo_alloc(dev, &request, &buf_handle); 344 if (r) 345 return r; 346 347 *bo = buf_handle; 348 349 return 0; 350} 351 352int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size, 353 unsigned alignment, unsigned heap, uint64_t alloc_flags, 354 uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu, 355 uint64_t *mc_address, 356 amdgpu_va_handle *va_handle); 357 358static inline int 359amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, 360 unsigned alignment, unsigned heap, uint64_t alloc_flags, 361 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, 362 amdgpu_va_handle *va_handle) 363{ 364 return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap, 365 alloc_flags, 0, bo, cpu, mc_address, va_handle); 366} 367 368static inline int 369amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle, 370 uint64_t mc_addr, uint64_t size) 371{ 372 amdgpu_bo_cpu_unmap(bo); 373 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP); 374 amdgpu_va_range_free(va_handle); 375 amdgpu_bo_free(bo); 376 377 return 0; 378 379} 380 381static inline int 382amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1, 383 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list) 384{ 385 amdgpu_bo_handle resources[] = {bo1, bo2}; 386 387 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list); 388} 389 390 391static inline CU_ErrorCode amdgpu_set_suite_active(const char *suite_name, 392 CU_BOOL active) 393{ 394 CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suite_name), active); 395 396 if (r != CUE_SUCCESS) 397 fprintf(stderr, "Failed to obtain suite %s\n", suite_name); 398 399 return r; 400} 401 402static inline CU_ErrorCode amdgpu_set_test_active(const char *suite_name, 403 const char *test_name, CU_BOOL active) 404{ 405 CU_ErrorCode r; 406 CU_pSuite pSuite = CU_get_suite(suite_name); 407 408 if (!pSuite) { 409 fprintf(stderr, "Failed to obtain suite %s\n", 410 suite_name); 411 return CUE_NOSUITE; 412 } 413 414 r = CU_set_test_active(CU_get_test(pSuite, test_name), active); 415 if (r != CUE_SUCCESS) 416 fprintf(stderr, "Failed to obtain test %s\n", test_name); 417 418 return r; 419} 420 421#endif /* #ifdef _AMDGPU_TEST_H_ */ 422