10ed5401bSmrg/*
20ed5401bSmrg * Copyright © 2018 NVIDIA Corporation
30ed5401bSmrg *
40ed5401bSmrg * Permission is hereby granted, free of charge, to any person obtaining a
50ed5401bSmrg * copy of this software and associated documentation files (the "Software"),
60ed5401bSmrg * to deal in the Software without restriction, including without limitation
70ed5401bSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
80ed5401bSmrg * and/or sell copies of the Software, and to permit persons to whom the
90ed5401bSmrg * Software is furnished to do so, subject to the following conditions:
100ed5401bSmrg *
110ed5401bSmrg * The above copyright notice and this permission notice shall be included in
120ed5401bSmrg * all copies or substantial portions of the Software.
130ed5401bSmrg *
140ed5401bSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
150ed5401bSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
160ed5401bSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
170ed5401bSmrg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
180ed5401bSmrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
190ed5401bSmrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
200ed5401bSmrg * OTHER DEALINGS IN THE SOFTWARE.
210ed5401bSmrg */
220ed5401bSmrg
230ed5401bSmrg#include <errno.h>
240ed5401bSmrg#include <fcntl.h>
250ed5401bSmrg#include <stdio.h>
260ed5401bSmrg#include <string.h>
270ed5401bSmrg#include <unistd.h>
280ed5401bSmrg
290ed5401bSmrg#include "tegra.h"
300ed5401bSmrg
310ed5401bSmrg#include "host1x.h"
320ed5401bSmrg#include "vic.h"
330ed5401bSmrg
340ed5401bSmrg/* clear output image to red */
350ed5401bSmrgstatic int clear(struct vic *vic, struct drm_tegra_channel *channel,
360ed5401bSmrg                 struct vic_image *output)
370ed5401bSmrg{
380ed5401bSmrg    struct drm_tegra_pushbuf *pushbuf;
390ed5401bSmrg    struct drm_tegra_job *job;
400ed5401bSmrg    uint32_t *ptr;
410ed5401bSmrg    int err;
420ed5401bSmrg
430ed5401bSmrg    err = drm_tegra_job_new(channel, &job);
440ed5401bSmrg    if (err < 0) {
450ed5401bSmrg        fprintf(stderr, "failed to create job: %s\n", strerror(-err));
460ed5401bSmrg        return 1;
470ed5401bSmrg    }
480ed5401bSmrg
490ed5401bSmrg    err = drm_tegra_job_get_pushbuf(job, &pushbuf);
500ed5401bSmrg    if (err < 0) {
510ed5401bSmrg        fprintf(stderr, "failed to create push buffer: %s\n", strerror(-err));
520ed5401bSmrg        return 1;
530ed5401bSmrg    }
540ed5401bSmrg
550ed5401bSmrg    err = drm_tegra_pushbuf_begin(pushbuf, 32, &ptr);
560ed5401bSmrg    if (err < 0) {
570ed5401bSmrg        fprintf(stderr, "failed to prepare push buffer: %s\n", strerror(-err));
580ed5401bSmrg        return err;
590ed5401bSmrg    }
600ed5401bSmrg
610ed5401bSmrg    err = vic_clear(vic, output, 1023, 0, 0, 1023);
620ed5401bSmrg    if (err < 0) {
630ed5401bSmrg        fprintf(stderr, "failed to clear surface: %s\n", strerror(-err));
640ed5401bSmrg        return err;
650ed5401bSmrg    }
660ed5401bSmrg
670ed5401bSmrg    err = vic->ops->execute(vic, pushbuf, &ptr, output, NULL, 0);
680ed5401bSmrg    if (err < 0) {
690ed5401bSmrg        fprintf(stderr, "failed to execute operation: %s\n", strerror(-err));
700ed5401bSmrg        return err;
710ed5401bSmrg    }
720ed5401bSmrg
730ed5401bSmrg    err = drm_tegra_pushbuf_sync_cond(pushbuf, &ptr, vic->syncpt,
740ed5401bSmrg                                      DRM_TEGRA_SYNC_COND_OP_DONE);
750ed5401bSmrg    if (err < 0) {
760ed5401bSmrg        fprintf(stderr, "failed to push syncpoint: %s\n", strerror(-err));
770ed5401bSmrg        return err;
780ed5401bSmrg    }
790ed5401bSmrg
800ed5401bSmrg    err = drm_tegra_pushbuf_end(pushbuf, ptr);
810ed5401bSmrg    if (err < 0) {
820ed5401bSmrg        fprintf(stderr, "failed to update push buffer: %s\n", strerror(-err));
830ed5401bSmrg        return err;
840ed5401bSmrg    }
850ed5401bSmrg
860ed5401bSmrg    err = drm_tegra_job_submit(job, NULL);
870ed5401bSmrg    if (err < 0) {
880ed5401bSmrg        fprintf(stderr, "failed to submit job: %s\n", strerror(-err));
890ed5401bSmrg        return err;
900ed5401bSmrg    }
910ed5401bSmrg
920ed5401bSmrg    err = drm_tegra_job_wait(job, 1000000000);
930ed5401bSmrg    if (err < 0) {
940ed5401bSmrg        fprintf(stderr, "failed to wait for job: %s\n", strerror(-err));
950ed5401bSmrg        return err;
960ed5401bSmrg    }
970ed5401bSmrg
980ed5401bSmrg    drm_tegra_job_free(job);
990ed5401bSmrg
1000ed5401bSmrg    return 0;
1010ed5401bSmrg}
1020ed5401bSmrg
1030ed5401bSmrg/* fill bottom half of image to blue */
1040ed5401bSmrgstatic int fill(struct vic *vic, struct drm_tegra_channel *channel,
1050ed5401bSmrg                struct vic_image *output)
1060ed5401bSmrg{
1070ed5401bSmrg    struct drm_tegra_pushbuf *pushbuf;
1080ed5401bSmrg    struct drm_tegra_job *job;
1090ed5401bSmrg    uint32_t *ptr;
1100ed5401bSmrg    int err;
1110ed5401bSmrg
1120ed5401bSmrg    err = drm_tegra_job_new(channel, &job);
1130ed5401bSmrg    if (err < 0) {
1140ed5401bSmrg        fprintf(stderr, "failed to create job: %s\n", strerror(-err));
1150ed5401bSmrg        return 1;
1160ed5401bSmrg    }
1170ed5401bSmrg
1180ed5401bSmrg    err = drm_tegra_job_get_pushbuf(job, &pushbuf);
1190ed5401bSmrg    if (err < 0) {
1200ed5401bSmrg        fprintf(stderr, "failed to create push buffer: %s\n", strerror(-err));
1210ed5401bSmrg        return 1;
1220ed5401bSmrg    }
1230ed5401bSmrg
1240ed5401bSmrg    err = drm_tegra_pushbuf_begin(pushbuf, 32, &ptr);
1250ed5401bSmrg    if (err < 0) {
1260ed5401bSmrg        fprintf(stderr, "failed to prepare push buffer: %s\n", strerror(-err));
1270ed5401bSmrg        return err;
1280ed5401bSmrg    }
1290ed5401bSmrg
1300ed5401bSmrg    err = vic->ops->fill(vic, output, 0, output->height / 2, output->width - 1,
1310ed5401bSmrg                         output->height - 1, 0, 0, 1023, 1023);
1320ed5401bSmrg    if (err < 0) {
1330ed5401bSmrg        fprintf(stderr, "failed ot fill surface: %s\n", strerror(-err));
1340ed5401bSmrg        return err;
1350ed5401bSmrg    }
1360ed5401bSmrg
1370ed5401bSmrg    err = vic->ops->execute(vic, pushbuf, &ptr, output, NULL, 0);
1380ed5401bSmrg    if (err < 0) {
1390ed5401bSmrg        fprintf(stderr, "failed to execute operation: %s\n", strerror(-err));
1400ed5401bSmrg        return err;
1410ed5401bSmrg    }
1420ed5401bSmrg
1430ed5401bSmrg    err = drm_tegra_pushbuf_sync_cond(pushbuf, &ptr, vic->syncpt,
1440ed5401bSmrg                                      DRM_TEGRA_SYNC_COND_OP_DONE);
1450ed5401bSmrg    if (err < 0) {
1460ed5401bSmrg        fprintf(stderr, "failed to push syncpoint: %s\n", strerror(-err));
1470ed5401bSmrg        return err;
1480ed5401bSmrg    }
1490ed5401bSmrg
1500ed5401bSmrg    err = drm_tegra_pushbuf_end(pushbuf, ptr);
1510ed5401bSmrg    if (err < 0) {
1520ed5401bSmrg        fprintf(stderr, "failed to update push buffer: %s\n", strerror(-err));
1530ed5401bSmrg        return err;
1540ed5401bSmrg    }
1550ed5401bSmrg
1560ed5401bSmrg    err = drm_tegra_job_submit(job, NULL);
1570ed5401bSmrg    if (err < 0) {
1580ed5401bSmrg        fprintf(stderr, "failed to submit job: %s\n", strerror(-err));
1590ed5401bSmrg        return err;
1600ed5401bSmrg    }
1610ed5401bSmrg
1620ed5401bSmrg    err = drm_tegra_job_wait(job, 1000000000);
1630ed5401bSmrg    if (err < 0) {
1640ed5401bSmrg        fprintf(stderr, "failed to wait for job: %s\n", strerror(-err));
1650ed5401bSmrg        return err;
1660ed5401bSmrg    }
1670ed5401bSmrg
1680ed5401bSmrg    drm_tegra_job_free(job);
1690ed5401bSmrg
1700ed5401bSmrg    return 0;
1710ed5401bSmrg}
1720ed5401bSmrg
1730ed5401bSmrg/* flip image vertically */
1740ed5401bSmrgstatic int flip(struct vic *vic, struct drm_tegra_channel *channel,
1750ed5401bSmrg                struct vic_image *output, struct vic_image *input)
1760ed5401bSmrg{
1770ed5401bSmrg    struct drm_tegra_pushbuf *pushbuf;
1780ed5401bSmrg    struct drm_tegra_job *job;
1790ed5401bSmrg    uint32_t *ptr;
1800ed5401bSmrg    int err;
1810ed5401bSmrg
1820ed5401bSmrg    err = drm_tegra_job_new(channel, &job);
1830ed5401bSmrg    if (err < 0) {
1840ed5401bSmrg        fprintf(stderr, "failed to create job: %s\n", strerror(-err));
1850ed5401bSmrg        return 1;
1860ed5401bSmrg    }
1870ed5401bSmrg
1880ed5401bSmrg    err = drm_tegra_job_get_pushbuf(job, &pushbuf);
1890ed5401bSmrg    if (err < 0) {
1900ed5401bSmrg        fprintf(stderr, "failed to create push buffer: %s\n", strerror(-err));
1910ed5401bSmrg        return 1;
1920ed5401bSmrg    }
1930ed5401bSmrg
1940ed5401bSmrg    err = drm_tegra_pushbuf_begin(pushbuf, 32, &ptr);
1950ed5401bSmrg    if (err < 0) {
1960ed5401bSmrg        fprintf(stderr, "failed to prepare push buffer: %s\n", strerror(-err));
1970ed5401bSmrg        return err;
1980ed5401bSmrg    }
1990ed5401bSmrg
2000ed5401bSmrg    err = vic->ops->flip(vic, output, input);
2010ed5401bSmrg    if (err < 0) {
2020ed5401bSmrg        fprintf(stderr, "failed to flip: %s\n", strerror(-err));
2030ed5401bSmrg        return err;
2040ed5401bSmrg    }
2050ed5401bSmrg
2060ed5401bSmrg    err = vic->ops->execute(vic, pushbuf, &ptr, output, &input, 1);
2070ed5401bSmrg    if (err < 0) {
2080ed5401bSmrg        fprintf(stderr, "failed to execute operation: %s\n", strerror(-err));
2090ed5401bSmrg        return err;
2100ed5401bSmrg    }
2110ed5401bSmrg
2120ed5401bSmrg    err = drm_tegra_pushbuf_sync_cond(pushbuf, &ptr, vic->syncpt,
2130ed5401bSmrg                                      DRM_TEGRA_SYNC_COND_OP_DONE);
2140ed5401bSmrg    if (err < 0) {
2150ed5401bSmrg        fprintf(stderr, "failed to push syncpoint: %s\n", strerror(-err));
2160ed5401bSmrg        return err;
2170ed5401bSmrg    }
2180ed5401bSmrg
2190ed5401bSmrg    err = drm_tegra_pushbuf_end(pushbuf, ptr);
2200ed5401bSmrg    if (err < 0) {
2210ed5401bSmrg        fprintf(stderr, "failed to update push buffer: %s\n", strerror(-err));
2220ed5401bSmrg        return err;
2230ed5401bSmrg    }
2240ed5401bSmrg
2250ed5401bSmrg    err = drm_tegra_job_submit(job, NULL);
2260ed5401bSmrg    if (err < 0) {
2270ed5401bSmrg        fprintf(stderr, "failed to submit job: %s\n", strerror(-err));
2280ed5401bSmrg        return err;
2290ed5401bSmrg    }
2300ed5401bSmrg
2310ed5401bSmrg    err = drm_tegra_job_wait(job, 1000000000);
2320ed5401bSmrg    if (err < 0) {
2330ed5401bSmrg        fprintf(stderr, "failed to wait for job: %s\n", strerror(-err));
2340ed5401bSmrg        return err;
2350ed5401bSmrg    }
2360ed5401bSmrg
2370ed5401bSmrg    drm_tegra_job_free(job);
2380ed5401bSmrg
2390ed5401bSmrg    return 0;
2400ed5401bSmrg}
2410ed5401bSmrg
2420ed5401bSmrgint main(int argc, char *argv[])
2430ed5401bSmrg{
2440ed5401bSmrg    const unsigned int format = VIC_PIXEL_FORMAT_A8R8G8B8;
2450ed5401bSmrg    const unsigned int kind = VIC_BLK_KIND_PITCH;
2460ed5401bSmrg    const unsigned int width = 16, height = 16;
2470ed5401bSmrg    const char *device = "/dev/dri/renderD128";
2480ed5401bSmrg    struct drm_tegra_channel *channel;
2490ed5401bSmrg    struct vic_image *input, *output;
2500ed5401bSmrg    struct drm_tegra *drm;
2510ed5401bSmrg    unsigned int version;
2520ed5401bSmrg    struct vic *vic;
2530ed5401bSmrg    int fd, err;
2540ed5401bSmrg
2550ed5401bSmrg    if (argc > 1)
2560ed5401bSmrg        device = argv[1];
2570ed5401bSmrg
2580ed5401bSmrg    fd = open(device, O_RDWR);
2590ed5401bSmrg    if (fd < 0) {
2600ed5401bSmrg        fprintf(stderr, "open() failed: %s\n", strerror(errno));
2610ed5401bSmrg        return 1;
2620ed5401bSmrg    }
2630ed5401bSmrg
2640ed5401bSmrg    err = drm_tegra_new(fd, &drm);
2650ed5401bSmrg    if (err < 0) {
2660ed5401bSmrg        fprintf(stderr, "failed to open Tegra device: %s\n", strerror(-err));
2670ed5401bSmrg        close(fd);
2680ed5401bSmrg        return 1;
2690ed5401bSmrg    }
2700ed5401bSmrg
2710ed5401bSmrg    err = drm_tegra_channel_open(drm, DRM_TEGRA_VIC, &channel);
2720ed5401bSmrg    if (err < 0) {
2730ed5401bSmrg        fprintf(stderr, "failed to open channel to VIC: %s\n", strerror(-err));
2740ed5401bSmrg        return 1;
2750ed5401bSmrg    }
2760ed5401bSmrg
2770ed5401bSmrg    version = drm_tegra_channel_get_version(channel);
2780ed5401bSmrg    printf("version: %08x\n", version);
2790ed5401bSmrg
2800ed5401bSmrg    err = vic_new(drm, channel, &vic);
2810ed5401bSmrg    if (err < 0) {
2820ed5401bSmrg        fprintf(stderr, "failed to create VIC: %s\n", strerror(-err));
2830ed5401bSmrg        return 1;
2840ed5401bSmrg    }
2850ed5401bSmrg
2860ed5401bSmrg    err = vic_image_new(vic, width, height, format, kind, DRM_TEGRA_CHANNEL_MAP_READ_WRITE,
2870ed5401bSmrg                        &input);
2880ed5401bSmrg    if (err < 0) {
2890ed5401bSmrg        fprintf(stderr, "failed to create input image: %d\n", err);
2900ed5401bSmrg        return 1;
2910ed5401bSmrg    }
2920ed5401bSmrg
2930ed5401bSmrg    err = vic_image_new(vic, width, height, format, kind, DRM_TEGRA_CHANNEL_MAP_READ_WRITE,
2940ed5401bSmrg                        &output);
2950ed5401bSmrg    if (err < 0) {
2960ed5401bSmrg        fprintf(stderr, "failed to create output image: %d\n", err);
2970ed5401bSmrg        return 1;
2980ed5401bSmrg    }
2990ed5401bSmrg
3000ed5401bSmrg    err = clear(vic, channel, input);
3010ed5401bSmrg    if (err < 0) {
3020ed5401bSmrg        fprintf(stderr, "failed to clear image: %s\n", strerror(-err));
3030ed5401bSmrg        return 1;
3040ed5401bSmrg    }
3050ed5401bSmrg
3060ed5401bSmrg    err = fill(vic, channel, input);
3070ed5401bSmrg    if (err < 0) {
3080ed5401bSmrg        fprintf(stderr, "failed to fill rectangle: %s\n", strerror(-err));
3090ed5401bSmrg        return 1;
3100ed5401bSmrg    }
3110ed5401bSmrg
3120ed5401bSmrg    err = flip(vic, channel, output, input);
3130ed5401bSmrg    if (err < 0) {
3140ed5401bSmrg        fprintf(stderr, "failed to flip image: %s\n", strerror(-err));
3150ed5401bSmrg        return 1;
3160ed5401bSmrg    }
3170ed5401bSmrg
3180ed5401bSmrg    printf("input: %ux%u\n", input->width, input->height);
3190ed5401bSmrg    vic_image_dump(input, stdout);
3200ed5401bSmrg
3210ed5401bSmrg    printf("output: %ux%u\n", output->width, output->height);
3220ed5401bSmrg    vic_image_dump(output, stdout);
3230ed5401bSmrg
3240ed5401bSmrg    vic_image_free(output);
3250ed5401bSmrg    vic_image_free(input);
3260ed5401bSmrg
3270ed5401bSmrg    vic_free(vic);
3280ed5401bSmrg    drm_tegra_channel_close(channel);
3290ed5401bSmrg    drm_tegra_close(drm);
3300ed5401bSmrg    close(fd);
3310ed5401bSmrg
3320ed5401bSmrg    return 0;
3330ed5401bSmrg}
334