xf86drm.h revision adfa0b0c
122944501Smrg/** 222944501Smrg * \file xf86drm.h 322944501Smrg * OS-independent header for DRM user-level library interface. 422944501Smrg * 522944501Smrg * \author Rickard E. (Rik) Faith <faith@valinux.com> 622944501Smrg */ 722944501Smrg 822944501Smrg/* 922944501Smrg * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. 1022944501Smrg * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 1122944501Smrg * All Rights Reserved. 1222944501Smrg * 1322944501Smrg * Permission is hereby granted, free of charge, to any person obtaining a 1422944501Smrg * copy of this software and associated documentation files (the "Software"), 1522944501Smrg * to deal in the Software without restriction, including without limitation 1622944501Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1722944501Smrg * and/or sell copies of the Software, and to permit persons to whom the 1822944501Smrg * Software is furnished to do so, subject to the following conditions: 1922944501Smrg * 2022944501Smrg * The above copyright notice and this permission notice (including the next 2122944501Smrg * paragraph) shall be included in all copies or substantial portions of the 2222944501Smrg * Software. 2322944501Smrg * 2422944501Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 2522944501Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 2622944501Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 2722944501Smrg * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 2822944501Smrg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 2922944501Smrg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 3022944501Smrg * DEALINGS IN THE SOFTWARE. 3122944501Smrg * 3222944501Smrg */ 3322944501Smrg 3422944501Smrg#ifndef _XF86DRM_H_ 3522944501Smrg#define _XF86DRM_H_ 3622944501Smrg 3722944501Smrg#include <stdarg.h> 382e6867f6Smrg#if 1 392e6867f6Smrg#include <sys/atomic.h> 402e6867f6Smrg#else 4122944501Smrg#include <sys/types.h> 422e6867f6Smrg#endif 4322944501Smrg#include <stdint.h> 4422944501Smrg#include <drm.h> 4522944501Smrg 46fe517fc9Smrg#if defined(__cplusplus) 4720131375Smrgextern "C" { 4820131375Smrg#endif 4920131375Smrg 5022944501Smrg#ifndef DRM_MAX_MINOR 5122944501Smrg#define DRM_MAX_MINOR 16 5222944501Smrg#endif 5322944501Smrg 5422944501Smrg#if defined(__linux__) 5522944501Smrg 5622944501Smrg#define DRM_IOCTL_NR(n) _IOC_NR(n) 5722944501Smrg#define DRM_IOC_VOID _IOC_NONE 5822944501Smrg#define DRM_IOC_READ _IOC_READ 5922944501Smrg#define DRM_IOC_WRITE _IOC_WRITE 6022944501Smrg#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 6122944501Smrg#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 6222944501Smrg 6322944501Smrg#else /* One of the *BSDs */ 6422944501Smrg 6522944501Smrg#include <sys/ioccom.h> 6622944501Smrg#define DRM_IOCTL_NR(n) ((n) & 0xff) 6722944501Smrg#define DRM_IOC_VOID IOC_VOID 6822944501Smrg#define DRM_IOC_READ IOC_OUT 6922944501Smrg#define DRM_IOC_WRITE IOC_IN 7022944501Smrg#define DRM_IOC_READWRITE IOC_INOUT 7122944501Smrg#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 7222944501Smrg 7322944501Smrg#endif 7422944501Smrg 7522944501Smrg /* Defaults, if nothing set in xf86config */ 7622944501Smrg#define DRM_DEV_UID 0 7722944501Smrg#define DRM_DEV_GID 0 7822944501Smrg/* Default /dev/dri directory permissions 0755 */ 7922944501Smrg#define DRM_DEV_DIRMODE \ 8022944501Smrg (S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH) 8122944501Smrg#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 8222944501Smrg 83fe517fc9Smrg#ifdef __OpenBSD__ 84fe517fc9Smrg#define DRM_DIR_NAME "/dev" 8582025ec7Smrg#define DRM_PRIMARY_MINOR_NAME "drm" 8682025ec7Smrg#define DRM_CONTROL_MINOR_NAME "drmC" 8782025ec7Smrg#define DRM_RENDER_MINOR_NAME "drmR" 88fe517fc9Smrg#else 8922944501Smrg#define DRM_DIR_NAME "/dev/dri" 9082025ec7Smrg#define DRM_PRIMARY_MINOR_NAME "card" 9182025ec7Smrg#define DRM_CONTROL_MINOR_NAME "controlD" 9282025ec7Smrg#define DRM_RENDER_MINOR_NAME "renderD" 9322944501Smrg#define DRM_PROC_NAME "/proc/dri/" /* For backward Linux compatibility */ 94fe517fc9Smrg#endif 9522944501Smrg 9682025ec7Smrg#define DRM_DEV_NAME "%s/" DRM_PRIMARY_MINOR_NAME "%d" 9782025ec7Smrg#define DRM_CONTROL_DEV_NAME "%s/" DRM_CONTROL_MINOR_NAME "%d" 9882025ec7Smrg#define DRM_RENDER_DEV_NAME "%s/" DRM_RENDER_MINOR_NAME "%d" 9982025ec7Smrg 10082025ec7Smrg#define DRM_NODE_NAME_MAX \ 10182025ec7Smrg (sizeof(DRM_DIR_NAME) + 1 /* slash */ \ 10282025ec7Smrg + MAX3(sizeof(DRM_PRIMARY_MINOR_NAME), \ 10382025ec7Smrg sizeof(DRM_CONTROL_MINOR_NAME), \ 10482025ec7Smrg sizeof(DRM_RENDER_MINOR_NAME)) \ 10582025ec7Smrg + sizeof("144") /* highest possible node number */ \ 10682025ec7Smrg + 1) /* NULL-terminator */ 10782025ec7Smrg 10822944501Smrg#define DRM_ERR_NO_DEVICE (-1001) 10922944501Smrg#define DRM_ERR_NO_ACCESS (-1002) 11022944501Smrg#define DRM_ERR_NOT_ROOT (-1003) 11122944501Smrg#define DRM_ERR_INVALID (-1004) 11222944501Smrg#define DRM_ERR_NO_FD (-1005) 11322944501Smrg 11422944501Smrg#define DRM_AGP_NO_HANDLE 0 11522944501Smrg 11622944501Smrgtypedef unsigned int drmSize, *drmSizePtr; /**< For mapped regions */ 11722944501Smrgtypedef void *drmAddress, **drmAddressPtr; /**< For mapped regions */ 11822944501Smrg 11920131375Smrg#if (__GNUC__ >= 3) 12020131375Smrg#define DRM_PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a))) 12120131375Smrg#else 12220131375Smrg#define DRM_PRINTFLIKE(f, a) 12320131375Smrg#endif 12420131375Smrg 12522944501Smrgtypedef struct _drmServerInfo { 12620131375Smrg int (*debug_print)(const char *format, va_list ap) DRM_PRINTFLIKE(1,0); 12722944501Smrg int (*load_module)(const char *name); 12822944501Smrg void (*get_perms)(gid_t *, mode_t *); 12922944501Smrg} drmServerInfo, *drmServerInfoPtr; 13022944501Smrg 13122944501Smrgtypedef struct drmHashEntry { 13222944501Smrg int fd; 13322944501Smrg void (*f)(int, void *, void *); 13422944501Smrg void *tagTable; 13522944501Smrg} drmHashEntry; 13622944501Smrg 13722944501Smrgextern int drmIoctl(int fd, unsigned long request, void *arg); 13822944501Smrgextern void *drmGetHashTable(void); 13922944501Smrgextern drmHashEntry *drmGetEntry(int fd); 14022944501Smrg 14122944501Smrg/** 14222944501Smrg * Driver version information. 14322944501Smrg * 14422944501Smrg * \sa drmGetVersion() and drmSetVersion(). 14522944501Smrg */ 14622944501Smrgtypedef struct _drmVersion { 14722944501Smrg int version_major; /**< Major version */ 14822944501Smrg int version_minor; /**< Minor version */ 14922944501Smrg int version_patchlevel; /**< Patch level */ 15022944501Smrg int name_len; /**< Length of name buffer */ 15122944501Smrg char *name; /**< Name of driver */ 15222944501Smrg int date_len; /**< Length of date buffer */ 15322944501Smrg char *date; /**< User-space buffer to hold date */ 15422944501Smrg int desc_len; /**< Length of desc buffer */ 15522944501Smrg char *desc; /**< User-space buffer to hold desc */ 15622944501Smrg} drmVersion, *drmVersionPtr; 15722944501Smrg 15822944501Smrgtypedef struct _drmStats { 15922944501Smrg unsigned long count; /**< Number of data */ 16022944501Smrg struct { 16122944501Smrg unsigned long value; /**< Value from kernel */ 16222944501Smrg const char *long_format; /**< Suggested format for long_name */ 16322944501Smrg const char *long_name; /**< Long name for value */ 16422944501Smrg const char *rate_format; /**< Suggested format for rate_name */ 16522944501Smrg const char *rate_name; /**< Short name for value per second */ 16622944501Smrg int isvalue; /**< True if value (vs. counter) */ 16722944501Smrg const char *mult_names; /**< Multiplier names (e.g., "KGM") */ 16822944501Smrg int mult; /**< Multiplier value (e.g., 1024) */ 16922944501Smrg int verbose; /**< Suggest only in verbose output */ 17022944501Smrg } data[15]; 17122944501Smrg} drmStatsT; 17222944501Smrg 17322944501Smrg 17422944501Smrg /* All of these enums *MUST* match with the 17522944501Smrg kernel implementation -- so do *NOT* 17622944501Smrg change them! (The drmlib implementation 17722944501Smrg will just copy the flags instead of 17822944501Smrg translating them.) */ 17922944501Smrgtypedef enum { 18022944501Smrg DRM_FRAME_BUFFER = 0, /**< WC, no caching, no core dump */ 18122944501Smrg DRM_REGISTERS = 1, /**< no caching, no core dump */ 18222944501Smrg DRM_SHM = 2, /**< shared, cached */ 18322944501Smrg DRM_AGP = 3, /**< AGP/GART */ 18422944501Smrg DRM_SCATTER_GATHER = 4, /**< PCI scatter/gather */ 18522944501Smrg DRM_CONSISTENT = 5 /**< PCI consistent */ 18622944501Smrg} drmMapType; 18722944501Smrg 18822944501Smrgtypedef enum { 18922944501Smrg DRM_RESTRICTED = 0x0001, /**< Cannot be mapped to client-virtual */ 19022944501Smrg DRM_READ_ONLY = 0x0002, /**< Read-only in client-virtual */ 19122944501Smrg DRM_LOCKED = 0x0004, /**< Physical pages locked */ 19222944501Smrg DRM_KERNEL = 0x0008, /**< Kernel requires access */ 19322944501Smrg DRM_WRITE_COMBINING = 0x0010, /**< Use write-combining, if available */ 19422944501Smrg DRM_CONTAINS_LOCK = 0x0020, /**< SHM page that contains lock */ 19522944501Smrg DRM_REMOVABLE = 0x0040 /**< Removable mapping */ 19622944501Smrg} drmMapFlags; 19722944501Smrg 19822944501Smrg/** 19922944501Smrg * \warning These values *MUST* match drm.h 20022944501Smrg */ 20122944501Smrgtypedef enum { 20222944501Smrg /** \name Flags for DMA buffer dispatch */ 20322944501Smrg /*@{*/ 20422944501Smrg DRM_DMA_BLOCK = 0x01, /**< 20522944501Smrg * Block until buffer dispatched. 20622944501Smrg * 20722944501Smrg * \note the buffer may not yet have been 20822944501Smrg * processed by the hardware -- getting a 20922944501Smrg * hardware lock with the hardware quiescent 21022944501Smrg * will ensure that the buffer has been 21122944501Smrg * processed. 21222944501Smrg */ 21322944501Smrg DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 21422944501Smrg DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 21522944501Smrg /*@}*/ 21622944501Smrg 21722944501Smrg /** \name Flags for DMA buffer request */ 21822944501Smrg /*@{*/ 21922944501Smrg DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 22022944501Smrg DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 22122944501Smrg DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 22222944501Smrg /*@}*/ 22322944501Smrg} drmDMAFlags; 22422944501Smrg 22522944501Smrgtypedef enum { 22622944501Smrg DRM_PAGE_ALIGN = 0x01, 22722944501Smrg DRM_AGP_BUFFER = 0x02, 22822944501Smrg DRM_SG_BUFFER = 0x04, 22922944501Smrg DRM_FB_BUFFER = 0x08, 23022944501Smrg DRM_PCI_BUFFER_RO = 0x10 23122944501Smrg} drmBufDescFlags; 23222944501Smrg 23322944501Smrgtypedef enum { 23422944501Smrg DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 23522944501Smrg DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 23622944501Smrg DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 23722944501Smrg DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 23822944501Smrg /* These *HALT* flags aren't supported yet 23922944501Smrg -- they will be used to support the 24022944501Smrg full-screen DGA-like mode. */ 24122944501Smrg DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 24222944501Smrg DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 24322944501Smrg} drmLockFlags; 24422944501Smrg 24522944501Smrgtypedef enum { 24622944501Smrg DRM_CONTEXT_PRESERVED = 0x01, /**< This context is preserved and 24722944501Smrg never swapped. */ 24822944501Smrg DRM_CONTEXT_2DONLY = 0x02 /**< This context is for 2D rendering only. */ 24922944501Smrg} drm_context_tFlags, *drm_context_tFlagsPtr; 25022944501Smrg 25122944501Smrgtypedef struct _drmBufDesc { 25222944501Smrg int count; /**< Number of buffers of this size */ 25322944501Smrg int size; /**< Size in bytes */ 25422944501Smrg int low_mark; /**< Low water mark */ 25522944501Smrg int high_mark; /**< High water mark */ 25622944501Smrg} drmBufDesc, *drmBufDescPtr; 25722944501Smrg 25822944501Smrgtypedef struct _drmBufInfo { 25922944501Smrg int count; /**< Number of buffers described in list */ 26022944501Smrg drmBufDescPtr list; /**< List of buffer descriptions */ 26122944501Smrg} drmBufInfo, *drmBufInfoPtr; 26222944501Smrg 26322944501Smrgtypedef struct _drmBuf { 26422944501Smrg int idx; /**< Index into the master buffer list */ 26522944501Smrg int total; /**< Buffer size */ 26622944501Smrg int used; /**< Amount of buffer in use (for DMA) */ 26722944501Smrg drmAddress address; /**< Address */ 26822944501Smrg} drmBuf, *drmBufPtr; 26922944501Smrg 27022944501Smrg/** 27122944501Smrg * Buffer mapping information. 27222944501Smrg * 27322944501Smrg * Used by drmMapBufs() and drmUnmapBufs() to store information about the 27422944501Smrg * mapped buffers. 27522944501Smrg */ 27622944501Smrgtypedef struct _drmBufMap { 27722944501Smrg int count; /**< Number of buffers mapped */ 27822944501Smrg drmBufPtr list; /**< Buffers */ 27922944501Smrg} drmBufMap, *drmBufMapPtr; 28022944501Smrg 28122944501Smrgtypedef struct _drmLock { 28222944501Smrg volatile unsigned int lock; 28322944501Smrg char padding[60]; 28422944501Smrg /* This is big enough for most current (and future?) architectures: 28522944501Smrg DEC Alpha: 32 bytes 28622944501Smrg Intel Merced: ? 28722944501Smrg Intel P5/PPro/PII/PIII: 32 bytes 28822944501Smrg Intel StrongARM: 32 bytes 28922944501Smrg Intel i386/i486: 16 bytes 29022944501Smrg MIPS: 32 bytes (?) 29122944501Smrg Motorola 68k: 16 bytes 29222944501Smrg Motorola PowerPC: 32 bytes 29322944501Smrg Sun SPARC: 32 bytes 29422944501Smrg */ 29522944501Smrg} drmLock, *drmLockPtr; 29622944501Smrg 29722944501Smrg/** 29822944501Smrg * Indices here refer to the offset into 29922944501Smrg * list in drmBufInfo 30022944501Smrg */ 30122944501Smrgtypedef struct _drmDMAReq { 30222944501Smrg drm_context_t context; /**< Context handle */ 30322944501Smrg int send_count; /**< Number of buffers to send */ 30422944501Smrg int *send_list; /**< List of handles to buffers */ 30522944501Smrg int *send_sizes; /**< Lengths of data to send, in bytes */ 30622944501Smrg drmDMAFlags flags; /**< Flags */ 30722944501Smrg int request_count; /**< Number of buffers requested */ 30822944501Smrg int request_size; /**< Desired size of buffers requested */ 30922944501Smrg int *request_list; /**< Buffer information */ 31022944501Smrg int *request_sizes; /**< Minimum acceptable sizes */ 31122944501Smrg int granted_count; /**< Number of buffers granted at this size */ 31222944501Smrg} drmDMAReq, *drmDMAReqPtr; 31322944501Smrg 31422944501Smrgtypedef struct _drmRegion { 31522944501Smrg drm_handle_t handle; 31622944501Smrg unsigned int offset; 31722944501Smrg drmSize size; 31822944501Smrg drmAddress map; 31922944501Smrg} drmRegion, *drmRegionPtr; 32022944501Smrg 32122944501Smrgtypedef struct _drmTextureRegion { 32222944501Smrg unsigned char next; 32322944501Smrg unsigned char prev; 32422944501Smrg unsigned char in_use; 32522944501Smrg unsigned char padding; /**< Explicitly pad this out */ 32622944501Smrg unsigned int age; 32722944501Smrg} drmTextureRegion, *drmTextureRegionPtr; 32822944501Smrg 32922944501Smrg 33022944501Smrgtypedef enum { 33122944501Smrg DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 33222944501Smrg DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 33320131375Smrg /* bits 1-6 are reserved for high crtcs */ 33420131375Smrg DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, 33522944501Smrg DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ 33622944501Smrg DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ 33722944501Smrg DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 33822944501Smrg DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 33922944501Smrg DRM_VBLANK_SIGNAL = 0x40000000 /* Send signal instead of blocking */ 34022944501Smrg} drmVBlankSeqType; 34120131375Smrg#define DRM_VBLANK_HIGH_CRTC_SHIFT 1 34222944501Smrg 34322944501Smrgtypedef struct _drmVBlankReq { 34422944501Smrg drmVBlankSeqType type; 34522944501Smrg unsigned int sequence; 34622944501Smrg unsigned long signal; 34722944501Smrg} drmVBlankReq, *drmVBlankReqPtr; 34822944501Smrg 34922944501Smrgtypedef struct _drmVBlankReply { 35022944501Smrg drmVBlankSeqType type; 35122944501Smrg unsigned int sequence; 35222944501Smrg long tval_sec; 35322944501Smrg long tval_usec; 35422944501Smrg} drmVBlankReply, *drmVBlankReplyPtr; 35522944501Smrg 35622944501Smrgtypedef union _drmVBlank { 35722944501Smrg drmVBlankReq request; 35822944501Smrg drmVBlankReply reply; 35922944501Smrg} drmVBlank, *drmVBlankPtr; 36022944501Smrg 36122944501Smrgtypedef struct _drmSetVersion { 36222944501Smrg int drm_di_major; 36322944501Smrg int drm_di_minor; 36422944501Smrg int drm_dd_major; 36522944501Smrg int drm_dd_minor; 36622944501Smrg} drmSetVersion, *drmSetVersionPtr; 36722944501Smrg 36822944501Smrg#define __drm_dummy_lock(lock) (*(__volatile__ unsigned int *)lock) 36922944501Smrg 37022944501Smrg#define DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 37122944501Smrg#define DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 37222944501Smrg 3732e6867f6Smrg#if 1 3742e6867f6Smrg 3752e6867f6Smrg#define DRM_CAS(lock, old, new, __ret) \ 3762e6867f6Smrg (__ret = atomic_cas_uint(&__drm_dummy_lock(lock), (old), (new)) != (old)); 3772e6867f6Smrg 3782e6867f6Smrg#elif defined(__GNUC__) && (__GNUC__ >= 2) 37922944501Smrg# if defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__) 38022944501Smrg /* Reflect changes here to drmP.h */ 38122944501Smrg#define DRM_CAS(lock,old,new,__ret) \ 38222944501Smrg do { \ 38322944501Smrg int __dummy; /* Can't mark eax as clobbered */ \ 38422944501Smrg __asm__ __volatile__( \ 38522944501Smrg "lock ; cmpxchg %4,%1\n\t" \ 38622944501Smrg "setnz %0" \ 38722944501Smrg : "=d" (__ret), \ 38822944501Smrg "=m" (__drm_dummy_lock(lock)), \ 38922944501Smrg "=a" (__dummy) \ 39022944501Smrg : "2" (old), \ 39122944501Smrg "r" (new)); \ 39222944501Smrg } while (0) 39322944501Smrg 39422944501Smrg#elif defined(__alpha__) 39522944501Smrg 39622944501Smrg#define DRM_CAS(lock, old, new, ret) \ 39722944501Smrg do { \ 39822944501Smrg int tmp, old32; \ 39922944501Smrg __asm__ __volatile__( \ 40022944501Smrg " addl $31, %5, %3\n" \ 40122944501Smrg "1: ldl_l %0, %2\n" \ 40222944501Smrg " cmpeq %0, %3, %1\n" \ 40322944501Smrg " beq %1, 2f\n" \ 40422944501Smrg " mov %4, %0\n" \ 40522944501Smrg " stl_c %0, %2\n" \ 40622944501Smrg " beq %0, 3f\n" \ 40722944501Smrg " mb\n" \ 40822944501Smrg "2: cmpeq %1, 0, %1\n" \ 40922944501Smrg ".subsection 2\n" \ 41022944501Smrg "3: br 1b\n" \ 41122944501Smrg ".previous" \ 41222944501Smrg : "=&r"(tmp), "=&r"(ret), \ 41322944501Smrg "=m"(__drm_dummy_lock(lock)), \ 41422944501Smrg "=&r"(old32) \ 41522944501Smrg : "r"(new), "r"(old) \ 41622944501Smrg : "memory"); \ 41722944501Smrg } while (0) 41822944501Smrg 41922944501Smrg#elif defined(__sparc__) 42022944501Smrg 42122944501Smrg#define DRM_CAS(lock,old,new,__ret) \ 42222944501Smrgdo { register unsigned int __old __asm("o0"); \ 42322944501Smrg register unsigned int __new __asm("o1"); \ 42422944501Smrg register volatile unsigned int *__lock __asm("o2"); \ 42522944501Smrg __old = old; \ 42622944501Smrg __new = new; \ 42722944501Smrg __lock = (volatile unsigned int *)lock; \ 42822944501Smrg __asm__ __volatile__( \ 42922944501Smrg /*"cas [%2], %3, %0"*/ \ 43022944501Smrg ".word 0xd3e29008\n\t" \ 43122944501Smrg /*"membar #StoreStore | #StoreLoad"*/ \ 43222944501Smrg ".word 0x8143e00a" \ 43322944501Smrg : "=&r" (__new) \ 43422944501Smrg : "0" (__new), \ 43522944501Smrg "r" (__lock), \ 43622944501Smrg "r" (__old) \ 43722944501Smrg : "memory"); \ 43822944501Smrg __ret = (__new != __old); \ 43922944501Smrg} while(0) 44022944501Smrg 44122944501Smrg#elif defined(__ia64__) 44222944501Smrg 44322944501Smrg#ifdef __INTEL_COMPILER 44422944501Smrg/* this currently generates bad code (missing stop bits)... */ 44522944501Smrg#include <ia64intrin.h> 44622944501Smrg 44722944501Smrg#define DRM_CAS(lock,old,new,__ret) \ 44822944501Smrg do { \ 44922944501Smrg unsigned long __result, __old = (old) & 0xffffffff; \ 45022944501Smrg __mf(); \ 45122944501Smrg __result = _InterlockedCompareExchange_acq(&__drm_dummy_lock(lock), (new), __old);\ 45222944501Smrg __ret = (__result) != (__old); \ 45322944501Smrg/* __ret = (__sync_val_compare_and_swap(&__drm_dummy_lock(lock), \ 45422944501Smrg (old), (new)) \ 45522944501Smrg != (old)); */\ 45622944501Smrg } while (0) 45722944501Smrg 45822944501Smrg#else 45922944501Smrg#define DRM_CAS(lock,old,new,__ret) \ 46022944501Smrg do { \ 46122944501Smrg unsigned int __result, __old = (old); \ 46222944501Smrg __asm__ __volatile__( \ 46322944501Smrg "mf\n" \ 46422944501Smrg "mov ar.ccv=%2\n" \ 46522944501Smrg ";;\n" \ 46622944501Smrg "cmpxchg4.acq %0=%1,%3,ar.ccv" \ 46722944501Smrg : "=r" (__result), "=m" (__drm_dummy_lock(lock)) \ 46822944501Smrg : "r" ((unsigned long)__old), "r" (new) \ 46922944501Smrg : "memory"); \ 47022944501Smrg __ret = (__result) != (__old); \ 47122944501Smrg } while (0) 47222944501Smrg 47322944501Smrg#endif 47422944501Smrg 47522944501Smrg#elif defined(__powerpc__) 47622944501Smrg 47722944501Smrg#define DRM_CAS(lock,old,new,__ret) \ 47822944501Smrg do { \ 47922944501Smrg __asm__ __volatile__( \ 48022944501Smrg "sync;" \ 48122944501Smrg "0: lwarx %0,0,%1;" \ 48222944501Smrg " xor. %0,%3,%0;" \ 48322944501Smrg " bne 1f;" \ 48422944501Smrg " stwcx. %2,0,%1;" \ 48522944501Smrg " bne- 0b;" \ 48622944501Smrg "1: " \ 48722944501Smrg "sync;" \ 48822944501Smrg : "=&r"(__ret) \ 48922944501Smrg : "r"(lock), "r"(new), "r"(old) \ 49022944501Smrg : "cr0", "memory"); \ 49122944501Smrg } while (0) 49222944501Smrg 49387bf8e7cSmrg# elif defined (__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \ 49487bf8e7cSmrg || defined (__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \ 49587bf8e7cSmrg || defined (__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) \ 49687bf8e7cSmrg || defined (__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \ 49787bf8e7cSmrg || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \ 49887bf8e7cSmrg || defined(__ARM_ARCH_7EM__) 49987bf8e7cSmrg /* excluding ARMv4/ARMv5 and lower (lacking ldrex/strex support) */ 50087bf8e7cSmrg #undef DRM_DEV_MODE 50187bf8e7cSmrg #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) 50287bf8e7cSmrg 50387bf8e7cSmrg #define DRM_CAS(lock,old,new,__ret) \ 50487bf8e7cSmrg do { \ 50587bf8e7cSmrg __asm__ __volatile__ ( \ 50687bf8e7cSmrg "1: ldrex %0, [%1]\n" \ 50787bf8e7cSmrg " teq %0, %2\n" \ 50887bf8e7cSmrg " ite eq\n" \ 50987bf8e7cSmrg " strexeq %0, %3, [%1]\n" \ 51087bf8e7cSmrg " movne %0, #1\n" \ 51187bf8e7cSmrg : "=&r" (__ret) \ 51287bf8e7cSmrg : "r" (lock), "r" (old), "r" (new) \ 51387bf8e7cSmrg : "cc","memory"); \ 51487bf8e7cSmrg } while (0) 51587bf8e7cSmrg 51622944501Smrg#endif /* architecture */ 51722944501Smrg#endif /* __GNUC__ >= 2 */ 51822944501Smrg 51922944501Smrg#ifndef DRM_CAS 52022944501Smrg#define DRM_CAS(lock,old,new,ret) do { ret=1; } while (0) /* FAST LOCK FAILS */ 52122944501Smrg#endif 52222944501Smrg 52322944501Smrg#if defined(__alpha__) 52422944501Smrg#define DRM_CAS_RESULT(_result) long _result 52522944501Smrg#elif defined(__powerpc__) 52622944501Smrg#define DRM_CAS_RESULT(_result) int _result 52722944501Smrg#else 52822944501Smrg#define DRM_CAS_RESULT(_result) char _result 52922944501Smrg#endif 53022944501Smrg 53122944501Smrg#define DRM_LIGHT_LOCK(fd,lock,context) \ 53222944501Smrg do { \ 53322944501Smrg DRM_CAS_RESULT(__ret); \ 53422944501Smrg DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret); \ 53522944501Smrg if (__ret) drmGetLock(fd,context,0); \ 53622944501Smrg } while(0) 53722944501Smrg 53822944501Smrg /* This one counts fast locks -- for 53922944501Smrg benchmarking only. */ 54022944501Smrg#define DRM_LIGHT_LOCK_COUNT(fd,lock,context,count) \ 54122944501Smrg do { \ 54222944501Smrg DRM_CAS_RESULT(__ret); \ 54322944501Smrg DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret); \ 54422944501Smrg if (__ret) drmGetLock(fd,context,0); \ 54522944501Smrg else ++count; \ 54622944501Smrg } while(0) 54722944501Smrg 54822944501Smrg#define DRM_LOCK(fd,lock,context,flags) \ 54922944501Smrg do { \ 55022944501Smrg if (flags) drmGetLock(fd,context,flags); \ 55122944501Smrg else DRM_LIGHT_LOCK(fd,lock,context); \ 55222944501Smrg } while(0) 55322944501Smrg 55422944501Smrg#define DRM_UNLOCK(fd,lock,context) \ 55522944501Smrg do { \ 55622944501Smrg DRM_CAS_RESULT(__ret); \ 55722944501Smrg DRM_CAS(lock,DRM_LOCK_HELD|context,context,__ret); \ 55822944501Smrg if (__ret) drmUnlock(fd,context); \ 55922944501Smrg } while(0) 56022944501Smrg 56122944501Smrg /* Simple spin locks */ 56222944501Smrg#define DRM_SPINLOCK(spin,val) \ 56322944501Smrg do { \ 56422944501Smrg DRM_CAS_RESULT(__ret); \ 56522944501Smrg do { \ 56622944501Smrg DRM_CAS(spin,0,val,__ret); \ 56722944501Smrg if (__ret) while ((spin)->lock); \ 56822944501Smrg } while (__ret); \ 56922944501Smrg } while(0) 57022944501Smrg 57122944501Smrg#define DRM_SPINLOCK_TAKE(spin,val) \ 57222944501Smrg do { \ 57322944501Smrg DRM_CAS_RESULT(__ret); \ 57422944501Smrg int cur; \ 57522944501Smrg do { \ 57622944501Smrg cur = (*spin).lock; \ 57722944501Smrg DRM_CAS(spin,cur,val,__ret); \ 57822944501Smrg } while (__ret); \ 57922944501Smrg } while(0) 58022944501Smrg 58122944501Smrg#define DRM_SPINLOCK_COUNT(spin,val,count,__ret) \ 58222944501Smrg do { \ 58322944501Smrg int __i; \ 58422944501Smrg __ret = 1; \ 58522944501Smrg for (__i = 0; __ret && __i < count; __i++) { \ 58622944501Smrg DRM_CAS(spin,0,val,__ret); \ 58722944501Smrg if (__ret) for (;__i < count && (spin)->lock; __i++); \ 58822944501Smrg } \ 58922944501Smrg } while(0) 59022944501Smrg 59122944501Smrg#define DRM_SPINUNLOCK(spin,val) \ 59222944501Smrg do { \ 59322944501Smrg DRM_CAS_RESULT(__ret); \ 59422944501Smrg if ((*spin).lock == val) { /* else server stole lock */ \ 59522944501Smrg do { \ 59622944501Smrg DRM_CAS(spin,val,0,__ret); \ 59722944501Smrg } while (__ret); \ 59822944501Smrg } \ 59922944501Smrg } while(0) 60022944501Smrg 60122944501Smrg 60222944501Smrg 60322944501Smrg/* General user-level programmer's API: unprivileged */ 60422944501Smrgextern int drmAvailable(void); 60522944501Smrgextern int drmOpen(const char *name, const char *busid); 606424e9256Smrg 607424e9256Smrg#define DRM_NODE_PRIMARY 0 608424e9256Smrg#define DRM_NODE_CONTROL 1 609424e9256Smrg#define DRM_NODE_RENDER 2 610fe517fc9Smrg#define DRM_NODE_MAX 3 611fe517fc9Smrg 612424e9256Smrgextern int drmOpenWithType(const char *name, const char *busid, 613424e9256Smrg int type); 614424e9256Smrg 615424e9256Smrgextern int drmOpenControl(int minor); 616424e9256Smrgextern int drmOpenRender(int minor); 61722944501Smrgextern int drmClose(int fd); 61822944501Smrgextern drmVersionPtr drmGetVersion(int fd); 61922944501Smrgextern drmVersionPtr drmGetLibVersion(int fd); 62020131375Smrgextern int drmGetCap(int fd, uint64_t capability, uint64_t *value); 62122944501Smrgextern void drmFreeVersion(drmVersionPtr); 62222944501Smrgextern int drmGetMagic(int fd, drm_magic_t * magic); 62322944501Smrgextern char *drmGetBusid(int fd); 62422944501Smrgextern int drmGetInterruptFromBusID(int fd, int busnum, int devnum, 62522944501Smrg int funcnum); 62622944501Smrgextern int drmGetMap(int fd, int idx, drm_handle_t *offset, 62722944501Smrg drmSize *size, drmMapType *type, 62822944501Smrg drmMapFlags *flags, drm_handle_t *handle, 62922944501Smrg int *mtrr); 63022944501Smrgextern int drmGetClient(int fd, int idx, int *auth, int *pid, 63122944501Smrg int *uid, unsigned long *magic, 63222944501Smrg unsigned long *iocs); 63322944501Smrgextern int drmGetStats(int fd, drmStatsT *stats); 63422944501Smrgextern int drmSetInterfaceVersion(int fd, drmSetVersion *version); 63522944501Smrgextern int drmCommandNone(int fd, unsigned long drmCommandIndex); 63622944501Smrgextern int drmCommandRead(int fd, unsigned long drmCommandIndex, 63722944501Smrg void *data, unsigned long size); 63822944501Smrgextern int drmCommandWrite(int fd, unsigned long drmCommandIndex, 63922944501Smrg void *data, unsigned long size); 64022944501Smrgextern int drmCommandWriteRead(int fd, unsigned long drmCommandIndex, 64122944501Smrg void *data, unsigned long size); 64222944501Smrg 64322944501Smrg/* General user-level programmer's API: X server (root) only */ 64422944501Smrgextern void drmFreeBusid(const char *busid); 64522944501Smrgextern int drmSetBusid(int fd, const char *busid); 64622944501Smrgextern int drmAuthMagic(int fd, drm_magic_t magic); 64722944501Smrgextern int drmAddMap(int fd, 64822944501Smrg drm_handle_t offset, 64922944501Smrg drmSize size, 65022944501Smrg drmMapType type, 65122944501Smrg drmMapFlags flags, 65222944501Smrg drm_handle_t * handle); 65322944501Smrgextern int drmRmMap(int fd, drm_handle_t handle); 65422944501Smrgextern int drmAddContextPrivateMapping(int fd, drm_context_t ctx_id, 65522944501Smrg drm_handle_t handle); 65622944501Smrg 65722944501Smrgextern int drmAddBufs(int fd, int count, int size, 65822944501Smrg drmBufDescFlags flags, 65922944501Smrg int agp_offset); 66022944501Smrgextern int drmMarkBufs(int fd, double low, double high); 66122944501Smrgextern int drmCreateContext(int fd, drm_context_t * handle); 66222944501Smrgextern int drmSetContextFlags(int fd, drm_context_t context, 66322944501Smrg drm_context_tFlags flags); 66422944501Smrgextern int drmGetContextFlags(int fd, drm_context_t context, 66522944501Smrg drm_context_tFlagsPtr flags); 66622944501Smrgextern int drmAddContextTag(int fd, drm_context_t context, void *tag); 66722944501Smrgextern int drmDelContextTag(int fd, drm_context_t context); 66822944501Smrgextern void *drmGetContextTag(int fd, drm_context_t context); 66922944501Smrgextern drm_context_t * drmGetReservedContextList(int fd, int *count); 67022944501Smrgextern void drmFreeReservedContextList(drm_context_t *); 67122944501Smrgextern int drmSwitchToContext(int fd, drm_context_t context); 67222944501Smrgextern int drmDestroyContext(int fd, drm_context_t handle); 67322944501Smrgextern int drmCreateDrawable(int fd, drm_drawable_t * handle); 67422944501Smrgextern int drmDestroyDrawable(int fd, drm_drawable_t handle); 67522944501Smrgextern int drmUpdateDrawableInfo(int fd, drm_drawable_t handle, 67622944501Smrg drm_drawable_info_type_t type, 67722944501Smrg unsigned int num, void *data); 67822944501Smrgextern int drmCtlInstHandler(int fd, int irq); 67922944501Smrgextern int drmCtlUninstHandler(int fd); 68020131375Smrgextern int drmSetClientCap(int fd, uint64_t capability, 68120131375Smrg uint64_t value); 68222944501Smrg 6832b90624aSmrgextern int drmCrtcGetSequence(int fd, uint32_t crtcId, 6842b90624aSmrg uint64_t *sequence, uint64_t *ns); 6852b90624aSmrgextern int drmCrtcQueueSequence(int fd, uint32_t crtcId, 6862b90624aSmrg uint32_t flags, uint64_t sequence, 6872b90624aSmrg uint64_t *sequence_queued, 6882b90624aSmrg uint64_t user_data); 68922944501Smrg/* General user-level programmer's API: authenticated client and/or X */ 69022944501Smrgextern int drmMap(int fd, 69122944501Smrg drm_handle_t handle, 69222944501Smrg drmSize size, 69322944501Smrg drmAddressPtr address); 69422944501Smrgextern int drmUnmap(drmAddress address, drmSize size); 69522944501Smrgextern drmBufInfoPtr drmGetBufInfo(int fd); 69622944501Smrgextern drmBufMapPtr drmMapBufs(int fd); 69722944501Smrgextern int drmUnmapBufs(drmBufMapPtr bufs); 69822944501Smrgextern int drmDMA(int fd, drmDMAReqPtr request); 69922944501Smrgextern int drmFreeBufs(int fd, int count, int *list); 70022944501Smrgextern int drmGetLock(int fd, 70122944501Smrg drm_context_t context, 70222944501Smrg drmLockFlags flags); 70322944501Smrgextern int drmUnlock(int fd, drm_context_t context); 70422944501Smrgextern int drmFinish(int fd, int context, drmLockFlags flags); 70522944501Smrgextern int drmGetContextPrivateMapping(int fd, drm_context_t ctx_id, 70622944501Smrg drm_handle_t * handle); 70722944501Smrg 70822944501Smrg/* AGP/GART support: X server (root) only */ 70922944501Smrgextern int drmAgpAcquire(int fd); 71022944501Smrgextern int drmAgpRelease(int fd); 71122944501Smrgextern int drmAgpEnable(int fd, unsigned long mode); 71222944501Smrgextern int drmAgpAlloc(int fd, unsigned long size, 71322944501Smrg unsigned long type, unsigned long *address, 71422944501Smrg drm_handle_t *handle); 71522944501Smrgextern int drmAgpFree(int fd, drm_handle_t handle); 71622944501Smrgextern int drmAgpBind(int fd, drm_handle_t handle, 71722944501Smrg unsigned long offset); 71822944501Smrgextern int drmAgpUnbind(int fd, drm_handle_t handle); 71922944501Smrg 72022944501Smrg/* AGP/GART info: authenticated client and/or X */ 72122944501Smrgextern int drmAgpVersionMajor(int fd); 72222944501Smrgextern int drmAgpVersionMinor(int fd); 72322944501Smrgextern unsigned long drmAgpGetMode(int fd); 72422944501Smrgextern unsigned long drmAgpBase(int fd); /* Physical location */ 72522944501Smrgextern unsigned long drmAgpSize(int fd); /* Bytes */ 72622944501Smrgextern unsigned long drmAgpMemoryUsed(int fd); 72722944501Smrgextern unsigned long drmAgpMemoryAvail(int fd); 72822944501Smrgextern unsigned int drmAgpVendorId(int fd); 72922944501Smrgextern unsigned int drmAgpDeviceId(int fd); 73022944501Smrg 73122944501Smrg/* PCI scatter/gather support: X server (root) only */ 73222944501Smrgextern int drmScatterGatherAlloc(int fd, unsigned long size, 73322944501Smrg drm_handle_t *handle); 73422944501Smrgextern int drmScatterGatherFree(int fd, drm_handle_t handle); 73522944501Smrg 73622944501Smrgextern int drmWaitVBlank(int fd, drmVBlankPtr vbl); 73722944501Smrg 73822944501Smrg/* Support routines */ 73922944501Smrgextern void drmSetServerInfo(drmServerInfoPtr info); 74022944501Smrgextern int drmError(int err, const char *label); 74122944501Smrgextern void *drmMalloc(int size); 74222944501Smrgextern void drmFree(void *pt); 74322944501Smrg 74422944501Smrg/* Hash table routines */ 74522944501Smrgextern void *drmHashCreate(void); 74622944501Smrgextern int drmHashDestroy(void *t); 74722944501Smrgextern int drmHashLookup(void *t, unsigned long key, void **value); 74822944501Smrgextern int drmHashInsert(void *t, unsigned long key, void *value); 74922944501Smrgextern int drmHashDelete(void *t, unsigned long key); 75022944501Smrgextern int drmHashFirst(void *t, unsigned long *key, void **value); 75122944501Smrgextern int drmHashNext(void *t, unsigned long *key, void **value); 75222944501Smrg 75322944501Smrg/* PRNG routines */ 75422944501Smrgextern void *drmRandomCreate(unsigned long seed); 75522944501Smrgextern int drmRandomDestroy(void *state); 75622944501Smrgextern unsigned long drmRandom(void *state); 75722944501Smrgextern double drmRandomDouble(void *state); 75822944501Smrg 75922944501Smrg/* Skip list routines */ 76022944501Smrg 76122944501Smrgextern void *drmSLCreate(void); 76222944501Smrgextern int drmSLDestroy(void *l); 76322944501Smrgextern int drmSLLookup(void *l, unsigned long key, void **value); 76422944501Smrgextern int drmSLInsert(void *l, unsigned long key, void *value); 76522944501Smrgextern int drmSLDelete(void *l, unsigned long key); 76622944501Smrgextern int drmSLNext(void *l, unsigned long *key, void **value); 76722944501Smrgextern int drmSLFirst(void *l, unsigned long *key, void **value); 76822944501Smrgextern void drmSLDump(void *l); 76922944501Smrgextern int drmSLLookupNeighbors(void *l, unsigned long key, 77022944501Smrg unsigned long *prev_key, void **prev_value, 77122944501Smrg unsigned long *next_key, void **next_value); 77222944501Smrg 77322944501Smrgextern int drmOpenOnce(void *unused, const char *BusID, int *newlyopened); 774424e9256Smrgextern int drmOpenOnceWithType(const char *BusID, int *newlyopened, int type); 77522944501Smrgextern void drmCloseOnce(int fd); 776a7d7de1eSmrgextern void drmMsg(const char *format, ...) DRM_PRINTFLIKE(1, 2); 77722944501Smrg 77822944501Smrgextern int drmSetMaster(int fd); 77922944501Smrgextern int drmDropMaster(int fd); 780bf6cc7dcSmrgextern int drmIsMaster(int fd); 78122944501Smrg 7822b90624aSmrg#define DRM_EVENT_CONTEXT_VERSION 4 78322944501Smrg 78422944501Smrgtypedef struct _drmEventContext { 78522944501Smrg 78622944501Smrg /* This struct is versioned so we can add more pointers if we 78722944501Smrg * add more events. */ 78822944501Smrg int version; 78922944501Smrg 79022944501Smrg void (*vblank_handler)(int fd, 79122944501Smrg unsigned int sequence, 79222944501Smrg unsigned int tv_sec, 79322944501Smrg unsigned int tv_usec, 79422944501Smrg void *user_data); 79522944501Smrg 79622944501Smrg void (*page_flip_handler)(int fd, 79722944501Smrg unsigned int sequence, 79822944501Smrg unsigned int tv_sec, 79922944501Smrg unsigned int tv_usec, 80022944501Smrg void *user_data); 80122944501Smrg 8020655efefSmrg void (*page_flip_handler2)(int fd, 8030655efefSmrg unsigned int sequence, 8040655efefSmrg unsigned int tv_sec, 8050655efefSmrg unsigned int tv_usec, 8060655efefSmrg unsigned int crtc_id, 8070655efefSmrg void *user_data); 8080655efefSmrg 8092b90624aSmrg void (*sequence_handler)(int fd, 8102b90624aSmrg uint64_t sequence, 8112b90624aSmrg uint64_t ns, 8122b90624aSmrg uint64_t user_data); 81322944501Smrg} drmEventContext, *drmEventContextPtr; 81422944501Smrg 81522944501Smrgextern int drmHandleEvent(int fd, drmEventContextPtr evctx); 81622944501Smrg 81722944501Smrgextern char *drmGetDeviceNameFromFd(int fd); 8182ee35494Smrg 8192ee35494Smrg/* Improved version of drmGetDeviceNameFromFd which attributes for any type of 8202ee35494Smrg * device/node - card, control or renderD. 8212ee35494Smrg */ 8222ee35494Smrgextern char *drmGetDeviceNameFromFd2(int fd); 823424e9256Smrgextern int drmGetNodeTypeFromFd(int fd); 82422944501Smrg 8254b3d3f37Smrg/* Convert between GEM handles and DMA-BUF file descriptors. 8264b3d3f37Smrg * 8274b3d3f37Smrg * Warning: since GEM handles are not reference-counted and are unique per 8284b3d3f37Smrg * DRM file description, the caller is expected to perform its own reference 8294b3d3f37Smrg * counting. drmPrimeFDToHandle is guaranteed to return the same handle for 8304b3d3f37Smrg * different FDs if they reference the same underlying buffer object. This 8314b3d3f37Smrg * could even be a buffer object originally created on the same DRM FD. 8324b3d3f37Smrg * 8334b3d3f37Smrg * When sharing a DRM FD with an API such as EGL or GBM, the caller must not 8344b3d3f37Smrg * use drmPrimeHandleToFD nor drmPrimeFDToHandle. A single user-space 8354b3d3f37Smrg * reference-counting implementation is necessary to avoid double-closing GEM 8364b3d3f37Smrg * handles. 8374b3d3f37Smrg * 8384b3d3f37Smrg * Two processes can't share the same DRM FD and both use it to create or 8394b3d3f37Smrg * import GEM handles, even when using a single user-space reference-counting 8404b3d3f37Smrg * implementation like GBM, because GBM doesn't share its state between 8414b3d3f37Smrg * processes. 8424b3d3f37Smrg */ 84320131375Smrgextern int drmPrimeHandleToFD(int fd, uint32_t handle, uint32_t flags, int *prime_fd); 84420131375Smrgextern int drmPrimeFDToHandle(int fd, int prime_fd, uint32_t *handle); 84520131375Smrg 846adfa0b0cSmrgextern int drmCloseBufferHandle(int fd, uint32_t handle); 847adfa0b0cSmrg 848424e9256Smrgextern char *drmGetPrimaryDeviceNameFromFd(int fd); 849424e9256Smrgextern char *drmGetRenderDeviceNameFromFd(int fd); 850424e9256Smrg 8512ee35494Smrg#define DRM_BUS_PCI 0 8522ee35494Smrg#define DRM_BUS_USB 1 8532ee35494Smrg#define DRM_BUS_PLATFORM 2 8542ee35494Smrg#define DRM_BUS_HOST1X 3 855fe517fc9Smrg 856fe517fc9Smrgtypedef struct _drmPciBusInfo { 857fe517fc9Smrg uint16_t domain; 858fe517fc9Smrg uint8_t bus; 859fe517fc9Smrg uint8_t dev; 860fe517fc9Smrg uint8_t func; 861fe517fc9Smrg} drmPciBusInfo, *drmPciBusInfoPtr; 862fe517fc9Smrg 863fe517fc9Smrgtypedef struct _drmPciDeviceInfo { 864fe517fc9Smrg uint16_t vendor_id; 865fe517fc9Smrg uint16_t device_id; 866fe517fc9Smrg uint16_t subvendor_id; 867fe517fc9Smrg uint16_t subdevice_id; 868fe517fc9Smrg uint8_t revision_id; 869fe517fc9Smrg} drmPciDeviceInfo, *drmPciDeviceInfoPtr; 870fe517fc9Smrg 8712ee35494Smrgtypedef struct _drmUsbBusInfo { 8722ee35494Smrg uint8_t bus; 8732ee35494Smrg uint8_t dev; 8742ee35494Smrg} drmUsbBusInfo, *drmUsbBusInfoPtr; 8752ee35494Smrg 8762ee35494Smrgtypedef struct _drmUsbDeviceInfo { 8772ee35494Smrg uint16_t vendor; 8782ee35494Smrg uint16_t product; 8792ee35494Smrg} drmUsbDeviceInfo, *drmUsbDeviceInfoPtr; 8802ee35494Smrg 8812ee35494Smrg#define DRM_PLATFORM_DEVICE_NAME_LEN 512 8822ee35494Smrg 8832ee35494Smrgtypedef struct _drmPlatformBusInfo { 8842ee35494Smrg char fullname[DRM_PLATFORM_DEVICE_NAME_LEN]; 8852ee35494Smrg} drmPlatformBusInfo, *drmPlatformBusInfoPtr; 8862ee35494Smrg 8872ee35494Smrgtypedef struct _drmPlatformDeviceInfo { 8882ee35494Smrg char **compatible; /* NULL terminated list of compatible strings */ 8892ee35494Smrg} drmPlatformDeviceInfo, *drmPlatformDeviceInfoPtr; 8902ee35494Smrg 8912ee35494Smrg#define DRM_HOST1X_DEVICE_NAME_LEN 512 8922ee35494Smrg 8932ee35494Smrgtypedef struct _drmHost1xBusInfo { 8942ee35494Smrg char fullname[DRM_HOST1X_DEVICE_NAME_LEN]; 8952ee35494Smrg} drmHost1xBusInfo, *drmHost1xBusInfoPtr; 8962ee35494Smrg 8972ee35494Smrgtypedef struct _drmHost1xDeviceInfo { 8982ee35494Smrg char **compatible; /* NULL terminated list of compatible strings */ 8992ee35494Smrg} drmHost1xDeviceInfo, *drmHost1xDeviceInfoPtr; 9002ee35494Smrg 901fe517fc9Smrgtypedef struct _drmDevice { 902fe517fc9Smrg char **nodes; /* DRM_NODE_MAX sized array */ 903fe517fc9Smrg int available_nodes; /* DRM_NODE_* bitmask */ 904fe517fc9Smrg int bustype; 905fe517fc9Smrg union { 906fe517fc9Smrg drmPciBusInfoPtr pci; 9072ee35494Smrg drmUsbBusInfoPtr usb; 9082ee35494Smrg drmPlatformBusInfoPtr platform; 9092ee35494Smrg drmHost1xBusInfoPtr host1x; 910fe517fc9Smrg } businfo; 911fe517fc9Smrg union { 912fe517fc9Smrg drmPciDeviceInfoPtr pci; 9132ee35494Smrg drmUsbDeviceInfoPtr usb; 9142ee35494Smrg drmPlatformDeviceInfoPtr platform; 9152ee35494Smrg drmHost1xDeviceInfoPtr host1x; 916fe517fc9Smrg } deviceinfo; 917fe517fc9Smrg} drmDevice, *drmDevicePtr; 918fe517fc9Smrg 919fe517fc9Smrgextern int drmGetDevice(int fd, drmDevicePtr *device); 920fe517fc9Smrgextern void drmFreeDevice(drmDevicePtr *device); 921fe517fc9Smrg 922fe517fc9Smrgextern int drmGetDevices(drmDevicePtr devices[], int max_devices); 923fe517fc9Smrgextern void drmFreeDevices(drmDevicePtr devices[], int count); 924fe517fc9Smrg 9252ee35494Smrg#define DRM_DEVICE_GET_PCI_REVISION (1 << 0) 9262ee35494Smrgextern int drmGetDevice2(int fd, uint32_t flags, drmDevicePtr *device); 9272ee35494Smrgextern int drmGetDevices2(uint32_t flags, drmDevicePtr devices[], int max_devices); 9282ee35494Smrg 929adfa0b0cSmrgextern int drmGetDeviceFromDevId(dev_t dev_id, uint32_t flags, drmDevicePtr *device); 930adfa0b0cSmrg 9310655efefSmrgextern int drmDevicesEqual(drmDevicePtr a, drmDevicePtr b); 9320655efefSmrg 9330655efefSmrgextern int drmSyncobjCreate(int fd, uint32_t flags, uint32_t *handle); 9340655efefSmrgextern int drmSyncobjDestroy(int fd, uint32_t handle); 9350655efefSmrgextern int drmSyncobjHandleToFD(int fd, uint32_t handle, int *obj_fd); 9360655efefSmrgextern int drmSyncobjFDToHandle(int fd, int obj_fd, uint32_t *handle); 9370655efefSmrg 9380655efefSmrgextern int drmSyncobjImportSyncFile(int fd, uint32_t handle, int sync_file_fd); 9390655efefSmrgextern int drmSyncobjExportSyncFile(int fd, uint32_t handle, int *sync_file_fd); 9402b90624aSmrgextern int drmSyncobjWait(int fd, uint32_t *handles, unsigned num_handles, 9412b90624aSmrg int64_t timeout_nsec, unsigned flags, 9422b90624aSmrg uint32_t *first_signaled); 9432b90624aSmrgextern int drmSyncobjReset(int fd, const uint32_t *handles, uint32_t handle_count); 9442b90624aSmrgextern int drmSyncobjSignal(int fd, const uint32_t *handles, uint32_t handle_count); 945bf6cc7dcSmrgextern int drmSyncobjTimelineSignal(int fd, const uint32_t *handles, 946bf6cc7dcSmrg uint64_t *points, uint32_t handle_count); 947bf6cc7dcSmrgextern int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t *points, 948bf6cc7dcSmrg unsigned num_handles, 949bf6cc7dcSmrg int64_t timeout_nsec, unsigned flags, 950bf6cc7dcSmrg uint32_t *first_signaled); 951bf6cc7dcSmrgextern int drmSyncobjQuery(int fd, uint32_t *handles, uint64_t *points, 952bf6cc7dcSmrg uint32_t handle_count); 95387bf8e7cSmrgextern int drmSyncobjQuery2(int fd, uint32_t *handles, uint64_t *points, 95487bf8e7cSmrg uint32_t handle_count, uint32_t flags); 955bf6cc7dcSmrgextern int drmSyncobjTransfer(int fd, 956bf6cc7dcSmrg uint32_t dst_handle, uint64_t dst_point, 957bf6cc7dcSmrg uint32_t src_handle, uint64_t src_point, 958bf6cc7dcSmrg uint32_t flags); 9590655efefSmrg 960636d5e9fSmrgextern char * 961636d5e9fSmrgdrmGetFormatModifierVendor(uint64_t modifier); 962636d5e9fSmrg 963636d5e9fSmrgextern char * 964636d5e9fSmrgdrmGetFormatModifierName(uint64_t modifier); 965636d5e9fSmrg 966636d5e9fSmrg#ifndef fourcc_mod_get_vendor 967636d5e9fSmrg#define fourcc_mod_get_vendor(modifier) \ 968636d5e9fSmrg (((modifier) >> 56) & 0xff) 969636d5e9fSmrg#endif 970636d5e9fSmrg 971fe517fc9Smrg#if defined(__cplusplus) 97220131375Smrg} 97320131375Smrg#endif 97420131375Smrg 97522944501Smrg#endif 976