generated_static_table_fourcc.h revision 02fa736b
102fa736bSmrg/* AUTOMATICALLY GENERATED by gen_table_fourcc.py. You should modify
202fa736bSmrg   that script instead of adding here entries manually! */
302fa736bSmrgstatic const struct drmFormatModifierInfo drm_format_modifier_table[] = {
402fa736bSmrg    { DRM_MODIFIER_INVALID(NONE, INVALID_MODIFIER) },
502fa736bSmrg    { DRM_MODIFIER_LINEAR(NONE, LINEAR) },
602fa736bSmrg    { DRM_MODIFIER_INTEL(X_TILED, X_TILED) },
702fa736bSmrg    { DRM_MODIFIER_INTEL(Y_TILED, Y_TILED) },
802fa736bSmrg    { DRM_MODIFIER_INTEL(Yf_TILED, Yf_TILED) },
902fa736bSmrg    { DRM_MODIFIER_INTEL(Y_TILED_CCS, Y_TILED_CCS) },
1002fa736bSmrg    { DRM_MODIFIER_INTEL(Yf_TILED_CCS, Yf_TILED_CCS) },
1102fa736bSmrg    { DRM_MODIFIER_INTEL(Y_TILED_GEN12_RC_CCS, Y_TILED_GEN12_RC_CCS) },
1202fa736bSmrg    { DRM_MODIFIER_INTEL(Y_TILED_GEN12_MC_CCS, Y_TILED_GEN12_MC_CCS) },
1302fa736bSmrg    { DRM_MODIFIER(SAMSUNG, 64_32_TILE, 64_32_TILE) },
1402fa736bSmrg    { DRM_MODIFIER(SAMSUNG, 16_16_TILE, 16_16_TILE) },
1502fa736bSmrg    { DRM_MODIFIER(QCOM, COMPRESSED, COMPRESSED) },
1602fa736bSmrg    { DRM_MODIFIER(VIVANTE, TILED, TILED) },
1702fa736bSmrg    { DRM_MODIFIER(VIVANTE, SUPER_TILED, SUPER_TILED) },
1802fa736bSmrg    { DRM_MODIFIER(VIVANTE, SPLIT_TILED, SPLIT_TILED) },
1902fa736bSmrg    { DRM_MODIFIER(VIVANTE, SPLIT_SUPER_TILED, SPLIT_SUPER_TILED) },
2002fa736bSmrg    { DRM_MODIFIER(NVIDIA, TEGRA_TILED, TEGRA_TILED) },
2102fa736bSmrg    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_ONE_GOB, 16BX2_BLOCK_ONE_GOB) },
2202fa736bSmrg    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_TWO_GOB, 16BX2_BLOCK_TWO_GOB) },
2302fa736bSmrg    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_FOUR_GOB, 16BX2_BLOCK_FOUR_GOB) },
2402fa736bSmrg    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_EIGHT_GOB, 16BX2_BLOCK_EIGHT_GOB) },
2502fa736bSmrg    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_SIXTEEN_GOB, 16BX2_BLOCK_SIXTEEN_GOB) },
2602fa736bSmrg    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_THIRTYTWO_GOB, 16BX2_BLOCK_THIRTYTWO_GOB) },
2702fa736bSmrg    { DRM_MODIFIER(BROADCOM, VC4_T_TILED, VC4_T_TILED) },
2802fa736bSmrg    { DRM_MODIFIER(BROADCOM, SAND32, SAND32) },
2902fa736bSmrg    { DRM_MODIFIER(BROADCOM, SAND64, SAND64) },
3002fa736bSmrg    { DRM_MODIFIER(BROADCOM, SAND128, SAND128) },
3102fa736bSmrg    { DRM_MODIFIER(BROADCOM, SAND256, SAND256) },
3202fa736bSmrg    { DRM_MODIFIER(BROADCOM, UIF, UIF) },
3302fa736bSmrg    { DRM_MODIFIER(ARM, 16X16_BLOCK_U_INTERLEAVED, 16X16_BLOCK_U_INTERLEAVED) },
3402fa736bSmrg    { DRM_MODIFIER(ALLWINNER, TILED, TILED) },
3502fa736bSmrg};
3602fa736bSmrgstatic const struct drmFormatModifierVendorInfo drm_format_modifier_vendor_table[] = {
3702fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_NONE, "NONE" },
3802fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_INTEL, "INTEL" },
3902fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_AMD, "AMD" },
4002fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_NVIDIA, "NVIDIA" },
4102fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_SAMSUNG, "SAMSUNG" },
4202fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_QCOM, "QCOM" },
4302fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_VIVANTE, "VIVANTE" },
4402fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_BROADCOM, "BROADCOM" },
4502fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_ARM, "ARM" },
4602fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_ALLWINNER, "ALLWINNER" },
4702fa736bSmrg    { DRM_FORMAT_MOD_VENDOR_AMLOGIC, "AMLOGIC" },
4802fa736bSmrg};
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