117a48c7cSmrg
217a48c7cSmrg
317a48c7cSmrg
417a48c7cSmrg#define curr08		(curr - 0x30)
517a48c7cSmrg#define curr16		((CARD16 *)(curr - 0x30))
617a48c7cSmrg#define curr32		((CARD32 *)(curr - 0x30))
717a48c7cSmrg#define check08(addr, val)						\
817a48c7cSmrg    ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr08[(addr)] != (val))
917a48c7cSmrg#define check16(addr, val)						\
1017a48c7cSmrg    ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr16[(addr) / 2] != (val)||\
1117a48c7cSmrg	((addr) == 0x50 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\
1217a48c7cSmrg	((addr) == 0x52 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\
1317a48c7cSmrg	((addr) == 0x54 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) ||	\
1417a48c7cSmrg	((addr) == 0x56 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) ||	\
1517a48c7cSmrg	((addr) == 0x58 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDIMX))
1617a48c7cSmrg#define check32(addr, val)						\
1717a48c7cSmrg    ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr32[(addr) / 4] != (val)||\
1817a48c7cSmrg	((addr) == 0x50 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\
1917a48c7cSmrg	((addr) == 0x54 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) ||	\
2017a48c7cSmrg	((addr) == 0x58 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDIMX) ||	\
2117a48c7cSmrg	((addr) == 0x40 && (val) & DEC_START))
2217a48c7cSmrg
2317a48c7cSmrg#ifndef MIN
2417a48c7cSmrg#define MIN(a,b)	((a) < (b) ? (a) : (b))
2517a48c7cSmrg#endif
2617a48c7cSmrg/* Memory mapped access to extended registers */
2717a48c7cSmrg#define RDXB_M(addr)     (MMIO_IN8 (pApm->MemMap, (addr)))
2817a48c7cSmrg#define RDXW_M(addr)     (MMIO_IN16(pApm->MemMap, (addr)))
2917a48c7cSmrg#define RDXL_M(addr)     (MMIO_IN32(pApm->MemMap, (addr)))
3017a48c7cSmrg#define WRXB_M(addr,val)  do { if (check08((addr), (val))) { \
3117a48c7cSmrg			MMIO_OUT8 (pApm->MemMap, (addr), (val));	\
320dd80ee0Smrg			/*xf86DrvMsg(xf86ScreenToScrn(pApm->pScreen)->scrnIndex, X_INFO, \
3317a48c7cSmrg				    "File %s, line %d,	%02X <-       %02X\n", \
3417a48c7cSmrg				    __FILE__, __LINE__, (addr), (val) & 255); */\
3517a48c7cSmrg			curr08[MIN((addr), 0x80)] = (val); }} while (0)
3617a48c7cSmrg#define WRXW_M(addr,val)  do { if (check16((addr), (val))) { \
3717a48c7cSmrg			MMIO_OUT16(pApm->MemMap, (addr), (val));	\
380dd80ee0Smrg			/*xf86DrvMsg(xf86ScreenToScrn(pApm->pScreen)->scrnIndex, X_INFO, \
3917a48c7cSmrg				    "File %s, line %d,	%02X <-     %04X\n", \
4017a48c7cSmrg				    __FILE__, __LINE__, (addr), (val)&65535); */\
4117a48c7cSmrg			curr16[MIN(((addr) / 2), 0x40)] = (val); }} while (0)
4217a48c7cSmrg#define WRXL_M(addr,val)  do { if (check32((addr), (val))) { \
4317a48c7cSmrg			MMIO_OUT32(pApm->MemMap, (addr), (val));	\
440dd80ee0Smrg			/*xf86DrvMsg(xf86ScreenToScrn(pApm->pScreen)->scrnIndex, X_INFO, \
4517a48c7cSmrg				    "File %s, line %d,	%02X <- %08X\n", \
4617a48c7cSmrg				    __FILE__, __LINE__, (addr), (val)); */\
4717a48c7cSmrg			curr32[MIN(((addr) / 4), 0x20)] = (val); }} while (0)
4817a48c7cSmrg
4917a48c7cSmrg/* IO port access to extended registers */
5017a48c7cSmrg#define RDXB_IOP(addr)     (wrinx(pApm->xport, 0x1D, (addr) >> 2), \
5117a48c7cSmrg			    inb(pApm->xbase + ((addr) & 3)))
5217a48c7cSmrg#define RDXW_IOP(addr)     (wrinx(pApm->xport, 0x1D, (addr) >> 2), \
5317a48c7cSmrg			    inw(pApm->xbase + ((addr) & 2)))
5417a48c7cSmrg#define RDXL_IOP(addr)     (wrinx(pApm->xport, 0x1D, (addr) >> 2), \
5517a48c7cSmrg			    inl(pApm->xbase))
5617a48c7cSmrg#define WRXB_IOP(addr,val)					   \
5717a48c7cSmrg    do { 							   \
5817a48c7cSmrg	if (check08((addr), (val))) {				   \
5917a48c7cSmrg	    wrinx(pApm->xport, 0x1D, (addr) >> 2);		   \
6017a48c7cSmrg	    outb(pApm->xbase + ((addr) & 3), (val));		   \
6117a48c7cSmrg	    curr08[MIN((addr), 0x80)] = (val);			   \
6217a48c7cSmrg	    break;						   \
6317a48c7cSmrg	}							   \
6417a48c7cSmrg    } while (1)
6517a48c7cSmrg#define WRXW_IOP(addr,val)					   \
6617a48c7cSmrg    do {							   \
6717a48c7cSmrg	if (check16((addr), (val))) {				   \
6817a48c7cSmrg	    wrinx(pApm->xport, 0x1D, (addr) >> 2);		   \
6917a48c7cSmrg	    outw(pApm->xbase + ((addr) & 2), (val));		   \
7017a48c7cSmrg	    curr16[MIN(((addr) / 2), 0x40)] = (val);		   \
7117a48c7cSmrg	    break;						   \
7217a48c7cSmrg	}							   \
7317a48c7cSmrg    } while (1)
7417a48c7cSmrg#define WRXL_IOP(addr,val)					   \
7517a48c7cSmrg    do {							   \
7617a48c7cSmrg	if (check32((addr), (val))) {				   \
7717a48c7cSmrg	    wrinx(pApm->xport, 0x1D, (addr) >> 2);		   \
7817a48c7cSmrg	    outl(pApm->xbase, (val));				   \
7917a48c7cSmrg	    curr32[MIN(((addr) / 4), 0x20)] = (val);		   \
8017a48c7cSmrg	    break;						   \
8117a48c7cSmrg	}							   \
8217a48c7cSmrg    } while (1)
8317a48c7cSmrg
8417a48c7cSmrg#define WRXL	WRXL_M
8517a48c7cSmrg#define WRXW	WRXW_M
8617a48c7cSmrg#define WRXB	WRXB_M
8717a48c7cSmrg#define RDXL	RDXL_M
8817a48c7cSmrg#define RDXW	RDXW_M
8917a48c7cSmrg#define RDXB	RDXB_M
9017a48c7cSmrg#define UPDATEDEST(x,y)		(void)(curr32[0x54 / 4] = ((y) << 16) | ((x) & 0xFFFF))
9117a48c7cSmrg
9217a48c7cSmrg/* Memory mapped access to VGA registers */
9317a48c7cSmrg#define APMVGAB(idx)		(((volatile unsigned char  *)pApm->VGAMap)[idx])
9417a48c7cSmrg#define APMVGAS(idx)		(((volatile unsigned short *)pApm->VGAMap)[(idx) >> 1])
9517a48c7cSmrg#define APMVGAW(idx)		(((volatile unsigned int   *)pApm->VGAMap)[(idx) >> 2])
9617a48c7cSmrg#define ApmWriteCrtc(idx, val)	do { APMVGAS(0x3D4) = ((val) << 8) | ((idx) & 0xFF); break; } while(1)
9717a48c7cSmrg#define ApmReadCrtc(idx)	((APMVGAB(0x3D4) = (idx)), APMVGAB(0x3D5))
9817a48c7cSmrg#define ApmWriteGr(idx, val)	do { APMVGAS(0x3CE) = ((val) << 8) | ((idx) & 0xFF); break; } while(1)
9917a48c7cSmrg#define ApmReadGr(idx)	((APMVGAB(0x3CE) = (idx)), APMVGAB(0x3CF))
10017a48c7cSmrg#define ApmWriteSeq(idx, val)	do { APMVGAB(0x3C4) = (idx); APMVGAB(0x3C5) = (val); break; } while(1)
10117a48c7cSmrg#define ApmReadSeq(idx)	((APMVGAB(0x3C4) = (idx)), APMVGAB(0x3C5))
10217a48c7cSmrg#define ApmWriteAttr(idx, val)	do { int tmp = APMVGAB(0x3DA); APMVGAB(0x3C0) = (idx); APMVGAB(0x3C0) = (val); break; } while(1)
10317a48c7cSmrg#define ApmReadAttr(idx)	(APMVGAB(0x3DA), (APMVGAB(0x3C0) = (idx)), APMVGAB(0x3C1))
10417a48c7cSmrg#define ApmWriteMiscOut(val)	do { APMVGAB(0x3C2) = (val); break; } while(1)
10517a48c7cSmrg#define ApmReadMiscOut()	APMVGAB(0x3CC)
10617a48c7cSmrg#define ApmWriteDacMask(val)	do { APMVGAB(0x3C6) = (val); break; } while(1)
10717a48c7cSmrg#define ApmReadDacMask()	APMVGAB(0x3C6)
10817a48c7cSmrg#define ApmWriteDacReadAddr(val)do { APMVGAB(0x3C7) = (val); break; } while(1)
10917a48c7cSmrg#define ApmWriteDacWriteAddr(val)do{ APMVGAB(0x3C8) = (val); break; } while(1)
11017a48c7cSmrg#define ApmWriteDacData(val)	do { APMVGAB(0x3C9) = (val); break; } while(1)
11117a48c7cSmrg#define ApmReadDacData()	APMVGAB(0x3C9)
11217a48c7cSmrg
11317a48c7cSmrg#define STATUS()			(RDXL(0x1FC))
11417a48c7cSmrg#define STATUS_IOP()			(RDXL_IOP(0x1FC))
11517a48c7cSmrg#define STATUS_FIFO			(0x0F)
11617a48c7cSmrg#define STATUS_HOSTBLTBUSY		(1 << 8)
11717a48c7cSmrg#define STATUS_ENGINEBUSY		(1 << 10)
11817a48c7cSmrg#define STATUS_SDA			(1 << 16)
11917a48c7cSmrg#define STATUS_SCL			(1 << 17)
12017a48c7cSmrg
12117a48c7cSmrg#define SETFOREGROUNDCOLOR(c)		WRXL(0x60,c)
12217a48c7cSmrg#define SETBACKGROUNDCOLOR(c)		WRXL(0x64,c)
12317a48c7cSmrg
12417a48c7cSmrg#define SETSOURCEX(x)			WRXW(0x50, x)
12517a48c7cSmrg#define SETSOURCEY(y)			WRXW(0x52, y)
12617a48c7cSmrg#define SETSOURCEXY(x,y)		WRXL(0x50, ((y) << 16) | ((x) & 0xFFFF))
12717a48c7cSmrg#define SETSOURCEOFF(o)			WRXL(0x50, (o))
12817a48c7cSmrg
12917a48c7cSmrg#define SETDESTX(x)			WRXW(0x54, x)
13017a48c7cSmrg#define SETDESTY(y)			WRXW(0x56, y)
13117a48c7cSmrg#define SETDESTXY(x,y)			WRXL(0x54, ((y) << 16) | ((x) & 0xFFFF))
13217a48c7cSmrg#define SETDESTOFF(o)			WRXL(0x54, (o))
13317a48c7cSmrg
13417a48c7cSmrg#define SETWIDTH(w)			WRXW(0x58, w)
13517a48c7cSmrg#define SETHEIGHT(h)			WRXW(0x5A, h)
13617a48c7cSmrg#define SETWIDTHHEIGHT(w,h)		WRXL(0x58, ((h) << 16) | ((w) & 0xFFFF))
13717a48c7cSmrg
13817a48c7cSmrg#define SETOFFSET(o)			WRXW(0x5C, (o))
13917a48c7cSmrg#define SETSOURCEOFFSET(o)		WRXW(0x5E, (o))
14017a48c7cSmrg
14117a48c7cSmrg#define SETBYTEMASK(mask)		WRXB(0x47, (mask))
14217a48c7cSmrg
14317a48c7cSmrg#define SETPATTERN(p1, p2)		do {WRXL(0x48, p1); WRXL(0x4C, p2);} while(0)
14417a48c7cSmrg
14517a48c7cSmrg#define SETDDA_AXIALSTEP(step)		WRXW(0x70, (step))
14617a48c7cSmrg#define SETDDA_DIAGONALSTEP(step)	WRXW(0x72, (step))
14717a48c7cSmrg#define SETDDA_ERRORTERM(eterm)		WRXW(0x74, (eterm))
14817a48c7cSmrg#define SETDDA_ADSTEP(s1,s2)		WRXL(0x70, ((s2) << 16)|((s1) & 0xFFFF))
14917a48c7cSmrg
15017a48c7cSmrg#define SETCLIP_CTRL(ctrl)		WRXB(0x30, (ctrl))
15117a48c7cSmrg#define SETCLIP_LEFT(x)			WRXW(0x38, (x))
15217a48c7cSmrg#define SETCLIP_TOP(y)			WRXW(0x3A, (y))
15317a48c7cSmrg#define SETCLIP_LEFTTOP(x,y)		WRXL(0x38, ((y) << 16) | ((x) & 0xFFFF))
15417a48c7cSmrg#define SETCLIP_RIGHT(x)		WRXW(0x3C, (x))
15517a48c7cSmrg#define SETCLIP_BOT(y)			WRXW(0x3E, (y))
15617a48c7cSmrg#define SETCLIP_RIGHTBOT(x,y)		WRXL(0x3C, ((y) << 16) | ((x) & 0xFFFF))
15717a48c7cSmrg
15817a48c7cSmrg/* RASTER OPERATION REGISTER */
15917a48c7cSmrg/* P = pattern   S = source   D = destination */
16017a48c7cSmrg#define SETROP(rop)			WRXB(0x46, (rop))
16117a48c7cSmrg#define ROP_P_and_S_and_D		0x80
16217a48c7cSmrg#define ROP_S_xor_D			0x66
16317a48c7cSmrg#define ROP_S				0xCC
16417a48c7cSmrg#define ROP_P				0xF0
16517a48c7cSmrg/* Then there are about 252 more operations ... */
16617a48c7cSmrg
16717a48c7cSmrg
16817a48c7cSmrg/* DRAWING ENGINE CONTROL REGISTER */
16917a48c7cSmrg#define SETDEC(control)             WRXL(0x40, (control))
17017a48c7cSmrg#define DEC_OP_VECT_NOENDP          0x0000000D
17117a48c7cSmrg#define DEC_OP_VECT_ENDP            0x0000000C
17217a48c7cSmrg#define DEC_OP_HOSTBLT_SCREEN2HOST  0x00000009
17317a48c7cSmrg#define DEC_OP_HOSTBLT_HOST2SCREEN  0x00000008
17417a48c7cSmrg#define DEC_OP_STRIP                0x00000004
17517a48c7cSmrg#define DEC_OP_BLT_STRETCH          0x00000003
17617a48c7cSmrg#define DEC_OP_RECT                 0x00000002
17717a48c7cSmrg#define DEC_OP_BLT                  0x00000001
17817a48c7cSmrg#define DEC_OP_NOOP                 0x00000000
17917a48c7cSmrg#define DEC_DIR_X_NEG               (1 << 6)
18017a48c7cSmrg#define DEC_DIR_X_POS               (0 << 6)
18117a48c7cSmrg#define DEC_DIR_Y_NEG               (1 << 7)
18217a48c7cSmrg#define DEC_DIR_Y_POS               (0 << 7)
18317a48c7cSmrg#define DEC_MAJORAXIS_X             (0 << 8) /* Looks like an error in the docs ...*/
18417a48c7cSmrg#define DEC_MAJORAXIS_Y             (1 << 8)
18517a48c7cSmrg#define DEC_SOURCE_LINEAR           (1 << 9)
18617a48c7cSmrg#define DEC_SOURCE_XY               (0 << 9)
18717a48c7cSmrg#define DEC_SOURCE_CONTIG           (1 << 11)
18817a48c7cSmrg#define DEC_SOURCE_RECTANGULAR      (0 << 11)
18917a48c7cSmrg#define DEC_SOURCE_MONOCHROME       (1 << 12)
19017a48c7cSmrg#define DEC_SOURCE_COLOR            (0 << 12)
19117a48c7cSmrg#define DEC_SOURCE_TRANSPARENCY     (1 << 13)
19217a48c7cSmrg#define DEC_SOURCE_NO_TRANSPARENCY  (0 << 13)
19317a48c7cSmrg#define DEC_BITDEPTH_MASK	    (7 << 14)
19417a48c7cSmrg#define DEC_BITDEPTH_24             (4 << 14)
19517a48c7cSmrg#define DEC_BITDEPTH_32             (3 << 14)
19617a48c7cSmrg#define DEC_BITDEPTH_16             (2 << 14)
19717a48c7cSmrg#define DEC_BITDEPTH_8              (1 << 14)
19817a48c7cSmrg#define DEC_DEST_LINEAR             (1 << 18)
19917a48c7cSmrg#define DEC_DEST_XY                 (0 << 18)
20017a48c7cSmrg#define DEC_DEST_CONTIG             (1 << 19)
20117a48c7cSmrg#define DEC_DEST_RECTANGULAR        (0 << 19)
20217a48c7cSmrg#define DEC_DEST_TRANSPARENCY       (1 << 20)
20317a48c7cSmrg#define DEC_DEST_NO_TRANSPARENCY    (0 << 20)
20417a48c7cSmrg#define DEC_DEST_TRANSP_POLARITY    (1 << 21)
20517a48c7cSmrg#define DEC_DEST_TRANSP_POLARITYINV (0 << 21)
20617a48c7cSmrg#define DEC_PATTERN_88_8bCOLOR      (3 << 22)
20717a48c7cSmrg#define DEC_PATTERN_88_1bMONO       (2 << 22)
20817a48c7cSmrg#define DEC_PATTERN_44_4bDITHER     (1 << 22)
20917a48c7cSmrg#define DEC_PATTERN_NONE            (0 << 22)
21017a48c7cSmrg#define DEC_WIDTH_MASK		    (7 << 24)
21117a48c7cSmrg#define DEC_WIDTH_1600              (7 << 24)
21217a48c7cSmrg#define DEC_WIDTH_1280              (6 << 24)
21317a48c7cSmrg#define DEC_WIDTH_1152              (5 << 24)
21417a48c7cSmrg#define DEC_WIDTH_1024              (4 << 24)
21517a48c7cSmrg#define DEC_WIDTH_800               (2 << 24)
21617a48c7cSmrg#define DEC_WIDTH_640               (1 << 24)
21717a48c7cSmrg#define DEC_WIDTH_LINEAR            (0 << 24)
21817a48c7cSmrg#define DEC_DEST_UPD_LASTPIX        (3 << 27)
21917a48c7cSmrg#define DEC_DEST_UPD_BLCORNER       (2 << 27)
22017a48c7cSmrg#define DEC_DEST_UPD_TRCORNER       (1 << 27)
22117a48c7cSmrg#define DEC_DEST_UPD_NONE           (0 << 27)
22217a48c7cSmrg#define DEC_QUICKSTART_ONDEST       (3 << 29)
22317a48c7cSmrg#define DEC_QUICKSTART_ONSOURCE     (2 << 29)
22417a48c7cSmrg#define DEC_QUICKSTART_ONDIMX       (1 << 29)
22517a48c7cSmrg#define DEC_QUICKSTART_NONE         (0 << 29)
22617a48c7cSmrg#define DEC_START                   (1 << 31)
22717a48c7cSmrg#define DEC_START_NO                (0 << 31)
22817a48c7cSmrg
22917a48c7cSmrg#define AT3D_SST_STATUS		0x1F4
23017a48c7cSmrg#define		SST_BUSY	1
231