115fb4814Smrg/* 215fb4814Smrg * Copyright (c) 2005 ASPEED Technology Inc. 315fb4814Smrg * 415fb4814Smrg * Permission to use, copy, modify, distribute, and sell this software and its 515fb4814Smrg * documentation for any purpose is hereby granted without fee, provided that 615fb4814Smrg * the above copyright notice appear in all copies and that both that 715fb4814Smrg * copyright notice and this permission notice appear in supporting 815fb4814Smrg * documentation, and that the name of the authors not be used in 915fb4814Smrg * advertising or publicity pertaining to distribution of the software without 1015fb4814Smrg * specific, written prior permission. The authors makes no representations 1115fb4814Smrg * about the suitability of this software for any purpose. It is provided 1215fb4814Smrg * "as is" without express or implied warranty. 1315fb4814Smrg * 1415fb4814Smrg * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 1515fb4814Smrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 1615fb4814Smrg * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 1715fb4814Smrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 1815fb4814Smrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 1915fb4814Smrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 2015fb4814Smrg * PERFORMANCE OF THIS SOFTWARE. 2115fb4814Smrg */ 2215fb4814Smrg 2315fb4814Smrg/* Eng Capability Definition */ 2415fb4814Smrg#define ENG_CAP_Sync 0x0001 2515fb4814Smrg#define ENG_CAP_ScreenToScreenCopy 0x0002 2615fb4814Smrg#define ENG_CAP_SolidFill 0x0004 2715fb4814Smrg#define ENG_CAP_SolidLine 0x0008 2815fb4814Smrg#define ENG_CAP_DashedLine 0x0010 2915fb4814Smrg#define ENG_CAP_Mono8x8PatternFill 0x0020 3015fb4814Smrg#define ENG_CAP_Color8x8PatternFill 0x0040 3115fb4814Smrg#define ENG_CAP_CPUToScreenColorExpand 0x0080 3215fb4814Smrg#define ENG_CAP_ScreenToScreenColorExpand 0x0100 337fe5393cSmrg#define ENG_CAP_Clipping 0x0200 3415fb4814Smrg#define ENG_CAP_ALL (ENG_CAP_Sync | ENG_CAP_ScreenToScreenCopy | ENG_CAP_SolidFill | \ 3515fb4814Smrg ENG_CAP_SolidLine | ENG_CAP_DashedLine | \ 3615fb4814Smrg ENG_CAP_Mono8x8PatternFill | ENG_CAP_Color8x8PatternFill | \ 3715fb4814Smrg ENG_CAP_Clipping); 3815fb4814Smrg 3915fb4814Smrg/* CMDQ Definition */ 4015fb4814Smrg#define AGP_CMD_QUEUE 1 4115fb4814Smrg#define VM_CMD_QUEUE 0 4215fb4814Smrg#define VM_CMD_MMIO 2 4315fb4814Smrg 4415fb4814Smrg#define CMD_QUEUE_SIZE_256K 0x00040000 4515fb4814Smrg#define CMD_QUEUE_SIZE_512K 0x00080000 4615fb4814Smrg#define CMD_QUEUE_SIZE_1M 0x00100000 4715fb4814Smrg#define CMD_QUEUE_SIZE_2M 0x00200000 4815fb4814Smrg#define CMD_QUEUE_SIZE_4M 0x00400000 4915fb4814Smrg 50b534f209Smrg#define PIXEL_FMT_YV12 FOURCC_YV12 /* 0x32315659 */ 51b534f209Smrg#define PIXEL_FMT_UYVY FOURCC_UYVY /* 0x59565955 */ 52b534f209Smrg#define PIXEL_FMT_YUY2 FOURCC_YUY2 /* 0x32595559 */ 53b534f209Smrg#define PIXEL_FMT_RGB5 0x35315652 54b534f209Smrg#define PIXEL_FMT_RGB6 0x36315652 55b534f209Smrg#define PIXEL_FMT_YVYU 0x55595659 56b534f209Smrg#define PIXEL_FMT_NV12 0x3231564e 57b534f209Smrg#define PIXEL_FMT_NV21 0x3132564e 58b534f209Smrg 5915fb4814Smrg/* CMD Type Info */ 6015fb4814Smrg#define PKT_NULL_CMD 0x00009561 61b534f209Smrg#define PKT_BURST_CMD_HEADER0 0x00009564 6215fb4814Smrg 6315fb4814Smrg#define PKT_SINGLE_LENGTH 8 6415fb4814Smrg#define PKT_SINGLE_CMD_HEADER 0x00009562 6515fb4814Smrg 6615fb4814Smrgtypedef struct _PKT_SC 6715fb4814Smrg{ 6815fb4814Smrg ULONG PKT_SC_dwHeader; 6915fb4814Smrg ULONG PKT_SC_dwData[1]; 707fe5393cSmrg 7115fb4814Smrg} PKT_SC, *PPKT_SC; 7215fb4814Smrg 73b534f209Smrg/* Packet CMD Scale */ 74b534f209Smrg#define PKT_TYPESCALE_LENGTH 56 757fe5393cSmrg#define PKT_TYPESCALE_DATALENGTH (0xC<<16) 767fe5393cSmrg#define PKT_TYPESCALE_ADDRSTART 0x00000000 77b534f209Smrg 78b534f209Smrgtypedef struct _BURSTSCALECMD 79b534f209Smrg{ 80b534f209Smrg ULONG dwHeader0; 81b534f209Smrg ULONG dwSrcBaseAddr; /* 8000 */ 82b534f209Smrg union 83b534f209Smrg { 84b534f209Smrg struct 85b534f209Smrg { 86b534f209Smrg USHORT wSrcDummy; /* 8004 */ 87b534f209Smrg USHORT wSrcPitch; /* 8006 */ 88b534f209Smrg }; 89b534f209Smrg ULONG dwSrcPitch; /* 8004 */ 90b534f209Smrg }; 91b534f209Smrg ULONG dwDstBaseAddr; /* 8008 */ 92b534f209Smrg union 93b534f209Smrg { 94b534f209Smrg struct 95b534f209Smrg { 96b534f209Smrg USHORT wDstHeight; /* 800C */ 97b534f209Smrg USHORT wDstPitch; /* 800E */ 98b534f209Smrg }; 99b534f209Smrg ULONG dwDstHeightPitch; /* 800C */ 1007fe5393cSmrg }; 101b534f209Smrg union 102b534f209Smrg { 103b534f209Smrg struct 104b534f209Smrg { 105b534f209Smrg short wDstY; /* 8010 */ 106b534f209Smrg short wDstX; /* 8012 */ 107b534f209Smrg }; 108b534f209Smrg ULONG dwDstXY; /* 8010 */ 109b534f209Smrg }; 110b534f209Smrg union 111b534f209Smrg { 112b534f209Smrg struct 113b534f209Smrg { 114b534f209Smrg short wSrcY; /* 8014 */ 115b534f209Smrg short wSrcX; /* 8016 */ 116b534f209Smrg }; 117b534f209Smrg ULONG dwSrcXY; /* 8014 */ 1187fe5393cSmrg }; 119b534f209Smrg union 120b534f209Smrg { 121b534f209Smrg struct 122b534f209Smrg { 123b534f209Smrg USHORT wRecHeight; /* 8018 */ 124b534f209Smrg USHORT wRecWidth; /* 801A */ 125b534f209Smrg }; 126b534f209Smrg ULONG dwRecHeightWidth; /* 8018 */ 127b534f209Smrg }; 128b534f209Smrg ULONG dwInitScaleFactorH; /* 801C */ 129b534f209Smrg ULONG dwInitScaleFactorV; /* 8020 */ 130b534f209Smrg ULONG dwScaleFactorH; /* 8024 */ 131b534f209Smrg ULONG dwScaleFactorV; /* 8028 */ 132b534f209Smrg 133b534f209Smrg ULONG dwCmd; /* 823C */ 134b534f209Smrg ULONG NullData[1]; 1357fe5393cSmrg} BURSTSCALECMD, *PBURSTSCALECMD; 136b534f209Smrg 13715fb4814Smrg/* Eng Reg. Limitation */ 13815fb4814Smrg#define MAX_SRC_X 0x7FF 13915fb4814Smrg#define MAX_SRC_Y 0x7FF 14015fb4814Smrg#define MAX_DST_X 0x7FF 14115fb4814Smrg#define MAX_DST_Y 0x7FF 14215fb4814Smrg 143de78e416Smrg#define MASK_SRC_PITCH 0x1FFF 144de78e416Smrg#define MASK_DST_PITCH 0x1FFF 145de78e416Smrg#define MASK_DST_HEIGHT 0x7FF 146de78e416Smrg#define MASK_SRC_X 0xFFF 147de78e416Smrg#define MASK_SRC_Y 0xFFF 148de78e416Smrg#define MASK_DST_X 0xFFF 149de78e416Smrg#define MASK_DST_Y 0xFFF 150de78e416Smrg#define MASK_RECT_WIDTH 0x7FF 151de78e416Smrg#define MASK_RECT_HEIGHT 0x7FF 152de78e416Smrg#define MASK_CLIP 0xFFF 153de78e416Smrg 1547fe5393cSmrg#define MASK_LINE_X 0xFFF 155de78e416Smrg#define MASK_LINE_Y 0xFFF 1567fe5393cSmrg#define MASK_LINE_ERR 0x3FFFFF 1577fe5393cSmrg#define MASK_LINE_WIDTH 0x7FF 1587fe5393cSmrg#define MASK_LINE_K1 0x3FFFFF 159de78e416Smrg#define MASK_LINE_K2 0x3FFFFF 1607fe5393cSmrg#define MASK_AIPLINE_X 0xFFF 161b410ddbeSmrg#define MASK_AIPLINE_Y 0xFFF 16215fb4814Smrg 16315fb4814Smrg#define MAX_PATReg_Size 256 16415fb4814Smrg 1657fe5393cSmrg/* Eng Reg. Definition */ 16615fb4814Smrg/* MMIO Reg */ 1677fe5393cSmrg#define MMIOREG_SRC_BASE (pAST->MMIOVirtualAddr + 0x8000) 16815fb4814Smrg#define MMIOREG_SRC_PITCH (pAST->MMIOVirtualAddr + 0x8004) 16915fb4814Smrg#define MMIOREG_DST_BASE (pAST->MMIOVirtualAddr + 0x8008) 17015fb4814Smrg#define MMIOREG_DST_PITCH (pAST->MMIOVirtualAddr + 0x800C) 17115fb4814Smrg#define MMIOREG_DST_XY (pAST->MMIOVirtualAddr + 0x8010) 17215fb4814Smrg#define MMIOREG_SRC_XY (pAST->MMIOVirtualAddr + 0x8014) 17315fb4814Smrg#define MMIOREG_RECT_XY (pAST->MMIOVirtualAddr + 0x8018) 17415fb4814Smrg#define MMIOREG_FG (pAST->MMIOVirtualAddr + 0x801C) 17515fb4814Smrg#define MMIOREG_BG (pAST->MMIOVirtualAddr + 0x8020) 17615fb4814Smrg#define MMIOREG_FG_SRC (pAST->MMIOVirtualAddr + 0x8024) 17715fb4814Smrg#define MMIOREG_BG_SRC (pAST->MMIOVirtualAddr + 0x8028) 17815fb4814Smrg#define MMIOREG_MONO1 (pAST->MMIOVirtualAddr + 0x802C) 17915fb4814Smrg#define MMIOREG_MONO2 (pAST->MMIOVirtualAddr + 0x8030) 18015fb4814Smrg#define MMIOREG_CLIP1 (pAST->MMIOVirtualAddr + 0x8034) 18115fb4814Smrg#define MMIOREG_CLIP2 (pAST->MMIOVirtualAddr + 0x8038) 1827fe5393cSmrg#define MMIOREG_CMD (pAST->MMIOVirtualAddr + 0x803C) 1837fe5393cSmrg#define MMIOREG_PAT (pAST->MMIOVirtualAddr + 0x8100) 1847fe5393cSmrg 1857fe5393cSmrg#define MMIOREG_LINE_XY (pAST->MMIOVirtualAddr + 0x8010) 1867fe5393cSmrg#define MMIOREG_LINE_Err (pAST->MMIOVirtualAddr + 0x8014) 1877fe5393cSmrg#define MMIOREG_LINE_WIDTH (pAST->MMIOVirtualAddr + 0x8018) 1887fe5393cSmrg#define MMIOREG_LINE_K1 (pAST->MMIOVirtualAddr + 0x8024) 1897fe5393cSmrg#define MMIOREG_LINE_K2 (pAST->MMIOVirtualAddr + 0x8028) 1907fe5393cSmrg#define MMIOREG_LINE_STYLE1 (pAST->MMIOVirtualAddr + 0x802C) 1917fe5393cSmrg#define MMIOREG_LINE_STYLE2 (pAST->MMIOVirtualAddr + 0x8030) 192b410ddbeSmrg#define MMIOREG_LINE_XY2 (pAST->MMIOVirtualAddr + 0x8014) 1937fe5393cSmrg#define MMIOREG_LINE_NUMBER (pAST->MMIOVirtualAddr + 0x8018) 19415fb4814Smrg 19515fb4814Smrg/* CMDQ Reg */ 1967fe5393cSmrg#define CMDQREG_SRC_BASE (0x00 << 24) 19715fb4814Smrg#define CMDQREG_SRC_PITCH (0x01 << 24) 19815fb4814Smrg#define CMDQREG_DST_BASE (0x02 << 24) 19915fb4814Smrg#define CMDQREG_DST_PITCH (0x03 << 24) 20015fb4814Smrg#define CMDQREG_DST_XY (0x04 << 24) 20115fb4814Smrg#define CMDQREG_SRC_XY (0x05 << 24) 20215fb4814Smrg#define CMDQREG_RECT_XY (0x06 << 24) 20315fb4814Smrg#define CMDQREG_FG (0x07 << 24) 20415fb4814Smrg#define CMDQREG_BG (0x08 << 24) 20515fb4814Smrg#define CMDQREG_FG_SRC (0x09 << 24) 20615fb4814Smrg#define CMDQREG_BG_SRC (0x0A << 24) 20715fb4814Smrg#define CMDQREG_MONO1 (0x0B << 24) 20815fb4814Smrg#define CMDQREG_MONO2 (0x0C << 24) 20915fb4814Smrg#define CMDQREG_CLIP1 (0x0D << 24) 21015fb4814Smrg#define CMDQREG_CLIP2 (0x0E << 24) 21115fb4814Smrg#define CMDQREG_CMD (0x0F << 24) 21215fb4814Smrg#define CMDQREG_PAT (0x40 << 24) 21315fb4814Smrg 2147fe5393cSmrg#define CMDQREG_LINE_XY (0x04 << 24) 2157fe5393cSmrg#define CMDQREG_LINE_Err (0x05 << 24) 2167fe5393cSmrg#define CMDQREG_LINE_WIDTH (0x06 << 24) 2177fe5393cSmrg#define CMDQREG_LINE_K1 (0x09 << 24) 21815fb4814Smrg#define CMDQREG_LINE_K2 (0x0A << 24) 2197fe5393cSmrg#define CMDQREG_LINE_STYLE1 (0x0B << 24) 22015fb4814Smrg#define CMDQREG_LINE_STYLE2 (0x0C << 24) 221b410ddbeSmrg#define CMDQREG_LINE_XY2 (0x05 << 24) 2227fe5393cSmrg#define CMDQREG_LINE_NUMBER (0x06 << 24) 22315fb4814Smrg 22415fb4814Smrg/* CMD Reg. Definition */ 22515fb4814Smrg#define CMD_BITBLT 0x00000000 22615fb4814Smrg#define CMD_LINEDRAW 0x00000001 22715fb4814Smrg#define CMD_COLOREXP 0x00000002 22815fb4814Smrg#define CMD_ENHCOLOREXP 0x00000003 229b410ddbeSmrg#define CMD_TRANSPARENTBLT 0x00000004 230b534f209Smrg#define CMD_TYPE_SCALE 0x00000005 23115fb4814Smrg#define CMD_MASK 0x00000007 2327fe5393cSmrg 2337fe5393cSmrg#define CMD_DISABLE_CLIP 0x00000000 23415fb4814Smrg#define CMD_ENABLE_CLIP 0x00000008 23515fb4814Smrg 23615fb4814Smrg#define CMD_COLOR_08 0x00000000 23715fb4814Smrg#define CMD_COLOR_16 0x00000010 23815fb4814Smrg#define CMD_COLOR_32 0x00000020 23915fb4814Smrg 24015fb4814Smrg#define CMD_SRC_SIQ 0x00000040 24115fb4814Smrg 24215fb4814Smrg#define CMD_TRANSPARENT 0x00000080 24315fb4814Smrg 24415fb4814Smrg#define CMD_PAT_FGCOLOR 0x00000000 24515fb4814Smrg#define CMD_PAT_MONOMASK 0x00010000 24615fb4814Smrg#define CMD_PAT_PATREG 0x00020000 24715fb4814Smrg 24815fb4814Smrg#define CMD_OPAQUE 0x00000000 24915fb4814Smrg#define CMD_FONT_TRANSPARENT 0x00040000 25015fb4814Smrg 2517fe5393cSmrg#define CMD_X_INC 0x00000000 25215fb4814Smrg#define CMD_X_DEC 0x00200000 25315fb4814Smrg 2547fe5393cSmrg#define CMD_Y_INC 0x00000000 25515fb4814Smrg#define CMD_Y_DEC 0x00100000 25615fb4814Smrg 257b410ddbeSmrg#define CMD_NT_LINE 0x00000000 258b410ddbeSmrg#define CMD_NORMAL_LINE 0x00400000 259b410ddbeSmrg 26015fb4814Smrg#define CMD_DRAW_LAST_PIXEL 0x00000000 26115fb4814Smrg#define CMD_NOT_DRAW_LAST_PIXEL 0x00800000 26215fb4814Smrg 26315fb4814Smrg#define CMD_DISABLE_LINE_STYLE 0x00000000 26415fb4814Smrg#define CMD_ENABLE_LINE_STYLE 0x40000000 26515fb4814Smrg 26615fb4814Smrg#define CMD_RESET_STYLE_COUNTER 0x80000000 26715fb4814Smrg#define CMD_NOT_RESET_STYLE_COUNTER 0x00000000 26815fb4814Smrg 26915fb4814Smrg#define BURST_FORCE_CMD 0x80000000 27015fb4814Smrg 271b534f209Smrg#define YUV_FORMAT_YUYV (0UL<<12) 272b534f209Smrg#define YUV_FORMAT_YVYU (1UL<<12) 273b534f209Smrg#define YUV_FORMAT_UYVY (2UL<<12) 274b534f209Smrg#define YUV_FORMAT_VYUY (3UL<<12) 275b534f209Smrg 276b534f209Smrg#define SCALE_FORMAT_RGB2RGB (0UL<<14) 277b534f209Smrg#define SCALE_FORMAT_YUV2RGB (1UL<<14) 278b534f209Smrg#define SCALE_FORMAT_RGB2RGB_DOWN (2UL<<14) /* RGB32 to RGB16 */ 279b534f209Smrg#define SCALE_FORMAT_RGB2RGB_UP (3UL<<14) /* RGB16 to RGB32 */ 280b534f209Smrg#define SCALE_SEG_NUM_1 (0x3FUL<<24) /* DstWi >= SrcWi */ 281b534f209Smrg#define SCALE_SEG_NUM_2 (0x1FUL<<24) /* DstWi < SrcWi */ 282b534f209Smrg#define SCALE_EQUAL_VER (0x1UL<<23) 283b534f209Smrg 28415fb4814Smrg/* Line */ 28515fb4814Smrg#define LINEPARAM_XM 0x00000001 28615fb4814Smrg#define LINEPARAM_X_DEC 0x00000002 28715fb4814Smrg#define LINEPARAM_Y_DEC 0x00000004 28815fb4814Smrg 28915fb4814Smrgtypedef struct _LINEPARAM { 29015fb4814Smrg USHORT dsLineX; 29115fb4814Smrg USHORT dsLineY; 29215fb4814Smrg USHORT dsLineWidth; 29315fb4814Smrg ULONG dwErrorTerm; 29415fb4814Smrg ULONG dwK1Term; 29515fb4814Smrg ULONG dwK2Term; 2967fe5393cSmrg ULONG dwLineAttributes; 29715fb4814Smrg} LINEPARAM, *PLINEPARAM; 29815fb4814Smrg 29915fb4814Smrgtypedef struct { 3007fe5393cSmrg 301de78e416Smrg LONG X1; 302de78e416Smrg LONG Y1; 303de78e416Smrg LONG X2; 3047fe5393cSmrg LONG Y2; 3057fe5393cSmrg 30615fb4814Smrg} _LINEInfo; 30715fb4814Smrg 30815fb4814Smrg/* Macro */ 30915fb4814Smrg/* MMIO 2D Macro */ 31015fb4814Smrg#define ASTSetupSRCBase_MMIO(base) \ 31115fb4814Smrg { \ 31215fb4814Smrg do { \ 31315fb4814Smrg *(ULONG *)(MMIOREG_SRC_BASE) = (ULONG) (base); \ 314de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_SRC_BASE) != (ULONG) (base)); \ 31515fb4814Smrg } 31615fb4814Smrg#define ASTSetupSRCPitch_MMIO(pitch) \ 31715fb4814Smrg { \ 31815fb4814Smrg do { \ 31915fb4814Smrg *(ULONG *)(MMIOREG_SRC_PITCH) = (ULONG)(pitch << 16); \ 320de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_SRC_PITCH) != (ULONG)(pitch << 16)); \ 32115fb4814Smrg } 32215fb4814Smrg#define ASTSetupDSTBase_MMIO(base) \ 32315fb4814Smrg { \ 32415fb4814Smrg do { \ 32515fb4814Smrg *(ULONG *)(MMIOREG_DST_BASE) = (ULONG)(base); \ 326de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_DST_BASE) != (ULONG)(base)); \ 3277fe5393cSmrg } 32815fb4814Smrg#define ASTSetupDSTPitchHeight_MMIO(pitch, height) \ 32915fb4814Smrg { \ 33015fb4814Smrg ULONG dstpitch; \ 331de78e416Smrg dstpitch = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT)); \ 33215fb4814Smrg do { \ 33315fb4814Smrg *(ULONG *)(MMIOREG_DST_PITCH) = dstpitch; \ 334de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_DST_PITCH) != dstpitch); \ 3357fe5393cSmrg } 33615fb4814Smrg#define ASTSetupDSTXY_MMIO(x, y) \ 33715fb4814Smrg { \ 33815fb4814Smrg ULONG dstxy; \ 339de78e416Smrg dstxy = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y)); \ 34015fb4814Smrg do { \ 34115fb4814Smrg *(ULONG *)(MMIOREG_DST_XY) = dstxy; \ 342de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_DST_XY) != dstxy); \ 3437fe5393cSmrg } 34415fb4814Smrg#define ASTSetupSRCXY_MMIO(x, y) \ 34515fb4814Smrg { \ 34615fb4814Smrg ULONG srcxy; \ 347de78e416Smrg srcxy = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y)); \ 34815fb4814Smrg do { \ 34915fb4814Smrg *(ULONG *)(MMIOREG_SRC_XY) = srcxy; \ 350de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_SRC_XY) != srcxy); \ 3517fe5393cSmrg } 35215fb4814Smrg#define ASTSetupRECTXY_MMIO(x, y) \ 35315fb4814Smrg { \ 35415fb4814Smrg ULONG rectxy; \ 355de78e416Smrg rectxy = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH)); \ 35615fb4814Smrg do { \ 35715fb4814Smrg *(ULONG *)(MMIOREG_RECT_XY) = rectxy; \ 358de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_RECT_XY) != rectxy); \ 3597fe5393cSmrg } 36015fb4814Smrg#define ASTSetupFG_MMIO(color) \ 36115fb4814Smrg { \ 36215fb4814Smrg do { \ 36315fb4814Smrg *(ULONG *)(MMIOREG_FG) = (ULONG)(color); \ 364de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_FG) != (ULONG)(color)); \ 3657fe5393cSmrg } 36615fb4814Smrg#define ASTSetupBG_MMIO(color) \ 36715fb4814Smrg { \ 36815fb4814Smrg do { \ 36915fb4814Smrg *(ULONG *)(MMIOREG_BG) = (ULONG)(color); \ 370de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_BG) != (ULONG)(color)); \ 37115fb4814Smrg } 37215fb4814Smrg#define ASTSetupMONO1_MMIO(pat) \ 37315fb4814Smrg { \ 37415fb4814Smrg do { \ 37515fb4814Smrg *(ULONG *)(MMIOREG_MONO1) = (ULONG)(pat); \ 376de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_MONO1) != (ULONG)(pat)); \ 3777fe5393cSmrg } 37815fb4814Smrg#define ASTSetupMONO2_MMIO(pat) \ 37915fb4814Smrg { \ 38015fb4814Smrg do { \ 38115fb4814Smrg *(ULONG *)(MMIOREG_MONO2) = (ULONG)(pat); \ 382de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_MONO2) != (ULONG)(pat)); \ 38315fb4814Smrg } 38415fb4814Smrg#define ASTSetupCLIP1_MMIO(left, top) \ 38515fb4814Smrg { \ 38615fb4814Smrg ULONG clip1; \ 387de78e416Smrg clip1 = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP)); \ 38815fb4814Smrg do { \ 38915fb4814Smrg *(ULONG *)(MMIOREG_CLIP1) = clip1; \ 390de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_CLIP1) != clip1); \ 3917fe5393cSmrg } 39215fb4814Smrg#define ASTSetupCLIP2_MMIO(right, bottom) \ 39315fb4814Smrg { \ 39415fb4814Smrg ULONG clip2; \ 395de78e416Smrg clip2 = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP)); \ 39615fb4814Smrg do { \ 39715fb4814Smrg *(ULONG *)(MMIOREG_CLIP2) = clip2; \ 398de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_CLIP2) != clip2); \ 3997fe5393cSmrg } 40015fb4814Smrg#define ASTSetupCMDReg_MMIO(reg) \ 40115fb4814Smrg { \ 40215fb4814Smrg *(ULONG *)(MMIOREG_CMD) = (ULONG)(reg); \ 40315fb4814Smrg } 40415fb4814Smrg#define ASTSetupPatReg_MMIO(patreg, pat) \ 40515fb4814Smrg { \ 40615fb4814Smrg do { \ 40715fb4814Smrg *(ULONG *)(MMIOREG_PAT + patreg*4) = (ULONG)(pat); \ 408de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_PAT + patreg*4) != (ULONG)(pat)); \ 4097fe5393cSmrg } 4107fe5393cSmrg 41115fb4814Smrg/* Line CMD */ 41215fb4814Smrg#define ASTSetupLineXY_MMIO(x, y) \ 41315fb4814Smrg { \ 41415fb4814Smrg ULONG linexy; \ 415de78e416Smrg linexy = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y)); \ 41615fb4814Smrg do { \ 41715fb4814Smrg *(ULONG *)(MMIOREG_LINE_XY) = linexy; \ 418de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \ 41915fb4814Smrg } 42015fb4814Smrg#define ASTSetupLineXMErrTerm_MMIO(xm, err) \ 42115fb4814Smrg { \ 42215fb4814Smrg ULONG lineerr; \ 423de78e416Smrg lineerr = (ULONG)((xm << 24) + (err & MASK_LINE_ERR)); \ 42415fb4814Smrg do { \ 42515fb4814Smrg *(ULONG *)(MMIOREG_LINE_Err) = lineerr; \ 426de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_LINE_Err) != lineerr); \ 4277fe5393cSmrg } 42815fb4814Smrg#define ASTSetupLineWidth_MMIO(width) \ 42915fb4814Smrg { \ 43015fb4814Smrg ULONG linewidth; \ 431de78e416Smrg linewidth = (ULONG)((width & MASK_LINE_WIDTH) << 16); \ 43215fb4814Smrg do { \ 43315fb4814Smrg *(ULONG *)(MMIOREG_LINE_WIDTH) = linewidth; \ 434de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_LINE_WIDTH) != linewidth); \ 43515fb4814Smrg } 43615fb4814Smrg#define ASTSetupLineK1Term_MMIO(err) \ 43715fb4814Smrg { \ 43815fb4814Smrg do { \ 439de78e416Smrg *(ULONG *)(MMIOREG_LINE_K1) = (ULONG)(err & MASK_LINE_K1); \ 440de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_LINE_K1) != (ULONG)(err & MASK_LINE_K1)); \ 4417fe5393cSmrg } 44215fb4814Smrg#define ASTSetupLineK2Term_MMIO(err) \ 44315fb4814Smrg { \ 44415fb4814Smrg do { \ 445de78e416Smrg *(ULONG *)(MMIOREG_LINE_K2) = (ULONG)(err & MASK_LINE_K2); \ 446de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_LINE_K2) != (ULONG)(err & MASK_LINE_K2)); \ 44715fb4814Smrg } 44815fb4814Smrg#define ASTSetupLineStyle1_MMIO(pat) \ 44915fb4814Smrg { \ 45015fb4814Smrg do { \ 45115fb4814Smrg *(ULONG *)(MMIOREG_LINE_STYLE1) = (ULONG)(pat); \ 452de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE1) != (ULONG)(pat)); \ 4537fe5393cSmrg } 45415fb4814Smrg#define ASTSetupLineStyle2_MMIO(pat) \ 45515fb4814Smrg { \ 45615fb4814Smrg do { \ 45715fb4814Smrg *(ULONG *)(MMIOREG_LINE_STYLE2) = (ULONG)(pat); \ 458de78e416Smrg } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE2) != (ULONG)(pat)); \ 4597fe5393cSmrg } 460b410ddbeSmrg 461b410ddbeSmrg/* AIP Line CMD */ 462b410ddbeSmrg#define AIPSetupLineXY_MMIO(x, y) \ 463b410ddbeSmrg { \ 464b410ddbeSmrg ULONG linexy; \ 465b410ddbeSmrg linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 466b410ddbeSmrg do { \ 467b410ddbeSmrg *(ULONG *)(MMIOREG_LINE_XY) = linexy; \ 468b410ddbeSmrg } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \ 469b410ddbeSmrg } 470b410ddbeSmrg#define AIPSetupLineXY2_MMIO(x, y) \ 471b410ddbeSmrg { \ 472b410ddbeSmrg ULONG linexy; \ 473b410ddbeSmrg linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 474b410ddbeSmrg do { \ 475b410ddbeSmrg *(ULONG *)(MMIOREG_LINE_XY2) = linexy; \ 476b410ddbeSmrg } while (*(volatile ULONG *)(MMIOREG_LINE_XY2) != linexy); \ 477b410ddbeSmrg } 478b410ddbeSmrg#define AIPSetupLineNumber_MMIO(no) \ 479b410ddbeSmrg { \ 480b410ddbeSmrg do { \ 481b410ddbeSmrg *(ULONG *)(MMIOREG_LINE_NUMBER) = (ULONG) no; \ 482b410ddbeSmrg } while (*(volatile ULONG *)(MMIOREG_LINE_NUMBER) != (ULONG) no); \ 483b410ddbeSmrg } 4847fe5393cSmrg 4857fe5393cSmrg/* CMDQ Mode Macro */ 48615fb4814Smrg#define mUpdateWritePointer *(ULONG *) (pAST->CMDQInfo.pjWritePort) = (pAST->CMDQInfo.ulWritePointer >>3) 48715fb4814Smrg 48815fb4814Smrg/* General CMD */ 48915fb4814Smrg#define ASTSetupSRCBase(addr, base) \ 49015fb4814Smrg { \ 49115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_BASE); \ 49215fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(base); \ 49315fb4814Smrg } 49415fb4814Smrg#define ASTSetupSRCPitch(addr, pitch) \ 49515fb4814Smrg { \ 49615fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_PITCH); \ 49715fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(pitch << 16); \ 49815fb4814Smrg } 49915fb4814Smrg#define ASTSetupDSTBase(addr, base) \ 50015fb4814Smrg { \ 50115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_BASE); \ 50215fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(base); \ 5037fe5393cSmrg } 50415fb4814Smrg#define ASTSetupDSTPitchHeight(addr, pitch, height) \ 50515fb4814Smrg { \ 50615fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_PITCH); \ 507de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT)); \ 5087fe5393cSmrg } 50915fb4814Smrg#define ASTSetupDSTXY(addr, x, y) \ 51015fb4814Smrg { \ 51115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_XY); \ 512de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y)); \ 5137fe5393cSmrg } 51415fb4814Smrg#define ASTSetupSRCXY(addr, x, y) \ 51515fb4814Smrg { \ 51615fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_XY); \ 517de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y)); \ 5187fe5393cSmrg } 51915fb4814Smrg#define ASTSetupRECTXY(addr, x, y) \ 52015fb4814Smrg { \ 52115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_RECT_XY); \ 522de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH)); \ 5237fe5393cSmrg } 52415fb4814Smrg#define ASTSetupFG(addr, color) \ 52515fb4814Smrg { \ 52615fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_FG); \ 52715fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(color); \ 52815fb4814Smrg } 52915fb4814Smrg#define ASTSetupBG(addr, color) \ 53015fb4814Smrg { \ 53115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_BG); \ 53215fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(color); \ 53315fb4814Smrg } 53415fb4814Smrg#define ASTSetupMONO1(addr, pat) \ 53515fb4814Smrg { \ 53615fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO1); \ 53715fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 5387fe5393cSmrg } 53915fb4814Smrg#define ASTSetupMONO2(addr, pat) \ 54015fb4814Smrg { \ 54115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO2); \ 54215fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 5437fe5393cSmrg } 54415fb4814Smrg#define ASTSetupCLIP1(addr, left, top) \ 54515fb4814Smrg { \ 54615fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP1); \ 547de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP)); \ 5487fe5393cSmrg } 54915fb4814Smrg#define ASTSetupCLIP2(addr, right, bottom) \ 55015fb4814Smrg { \ 55115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP2); \ 552de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP)); \ 5537fe5393cSmrg } 55415fb4814Smrg#define ASTSetupCMDReg(addr, reg) \ 55515fb4814Smrg { \ 55615fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CMD); \ 55715fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(reg); \ 55815fb4814Smrg } 55915fb4814Smrg#define ASTSetupPatReg(addr, patreg, pat) \ 56015fb4814Smrg { \ 56115fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + (CMDQREG_PAT + (patreg << 24))); \ 56215fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 5637fe5393cSmrg } 56415fb4814Smrg 56515fb4814Smrg/* Line CMD */ 56615fb4814Smrg#define ASTSetupLineXY(addr, x, y) \ 56715fb4814Smrg { \ 56815fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); \ 569de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y)); \ 57015fb4814Smrg } 57115fb4814Smrg#define ASTSetupLineXMErrTerm(addr, xm, err) \ 57215fb4814Smrg { \ 57315fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_Err); \ 574de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)((xm << 24) + (err & MASK_LINE_ERR)); \ 5757fe5393cSmrg } 57615fb4814Smrg#define ASTSetupLineWidth(addr, width) \ 57715fb4814Smrg { \ 57815fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_WIDTH); \ 579de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)((width & MASK_LINE_WIDTH) << 16); \ 5807fe5393cSmrg } 58115fb4814Smrg#define ASTSetupLineK1Term(addr, err) \ 58215fb4814Smrg { \ 58315fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K1); \ 584de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K1); \ 5857fe5393cSmrg } 58615fb4814Smrg#define ASTSetupLineK2Term(addr, err) \ 58715fb4814Smrg { \ 58815fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K2); \ 589de78e416Smrg addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K2); \ 5907fe5393cSmrg } 59115fb4814Smrg#define ASTSetupLineStyle1(addr, pat) \ 59215fb4814Smrg { \ 59315fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE1); \ 59415fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 5957fe5393cSmrg } 59615fb4814Smrg#define ASTSetupLineStyle2(addr, pat) \ 59715fb4814Smrg { \ 59815fb4814Smrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE2); \ 59915fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 6007fe5393cSmrg } 60115fb4814Smrg 60215fb4814Smrg#define ASTSetupNULLCMD(addr) \ 60315fb4814Smrg { \ 60415fb4814Smrg addr->PKT_SC_dwHeader = (ULONG) (PKT_NULL_CMD); \ 60515fb4814Smrg addr->PKT_SC_dwData[0] = (ULONG) 0; \ 60615fb4814Smrg } 607b410ddbeSmrg 608b410ddbeSmrg/* AIP Line CMD */ 609b410ddbeSmrg#define AIPSetupLineXY(addr, x, y) \ 610b410ddbeSmrg { \ 611b410ddbeSmrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); \ 612b410ddbeSmrg addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 613b410ddbeSmrg } 614b410ddbeSmrg#define AIPSetupLineXY2(addr, x, y) \ 615b410ddbeSmrg { \ 616b410ddbeSmrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY2); \ 617b410ddbeSmrg addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 618b410ddbeSmrg } 619b410ddbeSmrg#define AIPSetupLineNumber(addr, no) \ 620b410ddbeSmrg { \ 621b410ddbeSmrg addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_NUMBER); \ 622b410ddbeSmrg addr->PKT_SC_dwData[0] = (ULONG)(no); \ 623b410ddbeSmrg } 624cf503b78Smrg 625cf503b78SmrgBool bASTGetLineTerm(_LINEInfo *LineInfo, LINEPARAM *dsLineParam); 626