radeon_output.c revision 0974d292
1209ff23fSmrg/* 2209ff23fSmrg * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3209ff23fSmrg * VA Linux Systems Inc., Fremont, California. 4209ff23fSmrg * 5209ff23fSmrg * All Rights Reserved. 6209ff23fSmrg * 7209ff23fSmrg * Permission is hereby granted, free of charge, to any person obtaining 8209ff23fSmrg * a copy of this software and associated documentation files (the 9209ff23fSmrg * "Software"), to deal in the Software without restriction, including 10209ff23fSmrg * without limitation on the rights to use, copy, modify, merge, 11209ff23fSmrg * publish, distribute, sublicense, and/or sell copies of the Software, 12209ff23fSmrg * and to permit persons to whom the Software is furnished to do so, 13209ff23fSmrg * subject to the following conditions: 14209ff23fSmrg * 15209ff23fSmrg * The above copyright notice and this permission notice (including the 16209ff23fSmrg * next paragraph) shall be included in all copies or substantial 17209ff23fSmrg * portions of the Software. 18209ff23fSmrg * 19209ff23fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20209ff23fSmrg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21209ff23fSmrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 22209ff23fSmrg * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR 23209ff23fSmrg * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 24209ff23fSmrg * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 25209ff23fSmrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 26209ff23fSmrg * DEALINGS IN THE SOFTWARE. 27209ff23fSmrg */ 28209ff23fSmrg 29209ff23fSmrg#ifdef HAVE_CONFIG_H 30209ff23fSmrg#include "config.h" 31209ff23fSmrg#endif 32209ff23fSmrg 33209ff23fSmrg#include <string.h> 34209ff23fSmrg#include <stdio.h> 35ad43ddacSmrg#include <fcntl.h> 36209ff23fSmrg 37209ff23fSmrg/* X and server generic header files */ 38209ff23fSmrg#include "xf86.h" 39209ff23fSmrg#include "xf86_OSproc.h" 40209ff23fSmrg#include "vgaHW.h" 41209ff23fSmrg#include "xf86Modes.h" 42209ff23fSmrg 43209ff23fSmrg/* Driver data structures */ 44209ff23fSmrg#include "radeon.h" 45209ff23fSmrg#include "radeon_reg.h" 46209ff23fSmrg#include "radeon_macros.h" 47209ff23fSmrg#include "radeon_probe.h" 48209ff23fSmrg#include "radeon_version.h" 49209ff23fSmrg#include "radeon_tv.h" 50209ff23fSmrg#include "radeon_atombios.h" 51209ff23fSmrg 52b7e1c893Smrgconst char *encoder_name[34] = { 53b7e1c893Smrg "NONE", 54b7e1c893Smrg "INTERNAL_LVDS", 55b7e1c893Smrg "INTERNAL_TMDS1", 56b7e1c893Smrg "INTERNAL_TMDS2", 57b7e1c893Smrg "INTERNAL_DAC1", 58b7e1c893Smrg "INTERNAL_DAC2", 59b7e1c893Smrg "INTERNAL_SDVOA", 60b7e1c893Smrg "INTERNAL_SDVOB", 61b7e1c893Smrg "SI170B", 62b7e1c893Smrg "CH7303", 63b7e1c893Smrg "CH7301", 64b7e1c893Smrg "INTERNAL_DVO1", 65b7e1c893Smrg "EXTERNAL_SDVOA", 66b7e1c893Smrg "EXTERNAL_SDVOB", 67b7e1c893Smrg "TITFP513", 68b7e1c893Smrg "INTERNAL_LVTM1", 69b7e1c893Smrg "VT1623", 70b7e1c893Smrg "HDMI_SI1930", 71b7e1c893Smrg "HDMI_INTERNAL", 72b7e1c893Smrg "INTERNAL_KLDSCP_TMDS1", 73b7e1c893Smrg "INTERNAL_KLDSCP_DVO1", 74b7e1c893Smrg "INTERNAL_KLDSCP_DAC1", 75b7e1c893Smrg "INTERNAL_KLDSCP_DAC2", 76b7e1c893Smrg "SI178", 77b7e1c893Smrg "MVPU_FPGA", 78b7e1c893Smrg "INTERNAL_DDI", 79b7e1c893Smrg "VT1625", 80b7e1c893Smrg "HDMI_SI1932", 81b7e1c893Smrg "DP_AN9801", 82b7e1c893Smrg "DP_DP501", 83b7e1c893Smrg "INTERNAL_UNIPHY", 84b7e1c893Smrg "INTERNAL_KLDSCP_LVTMA", 85b7e1c893Smrg "INTERNAL_UNIPHY1", 86b7e1c893Smrg "INTERNAL_UNIPHY2", 87209ff23fSmrg}; 88209ff23fSmrg 89ad43ddacSmrgconst char *ConnectorTypeName[18] = { 90209ff23fSmrg "None", 91209ff23fSmrg "VGA", 92209ff23fSmrg "DVI-I", 93209ff23fSmrg "DVI-D", 94209ff23fSmrg "DVI-A", 95b7e1c893Smrg "S-video", 96b7e1c893Smrg "Composite", 97209ff23fSmrg "LVDS", 98209ff23fSmrg "Digital", 99209ff23fSmrg "SCART", 100209ff23fSmrg "HDMI-A", 101209ff23fSmrg "HDMI-B", 102209ff23fSmrg "Unsupported", 103209ff23fSmrg "Unsupported", 104209ff23fSmrg "DIN", 105209ff23fSmrg "DisplayPort", 106ad43ddacSmrg "eDP", 107209ff23fSmrg "Unsupported" 108209ff23fSmrg}; 109209ff23fSmrg 110209ff23fSmrgextern void atombios_output_mode_set(xf86OutputPtr output, 111209ff23fSmrg DisplayModePtr mode, 112209ff23fSmrg DisplayModePtr adjusted_mode); 113209ff23fSmrgextern void atombios_output_dpms(xf86OutputPtr output, int mode); 114b7e1c893Smrgextern RADEONMonitorType atombios_dac_detect(xf86OutputPtr output); 115b7e1c893Smrgextern AtomBiosResult 116b7e1c893Smrgatombios_lock_crtc(atomBiosHandlePtr atomBIOS, int crtc, int lock); 117209ff23fSmrgstatic void 118209ff23fSmrgradeon_bios_output_dpms(xf86OutputPtr output, int mode); 119209ff23fSmrgstatic void 120209ff23fSmrgradeon_bios_output_crtc(xf86OutputPtr output); 121209ff23fSmrgstatic void 122209ff23fSmrgradeon_bios_output_lock(xf86OutputPtr output, Bool lock); 123209ff23fSmrg 124209ff23fSmrgvoid RADEONPrintPortMap(ScrnInfoPtr pScrn) 125209ff23fSmrg{ 126b7e1c893Smrg RADEONInfoPtr info = RADEONPTR(pScrn); 127209ff23fSmrg xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); 128209ff23fSmrg RADEONOutputPrivatePtr radeon_output; 129209ff23fSmrg xf86OutputPtr output; 130209ff23fSmrg int o; 131209ff23fSmrg 132209ff23fSmrg for (o = 0; o < xf86_config->num_output; o++) { 133209ff23fSmrg output = xf86_config->output[o]; 134209ff23fSmrg radeon_output = output->driver_private; 135209ff23fSmrg 136b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Port%d:\n", o); 137b7e1c893Smrg ErrorF(" XRANDR name: %s\n", output->name); 138b7e1c893Smrg ErrorF(" Connector: %s\n", ConnectorTypeName[radeon_output->ConnectorType]); 139b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) 140b7e1c893Smrg ErrorF(" CRT1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CRT1_INDEX]->encoder_id]); 141b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) 142b7e1c893Smrg ErrorF(" CRT2: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CRT2_INDEX]->encoder_id]); 143b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) 144b7e1c893Smrg ErrorF(" LCD1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_LCD1_INDEX]->encoder_id]); 145b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) 146b7e1c893Smrg ErrorF(" DFP1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP1_INDEX]->encoder_id]); 147b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) 148b7e1c893Smrg ErrorF(" DFP2: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP2_INDEX]->encoder_id]); 149b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) 150b7e1c893Smrg ErrorF(" DFP3: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP3_INDEX]->encoder_id]); 151b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) 152b7e1c893Smrg ErrorF(" DFP4: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP4_INDEX]->encoder_id]); 153b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) 154b7e1c893Smrg ErrorF(" DFP5: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP5_INDEX]->encoder_id]); 155b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) 156b7e1c893Smrg ErrorF(" TV1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_TV1_INDEX]->encoder_id]); 157b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) 158ad43ddacSmrg ErrorF(" CV: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CV_INDEX]->encoder_id]); 159b7e1c893Smrg ErrorF(" DDC reg: 0x%x\n",(unsigned int)radeon_output->ddc_i2c.mask_clk_reg); 160209ff23fSmrg } 161209ff23fSmrg 162209ff23fSmrg} 163209ff23fSmrg 164b7e1c893Smrgstatic void 165b7e1c893Smrgradeon_set_active_device(xf86OutputPtr output) 166209ff23fSmrg{ 167209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 168209ff23fSmrg 169b7e1c893Smrg radeon_output->active_device = 0; 170b7e1c893Smrg 171b7e1c893Smrg switch (radeon_output->MonType) { 172b7e1c893Smrg case MT_DP: 173b7e1c893Smrg case MT_DFP: 174b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) 175b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP1_SUPPORT; 176b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) 177b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP2_SUPPORT; 178b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) 179b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP3_SUPPORT; 180b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) 181b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP4_SUPPORT; 182b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) 183b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP5_SUPPORT; 184ad43ddacSmrg else if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) 185ad43ddacSmrg radeon_output->active_device = ATOM_DEVICE_LCD1_SUPPORT; 186ad43ddacSmrg else if (radeon_output->devices & ATOM_DEVICE_LCD2_SUPPORT) 187ad43ddacSmrg radeon_output->active_device = ATOM_DEVICE_LCD2_SUPPORT; 188b7e1c893Smrg break; 189b7e1c893Smrg case MT_CRT: 190b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) 191b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_CRT1_SUPPORT; 192b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) 193b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_CRT2_SUPPORT; 194b7e1c893Smrg break; 195b7e1c893Smrg case MT_LCD: 196b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) 197b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_LCD1_SUPPORT; 198b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_LCD2_SUPPORT) 199b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_LCD2_SUPPORT; 200b7e1c893Smrg break; 201b7e1c893Smrg case MT_STV: 202b7e1c893Smrg case MT_CTV: 203b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) 204b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_TV1_SUPPORT; 205b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_TV2_SUPPORT) 206b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_TV2_SUPPORT; 207b7e1c893Smrg break; 208b7e1c893Smrg case MT_CV: 209b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) 210b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_CV_SUPPORT; 211b7e1c893Smrg break; 212b7e1c893Smrg default: 213b7e1c893Smrg ErrorF("Unhandled monitor type %d\n", radeon_output->MonType); 214b7e1c893Smrg radeon_output->active_device = 0; 215209ff23fSmrg } 216209ff23fSmrg} 217209ff23fSmrg 218ad43ddacSmrgstatic Bool 219ad43ddacSmrgmonitor_is_digital(xf86MonPtr MonInfo) 220ad43ddacSmrg{ 221ad43ddacSmrg return (MonInfo->rawData[0x14] & 0x80) != 0; 222ad43ddacSmrg} 223ad43ddacSmrg 224ad43ddacSmrgstatic void 225ad43ddacSmrgRADEONGetHardCodedEDIDFromFile(xf86OutputPtr output) 226ad43ddacSmrg{ 227ad43ddacSmrg ScrnInfoPtr pScrn = output->scrn; 228ad43ddacSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 229ad43ddacSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 230ad43ddacSmrg char *EDIDlist = (char *)xf86GetOptValString(info->Options, OPTION_CUSTOM_EDID); 231ad43ddacSmrg 232ad43ddacSmrg radeon_output->custom_edid = FALSE; 233ad43ddacSmrg radeon_output->custom_mon = NULL; 234ad43ddacSmrg 235ad43ddacSmrg if (EDIDlist != NULL) { 236ad43ddacSmrg unsigned char* edid = xnfcalloc(128, 1); 237ad43ddacSmrg char *name = output->name; 238ad43ddacSmrg char *outputEDID = strstr(EDIDlist, name); 239ad43ddacSmrg 240ad43ddacSmrg if (outputEDID != NULL) { 241ad43ddacSmrg char *end; 242ad43ddacSmrg char *colon; 243ad43ddacSmrg char *command = NULL; 244ad43ddacSmrg int fd; 245ad43ddacSmrg 246ad43ddacSmrg outputEDID += strlen(name) + 1; 247ad43ddacSmrg end = strstr(outputEDID, ";"); 248ad43ddacSmrg if (end != NULL) 249ad43ddacSmrg *end = 0; 250ad43ddacSmrg 251ad43ddacSmrg colon = strstr(outputEDID, ":"); 252ad43ddacSmrg if (colon != NULL) { 253ad43ddacSmrg *colon = 0; 254ad43ddacSmrg command = colon + 1; 255ad43ddacSmrg } 256ad43ddacSmrg 257ad43ddacSmrg fd = open (outputEDID, O_RDONLY); 258ad43ddacSmrg if (fd >= 0) { 259ad43ddacSmrg read(fd, edid, 128); 260ad43ddacSmrg close(fd); 261ad43ddacSmrg if (edid[1] == 0xff) { 262ad43ddacSmrg radeon_output->custom_mon = xf86InterpretEDID(output->scrn->scrnIndex, edid); 263ad43ddacSmrg radeon_output->custom_edid = TRUE; 264ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 265ad43ddacSmrg "Successfully read Custom EDID data for output %s from %s.\n", 266ad43ddacSmrg name, outputEDID); 267ad43ddacSmrg if (command != NULL) { 268ad43ddacSmrg if (!strcmp(command, "digital")) { 269ad43ddacSmrg radeon_output->custom_mon->rawData[0x14] |= 0x80; 270ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 271ad43ddacSmrg "Forcing digital output for output %s.\n", name); 272ad43ddacSmrg } else if (!strcmp(command, "analog")) { 273ad43ddacSmrg radeon_output->custom_mon->rawData[0x14] &= ~0x80; 274ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 275ad43ddacSmrg "Forcing analog output for output %s.\n", name); 276ad43ddacSmrg } else { 277ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 278ad43ddacSmrg "Unknown custom EDID command: '%s'.\n", 279ad43ddacSmrg command); 280ad43ddacSmrg } 281ad43ddacSmrg } 282ad43ddacSmrg } else { 283ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 284ad43ddacSmrg "Custom EDID data for %s read from %s was invalid.\n", 285ad43ddacSmrg name, outputEDID); 286ad43ddacSmrg } 287ad43ddacSmrg } else { 288ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 289ad43ddacSmrg "Could not read custom EDID for output %s from file %s.\n", 290ad43ddacSmrg name, outputEDID); 291ad43ddacSmrg } 292ad43ddacSmrg } else { 293ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 294ad43ddacSmrg "Could not find EDID file name for output %s; using auto detection.\n", 295ad43ddacSmrg name); 296ad43ddacSmrg } 297ad43ddacSmrg } 298ad43ddacSmrg} 299ad43ddacSmrg 300ad43ddacSmrg 301209ff23fSmrgstatic RADEONMonitorType 302209ff23fSmrgradeon_ddc_connected(xf86OutputPtr output) 303209ff23fSmrg{ 304209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 305209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 306209ff23fSmrg RADEONMonitorType MonType = MT_NONE; 307209ff23fSmrg xf86MonPtr MonInfo = NULL; 308209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 309ad43ddacSmrg int ret; 310ad43ddacSmrg 311ad43ddacSmrg if (radeon_output->custom_edid) { 312ad43ddacSmrg MonInfo = xnfcalloc(sizeof(xf86Monitor), 1); 313ad43ddacSmrg *MonInfo = *radeon_output->custom_mon; 314ad43ddacSmrg } else if ((radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) || 315ad43ddacSmrg (radeon_output->ConnectorType == CONNECTOR_EDP)) { 316ad43ddacSmrg ret = RADEON_DP_GetSinkType(output); 317ad43ddacSmrg if (ret == CONNECTOR_OBJECT_ID_DISPLAYPORT || 318ad43ddacSmrg ret == CONNECTOR_OBJECT_ID_eDP) { 319ad43ddacSmrg MonInfo = xf86OutputGetEDID(output, radeon_output->dp_pI2CBus); 320ad43ddacSmrg } 321ad43ddacSmrg if (MonInfo == NULL) { 322ad43ddacSmrg if (radeon_output->pI2CBus) { 323ad43ddacSmrg RADEONI2CDoLock(output, radeon_output->pI2CBus, TRUE); 324ad43ddacSmrg MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus); 325ad43ddacSmrg RADEONI2CDoLock(output, radeon_output->pI2CBus, FALSE); 326ad43ddacSmrg } 327ad43ddacSmrg } 328ad43ddacSmrg } else if (radeon_output->pI2CBus) { 329c503f109Smrg if (info->get_hardcoded_edid_from_bios) 330b7e1c893Smrg MonInfo = RADEONGetHardCodedEDIDFromBIOS(output); 331c503f109Smrg if (MonInfo == NULL) { 332c503f109Smrg RADEONI2CDoLock(output, radeon_output->pI2CBus, TRUE); 333b7e1c893Smrg MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus); 334c503f109Smrg RADEONI2CDoLock(output, radeon_output->pI2CBus, FALSE); 335b7e1c893Smrg } 336b7e1c893Smrg } 337209ff23fSmrg if (MonInfo) { 338b7e1c893Smrg switch (radeon_output->ConnectorType) { 339b7e1c893Smrg case CONNECTOR_LVDS: 340209ff23fSmrg MonType = MT_LCD; 341b7e1c893Smrg break; 342b7e1c893Smrg case CONNECTOR_DVI_D: 343b7e1c893Smrg case CONNECTOR_HDMI_TYPE_A: 344b7e1c893Smrg if (radeon_output->shared_ddc) { 345ad43ddacSmrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 346ad43ddacSmrg int i; 347ad43ddacSmrg 348ad43ddacSmrg if (monitor_is_digital(MonInfo)) 349b7e1c893Smrg MonType = MT_DFP; 350b7e1c893Smrg else 351b7e1c893Smrg MonType = MT_NONE; 352ad43ddacSmrg 353ad43ddacSmrg for (i = 0; i < config->num_output; i++) { 354ad43ddacSmrg if (output != config->output[i]) { 355ad43ddacSmrg RADEONOutputPrivatePtr other_radeon_output = 356ad43ddacSmrg config->output[i]->driver_private; 357ad43ddacSmrg if (radeon_output->devices & other_radeon_output->devices) { 358ad43ddacSmrg#ifndef EDID_COMPLETE_RAWDATA 359ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) { 360ad43ddacSmrg MonType = MT_NONE; 361ad43ddacSmrg break; 362ad43ddacSmrg } 363ad43ddacSmrg#else 364ad43ddacSmrg if (xf86MonitorIsHDMI(MonInfo)) { 365ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_DVI_D) { 366ad43ddacSmrg MonType = MT_NONE; 367ad43ddacSmrg break; 368ad43ddacSmrg } 369ad43ddacSmrg } else { 370ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) { 371ad43ddacSmrg MonType = MT_NONE; 372ad43ddacSmrg break; 373ad43ddacSmrg } 374ad43ddacSmrg } 375ad43ddacSmrg#endif 376ad43ddacSmrg } 377ad43ddacSmrg } 378ad43ddacSmrg } 379b7e1c893Smrg } else 380b7e1c893Smrg MonType = MT_DFP; 381b7e1c893Smrg break; 382b7e1c893Smrg case CONNECTOR_DISPLAY_PORT: 383ad43ddacSmrg case CONNECTOR_EDP: 384b7e1c893Smrg /* 385b7e1c893Smrg * XXX wrong. need to infer based on whether we got DDC from I2C 386b7e1c893Smrg * or AUXCH. 387b7e1c893Smrg */ 388ad43ddacSmrg ret = RADEON_DP_GetSinkType(output); 389ad43ddacSmrg 390ad43ddacSmrg if ((ret == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 391ad43ddacSmrg (ret == CONNECTOR_OBJECT_ID_eDP)) { 392ad43ddacSmrg MonType = MT_DP; 393ad43ddacSmrg RADEON_DP_GetDPCD(output); 394ad43ddacSmrg } else 395ad43ddacSmrg MonType = MT_DFP; 396ad43ddacSmrg break; 397ad43ddacSmrg case CONNECTOR_HDMI_TYPE_B: 398b7e1c893Smrg case CONNECTOR_DVI_I: 399ad43ddacSmrg if (monitor_is_digital(MonInfo)) 400b7e1c893Smrg MonType = MT_DFP; 401b7e1c893Smrg else 402b7e1c893Smrg MonType = MT_CRT; 403b7e1c893Smrg break; 404b7e1c893Smrg case CONNECTOR_VGA: 405b7e1c893Smrg case CONNECTOR_DVI_A: 406b7e1c893Smrg default: 407b7e1c893Smrg if (radeon_output->shared_ddc) { 408ad43ddacSmrg if (monitor_is_digital(MonInfo)) 409b7e1c893Smrg MonType = MT_NONE; 410b7e1c893Smrg else 411b7e1c893Smrg MonType = MT_CRT; 412b7e1c893Smrg } else 413b7e1c893Smrg MonType = MT_CRT; 414b7e1c893Smrg break; 415b7e1c893Smrg } 416b7e1c893Smrg 417ad43ddacSmrg if (MonType != MT_NONE) { 418b7e1c893Smrg if (!xf86ReturnOptValBool(info->Options, OPTION_IGNORE_EDID, FALSE)) 419b7e1c893Smrg xf86OutputSetEDID(output, MonInfo); 420ad43ddacSmrg } else 4212f39173dSmrg free(MonInfo); 422209ff23fSmrg } else 423209ff23fSmrg MonType = MT_NONE; 424b7e1c893Smrg 425209ff23fSmrg return MonType; 426209ff23fSmrg} 427209ff23fSmrg 428209ff23fSmrg#ifndef __powerpc__ 429209ff23fSmrg 430209ff23fSmrgstatic RADEONMonitorType 431209ff23fSmrgRADEONDetectLidStatus(ScrnInfoPtr pScrn) 432209ff23fSmrg{ 433209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 434209ff23fSmrg RADEONMonitorType MonType = MT_NONE; 435209ff23fSmrg#ifdef __linux__ 436209ff23fSmrg char lidline[50]; /* 50 should be sufficient for our purposes */ 437209ff23fSmrg FILE *f = fopen ("/proc/acpi/button/lid/LID/state", "r"); 438209ff23fSmrg 439209ff23fSmrg if (f != NULL) { 440209ff23fSmrg while (fgets(lidline, sizeof lidline, f)) { 441209ff23fSmrg if (!strncmp(lidline, "state:", strlen ("state:"))) { 442209ff23fSmrg if (strstr(lidline, "open")) { 443209ff23fSmrg fclose(f); 444209ff23fSmrg ErrorF("proc lid open\n"); 445209ff23fSmrg return MT_LCD; 446209ff23fSmrg } 447209ff23fSmrg else if (strstr(lidline, "closed")) { 448209ff23fSmrg fclose(f); 449209ff23fSmrg ErrorF("proc lid closed\n"); 450209ff23fSmrg return MT_NONE; 451209ff23fSmrg } 452209ff23fSmrg } 453209ff23fSmrg } 454209ff23fSmrg fclose(f); 455209ff23fSmrg } 456209ff23fSmrg#endif 457209ff23fSmrg 458209ff23fSmrg if (!info->IsAtomBios) { 459209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 460209ff23fSmrg 461209ff23fSmrg /* see if the lid is closed -- only works at boot */ 462209ff23fSmrg if (INREG(RADEON_BIOS_6_SCRATCH) & 0x10) 463209ff23fSmrg MonType = MT_NONE; 464209ff23fSmrg else 465209ff23fSmrg MonType = MT_LCD; 466209ff23fSmrg } else 467209ff23fSmrg MonType = MT_LCD; 468209ff23fSmrg 469209ff23fSmrg return MonType; 470209ff23fSmrg} 471209ff23fSmrg 472209ff23fSmrg#endif /* __powerpc__ */ 473209ff23fSmrg 474209ff23fSmrgstatic void 475209ff23fSmrgradeon_dpms(xf86OutputPtr output, int mode) 476209ff23fSmrg{ 477209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 478209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 479209ff23fSmrg 480209ff23fSmrg if ((mode == DPMSModeOn) && radeon_output->enabled) 481209ff23fSmrg return; 482209ff23fSmrg 483ad43ddacSmrg if ((mode != DPMSModeOn) && radeon_output->shared_ddc) { 484ad43ddacSmrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 485ad43ddacSmrg int i; 486ad43ddacSmrg 487ad43ddacSmrg for (i = 0; i < config->num_output; i++) { 488ad43ddacSmrg if (output != config->output[i]) { 489ad43ddacSmrg RADEONOutputPrivatePtr other_radeon_output = 490ad43ddacSmrg config->output[i]->driver_private; 491ad43ddacSmrg if (radeon_output->devices & other_radeon_output->devices) { 492ad43ddacSmrg if (output->status == XF86OutputStatusDisconnected) 493ad43ddacSmrg return; 494ad43ddacSmrg } 495ad43ddacSmrg } 496ad43ddacSmrg } 497ad43ddacSmrg } 498ad43ddacSmrg 499b7e1c893Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) { 500209ff23fSmrg atombios_output_dpms(output, mode); 501209ff23fSmrg } else { 502209ff23fSmrg legacy_output_dpms(output, mode); 503209ff23fSmrg } 504209ff23fSmrg radeon_bios_output_dpms(output, mode); 505209ff23fSmrg 506209ff23fSmrg if (mode == DPMSModeOn) 507209ff23fSmrg radeon_output->enabled = TRUE; 508209ff23fSmrg else 509209ff23fSmrg radeon_output->enabled = FALSE; 510209ff23fSmrg 511209ff23fSmrg} 512209ff23fSmrg 513209ff23fSmrgstatic void 514209ff23fSmrgradeon_save(xf86OutputPtr output) 515209ff23fSmrg{ 516209ff23fSmrg 517209ff23fSmrg} 518209ff23fSmrg 519209ff23fSmrgstatic void 520209ff23fSmrgradeon_restore(xf86OutputPtr restore) 521209ff23fSmrg{ 522209ff23fSmrg 523209ff23fSmrg} 524209ff23fSmrg 525209ff23fSmrgstatic int 526209ff23fSmrgradeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode) 527209ff23fSmrg{ 528209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 529b7e1c893Smrg radeon_native_mode_ptr native_mode = &radeon_output->native_mode; 530209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 531209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 532209ff23fSmrg RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); 533209ff23fSmrg 534209ff23fSmrg /* 535209ff23fSmrg * RN50 has effective maximum mode bandwidth of about 300MiB/s. 536209ff23fSmrg * XXX should really do this for all chips by properly computing 537209ff23fSmrg * memory bandwidth and an overhead factor. 538209ff23fSmrg */ 539209ff23fSmrg if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) { 540209ff23fSmrg if (xf86ModeBandwidth(pMode, pScrn->bitsPerPixel) > 300) 541209ff23fSmrg return MODE_BANDWIDTH; 542209ff23fSmrg } 543209ff23fSmrg 544b7e1c893Smrg if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT)) { 545b7e1c893Smrg if (IS_AVIVO_VARIANT) 546b7e1c893Smrg return MODE_OK; 547b7e1c893Smrg else { 548b7e1c893Smrg /* FIXME: Update when more modes are added */ 549209ff23fSmrg if (pMode->HDisplay == 800 && pMode->VDisplay == 600) 550209ff23fSmrg return MODE_OK; 551209ff23fSmrg else 552209ff23fSmrg return MODE_CLOCK_RANGE; 553209ff23fSmrg } 554209ff23fSmrg } 555209ff23fSmrg 556ad43ddacSmrg /* clocks over 135 MHz have heat issues with DVI on RV100 */ 557ad43ddacSmrg if ((radeon_output->MonType == MT_DFP) && 558ad43ddacSmrg (info->ChipFamily == CHIP_FAMILY_RV100) && 559ad43ddacSmrg (pMode->Clock > 135000)) 560ad43ddacSmrg return MODE_CLOCK_HIGH; 561ad43ddacSmrg 562b7e1c893Smrg /* single link DVI check */ 563b7e1c893Smrg if (pMode->Clock > 165000 && radeon_output->MonType == MT_DFP) { 564b7e1c893Smrg /* DP->DVI converter */ 565b7e1c893Smrg if (radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) 566b7e1c893Smrg return MODE_CLOCK_HIGH; 567b7e1c893Smrg 568ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_EDP) 569ad43ddacSmrg return MODE_CLOCK_HIGH; 570ad43ddacSmrg 571b7e1c893Smrg /* XXX some HDMI can do better than 165MHz on a link */ 572b7e1c893Smrg if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) 573b7e1c893Smrg return MODE_CLOCK_HIGH; 574b7e1c893Smrg 575b7e1c893Smrg /* XXX some R300 and R400 can actually do this */ 576b7e1c893Smrg if (!IS_AVIVO_VARIANT) 577b7e1c893Smrg return MODE_CLOCK_HIGH; 578b7e1c893Smrg 579b7e1c893Smrg /* XXX and some AVIVO can't */ 580b7e1c893Smrg } 581b7e1c893Smrg 582b7e1c893Smrg if (radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT)) { 583209ff23fSmrg if (radeon_output->rmx_type == RMX_OFF) { 584b7e1c893Smrg if (pMode->HDisplay != native_mode->PanelXRes || 585b7e1c893Smrg pMode->VDisplay != native_mode->PanelYRes) 586209ff23fSmrg return MODE_PANEL; 587209ff23fSmrg } 588b7e1c893Smrg if (pMode->HDisplay > native_mode->PanelXRes || 589b7e1c893Smrg pMode->VDisplay > native_mode->PanelYRes) 590209ff23fSmrg return MODE_PANEL; 591209ff23fSmrg } 592209ff23fSmrg 593209ff23fSmrg return MODE_OK; 594209ff23fSmrg} 595209ff23fSmrg 596209ff23fSmrgstatic Bool 597209ff23fSmrgradeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode, 598209ff23fSmrg DisplayModePtr adjusted_mode) 599209ff23fSmrg{ 600209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 601209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 602b7e1c893Smrg radeon_native_mode_ptr native_mode = &radeon_output->native_mode; 603ad43ddacSmrg xf86CrtcPtr crtc = output->crtc; 604ad43ddacSmrg RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; 605209ff23fSmrg 606209ff23fSmrg radeon_output->Flags &= ~RADEON_USE_RMX; 607ad43ddacSmrg radeon_crtc->scaler_enabled = FALSE; 608209ff23fSmrg 609b7e1c893Smrg /* 610b7e1c893Smrg * Refresh the Crtc values without INTERLACE_HALVE_V 611b7e1c893Smrg * Should we use output->scrn->adjustFlags like xf86RandRModeConvert() does? 612b7e1c893Smrg */ 613b7e1c893Smrg xf86SetModeCrtc(adjusted_mode, 0); 614b7e1c893Smrg 615209ff23fSmrg /* decide if we are using RMX */ 616b7e1c893Smrg if ((radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) 617209ff23fSmrg && radeon_output->rmx_type != RMX_OFF) { 618209ff23fSmrg 619209ff23fSmrg if (IS_AVIVO_VARIANT || radeon_crtc->crtc_id == 0) { 620b7e1c893Smrg if (mode->HDisplay < native_mode->PanelXRes || 621b7e1c893Smrg mode->VDisplay < native_mode->PanelYRes) { 622209ff23fSmrg radeon_output->Flags |= RADEON_USE_RMX; 623ad43ddacSmrg radeon_crtc->scaler_enabled = TRUE; 624209ff23fSmrg if (IS_AVIVO_VARIANT) { 625ad43ddacSmrg radeon_crtc->hsc = (float)mode->HDisplay / (float)native_mode->PanelXRes; 626ad43ddacSmrg radeon_crtc->vsc = (float)mode->VDisplay / (float)native_mode->PanelYRes; 627209ff23fSmrg /* set to the panel's native mode */ 628b7e1c893Smrg adjusted_mode->HDisplay = native_mode->PanelXRes; 629b7e1c893Smrg adjusted_mode->VDisplay = native_mode->PanelYRes; 630b7e1c893Smrg adjusted_mode->HTotal = native_mode->PanelXRes + native_mode->HBlank; 631b7e1c893Smrg adjusted_mode->HSyncStart = native_mode->PanelXRes + native_mode->HOverPlus; 632b7e1c893Smrg adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + native_mode->HSyncWidth; 633b7e1c893Smrg adjusted_mode->VTotal = native_mode->PanelYRes + native_mode->VBlank; 634b7e1c893Smrg adjusted_mode->VSyncStart = native_mode->PanelYRes + native_mode->VOverPlus; 635b7e1c893Smrg adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + native_mode->VSyncWidth; 636209ff23fSmrg /* update crtc values */ 637209ff23fSmrg xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V); 638209ff23fSmrg /* adjust crtc values */ 639b7e1c893Smrg adjusted_mode->CrtcHDisplay = native_mode->PanelXRes; 640b7e1c893Smrg adjusted_mode->CrtcVDisplay = native_mode->PanelYRes; 641b7e1c893Smrg adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + native_mode->HBlank; 642b7e1c893Smrg adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + native_mode->HOverPlus; 643b7e1c893Smrg adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + native_mode->HSyncWidth; 644b7e1c893Smrg adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + native_mode->VBlank; 645b7e1c893Smrg adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + native_mode->VOverPlus; 646b7e1c893Smrg adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + native_mode->VSyncWidth; 647209ff23fSmrg } else { 648209ff23fSmrg /* set to the panel's native mode */ 649b7e1c893Smrg adjusted_mode->HTotal = native_mode->PanelXRes + native_mode->HBlank; 650b7e1c893Smrg adjusted_mode->HSyncStart = native_mode->PanelXRes + native_mode->HOverPlus; 651b7e1c893Smrg adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + native_mode->HSyncWidth; 652b7e1c893Smrg adjusted_mode->VTotal = native_mode->PanelYRes + native_mode->VBlank; 653b7e1c893Smrg adjusted_mode->VSyncStart = native_mode->PanelYRes + native_mode->VOverPlus; 654b7e1c893Smrg adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + native_mode->VSyncWidth; 655b7e1c893Smrg adjusted_mode->Clock = native_mode->DotClock; 656209ff23fSmrg /* update crtc values */ 657209ff23fSmrg xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V); 658209ff23fSmrg /* adjust crtc values */ 659b7e1c893Smrg adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + native_mode->HBlank; 660b7e1c893Smrg adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + native_mode->HOverPlus; 661b7e1c893Smrg adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + native_mode->HSyncWidth; 662b7e1c893Smrg adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + native_mode->VBlank; 663b7e1c893Smrg adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + native_mode->VOverPlus; 664b7e1c893Smrg adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + native_mode->VSyncWidth; 665209ff23fSmrg } 666b7e1c893Smrg adjusted_mode->Clock = native_mode->DotClock; 667b7e1c893Smrg adjusted_mode->Flags = native_mode->Flags; 668209ff23fSmrg } 669209ff23fSmrg } 670209ff23fSmrg } 671209ff23fSmrg 672ad43ddacSmrg /* FIXME: vsc/hsc */ 673ad43ddacSmrg if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) { 674ad43ddacSmrg radeon_crtc->scaler_enabled = TRUE; 675ad43ddacSmrg radeon_crtc->hsc = (float)mode->HDisplay / (float)640; 676ad43ddacSmrg radeon_crtc->vsc = (float)mode->VDisplay / (float)480; 677ad43ddacSmrg } 678ad43ddacSmrg 679b7e1c893Smrg if (IS_AVIVO_VARIANT) { 680b7e1c893Smrg /* hw bug */ 681b7e1c893Smrg if ((mode->Flags & V_INTERLACE) 682b7e1c893Smrg && (adjusted_mode->CrtcVSyncStart < (adjusted_mode->CrtcVDisplay + 2))) 683b7e1c893Smrg adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + 2; 684b7e1c893Smrg } 685b7e1c893Smrg 686ad43ddacSmrg if (IS_AVIVO_VARIANT || info->r4xx_atom) { 687ad43ddacSmrg if (radeon_output->MonType == MT_STV || radeon_output->MonType == MT_CTV) { 688ad43ddacSmrg radeon_tvout_ptr tvout = &radeon_output->tvout; 689ad43ddacSmrg ScrnInfoPtr pScrn = output->scrn; 690ad43ddacSmrg 691ad43ddacSmrg if (tvout->tvStd == TV_STD_NTSC || 692ad43ddacSmrg tvout->tvStd == TV_STD_NTSC_J || 693ad43ddacSmrg tvout->tvStd == TV_STD_PAL_M) 694ad43ddacSmrg RADEONATOMGetTVTimings(pScrn, 0, adjusted_mode); 695ad43ddacSmrg else 696ad43ddacSmrg RADEONATOMGetTVTimings(pScrn, 1, adjusted_mode); 697ad43ddacSmrg } 698ad43ddacSmrg } 699ad43ddacSmrg 700ad43ddacSmrg if (((radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) || 701ad43ddacSmrg (radeon_output->ConnectorType == CONNECTOR_EDP)) && 702ad43ddacSmrg (radeon_output->MonType == MT_DP)) { 703ad43ddacSmrg radeon_dp_mode_fixup(output, mode, adjusted_mode); 704ad43ddacSmrg } 705209ff23fSmrg return TRUE; 706209ff23fSmrg} 707209ff23fSmrg 708209ff23fSmrgstatic void 709209ff23fSmrgradeon_mode_prepare(xf86OutputPtr output) 710209ff23fSmrg{ 711c503f109Smrg RADEONInfoPtr info = RADEONPTR(output->scrn); 712c503f109Smrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 713c503f109Smrg int o; 714c503f109Smrg 715c503f109Smrg for (o = 0; o < config->num_output; o++) { 716c503f109Smrg xf86OutputPtr loop_output = config->output[o]; 717c503f109Smrg if (loop_output == output) 718c503f109Smrg continue; 719c503f109Smrg else if (loop_output->crtc) { 720c503f109Smrg xf86CrtcPtr other_crtc = loop_output->crtc; 721c503f109Smrg RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private; 722c503f109Smrg if (other_crtc->enabled) { 723c503f109Smrg if (other_radeon_crtc->initialized) { 724c503f109Smrg radeon_crtc_dpms(other_crtc, DPMSModeOff); 725c503f109Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) 726c503f109Smrg atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 1); 727c503f109Smrg radeon_dpms(loop_output, DPMSModeOff); 728c503f109Smrg } 729c503f109Smrg } 730c503f109Smrg } 731c503f109Smrg } 732c503f109Smrg 733209ff23fSmrg radeon_bios_output_lock(output, TRUE); 734209ff23fSmrg radeon_dpms(output, DPMSModeOff); 735c503f109Smrg radeon_crtc_dpms(output->crtc, DPMSModeOff); 736c503f109Smrg 7370974d292Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) 7380974d292Smrg atombios_set_output_crtc_source(output); 7390974d292Smrg 740209ff23fSmrg} 741209ff23fSmrg 742209ff23fSmrgstatic void 743209ff23fSmrgradeon_mode_set(xf86OutputPtr output, DisplayModePtr mode, 744209ff23fSmrg DisplayModePtr adjusted_mode) 745209ff23fSmrg{ 746209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 747209ff23fSmrg 748b7e1c893Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) 749209ff23fSmrg atombios_output_mode_set(output, mode, adjusted_mode); 750209ff23fSmrg else 751209ff23fSmrg legacy_output_mode_set(output, mode, adjusted_mode); 752209ff23fSmrg radeon_bios_output_crtc(output); 753209ff23fSmrg 754209ff23fSmrg} 755209ff23fSmrg 756209ff23fSmrgstatic void 757209ff23fSmrgradeon_mode_commit(xf86OutputPtr output) 758209ff23fSmrg{ 759c503f109Smrg RADEONInfoPtr info = RADEONPTR(output->scrn); 760c503f109Smrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 761c503f109Smrg int o; 762c503f109Smrg 763c503f109Smrg for (o = 0; o < config->num_output; o++) { 764c503f109Smrg xf86OutputPtr loop_output = config->output[o]; 765c503f109Smrg if (loop_output == output) 766c503f109Smrg continue; 767c503f109Smrg else if (loop_output->crtc) { 768c503f109Smrg xf86CrtcPtr other_crtc = loop_output->crtc; 769c503f109Smrg RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private; 770c503f109Smrg if (other_crtc->enabled) { 771c503f109Smrg if (other_radeon_crtc->initialized) { 772c503f109Smrg radeon_crtc_dpms(other_crtc, DPMSModeOn); 773c503f109Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) 774c503f109Smrg atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 0); 775c503f109Smrg radeon_dpms(loop_output, DPMSModeOn); 776c503f109Smrg } 777c503f109Smrg } 778c503f109Smrg } 779c503f109Smrg } 780c503f109Smrg 781209ff23fSmrg radeon_dpms(output, DPMSModeOn); 782c503f109Smrg radeon_crtc_dpms(output->crtc, DPMSModeOn); 783209ff23fSmrg radeon_bios_output_lock(output, FALSE); 784209ff23fSmrg} 785209ff23fSmrg 786209ff23fSmrgstatic void 787209ff23fSmrgradeon_bios_output_lock(xf86OutputPtr output, Bool lock) 788209ff23fSmrg{ 789209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 790209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 791209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 792209ff23fSmrg RADEONSavePtr save = info->ModeReg; 793209ff23fSmrg 794209ff23fSmrg if (info->IsAtomBios) { 795209ff23fSmrg if (lock) { 796209ff23fSmrg save->bios_6_scratch |= ATOM_S6_CRITICAL_STATE; 797209ff23fSmrg } else { 798209ff23fSmrg save->bios_6_scratch &= ~ATOM_S6_CRITICAL_STATE; 799209ff23fSmrg } 800209ff23fSmrg } else { 801209ff23fSmrg if (lock) { 802209ff23fSmrg save->bios_6_scratch |= RADEON_DRIVER_CRITICAL; 803209ff23fSmrg } else { 804209ff23fSmrg save->bios_6_scratch &= ~RADEON_DRIVER_CRITICAL; 805209ff23fSmrg } 806209ff23fSmrg } 807209ff23fSmrg if (info->ChipFamily >= CHIP_FAMILY_R600) 808209ff23fSmrg OUTREG(R600_BIOS_6_SCRATCH, save->bios_6_scratch); 809209ff23fSmrg else 810209ff23fSmrg OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); 811209ff23fSmrg} 812209ff23fSmrg 813209ff23fSmrgstatic void 814209ff23fSmrgradeon_bios_output_dpms(xf86OutputPtr output, int mode) 815209ff23fSmrg{ 816209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 817209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 818209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 819209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 820209ff23fSmrg RADEONSavePtr save = info->ModeReg; 821209ff23fSmrg 822209ff23fSmrg if (info->IsAtomBios) { 823b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 824b7e1c893Smrg if (mode == DPMSModeOn) 825b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE; 826b7e1c893Smrg else 827b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE; 828b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) { 829b7e1c893Smrg if (mode == DPMSModeOn) 830b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE; 831b7e1c893Smrg else 832b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_CV_DPMS_STATE; 833b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 834b7e1c893Smrg if (mode == DPMSModeOn) 835b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE; 836b7e1c893Smrg else 837b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE; 838b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 839b7e1c893Smrg if (mode == DPMSModeOn) 840b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE; 841b7e1c893Smrg else 842b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE; 843b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 844b7e1c893Smrg if (mode == DPMSModeOn) 845b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE; 846b7e1c893Smrg else 847b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE; 848b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 849b7e1c893Smrg if (mode == DPMSModeOn) 850b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE; 851b7e1c893Smrg else 852b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE; 853b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 854b7e1c893Smrg if (mode == DPMSModeOn) 855b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE; 856b7e1c893Smrg else 857b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE; 858b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) { 859b7e1c893Smrg if (mode == DPMSModeOn) 860b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE; 861b7e1c893Smrg else 862b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE; 863b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP4_SUPPORT) { 864b7e1c893Smrg if (mode == DPMSModeOn) 865b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP4_DPMS_STATE; 866b7e1c893Smrg else 867b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP4_DPMS_STATE; 868b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP5_SUPPORT) { 869b7e1c893Smrg if (mode == DPMSModeOn) 870b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP5_DPMS_STATE; 871b7e1c893Smrg else 872b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP5_DPMS_STATE; 873209ff23fSmrg } 874b7e1c893Smrg if (info->ChipFamily >= CHIP_FAMILY_R600) 875209ff23fSmrg OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch); 876b7e1c893Smrg else 877209ff23fSmrg OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch); 878209ff23fSmrg } else { 879209ff23fSmrg if (mode == DPMSModeOn) { 880209ff23fSmrg save->bios_6_scratch &= ~(RADEON_DPMS_MASK | RADEON_SCREEN_BLANKING); 881209ff23fSmrg save->bios_6_scratch |= RADEON_DPMS_ON; 882209ff23fSmrg } else { 883209ff23fSmrg save->bios_6_scratch &= ~RADEON_DPMS_MASK; 884209ff23fSmrg save->bios_6_scratch |= (RADEON_DPMS_OFF | RADEON_SCREEN_BLANKING); 885b7e1c893Smrg } 886b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 887b7e1c893Smrg if (mode == DPMSModeOn) 888b7e1c893Smrg save->bios_6_scratch |= RADEON_TV_DPMS_ON; 889b7e1c893Smrg else 890209ff23fSmrg save->bios_6_scratch &= ~RADEON_TV_DPMS_ON; 891b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 892b7e1c893Smrg if (mode == DPMSModeOn) 893b7e1c893Smrg save->bios_6_scratch |= RADEON_CRT_DPMS_ON; 894b7e1c893Smrg else 895209ff23fSmrg save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON; 896b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 897b7e1c893Smrg if (mode == DPMSModeOn) 898b7e1c893Smrg save->bios_6_scratch |= RADEON_CRT_DPMS_ON; 899b7e1c893Smrg else 900b7e1c893Smrg save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON; 901b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 902b7e1c893Smrg if (mode == DPMSModeOn) 903b7e1c893Smrg save->bios_6_scratch |= RADEON_LCD_DPMS_ON; 904b7e1c893Smrg else 905209ff23fSmrg save->bios_6_scratch &= ~RADEON_LCD_DPMS_ON; 906b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 907b7e1c893Smrg if (mode == DPMSModeOn) 908b7e1c893Smrg save->bios_6_scratch |= RADEON_DFP_DPMS_ON; 909b7e1c893Smrg else 910b7e1c893Smrg save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON; 911b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 912b7e1c893Smrg if (mode == DPMSModeOn) 913b7e1c893Smrg save->bios_6_scratch |= RADEON_DFP_DPMS_ON; 914b7e1c893Smrg else 915209ff23fSmrg save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON; 916209ff23fSmrg } 917209ff23fSmrg OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); 918209ff23fSmrg } 919209ff23fSmrg} 920209ff23fSmrg 921209ff23fSmrgstatic void 922209ff23fSmrgradeon_bios_output_crtc(xf86OutputPtr output) 923209ff23fSmrg{ 924209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 925209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 926209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 927209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 928209ff23fSmrg RADEONSavePtr save = info->ModeReg; 929209ff23fSmrg xf86CrtcPtr crtc = output->crtc; 930209ff23fSmrg RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; 931209ff23fSmrg 932ad43ddacSmrg /* no need to update crtc routing scratch regs on DCE4 */ 933ad43ddacSmrg if (IS_DCE4_VARIANT) 934ad43ddacSmrg return; 935ad43ddacSmrg 936209ff23fSmrg if (info->IsAtomBios) { 937b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 938b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_TV1_CRTC_ACTIVE; 939b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 18); 940b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) { 941b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE; 942b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 24); 943b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 944b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE; 945b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 16); 946b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 947b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE; 948b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 20); 949b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 950b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE; 951b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 17); 952b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 953b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE; 954b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 19); 955b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 956b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE; 957b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 23); 958b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) { 959b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE; 960b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 25); 961209ff23fSmrg } 962209ff23fSmrg if (info->ChipFamily >= CHIP_FAMILY_R600) 963209ff23fSmrg OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); 964209ff23fSmrg else 965209ff23fSmrg OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); 966209ff23fSmrg } else { 967b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 968209ff23fSmrg save->bios_5_scratch &= ~RADEON_TV1_CRTC_MASK; 969209ff23fSmrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_TV1_CRTC_SHIFT); 970b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 971b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT1_CRTC_MASK; 972b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT1_CRTC_SHIFT); 973b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 974b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT2_CRTC_MASK; 975b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT2_CRTC_SHIFT); 976b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 977209ff23fSmrg save->bios_5_scratch &= ~RADEON_LCD1_CRTC_MASK; 978209ff23fSmrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_LCD1_CRTC_SHIFT); 979b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 980b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP1_CRTC_MASK; 981b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP1_CRTC_SHIFT); 982b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 983b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP2_CRTC_MASK; 984b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP2_CRTC_SHIFT); 985209ff23fSmrg } 986209ff23fSmrg OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); 987209ff23fSmrg } 988209ff23fSmrg} 989209ff23fSmrg 990209ff23fSmrgstatic void 991209ff23fSmrgradeon_bios_output_connected(xf86OutputPtr output, Bool connected) 992209ff23fSmrg{ 993209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 994209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 995209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 996209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 997209ff23fSmrg RADEONSavePtr save = info->ModeReg; 998209ff23fSmrg 999209ff23fSmrg if (info->IsAtomBios) { 1000b7e1c893Smrg switch (radeon_output->active_device) { 1001b7e1c893Smrg case ATOM_DEVICE_TV1_SUPPORT: 1002b7e1c893Smrg if (connected) 1003b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_TV1_ACTIVE; 1004b7e1c893Smrg else { 1005b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_TV1_MASK; 1006b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; 1007209ff23fSmrg } 1008b7e1c893Smrg break; 1009b7e1c893Smrg case ATOM_DEVICE_CV_SUPPORT: 1010b7e1c893Smrg if (connected) 1011b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_CV_ACTIVE; 1012b7e1c893Smrg else { 1013b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_CV_MASK; 1014b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; 1015b7e1c893Smrg } 1016b7e1c893Smrg break; 1017b7e1c893Smrg case ATOM_DEVICE_LCD1_SUPPORT: 1018b7e1c893Smrg if (connected) { 1019b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_LCD1; 1020b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; 1021b7e1c893Smrg } else { 1022b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_LCD1; 1023b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; 1024b7e1c893Smrg } 1025b7e1c893Smrg break; 1026b7e1c893Smrg case ATOM_DEVICE_CRT1_SUPPORT: 1027b7e1c893Smrg if (connected) { 1028b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_CRT1_COLOR; 1029b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; 1030b7e1c893Smrg } else { 1031b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_CRT1_MASK; 1032b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; 1033b7e1c893Smrg } 1034b7e1c893Smrg break; 1035b7e1c893Smrg case ATOM_DEVICE_CRT2_SUPPORT: 1036b7e1c893Smrg if (connected) { 1037b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_CRT2_COLOR; 1038b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; 1039b7e1c893Smrg } else { 1040b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_CRT2_MASK; 1041b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; 1042b7e1c893Smrg } 1043b7e1c893Smrg break; 1044b7e1c893Smrg case ATOM_DEVICE_DFP1_SUPPORT: 1045b7e1c893Smrg if (connected) { 1046b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP1; 1047b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; 1048b7e1c893Smrg } else { 1049b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP1; 1050b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; 1051209ff23fSmrg } 1052b7e1c893Smrg break; 1053b7e1c893Smrg case ATOM_DEVICE_DFP2_SUPPORT: 1054b7e1c893Smrg if (connected) { 1055b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP2; 1056b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; 1057b7e1c893Smrg } else { 1058b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP2; 1059b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; 1060209ff23fSmrg } 1061b7e1c893Smrg break; 1062b7e1c893Smrg case ATOM_DEVICE_DFP3_SUPPORT: 1063b7e1c893Smrg if (connected) { 1064b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP3; 1065b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; 1066b7e1c893Smrg } else { 1067b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP3; 1068b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; 1069209ff23fSmrg } 1070b7e1c893Smrg break; 1071b7e1c893Smrg case ATOM_DEVICE_DFP4_SUPPORT: 1072b7e1c893Smrg if (connected) { 1073b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP4; 1074b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP4_ACTIVE; 1075b7e1c893Smrg } else { 1076b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP4; 1077b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE; 1078209ff23fSmrg } 1079b7e1c893Smrg break; 1080b7e1c893Smrg case ATOM_DEVICE_DFP5_SUPPORT: 1081b7e1c893Smrg if (connected) { 1082b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP5; 1083b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP5_ACTIVE; 1084b7e1c893Smrg } else { 1085b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP5; 1086b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE; 1087209ff23fSmrg } 1088b7e1c893Smrg break; 1089209ff23fSmrg } 1090b7e1c893Smrg if (info->ChipFamily >= CHIP_FAMILY_R600) { 1091209ff23fSmrg OUTREG(R600_BIOS_0_SCRATCH, save->bios_0_scratch); 1092b7e1c893Smrg OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); 1093b7e1c893Smrg } else { 1094209ff23fSmrg OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch); 1095b7e1c893Smrg OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); 1096b7e1c893Smrg } 1097209ff23fSmrg } else { 1098b7e1c893Smrg switch (radeon_output->active_device) { 1099b7e1c893Smrg case ATOM_DEVICE_TV1_SUPPORT: 1100b7e1c893Smrg if (connected) { 1101b7e1c893Smrg if (radeon_output->MonType == MT_STV) 1102b7e1c893Smrg save->bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO; 1103b7e1c893Smrg else if (radeon_output->MonType == MT_CTV) 1104b7e1c893Smrg save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; 1105b7e1c893Smrg save->bios_5_scratch |= RADEON_TV1_ON; 1106b7e1c893Smrg } else { 1107b7e1c893Smrg save->bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK; 1108b7e1c893Smrg save->bios_5_scratch &= ~RADEON_TV1_ON; 1109b7e1c893Smrg } 1110b7e1c893Smrg break; 1111b7e1c893Smrg case ATOM_DEVICE_LCD1_SUPPORT: 1112b7e1c893Smrg if (connected) { 1113209ff23fSmrg save->bios_4_scratch |= RADEON_LCD1_ATTACHED; 1114b7e1c893Smrg save->bios_5_scratch |= RADEON_LCD1_ON; 1115b7e1c893Smrg } else { 1116b7e1c893Smrg save->bios_4_scratch &= ~RADEON_LCD1_ATTACHED; 1117b7e1c893Smrg save->bios_5_scratch &= ~RADEON_LCD1_ON; 1118209ff23fSmrg } 1119b7e1c893Smrg break; 1120b7e1c893Smrg case ATOM_DEVICE_CRT1_SUPPORT: 1121b7e1c893Smrg if (connected) { 1122b7e1c893Smrg save->bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR; 1123b7e1c893Smrg save->bios_5_scratch |= RADEON_CRT1_ON; 1124b7e1c893Smrg } else { 1125209ff23fSmrg save->bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK; 1126b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT1_ON; 1127b7e1c893Smrg } 1128b7e1c893Smrg break; 1129b7e1c893Smrg case ATOM_DEVICE_CRT2_SUPPORT: 1130b7e1c893Smrg if (connected) { 1131b7e1c893Smrg save->bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR; 1132b7e1c893Smrg save->bios_5_scratch |= RADEON_CRT2_ON; 1133b7e1c893Smrg } else { 1134b7e1c893Smrg save->bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK; 1135b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT2_ON; 1136b7e1c893Smrg } 1137b7e1c893Smrg break; 1138b7e1c893Smrg case ATOM_DEVICE_DFP1_SUPPORT: 1139b7e1c893Smrg if (connected) { 1140b7e1c893Smrg save->bios_4_scratch |= RADEON_DFP1_ATTACHED; 1141b7e1c893Smrg save->bios_5_scratch |= RADEON_DFP1_ON; 1142b7e1c893Smrg } else { 1143209ff23fSmrg save->bios_4_scratch &= ~RADEON_DFP1_ATTACHED; 1144b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP1_ON; 1145b7e1c893Smrg } 1146b7e1c893Smrg break; 1147b7e1c893Smrg case ATOM_DEVICE_DFP2_SUPPORT: 1148b7e1c893Smrg if (connected) { 1149b7e1c893Smrg save->bios_4_scratch |= RADEON_DFP2_ATTACHED; 1150b7e1c893Smrg save->bios_5_scratch |= RADEON_DFP2_ON; 1151b7e1c893Smrg } else { 1152209ff23fSmrg save->bios_4_scratch &= ~RADEON_DFP2_ATTACHED; 1153b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP2_ON; 1154b7e1c893Smrg } 1155b7e1c893Smrg break; 1156209ff23fSmrg } 1157209ff23fSmrg OUTREG(RADEON_BIOS_4_SCRATCH, save->bios_4_scratch); 1158b7e1c893Smrg OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); 1159209ff23fSmrg } 1160209ff23fSmrg 1161209ff23fSmrg} 1162209ff23fSmrg 1163209ff23fSmrgstatic xf86OutputStatus 1164209ff23fSmrgradeon_detect(xf86OutputPtr output) 1165209ff23fSmrg{ 1166209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1167209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1168209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 1169209ff23fSmrg Bool connected = TRUE; 1170209ff23fSmrg 1171209ff23fSmrg radeon_output->MonType = MT_UNKNOWN; 1172209ff23fSmrg radeon_bios_output_connected(output, FALSE); 1173b7e1c893Smrg radeon_output->MonType = radeon_ddc_connected(output); 1174b7e1c893Smrg if (!radeon_output->MonType) { 1175b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 1176b7e1c893Smrg if (xf86ReturnOptValBool(info->Options, OPTION_IGNORE_LID_STATUS, TRUE)) 1177b7e1c893Smrg radeon_output->MonType = MT_LCD; 1178b7e1c893Smrg else 1179b7e1c893Smrg#if defined(__powerpc__) 1180b7e1c893Smrg radeon_output->MonType = MT_LCD; 1181b7e1c893Smrg#else 1182b7e1c893Smrg radeon_output->MonType = RADEONDetectLidStatus(pScrn); 1183b7e1c893Smrg#endif 1184b7e1c893Smrg } else { 1185b7e1c893Smrg if (info->IsAtomBios) 1186b7e1c893Smrg radeon_output->MonType = atombios_dac_detect(output); 1187b7e1c893Smrg else 1188b7e1c893Smrg radeon_output->MonType = legacy_dac_detect(output); 1189b7e1c893Smrg } 1190b7e1c893Smrg } 1191b7e1c893Smrg 1192b7e1c893Smrg // if size is zero panel probably broken or not connected 1193b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 1194b7e1c893Smrg radeon_encoder_ptr radeon_encoder = info->encoders[ATOM_DEVICE_LCD1_INDEX]; 1195b7e1c893Smrg if (radeon_encoder) { 1196b7e1c893Smrg radeon_lvds_ptr lvds = (radeon_lvds_ptr)radeon_encoder->dev_priv; 1197b7e1c893Smrg if (lvds) { 1198b7e1c893Smrg if ((lvds->native_mode.PanelXRes == 0) || (lvds->native_mode.PanelYRes == 0)) 1199b7e1c893Smrg radeon_output->MonType = MT_NONE; 1200b7e1c893Smrg } 1201b7e1c893Smrg } 1202b7e1c893Smrg } 1203b7e1c893Smrg 1204b7e1c893Smrg 1205c503f109Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 1206c503f109Smrg "Output: %s, Detected Monitor Type: %d\n", output->name, radeon_output->MonType); 1207b7e1c893Smrg if (output->MonInfo) { 1208b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "EDID data from the display on output: %s ----------------------\n", 1209b7e1c893Smrg output->name); 1210b7e1c893Smrg xf86PrintEDID( output->MonInfo ); 1211b7e1c893Smrg } 1212209ff23fSmrg 1213209ff23fSmrg /* nothing connected, light up some defaults so the server comes up */ 1214209ff23fSmrg if (radeon_output->MonType == MT_NONE && 1215209ff23fSmrg info->first_load_no_devices) { 1216209ff23fSmrg if (info->IsMobility) { 1217b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 1218209ff23fSmrg radeon_output->MonType = MT_LCD; 1219209ff23fSmrg info->first_load_no_devices = FALSE; 1220b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using LCD default\n"); 1221209ff23fSmrg } 1222209ff23fSmrg } else { 1223b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT)) { 1224209ff23fSmrg radeon_output->MonType = MT_CRT; 1225209ff23fSmrg info->first_load_no_devices = FALSE; 1226b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using CRT default\n"); 1227b7e1c893Smrg } else if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT)) { 1228209ff23fSmrg radeon_output->MonType = MT_DFP; 1229209ff23fSmrg info->first_load_no_devices = FALSE; 1230b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using DFP default\n"); 1231209ff23fSmrg } 1232209ff23fSmrg } 1233209ff23fSmrg } 1234209ff23fSmrg 1235209ff23fSmrg radeon_bios_output_connected(output, TRUE); 1236209ff23fSmrg 1237209ff23fSmrg /* set montype so users can force outputs on even if detection fails */ 1238209ff23fSmrg if (radeon_output->MonType == MT_NONE) { 1239209ff23fSmrg connected = FALSE; 1240b7e1c893Smrg switch (radeon_output->ConnectorType) { 1241b7e1c893Smrg case CONNECTOR_LVDS: 1242209ff23fSmrg radeon_output->MonType = MT_LCD; 1243b7e1c893Smrg break; 1244b7e1c893Smrg case CONNECTOR_DVI_D: 1245b7e1c893Smrg case CONNECTOR_HDMI_TYPE_A: 1246b7e1c893Smrg case CONNECTOR_HDMI_TYPE_B: 1247209ff23fSmrg radeon_output->MonType = MT_DFP; 1248b7e1c893Smrg break; 1249b7e1c893Smrg case CONNECTOR_VGA: 1250b7e1c893Smrg case CONNECTOR_DVI_A: 1251b7e1c893Smrg default: 1252209ff23fSmrg radeon_output->MonType = MT_CRT; 1253b7e1c893Smrg break; 1254b7e1c893Smrg case CONNECTOR_DVI_I: 1255209ff23fSmrg if (radeon_output->DVIType == DVI_ANALOG) 1256209ff23fSmrg radeon_output->MonType = MT_CRT; 1257209ff23fSmrg else if (radeon_output->DVIType == DVI_DIGITAL) 1258209ff23fSmrg radeon_output->MonType = MT_DFP; 1259b7e1c893Smrg break; 1260b7e1c893Smrg case CONNECTOR_STV: 1261b7e1c893Smrg radeon_output->MonType = MT_STV; 1262b7e1c893Smrg break; 1263b7e1c893Smrg case CONNECTOR_CTV: 1264b7e1c893Smrg radeon_output->MonType = MT_CTV; 1265b7e1c893Smrg break; 1266b7e1c893Smrg case CONNECTOR_DIN: 1267b7e1c893Smrg radeon_output->MonType = MT_CV; 1268b7e1c893Smrg break; 1269b7e1c893Smrg case CONNECTOR_DISPLAY_PORT: 1270ad43ddacSmrg case CONNECTOR_EDP: 1271b7e1c893Smrg radeon_output->MonType = MT_DP; 1272b7e1c893Smrg break; 1273209ff23fSmrg } 1274209ff23fSmrg } 1275209ff23fSmrg 1276b7e1c893Smrg radeon_set_active_device(output); 1277209ff23fSmrg 1278b7e1c893Smrg if (radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) 1279b7e1c893Smrg output->subpixel_order = SubPixelHorizontalRGB; 1280b7e1c893Smrg else 1281b7e1c893Smrg output->subpixel_order = SubPixelNone; 1282209ff23fSmrg 1283b7e1c893Smrg if (connected) 1284b7e1c893Smrg return XF86OutputStatusConnected; 1285b7e1c893Smrg else 1286b7e1c893Smrg return XF86OutputStatusDisconnected; 1287209ff23fSmrg} 1288209ff23fSmrg 1289209ff23fSmrgstatic DisplayModePtr 1290209ff23fSmrgradeon_get_modes(xf86OutputPtr output) 1291209ff23fSmrg{ 1292209ff23fSmrg DisplayModePtr modes; 1293209ff23fSmrg modes = RADEONProbeOutputModes(output); 1294209ff23fSmrg return modes; 1295209ff23fSmrg} 1296209ff23fSmrg 1297209ff23fSmrgstatic void 1298209ff23fSmrgradeon_destroy (xf86OutputPtr output) 1299209ff23fSmrg{ 1300209ff23fSmrg if (output->driver_private) 13012f39173dSmrg free(output->driver_private); 1302209ff23fSmrg} 1303209ff23fSmrg 1304209ff23fSmrgstatic void 1305209ff23fSmrgradeon_set_backlight_level(xf86OutputPtr output, int level) 1306209ff23fSmrg{ 1307209ff23fSmrg#if 0 1308209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1309209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1310209ff23fSmrg unsigned char * RADEONMMIO = info->MMIO; 1311209ff23fSmrg uint32_t lvds_gen_cntl; 1312209ff23fSmrg 1313209ff23fSmrg lvds_gen_cntl = INREG(RADEON_LVDS_GEN_CNTL); 1314209ff23fSmrg lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; 1315209ff23fSmrg lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_LEVEL_MASK; 1316209ff23fSmrg lvds_gen_cntl |= (level << RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & RADEON_LVDS_BL_MOD_LEVEL_MASK; 1317209ff23fSmrg //usleep (radeon_output->PanelPwrDly * 1000); 1318209ff23fSmrg OUTREG(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 1319209ff23fSmrg lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN; 1320209ff23fSmrg //usleep (radeon_output->PanelPwrDly * 1000); 1321209ff23fSmrg OUTREG(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 1322209ff23fSmrg#endif 1323209ff23fSmrg} 1324209ff23fSmrg 1325209ff23fSmrgstatic Atom backlight_atom; 1326209ff23fSmrgstatic Atom tmds_pll_atom; 1327209ff23fSmrgstatic Atom rmx_atom; 1328209ff23fSmrgstatic Atom monitor_type_atom; 1329209ff23fSmrgstatic Atom load_detection_atom; 1330209ff23fSmrgstatic Atom coherent_mode_atom; 1331209ff23fSmrgstatic Atom tv_hsize_atom; 1332209ff23fSmrgstatic Atom tv_hpos_atom; 1333209ff23fSmrgstatic Atom tv_vpos_atom; 1334209ff23fSmrgstatic Atom tv_std_atom; 1335209ff23fSmrg#define RADEON_MAX_BACKLIGHT_LEVEL 255 1336209ff23fSmrg 1337209ff23fSmrgstatic void 1338209ff23fSmrgradeon_create_resources(xf86OutputPtr output) 1339209ff23fSmrg{ 1340209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1341209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1342209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 1343209ff23fSmrg INT32 range[2]; 1344209ff23fSmrg int data, err; 1345209ff23fSmrg const char *s; 1346209ff23fSmrg 1347b7e1c893Smrg#if 0 1348209ff23fSmrg /* backlight control */ 1349209ff23fSmrg if (radeon_output->type == OUTPUT_LVDS) { 1350209ff23fSmrg backlight_atom = MAKE_ATOM("backlight"); 1351209ff23fSmrg 1352209ff23fSmrg range[0] = 0; 1353209ff23fSmrg range[1] = RADEON_MAX_BACKLIGHT_LEVEL; 1354209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, backlight_atom, 1355209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1356209ff23fSmrg if (err != 0) { 1357209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1358209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1359209ff23fSmrg } 1360209ff23fSmrg /* Set the current value of the backlight property */ 1361209ff23fSmrg //data = (info->SavedReg->lvds_gen_cntl & RADEON_LVDS_BL_MOD_LEVEL_MASK) >> RADEON_LVDS_BL_MOD_LEVEL_SHIFT; 1362209ff23fSmrg data = RADEON_MAX_BACKLIGHT_LEVEL; 1363209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, backlight_atom, 1364209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1365209ff23fSmrg FALSE, TRUE); 1366209ff23fSmrg if (err != 0) { 1367209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1368209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1369209ff23fSmrg } 1370209ff23fSmrg } 1371b7e1c893Smrg#endif 1372209ff23fSmrg 1373b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT | ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) { 1374209ff23fSmrg load_detection_atom = MAKE_ATOM("load_detection"); 1375209ff23fSmrg 1376209ff23fSmrg range[0] = 0; /* off */ 1377209ff23fSmrg range[1] = 1; /* on */ 1378209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, load_detection_atom, 1379209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1380209ff23fSmrg if (err != 0) { 1381209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1382209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1383209ff23fSmrg } 1384209ff23fSmrg 1385209ff23fSmrg if (radeon_output->load_detection) 1386b7e1c893Smrg data = 1; 1387209ff23fSmrg else 1388b7e1c893Smrg data = 0; 1389209ff23fSmrg 1390209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, load_detection_atom, 1391209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1392209ff23fSmrg FALSE, TRUE); 1393209ff23fSmrg if (err != 0) { 1394209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1395209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1396209ff23fSmrg } 1397209ff23fSmrg } 1398209ff23fSmrg 1399b7e1c893Smrg if (IS_AVIVO_VARIANT && (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))) { 1400209ff23fSmrg coherent_mode_atom = MAKE_ATOM("coherent_mode"); 1401209ff23fSmrg 1402209ff23fSmrg range[0] = 0; /* off */ 1403209ff23fSmrg range[1] = 1; /* on */ 1404209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, coherent_mode_atom, 1405209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1406209ff23fSmrg if (err != 0) { 1407209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1408209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1409209ff23fSmrg } 1410209ff23fSmrg 1411b7e1c893Smrg data = 1; /* coherent mode on by default */ 1412209ff23fSmrg 1413209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, coherent_mode_atom, 1414209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1415209ff23fSmrg FALSE, TRUE); 1416209ff23fSmrg if (err != 0) { 1417209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1418209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1419209ff23fSmrg } 1420209ff23fSmrg } 1421209ff23fSmrg 1422c503f109Smrg if ((!IS_AVIVO_VARIANT) && (radeon_output->devices & (ATOM_DEVICE_DFP1_SUPPORT))) { 1423209ff23fSmrg tmds_pll_atom = MAKE_ATOM("tmds_pll"); 1424209ff23fSmrg 1425209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tmds_pll_atom, 1426209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1427209ff23fSmrg if (err != 0) { 1428209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1429209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1430209ff23fSmrg } 1431209ff23fSmrg /* Set the current value of the property */ 1432209ff23fSmrg#if defined(__powerpc__) 1433209ff23fSmrg s = "driver"; 1434209ff23fSmrg#else 1435209ff23fSmrg s = "bios"; 1436209ff23fSmrg#endif 1437209ff23fSmrg if (xf86ReturnOptValBool(info->Options, OPTION_DEFAULT_TMDS_PLL, FALSE)) { 1438209ff23fSmrg s = "driver"; 1439209ff23fSmrg } 1440209ff23fSmrg 1441209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tmds_pll_atom, 1442209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1443209ff23fSmrg FALSE, FALSE); 1444209ff23fSmrg if (err != 0) { 1445209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1446209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1447209ff23fSmrg } 1448209ff23fSmrg 1449209ff23fSmrg } 1450209ff23fSmrg 1451209ff23fSmrg /* RMX control - fullscreen, centered, keep ratio, off */ 1452209ff23fSmrg /* actually more of a crtc property as only crtc1 has rmx */ 1453b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { 1454209ff23fSmrg rmx_atom = MAKE_ATOM("scaler"); 1455209ff23fSmrg 1456209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, rmx_atom, 1457209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1458209ff23fSmrg if (err != 0) { 1459209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1460209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1461209ff23fSmrg } 1462209ff23fSmrg /* Set the current value of the property */ 1463b7e1c893Smrg switch (radeon_output->rmx_type) { 1464b7e1c893Smrg case RMX_OFF: 1465b7e1c893Smrg default: 1466209ff23fSmrg s = "off"; 1467b7e1c893Smrg break; 1468b7e1c893Smrg case RMX_FULL: 1469b7e1c893Smrg s = "full"; 1470b7e1c893Smrg break; 1471b7e1c893Smrg case RMX_CENTER: 1472b7e1c893Smrg s = "center"; 1473b7e1c893Smrg break; 1474b7e1c893Smrg case RMX_ASPECT: 1475b7e1c893Smrg s = "aspect"; 1476b7e1c893Smrg break; 1477b7e1c893Smrg } 1478209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, rmx_atom, 1479209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1480209ff23fSmrg FALSE, FALSE); 1481209ff23fSmrg if (err != 0) { 1482209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1483209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1484209ff23fSmrg } 1485209ff23fSmrg } 1486209ff23fSmrg 1487209ff23fSmrg /* force auto/analog/digital for DVI-I ports */ 1488b7e1c893Smrg if ((radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT)) && 1489b7e1c893Smrg (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))){ 1490209ff23fSmrg monitor_type_atom = MAKE_ATOM("dvi_monitor_type"); 1491209ff23fSmrg 1492209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, monitor_type_atom, 1493209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1494209ff23fSmrg if (err != 0) { 1495209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1496209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1497209ff23fSmrg } 1498209ff23fSmrg /* Set the current value of the backlight property */ 1499209ff23fSmrg s = "auto"; 1500209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, monitor_type_atom, 1501209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1502209ff23fSmrg FALSE, FALSE); 1503209ff23fSmrg if (err != 0) { 1504209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1505209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1506209ff23fSmrg } 1507209ff23fSmrg } 1508209ff23fSmrg 1509b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT)) { 1510b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1511209ff23fSmrg if (!IS_AVIVO_VARIANT) { 1512209ff23fSmrg tv_hsize_atom = MAKE_ATOM("tv_horizontal_size"); 1513209ff23fSmrg 1514209ff23fSmrg range[0] = -MAX_H_SIZE; 1515209ff23fSmrg range[1] = MAX_H_SIZE; 1516209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_hsize_atom, 1517209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1518209ff23fSmrg if (err != 0) { 1519209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1520209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1521209ff23fSmrg } 1522209ff23fSmrg data = 0; 1523209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_hsize_atom, 1524209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1525209ff23fSmrg FALSE, TRUE); 1526209ff23fSmrg if (err != 0) { 1527209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1528209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1529209ff23fSmrg } 1530209ff23fSmrg 1531209ff23fSmrg tv_hpos_atom = MAKE_ATOM("tv_horizontal_position"); 1532209ff23fSmrg 1533209ff23fSmrg range[0] = -MAX_H_POSITION; 1534209ff23fSmrg range[1] = MAX_H_POSITION; 1535209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_hpos_atom, 1536209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1537209ff23fSmrg if (err != 0) { 1538209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1539209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1540209ff23fSmrg } 1541209ff23fSmrg data = 0; 1542209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_hpos_atom, 1543209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1544209ff23fSmrg FALSE, TRUE); 1545209ff23fSmrg if (err != 0) { 1546209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1547209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1548209ff23fSmrg } 1549209ff23fSmrg 1550209ff23fSmrg tv_vpos_atom = MAKE_ATOM("tv_vertical_position"); 1551209ff23fSmrg 1552209ff23fSmrg range[0] = -MAX_V_POSITION; 1553209ff23fSmrg range[1] = MAX_V_POSITION; 1554209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_vpos_atom, 1555209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1556209ff23fSmrg if (err != 0) { 1557209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1558209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1559209ff23fSmrg } 1560209ff23fSmrg data = 0; 1561209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_vpos_atom, 1562209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1563209ff23fSmrg FALSE, TRUE); 1564209ff23fSmrg if (err != 0) { 1565209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1566209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1567209ff23fSmrg } 1568209ff23fSmrg } 1569209ff23fSmrg 1570209ff23fSmrg tv_std_atom = MAKE_ATOM("tv_standard"); 1571209ff23fSmrg 1572209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_std_atom, 1573209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1574209ff23fSmrg if (err != 0) { 1575209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1576209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1577209ff23fSmrg } 1578209ff23fSmrg 1579209ff23fSmrg /* Set the current value of the property */ 1580b7e1c893Smrg switch (tvout->tvStd) { 1581209ff23fSmrg case TV_STD_PAL: 1582209ff23fSmrg s = "pal"; 1583209ff23fSmrg break; 1584209ff23fSmrg case TV_STD_PAL_M: 1585209ff23fSmrg s = "pal-m"; 1586209ff23fSmrg break; 1587209ff23fSmrg case TV_STD_PAL_60: 1588209ff23fSmrg s = "pal-60"; 1589209ff23fSmrg break; 1590209ff23fSmrg case TV_STD_NTSC_J: 1591209ff23fSmrg s = "ntsc-j"; 1592209ff23fSmrg break; 1593209ff23fSmrg case TV_STD_SCART_PAL: 1594209ff23fSmrg s = "scart-pal"; 1595209ff23fSmrg break; 1596209ff23fSmrg case TV_STD_NTSC: 1597209ff23fSmrg default: 1598209ff23fSmrg s = "ntsc"; 1599209ff23fSmrg break; 1600209ff23fSmrg } 1601209ff23fSmrg 1602209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_std_atom, 1603209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1604209ff23fSmrg FALSE, FALSE); 1605209ff23fSmrg if (err != 0) { 1606209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1607209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1608209ff23fSmrg } 1609209ff23fSmrg } 1610209ff23fSmrg} 1611209ff23fSmrg 1612209ff23fSmrgstatic Bool 1613209ff23fSmrgradeon_set_mode_for_property(xf86OutputPtr output) 1614209ff23fSmrg{ 1615209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1616209ff23fSmrg 1617209ff23fSmrg if (output->crtc) { 1618209ff23fSmrg xf86CrtcPtr crtc = output->crtc; 1619209ff23fSmrg 1620209ff23fSmrg if (crtc->enabled) { 1621209ff23fSmrg if (!xf86CrtcSetMode(crtc, &crtc->desiredMode, crtc->desiredRotation, 1622209ff23fSmrg crtc->desiredX, crtc->desiredY)) { 1623209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1624209ff23fSmrg "Failed to set mode after propery change!\n"); 1625209ff23fSmrg return FALSE; 1626209ff23fSmrg } 1627209ff23fSmrg } 1628209ff23fSmrg } 1629209ff23fSmrg return TRUE; 1630209ff23fSmrg} 1631209ff23fSmrg 1632209ff23fSmrgstatic Bool 1633209ff23fSmrgradeon_set_property(xf86OutputPtr output, Atom property, 1634209ff23fSmrg RRPropertyValuePtr value) 1635209ff23fSmrg{ 1636209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 1637209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 1638209ff23fSmrg INT32 val; 1639209ff23fSmrg 1640209ff23fSmrg 1641209ff23fSmrg if (property == backlight_atom) { 1642209ff23fSmrg if (value->type != XA_INTEGER || 1643209ff23fSmrg value->format != 32 || 1644209ff23fSmrg value->size != 1) { 1645209ff23fSmrg return FALSE; 1646209ff23fSmrg } 1647209ff23fSmrg 1648209ff23fSmrg val = *(INT32 *)value->data; 1649209ff23fSmrg if (val < 0 || val > RADEON_MAX_BACKLIGHT_LEVEL) 1650209ff23fSmrg return FALSE; 1651209ff23fSmrg 1652209ff23fSmrg#if defined(__powerpc__) 1653209ff23fSmrg val = RADEON_MAX_BACKLIGHT_LEVEL - val; 1654209ff23fSmrg#endif 1655209ff23fSmrg 1656209ff23fSmrg radeon_set_backlight_level(output, val); 1657209ff23fSmrg 1658209ff23fSmrg } else if (property == load_detection_atom) { 1659209ff23fSmrg if (value->type != XA_INTEGER || 1660209ff23fSmrg value->format != 32 || 1661209ff23fSmrg value->size != 1) { 1662209ff23fSmrg return FALSE; 1663209ff23fSmrg } 1664209ff23fSmrg 1665209ff23fSmrg val = *(INT32 *)value->data; 1666209ff23fSmrg if (val < 0 || val > 1) 1667209ff23fSmrg return FALSE; 1668209ff23fSmrg 1669209ff23fSmrg radeon_output->load_detection = val; 1670209ff23fSmrg 1671209ff23fSmrg } else if (property == coherent_mode_atom) { 1672209ff23fSmrg Bool coherent_mode = radeon_output->coherent_mode; 1673209ff23fSmrg 1674209ff23fSmrg if (value->type != XA_INTEGER || 1675209ff23fSmrg value->format != 32 || 1676209ff23fSmrg value->size != 1) { 1677209ff23fSmrg return FALSE; 1678209ff23fSmrg } 1679209ff23fSmrg 1680209ff23fSmrg val = *(INT32 *)value->data; 1681209ff23fSmrg if (val < 0 || val > 1) 1682209ff23fSmrg return FALSE; 1683209ff23fSmrg 1684209ff23fSmrg radeon_output->coherent_mode = val; 1685209ff23fSmrg if (!radeon_set_mode_for_property(output)) { 1686209ff23fSmrg radeon_output->coherent_mode = coherent_mode; 1687209ff23fSmrg (void)radeon_set_mode_for_property(output); 1688209ff23fSmrg return FALSE; 1689209ff23fSmrg } 1690209ff23fSmrg 1691209ff23fSmrg } else if (property == rmx_atom) { 1692209ff23fSmrg const char *s; 1693209ff23fSmrg RADEONRMXType rmx = radeon_output->rmx_type; 1694209ff23fSmrg 1695209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1696209ff23fSmrg return FALSE; 1697209ff23fSmrg s = (char*)value->data; 1698209ff23fSmrg if (value->size == strlen("full") && !strncmp("full", s, strlen("full"))) { 1699209ff23fSmrg radeon_output->rmx_type = RMX_FULL; 1700209ff23fSmrg } else if (value->size == strlen("center") && !strncmp("center", s, strlen("center"))) { 1701209ff23fSmrg radeon_output->rmx_type = RMX_CENTER; 1702b7e1c893Smrg } else if (value->size == strlen("aspect") && !strncmp("aspect", s, strlen("aspect"))) { 1703b7e1c893Smrg if (IS_AVIVO_VARIANT) 1704b7e1c893Smrg radeon_output->rmx_type = RMX_ASPECT; 1705b7e1c893Smrg else 1706b7e1c893Smrg return FALSE; 1707209ff23fSmrg } else if (value->size == strlen("off") && !strncmp("off", s, strlen("off"))) { 1708209ff23fSmrg radeon_output->rmx_type = RMX_OFF; 1709209ff23fSmrg } else 1710209ff23fSmrg return FALSE; 1711209ff23fSmrg 1712209ff23fSmrg if (!radeon_set_mode_for_property(output)) { 1713209ff23fSmrg radeon_output->rmx_type = rmx; 1714209ff23fSmrg (void)radeon_set_mode_for_property(output); 1715209ff23fSmrg return FALSE; 1716209ff23fSmrg } 1717209ff23fSmrg } else if (property == tmds_pll_atom) { 1718b7e1c893Smrg radeon_tmds_ptr tmds = NULL; 1719209ff23fSmrg const char *s; 1720b7e1c893Smrg 1721b7e1c893Smrg if (info->encoders[ATOM_DEVICE_DFP1_INDEX] && info->encoders[ATOM_DEVICE_DFP1_INDEX]->dev_priv) 1722b7e1c893Smrg tmds = (radeon_tmds_ptr)info->encoders[ATOM_DEVICE_DFP1_INDEX]->dev_priv; 1723b7e1c893Smrg else 1724b7e1c893Smrg return FALSE; 1725b7e1c893Smrg 1726209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1727209ff23fSmrg return FALSE; 1728209ff23fSmrg s = (char*)value->data; 1729209ff23fSmrg if (value->size == strlen("bios") && !strncmp("bios", s, strlen("bios"))) { 1730b7e1c893Smrg if (!RADEONGetTMDSInfoFromBIOS(output->scrn, tmds)) 1731b7e1c893Smrg RADEONGetTMDSInfoFromTable(output->scrn, tmds); 1732b7e1c893Smrg } else if (value->size == strlen("driver") && !strncmp("driver", s, strlen("driver"))) 1733b7e1c893Smrg RADEONGetTMDSInfoFromTable(output->scrn, tmds); 1734b7e1c893Smrg else 1735209ff23fSmrg return FALSE; 1736209ff23fSmrg 1737209ff23fSmrg return radeon_set_mode_for_property(output); 1738209ff23fSmrg } else if (property == monitor_type_atom) { 1739209ff23fSmrg const char *s; 1740209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1741209ff23fSmrg return FALSE; 1742209ff23fSmrg s = (char*)value->data; 1743209ff23fSmrg if (value->size == strlen("auto") && !strncmp("auto", s, strlen("auto"))) { 1744209ff23fSmrg radeon_output->DVIType = DVI_AUTO; 1745209ff23fSmrg return TRUE; 1746209ff23fSmrg } else if (value->size == strlen("analog") && !strncmp("analog", s, strlen("analog"))) { 1747209ff23fSmrg radeon_output->DVIType = DVI_ANALOG; 1748209ff23fSmrg return TRUE; 1749209ff23fSmrg } else if (value->size == strlen("digital") && !strncmp("digital", s, strlen("digital"))) { 1750209ff23fSmrg radeon_output->DVIType = DVI_DIGITAL; 1751209ff23fSmrg return TRUE; 1752209ff23fSmrg } else 1753209ff23fSmrg return FALSE; 1754209ff23fSmrg } else if (property == tv_hsize_atom) { 1755b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1756209ff23fSmrg if (value->type != XA_INTEGER || 1757209ff23fSmrg value->format != 32 || 1758209ff23fSmrg value->size != 1) { 1759209ff23fSmrg return FALSE; 1760209ff23fSmrg } 1761209ff23fSmrg 1762209ff23fSmrg val = *(INT32 *)value->data; 1763209ff23fSmrg if (val < -MAX_H_SIZE || val > MAX_H_SIZE) 1764209ff23fSmrg return FALSE; 1765209ff23fSmrg 1766b7e1c893Smrg tvout->hSize = val; 1767b7e1c893Smrg if (tvout->tv_on && !IS_AVIVO_VARIANT) 1768209ff23fSmrg RADEONUpdateHVPosition(output, &output->crtc->mode); 1769209ff23fSmrg 1770209ff23fSmrg } else if (property == tv_hpos_atom) { 1771b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1772209ff23fSmrg if (value->type != XA_INTEGER || 1773209ff23fSmrg value->format != 32 || 1774209ff23fSmrg value->size != 1) { 1775209ff23fSmrg return FALSE; 1776209ff23fSmrg } 1777209ff23fSmrg 1778209ff23fSmrg val = *(INT32 *)value->data; 1779209ff23fSmrg if (val < -MAX_H_POSITION || val > MAX_H_POSITION) 1780209ff23fSmrg return FALSE; 1781209ff23fSmrg 1782b7e1c893Smrg tvout->hPos = val; 1783b7e1c893Smrg if (tvout->tv_on && !IS_AVIVO_VARIANT) 1784209ff23fSmrg RADEONUpdateHVPosition(output, &output->crtc->mode); 1785209ff23fSmrg 1786209ff23fSmrg } else if (property == tv_vpos_atom) { 1787b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1788209ff23fSmrg if (value->type != XA_INTEGER || 1789209ff23fSmrg value->format != 32 || 1790209ff23fSmrg value->size != 1) { 1791209ff23fSmrg return FALSE; 1792209ff23fSmrg } 1793209ff23fSmrg 1794209ff23fSmrg val = *(INT32 *)value->data; 1795209ff23fSmrg if (val < -MAX_H_POSITION || val > MAX_H_POSITION) 1796209ff23fSmrg return FALSE; 1797209ff23fSmrg 1798b7e1c893Smrg tvout->vPos = val; 1799b7e1c893Smrg if (tvout->tv_on && !IS_AVIVO_VARIANT) 1800209ff23fSmrg RADEONUpdateHVPosition(output, &output->crtc->mode); 1801209ff23fSmrg 1802209ff23fSmrg } else if (property == tv_std_atom) { 1803209ff23fSmrg const char *s; 1804b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1805b7e1c893Smrg TVStd std = tvout->tvStd; 1806209ff23fSmrg 1807209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1808209ff23fSmrg return FALSE; 1809209ff23fSmrg s = (char*)value->data; 1810209ff23fSmrg if (value->size == strlen("ntsc") && !strncmp("ntsc", s, strlen("ntsc"))) { 1811b7e1c893Smrg tvout->tvStd = TV_STD_NTSC; 1812209ff23fSmrg } else if (value->size == strlen("pal") && !strncmp("pal", s, strlen("pal"))) { 1813b7e1c893Smrg tvout->tvStd = TV_STD_PAL; 1814209ff23fSmrg } else if (value->size == strlen("pal-m") && !strncmp("pal-m", s, strlen("pal-m"))) { 1815b7e1c893Smrg tvout->tvStd = TV_STD_PAL_M; 1816209ff23fSmrg } else if (value->size == strlen("pal-60") && !strncmp("pal-60", s, strlen("pal-60"))) { 1817b7e1c893Smrg tvout->tvStd = TV_STD_PAL_60; 1818209ff23fSmrg } else if (value->size == strlen("ntsc-j") && !strncmp("ntsc-j", s, strlen("ntsc-j"))) { 1819b7e1c893Smrg tvout->tvStd = TV_STD_NTSC_J; 1820209ff23fSmrg } else if (value->size == strlen("scart-pal") && !strncmp("scart-pal", s, strlen("scart-pal"))) { 1821b7e1c893Smrg tvout->tvStd = TV_STD_SCART_PAL; 1822209ff23fSmrg } else if (value->size == strlen("pal-cn") && !strncmp("pal-cn", s, strlen("pal-cn"))) { 1823b7e1c893Smrg tvout->tvStd = TV_STD_PAL_CN; 1824209ff23fSmrg } else if (value->size == strlen("secam") && !strncmp("secam", s, strlen("secam"))) { 1825b7e1c893Smrg tvout->tvStd = TV_STD_SECAM; 1826209ff23fSmrg } else 1827209ff23fSmrg return FALSE; 1828209ff23fSmrg 1829209ff23fSmrg if (!radeon_set_mode_for_property(output)) { 1830b7e1c893Smrg tvout->tvStd = std; 1831209ff23fSmrg (void)radeon_set_mode_for_property(output); 1832209ff23fSmrg return FALSE; 1833209ff23fSmrg } 1834209ff23fSmrg } 1835209ff23fSmrg 1836209ff23fSmrg return TRUE; 1837209ff23fSmrg} 1838209ff23fSmrg 1839209ff23fSmrgstatic const xf86OutputFuncsRec radeon_output_funcs = { 1840209ff23fSmrg .create_resources = radeon_create_resources, 1841209ff23fSmrg .dpms = radeon_dpms, 1842209ff23fSmrg .save = radeon_save, 1843209ff23fSmrg .restore = radeon_restore, 1844209ff23fSmrg .mode_valid = radeon_mode_valid, 1845209ff23fSmrg .mode_fixup = radeon_mode_fixup, 1846209ff23fSmrg .prepare = radeon_mode_prepare, 1847209ff23fSmrg .mode_set = radeon_mode_set, 1848209ff23fSmrg .commit = radeon_mode_commit, 1849209ff23fSmrg .detect = radeon_detect, 1850209ff23fSmrg .get_modes = radeon_get_modes, 1851209ff23fSmrg .set_property = radeon_set_property, 1852209ff23fSmrg .destroy = radeon_destroy 1853209ff23fSmrg}; 1854209ff23fSmrg 1855b7e1c893SmrgBool 1856c503f109SmrgRADEONI2CDoLock(xf86OutputPtr output, I2CBusPtr b, int lock_state) 1857209ff23fSmrg{ 1858209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1859209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1860c503f109Smrg RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr; 1861209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 1862209ff23fSmrg uint32_t temp; 1863209ff23fSmrg 1864b7e1c893Smrg if (lock_state) { 1865c503f109Smrg /* RV410 appears to have a bug where the hw i2c in reset 1866c503f109Smrg * holds the i2c port in a bad state - switch hw i2c away before 1867c503f109Smrg * doing DDC - do this for all r200s/r300s for safety sakes */ 1868c503f109Smrg if ((info->ChipFamily >= CHIP_FAMILY_R200) && (!IS_AVIVO_VARIANT)) { 1869c503f109Smrg if (pRADEONI2CBus->mask_clk_reg == RADEON_GPIO_MONID) 1870c503f109Smrg OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST | 1871c503f109Smrg R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1))); 1872c503f109Smrg else 1873c503f109Smrg OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST | 1874c503f109Smrg R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3))); 1875c503f109Smrg } 1876c503f109Smrg 18770974d292Smrg /* set the pad in ddc mode */ 18780974d292Smrg if (IS_DCE3_VARIANT) { 18790974d292Smrg temp = INREG(pRADEONI2CBus->mask_clk_reg); 18800974d292Smrg temp &= ~(1 << 16); 18810974d292Smrg OUTREG(pRADEONI2CBus->mask_clk_reg, temp); 18820974d292Smrg } 18830974d292Smrg 1884b7e1c893Smrg temp = INREG(pRADEONI2CBus->a_clk_reg); 1885b7e1c893Smrg temp &= ~(pRADEONI2CBus->a_clk_mask); 1886b7e1c893Smrg OUTREG(pRADEONI2CBus->a_clk_reg, temp); 1887b7e1c893Smrg 1888b7e1c893Smrg temp = INREG(pRADEONI2CBus->a_data_reg); 1889b7e1c893Smrg temp &= ~(pRADEONI2CBus->a_data_mask); 1890b7e1c893Smrg OUTREG(pRADEONI2CBus->a_data_reg, temp); 1891b7e1c893Smrg } 1892b7e1c893Smrg 1893209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_clk_reg); 1894b7e1c893Smrg if (lock_state) 1895b7e1c893Smrg temp |= (pRADEONI2CBus->mask_clk_mask); 1896209ff23fSmrg else 1897b7e1c893Smrg temp &= ~(pRADEONI2CBus->mask_clk_mask); 1898209ff23fSmrg OUTREG(pRADEONI2CBus->mask_clk_reg, temp); 1899209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_clk_reg); 1900209ff23fSmrg 1901209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_data_reg); 1902b7e1c893Smrg if (lock_state) 1903b7e1c893Smrg temp |= (pRADEONI2CBus->mask_data_mask); 1904209ff23fSmrg else 1905b7e1c893Smrg temp &= ~(pRADEONI2CBus->mask_data_mask); 1906209ff23fSmrg OUTREG(pRADEONI2CBus->mask_data_reg, temp); 1907209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_data_reg); 1908209ff23fSmrg 1909209ff23fSmrg return TRUE; 1910209ff23fSmrg} 1911209ff23fSmrg 1912209ff23fSmrgstatic void RADEONI2CGetBits(I2CBusPtr b, int *Clock, int *data) 1913209ff23fSmrg{ 1914209ff23fSmrg ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; 1915209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1916209ff23fSmrg unsigned long val; 1917209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 1918209ff23fSmrg RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr; 1919209ff23fSmrg 1920209ff23fSmrg /* Get the result */ 1921209ff23fSmrg val = INREG(pRADEONI2CBus->get_clk_reg); 1922209ff23fSmrg *Clock = (val & pRADEONI2CBus->get_clk_mask) != 0; 1923209ff23fSmrg val = INREG(pRADEONI2CBus->get_data_reg); 1924209ff23fSmrg *data = (val & pRADEONI2CBus->get_data_mask) != 0; 1925209ff23fSmrg 1926209ff23fSmrg} 1927209ff23fSmrg 1928209ff23fSmrgstatic void RADEONI2CPutBits(I2CBusPtr b, int Clock, int data) 1929209ff23fSmrg{ 1930209ff23fSmrg ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; 1931209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1932209ff23fSmrg unsigned long val; 1933209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 1934209ff23fSmrg RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr; 1935209ff23fSmrg 1936209ff23fSmrg val = INREG(pRADEONI2CBus->put_clk_reg) & (uint32_t)~(pRADEONI2CBus->put_clk_mask); 1937209ff23fSmrg val |= (Clock ? 0:pRADEONI2CBus->put_clk_mask); 1938209ff23fSmrg OUTREG(pRADEONI2CBus->put_clk_reg, val); 1939209ff23fSmrg /* read back to improve reliability on some cards. */ 1940209ff23fSmrg val = INREG(pRADEONI2CBus->put_clk_reg); 1941209ff23fSmrg 1942209ff23fSmrg val = INREG(pRADEONI2CBus->put_data_reg) & (uint32_t)~(pRADEONI2CBus->put_data_mask); 1943209ff23fSmrg val |= (data ? 0:pRADEONI2CBus->put_data_mask); 1944209ff23fSmrg OUTREG(pRADEONI2CBus->put_data_reg, val); 1945209ff23fSmrg /* read back to improve reliability on some cards. */ 1946209ff23fSmrg val = INREG(pRADEONI2CBus->put_data_reg); 1947209ff23fSmrg 1948209ff23fSmrg} 1949209ff23fSmrg 1950b7e1c893SmrgBool 1951b7e1c893SmrgRADEONI2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, char *name, RADEONI2CBusPtr pRADEONI2CBus) 1952209ff23fSmrg{ 1953209ff23fSmrg I2CBusPtr pI2CBus; 1954209ff23fSmrg 1955209ff23fSmrg pI2CBus = xf86CreateI2CBusRec(); 1956209ff23fSmrg if (!pI2CBus) return FALSE; 1957209ff23fSmrg 1958209ff23fSmrg pI2CBus->BusName = name; 1959209ff23fSmrg pI2CBus->scrnIndex = pScrn->scrnIndex; 1960209ff23fSmrg pI2CBus->I2CPutBits = RADEONI2CPutBits; 1961209ff23fSmrg pI2CBus->I2CGetBits = RADEONI2CGetBits; 1962b7e1c893Smrg pI2CBus->AcknTimeout = 5; 1963209ff23fSmrg 1964b7e1c893Smrg pI2CBus->DriverPrivate.ptr = (pointer)pRADEONI2CBus; 1965209ff23fSmrg 1966b7e1c893Smrg if (!xf86I2CBusInit(pI2CBus)) 1967b7e1c893Smrg return FALSE; 1968209ff23fSmrg 1969b7e1c893Smrg *bus_ptr = pI2CBus; 1970209ff23fSmrg return TRUE; 1971209ff23fSmrg} 1972209ff23fSmrg 1973b7e1c893SmrgRADEONI2CBusRec 1974b7e1c893Smrglegacy_setup_i2c_bus(int ddc_line) 1975209ff23fSmrg{ 1976b7e1c893Smrg RADEONI2CBusRec i2c; 1977209ff23fSmrg 1978b7e1c893Smrg i2c.hw_line = 0; 1979b7e1c893Smrg i2c.hw_capable = FALSE; 1980b7e1c893Smrg i2c.mask_clk_mask = RADEON_GPIO_EN_1; 1981b7e1c893Smrg i2c.mask_data_mask = RADEON_GPIO_EN_0; 1982b7e1c893Smrg i2c.a_clk_mask = RADEON_GPIO_A_1; 1983b7e1c893Smrg i2c.a_data_mask = RADEON_GPIO_A_0; 1984b7e1c893Smrg i2c.put_clk_mask = RADEON_GPIO_EN_1; 1985b7e1c893Smrg i2c.put_data_mask = RADEON_GPIO_EN_0; 1986b7e1c893Smrg i2c.get_clk_mask = RADEON_GPIO_Y_1; 1987b7e1c893Smrg i2c.get_data_mask = RADEON_GPIO_Y_0; 1988b7e1c893Smrg if ((ddc_line == RADEON_LCD_GPIO_MASK) || 1989b7e1c893Smrg (ddc_line == RADEON_MDGPIO_EN_REG)) { 1990b7e1c893Smrg i2c.mask_clk_reg = ddc_line; 1991b7e1c893Smrg i2c.mask_data_reg = ddc_line; 1992b7e1c893Smrg i2c.a_clk_reg = ddc_line; 1993b7e1c893Smrg i2c.a_data_reg = ddc_line; 1994b7e1c893Smrg i2c.put_clk_reg = ddc_line; 1995b7e1c893Smrg i2c.put_data_reg = ddc_line; 1996b7e1c893Smrg i2c.get_clk_reg = ddc_line + 4; 1997b7e1c893Smrg i2c.get_data_reg = ddc_line + 4; 1998b7e1c893Smrg } else { 1999b7e1c893Smrg i2c.mask_clk_reg = ddc_line; 2000b7e1c893Smrg i2c.mask_data_reg = ddc_line; 2001b7e1c893Smrg i2c.a_clk_reg = ddc_line; 2002b7e1c893Smrg i2c.a_data_reg = ddc_line; 2003b7e1c893Smrg i2c.put_clk_reg = ddc_line; 2004b7e1c893Smrg i2c.put_data_reg = ddc_line; 2005b7e1c893Smrg i2c.get_clk_reg = ddc_line; 2006b7e1c893Smrg i2c.get_data_reg = ddc_line; 2007209ff23fSmrg } 2008b7e1c893Smrg 2009b7e1c893Smrg if (ddc_line) 2010b7e1c893Smrg i2c.valid = TRUE; 2011b7e1c893Smrg else 2012b7e1c893Smrg i2c.valid = FALSE; 2013b7e1c893Smrg 2014b7e1c893Smrg return i2c; 2015209ff23fSmrg} 2016209ff23fSmrg 2017b7e1c893SmrgRADEONI2CBusRec 2018b7e1c893Smrgatom_setup_i2c_bus(int ddc_line) 2019209ff23fSmrg{ 2020b7e1c893Smrg RADEONI2CBusRec i2c; 2021209ff23fSmrg 2022b7e1c893Smrg i2c.hw_line = 0; 2023b7e1c893Smrg i2c.hw_capable = FALSE; 2024b7e1c893Smrg if (ddc_line == AVIVO_GPIO_0) { 2025b7e1c893Smrg i2c.put_clk_mask = (1 << 19); 2026b7e1c893Smrg i2c.put_data_mask = (1 << 18); 2027b7e1c893Smrg i2c.get_clk_mask = (1 << 19); 2028b7e1c893Smrg i2c.get_data_mask = (1 << 18); 2029b7e1c893Smrg i2c.mask_clk_mask = (1 << 19); 2030b7e1c893Smrg i2c.mask_data_mask = (1 << 18); 2031b7e1c893Smrg i2c.a_clk_mask = (1 << 19); 2032b7e1c893Smrg i2c.a_data_mask = (1 << 18); 2033b7e1c893Smrg } else { 2034b7e1c893Smrg i2c.put_clk_mask = (1 << 0); 2035b7e1c893Smrg i2c.put_data_mask = (1 << 8); 2036b7e1c893Smrg i2c.get_clk_mask = (1 << 0); 2037b7e1c893Smrg i2c.get_data_mask = (1 << 8); 2038b7e1c893Smrg i2c.mask_clk_mask = (1 << 0); 2039b7e1c893Smrg i2c.mask_data_mask = (1 << 8); 2040b7e1c893Smrg i2c.a_clk_mask = (1 << 0); 2041b7e1c893Smrg i2c.a_data_mask = (1 << 8); 2042209ff23fSmrg } 2043b7e1c893Smrg i2c.mask_clk_reg = ddc_line; 2044b7e1c893Smrg i2c.mask_data_reg = ddc_line; 2045b7e1c893Smrg i2c.a_clk_reg = ddc_line + 0x4; 2046b7e1c893Smrg i2c.a_data_reg = ddc_line + 0x4; 2047b7e1c893Smrg i2c.put_clk_reg = ddc_line + 0x8; 2048b7e1c893Smrg i2c.put_data_reg = ddc_line + 0x8; 2049b7e1c893Smrg i2c.get_clk_reg = ddc_line + 0xc; 2050b7e1c893Smrg i2c.get_data_reg = ddc_line + 0xc; 2051b7e1c893Smrg if (ddc_line) 2052b7e1c893Smrg i2c.valid = TRUE; 2053b7e1c893Smrg else 2054b7e1c893Smrg i2c.valid = FALSE; 2055209ff23fSmrg 2056b7e1c893Smrg return i2c; 2057209ff23fSmrg} 2058209ff23fSmrg 2059209ff23fSmrgstatic void 2060209ff23fSmrgRADEONGetTVInfo(xf86OutputPtr output) 2061209ff23fSmrg{ 2062209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 2063209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2064209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 2065b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 2066209ff23fSmrg char *optstr; 2067209ff23fSmrg 2068b7e1c893Smrg tvout->hPos = 0; 2069b7e1c893Smrg tvout->vPos = 0; 2070b7e1c893Smrg tvout->hSize = 0; 2071b7e1c893Smrg tvout->tv_on = FALSE; 2072209ff23fSmrg 2073209ff23fSmrg if (!RADEONGetTVInfoFromBIOS(output)) { 2074209ff23fSmrg /* set some reasonable defaults */ 2075b7e1c893Smrg tvout->default_tvStd = TV_STD_NTSC; 2076b7e1c893Smrg tvout->tvStd = TV_STD_NTSC; 2077b7e1c893Smrg tvout->TVRefClk = 27.000000000; 2078b7e1c893Smrg tvout->SupportedTVStds = TV_STD_NTSC | TV_STD_PAL; 2079209ff23fSmrg } 2080209ff23fSmrg 2081209ff23fSmrg optstr = (char *)xf86GetOptValString(info->Options, OPTION_TVSTD); 2082209ff23fSmrg if (optstr) { 2083209ff23fSmrg if (!strncmp("ntsc", optstr, strlen("ntsc"))) 2084b7e1c893Smrg tvout->tvStd = TV_STD_NTSC; 2085209ff23fSmrg else if (!strncmp("pal", optstr, strlen("pal"))) 2086b7e1c893Smrg tvout->tvStd = TV_STD_PAL; 2087209ff23fSmrg else if (!strncmp("pal-m", optstr, strlen("pal-m"))) 2088b7e1c893Smrg tvout->tvStd = TV_STD_PAL_M; 2089209ff23fSmrg else if (!strncmp("pal-60", optstr, strlen("pal-60"))) 2090b7e1c893Smrg tvout->tvStd = TV_STD_PAL_60; 2091209ff23fSmrg else if (!strncmp("ntsc-j", optstr, strlen("ntsc-j"))) 2092b7e1c893Smrg tvout->tvStd = TV_STD_NTSC_J; 2093209ff23fSmrg else if (!strncmp("scart-pal", optstr, strlen("scart-pal"))) 2094b7e1c893Smrg tvout->tvStd = TV_STD_SCART_PAL; 2095209ff23fSmrg else { 2096209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid TV Standard: %s\n", optstr); 2097209ff23fSmrg } 2098209ff23fSmrg } 2099209ff23fSmrg 2100209ff23fSmrg} 2101209ff23fSmrg 2102209ff23fSmrgvoid RADEONInitConnector(xf86OutputPtr output) 2103209ff23fSmrg{ 2104209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 2105209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2106209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 2107209ff23fSmrg 2108b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) 2109b7e1c893Smrg radeon_output->rmx_type = RMX_FULL; 2110209ff23fSmrg else 2111b7e1c893Smrg radeon_output->rmx_type = RMX_OFF; 2112209ff23fSmrg 2113b7e1c893Smrg if (!IS_AVIVO_VARIANT) { 2114b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_CRT2_SUPPORT)) { 2115b7e1c893Smrg if (xf86ReturnOptValBool(info->Options, OPTION_TVDAC_LOAD_DETECT, FALSE)) 2116b7e1c893Smrg radeon_output->load_detection = 1; 2117b7e1c893Smrg } 2118209ff23fSmrg } 2119209ff23fSmrg 2120b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT)) 2121209ff23fSmrg RADEONGetTVInfo(output); 2122209ff23fSmrg 2123b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT)) 2124209ff23fSmrg radeon_output->coherent_mode = TRUE; 2125209ff23fSmrg 2126ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) { 2127ad43ddacSmrg strcpy(radeon_output->dp_bus_name, output->name); 2128ad43ddacSmrg strcat(radeon_output->dp_bus_name, "-DP"); 2129ad43ddacSmrg RADEON_DP_I2CInit(pScrn, &radeon_output->dp_pI2CBus, radeon_output->dp_bus_name, output); 2130ad43ddacSmrg RADEON_DP_GetSinkType(output); 2131ad43ddacSmrg } 2132ad43ddacSmrg 2133ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_EDP) { 2134ad43ddacSmrg strcpy(radeon_output->dp_bus_name, output->name); 2135ad43ddacSmrg strcat(radeon_output->dp_bus_name, "-eDP"); 2136ad43ddacSmrg RADEON_DP_I2CInit(pScrn, &radeon_output->dp_pI2CBus, radeon_output->dp_bus_name, output); 2137ad43ddacSmrg RADEON_DP_GetSinkType(output); 2138ad43ddacSmrg } 2139ad43ddacSmrg 2140209ff23fSmrg if (radeon_output->ddc_i2c.valid) 2141b7e1c893Smrg RADEONI2CInit(pScrn, &radeon_output->pI2CBus, output->name, &radeon_output->ddc_i2c); 2142209ff23fSmrg 2143209ff23fSmrg} 2144209ff23fSmrg 2145209ff23fSmrg#if defined(__powerpc__) 2146209ff23fSmrgstatic Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) 2147209ff23fSmrg{ 2148209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2149209ff23fSmrg 2150209ff23fSmrg 2151209ff23fSmrg switch (info->MacModel) { 2152209ff23fSmrg case RADEON_MAC_IBOOK: 2153209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2154209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2155209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2156b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2157b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2158b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2159b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2160b7e1c893Smrg 0), 2161b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2162b7e1c893Smrg return FALSE; 2163209ff23fSmrg 2164209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2165b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2166209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2167209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2168b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT; 2169b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2170b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2171b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2172b7e1c893Smrg 2), 2173b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2174b7e1c893Smrg return FALSE; 2175209ff23fSmrg 2176209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2177b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2178209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2179209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2180b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2181b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2182b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2183b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2184b7e1c893Smrg 2), 2185b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2186b7e1c893Smrg return FALSE; 2187209ff23fSmrg return TRUE; 2188209ff23fSmrg case RADEON_MAC_POWERBOOK_EXTERNAL: 2189209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2190209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2191209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2192b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2193b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2194b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2195b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2196b7e1c893Smrg 0), 2197b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2198b7e1c893Smrg return FALSE; 2199209ff23fSmrg 2200209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2201209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; 2202209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2203b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT; 2204b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2205b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2206b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2207b7e1c893Smrg 1), 2208b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2209b7e1c893Smrg return FALSE; 2210b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2211b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2212b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 2213b7e1c893Smrg 0), 2214b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT)) 2215b7e1c893Smrg return FALSE; 2216209ff23fSmrg 2217209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2218b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2219209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2220209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2221b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2222b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2223b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2224b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2225b7e1c893Smrg 2), 2226b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2227b7e1c893Smrg return FALSE; 2228209ff23fSmrg return TRUE; 2229209ff23fSmrg case RADEON_MAC_POWERBOOK_INTERNAL: 2230209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2231209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2232209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2233b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2234b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2235b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2236b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2237b7e1c893Smrg 0), 2238b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2239b7e1c893Smrg return FALSE; 2240209ff23fSmrg 2241209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2242209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; 2243209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2244b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT; 2245b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2246b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2247b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2248b7e1c893Smrg 1), 2249b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2250b7e1c893Smrg return FALSE; 2251b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2252b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2253b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2254b7e1c893Smrg 0), 2255b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 2256b7e1c893Smrg return FALSE; 2257209ff23fSmrg 2258209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2259b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2260209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2261209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2262b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2263b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2264b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2265b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2266b7e1c893Smrg 2), 2267b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2268b7e1c893Smrg return FALSE; 2269209ff23fSmrg return TRUE; 2270209ff23fSmrg case RADEON_MAC_POWERBOOK_VGA: 2271209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2272b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2273209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2274b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2275b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2276b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2277b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2278b7e1c893Smrg 0), 2279b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2280b7e1c893Smrg return FALSE; 2281209ff23fSmrg 2282209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2283b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2284209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2285b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2286b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2287b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2288b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2289b7e1c893Smrg 1), 2290b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2291b7e1c893Smrg return FALSE; 2292209ff23fSmrg 2293209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2294b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2295209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2296209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2297b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2298b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2299b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2300b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2301b7e1c893Smrg 2), 2302b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2303b7e1c893Smrg return FALSE; 2304209ff23fSmrg return TRUE; 2305209ff23fSmrg case RADEON_MAC_MINI_EXTERNAL: 2306209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2307b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2308209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; 2309209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2310b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT; 2311b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2312b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2313b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2314b7e1c893Smrg 2), 2315b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2316b7e1c893Smrg return FALSE; 2317b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2318b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2319b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 2320b7e1c893Smrg 0), 2321b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT)) 2322b7e1c893Smrg return FALSE; 2323209ff23fSmrg 2324209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_STV; 2325b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2326209ff23fSmrg info->BiosConnector[1].ddc_i2c.valid = FALSE; 2327209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2328b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_TV1_SUPPORT; 2329b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2330b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2331b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2332b7e1c893Smrg 2), 2333b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2334b7e1c893Smrg return FALSE; 2335209ff23fSmrg return TRUE; 2336209ff23fSmrg case RADEON_MAC_MINI_INTERNAL: 2337209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2338b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2339209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; 2340209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2341b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT; 2342b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2343b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2344b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2345b7e1c893Smrg 2), 2346b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2347b7e1c893Smrg return FALSE; 2348b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2349b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2350b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2351b7e1c893Smrg 0), 2352b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 2353b7e1c893Smrg return FALSE; 2354209ff23fSmrg 2355209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_STV; 2356b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2357209ff23fSmrg info->BiosConnector[1].ddc_i2c.valid = FALSE; 2358209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2359b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_TV1_SUPPORT; 2360b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2361b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2362b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2363b7e1c893Smrg 2), 2364b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2365b7e1c893Smrg return FALSE; 2366209ff23fSmrg return TRUE; 2367209ff23fSmrg case RADEON_MAC_IMAC_G5_ISIGHT: 2368209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_MONID); 2369209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_D; 2370209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2371b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_DFP1_SUPPORT; 2372b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2373b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2374b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2375b7e1c893Smrg 0), 2376b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 2377b7e1c893Smrg return FALSE; 2378209ff23fSmrg 2379209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2380b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2381b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2382b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2383b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT; 2384b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2385b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2386b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2387b7e1c893Smrg 2), 2388b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2389b7e1c893Smrg return FALSE; 2390b7e1c893Smrg 2391b7e1c893Smrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2392b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2393b7e1c893Smrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2394b7e1c893Smrg info->BiosConnector[2].valid = TRUE; 2395b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2396b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2397b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2398b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2399b7e1c893Smrg 2), 2400b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2401b7e1c893Smrg return FALSE; 2402b7e1c893Smrg return TRUE; 2403b7e1c893Smrg case RADEON_MAC_EMAC: 2404b7e1c893Smrg /* eMac G4 800/1.0 with radeon 7500, no EDID on internal monitor 2405b7e1c893Smrg * later eMac's (G4 1.25/1.42) with radeon 9200 and 9600 may have 2406b7e1c893Smrg * different ddc setups. need to verify 2407b7e1c893Smrg */ 2408b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2409b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_VGA; 2410b7e1c893Smrg info->BiosConnector[0].valid = TRUE; 2411b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT; 2412b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2413b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2414b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2415b7e1c893Smrg 1), 2416b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2417b7e1c893Smrg return FALSE; 2418b7e1c893Smrg 2419b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2420b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2421209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2422209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2423b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT; 2424b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2425b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2426b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2427b7e1c893Smrg 2), 2428b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2429b7e1c893Smrg return FALSE; 2430209ff23fSmrg 2431209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2432b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2433209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2434209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2435b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2436b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2437b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2438b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2439b7e1c893Smrg 2), 2440b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2441b7e1c893Smrg return FALSE; 2442209ff23fSmrg return TRUE; 2443209ff23fSmrg default: 2444209ff23fSmrg return FALSE; 2445209ff23fSmrg } 2446209ff23fSmrg 2447209ff23fSmrg return FALSE; 2448209ff23fSmrg} 2449209ff23fSmrg#endif 2450209ff23fSmrg 2451209ff23fSmrgstatic void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn) 2452209ff23fSmrg{ 2453209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2454209ff23fSmrg RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); 2455209ff23fSmrg 2456b7e1c893Smrg if (IS_AVIVO_VARIANT) 2457b7e1c893Smrg return; 2458b7e1c893Smrg 2459209ff23fSmrg if (!pRADEONEnt->HasCRTC2) { 2460209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2461209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_VGA; 2462209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2463b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT; 2464b7e1c893Smrg radeon_add_encoder(pScrn, 2465b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2466b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2467b7e1c893Smrg 1), 2468b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2469209ff23fSmrg return; 2470209ff23fSmrg } 2471209ff23fSmrg 2472b7e1c893Smrg if (info->IsMobility) { 2473b7e1c893Smrg /* Below is the most common setting, but may not be true */ 2474b7e1c893Smrg if (info->IsIGP) { 2475b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_LCD_GPIO_MASK); 2476209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2477209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2478b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2479b7e1c893Smrg radeon_add_encoder(pScrn, 2480b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2481b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2482b7e1c893Smrg 0), 2483b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT); 2484b7e1c893Smrg 2485b7e1c893Smrg /* IGP only has TVDAC */ 2486b7e1c893Smrg if ((info->ChipFamily == CHIP_FAMILY_RS400) || 2487b7e1c893Smrg (info->ChipFamily == CHIP_FAMILY_RS480)) 2488b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2489b7e1c893Smrg else 2490b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2491b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2492209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2493209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2494b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2495b7e1c893Smrg radeon_add_encoder(pScrn, 2496b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2497b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2498b7e1c893Smrg 2), 2499b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2500209ff23fSmrg } else { 2501b7e1c893Smrg#if defined(__powerpc__) 2502b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2503b7e1c893Smrg#else 2504b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_LCD_GPIO_MASK); 2505b7e1c893Smrg#endif 2506b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2507209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2508b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2509b7e1c893Smrg radeon_add_encoder(pScrn, 2510b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2511b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2512b7e1c893Smrg 0), 2513b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT); 2514209ff23fSmrg 2515b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2516209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2517209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2518b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2519b7e1c893Smrg radeon_add_encoder(pScrn, 2520b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2521b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2522b7e1c893Smrg 1), 2523b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2524209ff23fSmrg } 2525209ff23fSmrg } else { 2526b7e1c893Smrg /* Below is the most common setting, but may not be true */ 2527b7e1c893Smrg if (info->IsIGP) { 2528b7e1c893Smrg if ((info->ChipFamily == CHIP_FAMILY_RS400) || 2529b7e1c893Smrg (info->ChipFamily == CHIP_FAMILY_RS480)) 2530b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2531b7e1c893Smrg else 2532b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2533b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2534b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_VGA; 2535b7e1c893Smrg info->BiosConnector[0].valid = TRUE; 2536b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT; 2537b7e1c893Smrg radeon_add_encoder(pScrn, 2538b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2539b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2540b7e1c893Smrg 1), 2541b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2542b7e1c893Smrg 2543b7e1c893Smrg /* not sure what a good default DDCType for DVI on 2544b7e1c893Smrg * IGP desktop chips is 2545b7e1c893Smrg */ 2546b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_MONID); /* DDC_DVI? */ 2547b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_D; 2548b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2549b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_DFP1_SUPPORT; 2550b7e1c893Smrg radeon_add_encoder(pScrn, 2551b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2552b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2553b7e1c893Smrg 0), 2554b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT); 2555209ff23fSmrg } else { 2556b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2557b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2558b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; 2559b7e1c893Smrg info->BiosConnector[0].valid = TRUE; 2560b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT; 2561b7e1c893Smrg radeon_add_encoder(pScrn, 2562b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2563b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2564b7e1c893Smrg 2), 2565b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT); 2566b7e1c893Smrg radeon_add_encoder(pScrn, 2567b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2568b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2569b7e1c893Smrg 0), 2570b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT); 2571209ff23fSmrg 2572209ff23fSmrg#if defined(__powerpc__) 2573b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2574b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; 2575b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2576b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT; 2577b7e1c893Smrg radeon_add_encoder(pScrn, 2578b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2579b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2580b7e1c893Smrg 1), 2581b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2582b7e1c893Smrg radeon_add_encoder(pScrn, 2583b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2584b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 2585b7e1c893Smrg 0), 2586b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT); 2587209ff23fSmrg#else 2588b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2589b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2590b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2591b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2592b7e1c893Smrg radeon_add_encoder(pScrn, 2593b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2594b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2595b7e1c893Smrg 1), 2596b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2597209ff23fSmrg#endif 2598209ff23fSmrg } 2599b7e1c893Smrg } 2600209ff23fSmrg 2601b7e1c893Smrg if (info->InternalTVOut) { 2602b7e1c893Smrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2603b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2604b7e1c893Smrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2605b7e1c893Smrg info->BiosConnector[2].valid = TRUE; 2606b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2607b7e1c893Smrg radeon_add_encoder(pScrn, 2608b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2609b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2610b7e1c893Smrg 2), 2611b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT); 2612b7e1c893Smrg } 2613209ff23fSmrg 2614b7e1c893Smrg /* Some cards have the DDC lines swapped and we have no way to 2615b7e1c893Smrg * detect it yet (Mac cards) 2616b7e1c893Smrg */ 2617b7e1c893Smrg if (xf86ReturnOptValBool(info->Options, OPTION_REVERSE_DDC, FALSE)) { 2618b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2619b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2620209ff23fSmrg } 2621209ff23fSmrg} 2622209ff23fSmrg 2623209ff23fSmrg#if defined(__powerpc__) 2624209ff23fSmrg 2625ad43ddacSmrg#ifdef __OpenBSD__ 2626ad43ddacSmrg#include <sys/param.h> 2627ad43ddacSmrg#include <sys/sysctl.h> 2628ad43ddacSmrg#endif 2629ad43ddacSmrg 2630209ff23fSmrg/* 2631209ff23fSmrg * Returns RADEONMacModel or 0 based on lines 'detected as' and 'machine' 2632209ff23fSmrg * in /proc/cpuinfo (on Linux) */ 2633209ff23fSmrgstatic RADEONMacModel RADEONDetectMacModel(ScrnInfoPtr pScrn) 2634209ff23fSmrg{ 2635209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2636209ff23fSmrg RADEONMacModel ret = 0; 2637209ff23fSmrg#ifdef __linux__ 2638209ff23fSmrg char cpuline[50]; /* 50 should be sufficient for our purposes */ 2639209ff23fSmrg FILE *f = fopen ("/proc/cpuinfo", "r"); 2640209ff23fSmrg 2641209ff23fSmrg /* Some macs (minis and powerbooks) use internal tmds, others use external tmds 2642209ff23fSmrg * and not just for dual-link TMDS, it shows up with single-link as well. 2643209ff23fSmrg * Unforunately, there doesn't seem to be any good way to figure it out. 2644209ff23fSmrg */ 2645209ff23fSmrg 2646b7e1c893Smrg /* 2647209ff23fSmrg * PowerBook5,[1-5]: external tmds, single-link 2648209ff23fSmrg * PowerBook5,[789]: external tmds, dual-link 2649209ff23fSmrg * PowerBook5,6: external tmds, single-link or dual-link 2650209ff23fSmrg * need to add another option to specify the external tmds chip 2651209ff23fSmrg * or find out what's used and add it. 2652209ff23fSmrg */ 2653209ff23fSmrg 2654209ff23fSmrg 2655209ff23fSmrg if (f != NULL) { 2656209ff23fSmrg while (fgets(cpuline, sizeof cpuline, f)) { 2657209ff23fSmrg if (!strncmp(cpuline, "machine", strlen ("machine"))) { 2658209ff23fSmrg if (strstr(cpuline, "PowerBook5,1") || 2659209ff23fSmrg strstr(cpuline, "PowerBook5,2") || 2660209ff23fSmrg strstr(cpuline, "PowerBook5,3") || 2661209ff23fSmrg strstr(cpuline, "PowerBook5,4") || 2662209ff23fSmrg strstr(cpuline, "PowerBook5,5")) { 2663209ff23fSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* single link */ 2664209ff23fSmrg info->ext_tmds_chip = RADEON_SIL_164; /* works on 5,2 */ 2665209ff23fSmrg break; 2666209ff23fSmrg } 2667209ff23fSmrg 2668209ff23fSmrg if (strstr(cpuline, "PowerBook5,6")) { 2669209ff23fSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual or single link */ 2670209ff23fSmrg break; 2671209ff23fSmrg } 2672209ff23fSmrg 2673209ff23fSmrg if (strstr(cpuline, "PowerBook5,7") || 2674209ff23fSmrg strstr(cpuline, "PowerBook5,8") || 2675209ff23fSmrg strstr(cpuline, "PowerBook5,9")) { 2676209ff23fSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual link */ 2677209ff23fSmrg info->ext_tmds_chip = RADEON_SIL_1178; /* guess */ 2678209ff23fSmrg break; 2679209ff23fSmrg } 2680209ff23fSmrg 2681209ff23fSmrg if (strstr(cpuline, "PowerBook3,3")) { 2682209ff23fSmrg ret = RADEON_MAC_POWERBOOK_VGA; /* vga rather than dvi */ 2683209ff23fSmrg break; 2684209ff23fSmrg } 2685209ff23fSmrg 2686209ff23fSmrg if (strstr(cpuline, "PowerMac10,1")) { 2687209ff23fSmrg ret = RADEON_MAC_MINI_INTERNAL; /* internal tmds */ 2688209ff23fSmrg break; 2689209ff23fSmrg } 2690209ff23fSmrg if (strstr(cpuline, "PowerMac10,2")) { 2691209ff23fSmrg ret = RADEON_MAC_MINI_EXTERNAL; /* external tmds */ 2692209ff23fSmrg break; 2693209ff23fSmrg } 2694209ff23fSmrg } else if (!strncmp(cpuline, "detected as", strlen("detected as"))) { 2695209ff23fSmrg if (strstr(cpuline, "iBook")) { 2696209ff23fSmrg ret = RADEON_MAC_IBOOK; 2697209ff23fSmrg break; 2698209ff23fSmrg } else if (strstr(cpuline, "PowerBook")) { 2699209ff23fSmrg ret = RADEON_MAC_POWERBOOK_INTERNAL; /* internal tmds */ 2700209ff23fSmrg break; 2701209ff23fSmrg } else if (strstr(cpuline, "iMac G5 (iSight)")) { 2702209ff23fSmrg ret = RADEON_MAC_IMAC_G5_ISIGHT; 2703209ff23fSmrg break; 2704b7e1c893Smrg } else if (strstr(cpuline, "eMac")) { 2705b7e1c893Smrg ret = RADEON_MAC_EMAC; 2706b7e1c893Smrg break; 2707209ff23fSmrg } 2708209ff23fSmrg 2709209ff23fSmrg /* No known PowerMac model detected */ 2710209ff23fSmrg break; 2711209ff23fSmrg } 2712209ff23fSmrg } 2713209ff23fSmrg 2714209ff23fSmrg fclose (f); 2715209ff23fSmrg } else 2716209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 2717209ff23fSmrg "Cannot detect PowerMac model because /proc/cpuinfo not " 2718209ff23fSmrg "readable.\n"); 2719209ff23fSmrg 2720209ff23fSmrg#endif /* __linux */ 2721209ff23fSmrg 2722ad43ddacSmrg#ifdef __OpenBSD__ 2723ad43ddacSmrg char model[32]; 2724ad43ddacSmrg int mib[2]; 2725ad43ddacSmrg size_t len; 2726ad43ddacSmrg 2727ad43ddacSmrg mib[0] = CTL_HW; 2728ad43ddacSmrg mib[1] = HW_PRODUCT; 2729ad43ddacSmrg len = sizeof(model); 2730ad43ddacSmrg if (sysctl(mib, 2, model, &len, NULL, 0) >= 0) { 2731ad43ddacSmrg if (strcmp(model, "PowerBook5,1") == 0 || 2732ad43ddacSmrg strcmp(model, "PowerBook5,2") == 0 || 2733ad43ddacSmrg strcmp(model, "PowerBook5,3") == 0 || 2734ad43ddacSmrg strcmp(model, "PowerBook5,4") == 0 || 2735ad43ddacSmrg strcmp(model, "PowerBook5,5") == 0) { 2736ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* single link */ 2737ad43ddacSmrg info->ext_tmds_chip = RADEON_SIL_164; /* works on 5,2 */ 2738ad43ddacSmrg } 2739ad43ddacSmrg 2740ad43ddacSmrg if (strcmp(model, "PowerBook5,6") == 0) { 2741ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual or single link */ 2742ad43ddacSmrg } 2743ad43ddacSmrg 2744ad43ddacSmrg if (strcmp(model, "PowerBook5,7") || 2745ad43ddacSmrg strcmp(model, "PowerBook5,8") == 0 || 2746ad43ddacSmrg strcmp(model, "PowerBook5,9") == 0) { 2747ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual link */ 2748ad43ddacSmrg info->ext_tmds_chip = RADEON_SIL_1178; /* guess */ 2749ad43ddacSmrg } 2750ad43ddacSmrg 2751ad43ddacSmrg if (strcmp(model, "PowerBook3,3") == 0) { 2752ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_VGA; /* vga rather than dvi */ 2753ad43ddacSmrg } 2754ad43ddacSmrg 2755ad43ddacSmrg if (strcmp(model, "PowerMac10,1") == 0) { 2756ad43ddacSmrg ret = RADEON_MAC_MINI_INTERNAL; /* internal tmds */ 2757ad43ddacSmrg } 2758ad43ddacSmrg 2759ad43ddacSmrg if (strcmp(model, "PowerMac10,2") == 0) { 2760ad43ddacSmrg ret = RADEON_MAC_MINI_EXTERNAL; /* external tmds */ 2761ad43ddacSmrg } 2762ad43ddacSmrg 2763ad43ddacSmrg if (strcmp(model, "PowerBook2,1") == 0 || 2764ad43ddacSmrg strcmp(model, "PowerBook2,2") == 0 || 2765ad43ddacSmrg strcmp(model, "PowerBook4,1") == 0 || 2766ad43ddacSmrg strcmp(model, "PowerBook4,2") == 0 || 2767ad43ddacSmrg strcmp(model, "PowerBook4,3") == 0 || 2768ad43ddacSmrg strcmp(model, "PowerBook6,3") == 0 || 2769ad43ddacSmrg strcmp(model, "PowerBook6,5") == 0 || 2770ad43ddacSmrg strcmp(model, "PowerBook6,7") == 0) { 2771ad43ddacSmrg ret = RADEON_MAC_IBOOK; 2772ad43ddacSmrg } 2773ad43ddacSmrg 2774ad43ddacSmrg if (strcmp(model, "PowerBook1,1") == 0 || 2775ad43ddacSmrg strcmp(model, "PowerBook3,1") == 0 || 2776ad43ddacSmrg strcmp(model, "PowerBook3,2") == 0 || 2777ad43ddacSmrg strcmp(model, "PowerBook3,4") == 0 || 2778ad43ddacSmrg strcmp(model, "PowerBook3,5") == 0) { 2779ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_INTERNAL; 2780ad43ddacSmrg } 2781ad43ddacSmrg 2782ad43ddacSmrg if (strcmp(model, "PowerMac12,1") == 0) { 2783ad43ddacSmrg ret = RADEON_MAC_IMAC_G5_ISIGHT; 2784ad43ddacSmrg } 2785ad43ddacSmrg } 2786ad43ddacSmrg#endif /* __OpenBSD__ */ 2787ad43ddacSmrg 2788209ff23fSmrg if (ret) { 2789209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Detected %s.\n", 2790209ff23fSmrg ret == RADEON_MAC_POWERBOOK_EXTERNAL ? "PowerBook with external DVI" : 2791209ff23fSmrg ret == RADEON_MAC_POWERBOOK_INTERNAL ? "PowerBook with integrated DVI" : 2792209ff23fSmrg ret == RADEON_MAC_POWERBOOK_VGA ? "PowerBook with VGA" : 2793209ff23fSmrg ret == RADEON_MAC_IBOOK ? "iBook" : 2794209ff23fSmrg ret == RADEON_MAC_MINI_EXTERNAL ? "Mac Mini with external DVI" : 2795209ff23fSmrg ret == RADEON_MAC_MINI_INTERNAL ? "Mac Mini with integrated DVI" : 2796209ff23fSmrg "iMac G5 iSight"); 2797209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 2798209ff23fSmrg "If this is not correct, try Option \"MacModel\" and " 2799209ff23fSmrg "consider reporting to the\n"); 2800209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 2801209ff23fSmrg "xorg-driver-ati@lists.x.org mailing list" 2802209ff23fSmrg#ifdef __linux__ 2803209ff23fSmrg " with the contents of /proc/cpuinfo" 2804209ff23fSmrg#endif 2805209ff23fSmrg ".\n"); 2806209ff23fSmrg } 2807209ff23fSmrg 2808209ff23fSmrg return ret; 2809209ff23fSmrg} 2810209ff23fSmrg 2811209ff23fSmrg#endif /* __powerpc__ */ 2812209ff23fSmrg 2813209ff23fSmrgstatic int 2814209ff23fSmrgradeon_output_clones (ScrnInfoPtr pScrn, xf86OutputPtr output) 2815209ff23fSmrg{ 2816b7e1c893Smrg RADEONInfoPtr info = RADEONPTR(pScrn); 2817209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 2818209ff23fSmrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn); 2819209ff23fSmrg int o; 2820209ff23fSmrg int index_mask = 0; 2821209ff23fSmrg 2822ad43ddacSmrg /* no cloning with zaphod */ 2823ad43ddacSmrg if (info->IsPrimary || info->IsSecondary) 2824ad43ddacSmrg return index_mask; 2825ad43ddacSmrg 2826b7e1c893Smrg /* DIG routing gets problematic */ 2827ad43ddacSmrg if (info->ChipFamily >= CHIP_FAMILY_R600) 2828209ff23fSmrg return index_mask; 2829209ff23fSmrg 2830209ff23fSmrg /* LVDS is too wacky */ 2831b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) 2832b7e1c893Smrg return index_mask; 2833b7e1c893Smrg 2834ad43ddacSmrg /* TV requires very specific timing */ 2835b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT)) 2836209ff23fSmrg return index_mask; 2837209ff23fSmrg 2838ad43ddacSmrg /* DVO requires 2x ppll clocks depending on the tmds chip */ 2839ad43ddacSmrg if (radeon_output->devices & (ATOM_DEVICE_DFP2_SUPPORT)) 2840ad43ddacSmrg return index_mask; 2841ad43ddacSmrg 2842209ff23fSmrg for (o = 0; o < config->num_output; o++) { 2843209ff23fSmrg xf86OutputPtr clone = config->output[o]; 2844209ff23fSmrg RADEONOutputPrivatePtr radeon_clone = clone->driver_private; 2845b7e1c893Smrg 2846209ff23fSmrg if (output == clone) /* don't clone yourself */ 2847209ff23fSmrg continue; 2848b7e1c893Smrg else if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT)) /* LVDS */ 2849209ff23fSmrg continue; 2850b7e1c893Smrg else if (radeon_clone->devices & (ATOM_DEVICE_TV_SUPPORT)) /* TV */ 2851209ff23fSmrg continue; 2852209ff23fSmrg else 2853209ff23fSmrg index_mask |= (1 << o); 2854209ff23fSmrg } 2855209ff23fSmrg 2856209ff23fSmrg return index_mask; 2857209ff23fSmrg} 2858209ff23fSmrg 2859b7e1c893Smrgstatic xf86OutputPtr 2860b7e1c893SmrgRADEONOutputCreate(ScrnInfoPtr pScrn, const char *name, int i) 2861b7e1c893Smrg{ 2862b7e1c893Smrg char buf[32]; 2863b7e1c893Smrg sprintf(buf, name, i); 2864b7e1c893Smrg return xf86OutputCreate(pScrn, &radeon_output_funcs, buf); 2865b7e1c893Smrg} 2866b7e1c893Smrg 2867209ff23fSmrg/* 2868209ff23fSmrg * initialise the static data sos we don't have to re-do at randr change */ 2869209ff23fSmrgBool RADEONSetupConnectors(ScrnInfoPtr pScrn) 2870209ff23fSmrg{ 2871209ff23fSmrg xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); 2872209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2873209ff23fSmrg xf86OutputPtr output; 2874209ff23fSmrg char *optstr; 2875b7e1c893Smrg int i; 2876209ff23fSmrg int num_vga = 0; 2877209ff23fSmrg int num_dvi = 0; 2878209ff23fSmrg int num_hdmi = 0; 2879b7e1c893Smrg int num_dp = 0; 2880ad43ddacSmrg int num_edp = 0; 2881209ff23fSmrg 2882209ff23fSmrg /* We first get the information about all connectors from BIOS. 2883209ff23fSmrg * This is how the card is phyiscally wired up. 2884209ff23fSmrg * The information should be correct even on a OEM card. 2885209ff23fSmrg */ 2886209ff23fSmrg for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 2887b7e1c893Smrg info->encoders[i] = NULL; 2888209ff23fSmrg info->BiosConnector[i].valid = FALSE; 2889b7e1c893Smrg info->BiosConnector[i].load_detection = TRUE; 2890b7e1c893Smrg info->BiosConnector[i].shared_ddc = FALSE; 2891209ff23fSmrg info->BiosConnector[i].ddc_i2c.valid = FALSE; 2892209ff23fSmrg info->BiosConnector[i].ConnectorType = CONNECTOR_NONE; 2893b7e1c893Smrg info->BiosConnector[i].devices = 0; 2894209ff23fSmrg } 2895209ff23fSmrg 2896209ff23fSmrg#if defined(__powerpc__) 2897209ff23fSmrg info->MacModel = 0; 2898209ff23fSmrg optstr = (char *)xf86GetOptValString(info->Options, OPTION_MAC_MODEL); 2899209ff23fSmrg if (optstr) { 2900209ff23fSmrg if (!strncmp("ibook", optstr, strlen("ibook"))) 2901209ff23fSmrg info->MacModel = RADEON_MAC_IBOOK; 2902209ff23fSmrg else if (!strncmp("powerbook-duallink", optstr, strlen("powerbook-duallink"))) /* alias */ 2903209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL; 2904209ff23fSmrg else if (!strncmp("powerbook-external", optstr, strlen("powerbook-external"))) 2905209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL; 2906209ff23fSmrg else if (!strncmp("powerbook-internal", optstr, strlen("powerbook-internal"))) 2907209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL; 2908209ff23fSmrg else if (!strncmp("powerbook-vga", optstr, strlen("powerbook-vga"))) 2909209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_VGA; 2910209ff23fSmrg else if (!strncmp("powerbook", optstr, strlen("powerbook"))) /* alias */ 2911209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL; 2912209ff23fSmrg else if (!strncmp("mini-internal", optstr, strlen("mini-internal"))) 2913209ff23fSmrg info->MacModel = RADEON_MAC_MINI_INTERNAL; 2914209ff23fSmrg else if (!strncmp("mini-external", optstr, strlen("mini-external"))) 2915209ff23fSmrg info->MacModel = RADEON_MAC_MINI_EXTERNAL; 2916209ff23fSmrg else if (!strncmp("mini", optstr, strlen("mini"))) /* alias */ 2917209ff23fSmrg info->MacModel = RADEON_MAC_MINI_EXTERNAL; 2918209ff23fSmrg else if (!strncmp("imac-g5-isight", optstr, strlen("imac-g5-isight"))) 2919209ff23fSmrg info->MacModel = RADEON_MAC_IMAC_G5_ISIGHT; 2920b7e1c893Smrg else if (!strncmp("emac", optstr, strlen("emac"))) 2921b7e1c893Smrg info->MacModel = RADEON_MAC_EMAC; 2922209ff23fSmrg else { 2923209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid Mac Model: %s\n", optstr); 2924209ff23fSmrg } 2925209ff23fSmrg } 2926209ff23fSmrg 2927209ff23fSmrg if (!info->MacModel) { 2928209ff23fSmrg info->MacModel = RADEONDetectMacModel(pScrn); 2929209ff23fSmrg } 2930209ff23fSmrg 2931209ff23fSmrg if (info->MacModel){ 2932209ff23fSmrg if (!RADEONSetupAppleConnectors(pScrn)) 2933209ff23fSmrg RADEONSetupGenericConnectors(pScrn); 2934209ff23fSmrg } else 2935209ff23fSmrg#endif 2936209ff23fSmrg if (xf86ReturnOptValBool(info->Options, OPTION_DEFAULT_CONNECTOR_TABLE, FALSE)) { 2937209ff23fSmrg RADEONSetupGenericConnectors(pScrn); 2938209ff23fSmrg } else { 2939209ff23fSmrg if (!RADEONGetConnectorInfoFromBIOS(pScrn)) 2940209ff23fSmrg RADEONSetupGenericConnectors(pScrn); 2941209ff23fSmrg } 2942209ff23fSmrg 2943209ff23fSmrg /* parse connector table option */ 2944209ff23fSmrg optstr = (char *)xf86GetOptValString(info->Options, OPTION_CONNECTORTABLE); 2945209ff23fSmrg 2946209ff23fSmrg if (optstr) { 2947209ff23fSmrg unsigned int ddc_line[2]; 2948b7e1c893Smrg int DACType[2], TMDSType[2]; 2949209ff23fSmrg 2950209ff23fSmrg for (i = 2; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 2951209ff23fSmrg info->BiosConnector[i].valid = FALSE; 2952209ff23fSmrg } 2953b7e1c893Smrg 2954209ff23fSmrg if (sscanf(optstr, "%u,%u,%u,%u,%u,%u,%u,%u", 2955209ff23fSmrg &ddc_line[0], 2956b7e1c893Smrg &DACType[0], 2957b7e1c893Smrg &TMDSType[0], 2958209ff23fSmrg &info->BiosConnector[0].ConnectorType, 2959209ff23fSmrg &ddc_line[1], 2960b7e1c893Smrg &DACType[1], 2961b7e1c893Smrg &TMDSType[1], 2962209ff23fSmrg &info->BiosConnector[1].ConnectorType) != 8) { 2963209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid ConnectorTable option: %s\n", optstr); 2964209ff23fSmrg return FALSE; 2965209ff23fSmrg } 2966209ff23fSmrg 2967b7e1c893Smrg for (i = 0; i < 2; i++) { 2968b7e1c893Smrg info->BiosConnector[i].valid = TRUE; 2969b7e1c893Smrg info->BiosConnector[i].ddc_i2c = legacy_setup_i2c_bus(ddc_line[i]); 2970b7e1c893Smrg switch (DACType[i]) { 2971b7e1c893Smrg case 1: 2972b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_CRT1_SUPPORT; 2973b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2974b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2975b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2976b7e1c893Smrg 1), 2977b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2978b7e1c893Smrg return FALSE; 2979b7e1c893Smrg info->BiosConnector[i].load_detection = TRUE; 2980b7e1c893Smrg break; 2981b7e1c893Smrg case 2: 2982b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_CRT2_SUPPORT; 2983b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2984b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2985b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2986b7e1c893Smrg 2), 2987b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2988b7e1c893Smrg return FALSE; 2989b7e1c893Smrg info->BiosConnector[i].load_detection = FALSE; 2990b7e1c893Smrg break; 2991b7e1c893Smrg } 2992b7e1c893Smrg switch (TMDSType[i]) { 2993b7e1c893Smrg case 1: 2994b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_DFP1_SUPPORT; 2995b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2996b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2997b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2998b7e1c893Smrg 0), 2999b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 3000b7e1c893Smrg return FALSE; 3001b7e1c893Smrg break; 3002b7e1c893Smrg case 2: 3003b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_DFP2_SUPPORT; 3004b7e1c893Smrg if (!radeon_add_encoder(pScrn, 3005b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 3006b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 3007b7e1c893Smrg 0), 3008b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT)) 3009b7e1c893Smrg return FALSE; 3010b7e1c893Smrg break; 3011b7e1c893Smrg } 3012b7e1c893Smrg } 3013209ff23fSmrg } 3014209ff23fSmrg 3015209ff23fSmrg for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 3016209ff23fSmrg if (info->BiosConnector[i].valid) { 3017b7e1c893Smrg RADEONConnectorType conntype = info->BiosConnector[i].ConnectorType; 3018b7e1c893Smrg if ((conntype == CONNECTOR_DVI_D) || 3019b7e1c893Smrg (conntype == CONNECTOR_DVI_I) || 3020ad43ddacSmrg (conntype == CONNECTOR_DVI_A) || 3021ad43ddacSmrg (conntype == CONNECTOR_HDMI_TYPE_B)) { 3022209ff23fSmrg num_dvi++; 3023b7e1c893Smrg } else if (conntype == CONNECTOR_VGA) { 3024209ff23fSmrg num_vga++; 3025ad43ddacSmrg } else if (conntype == CONNECTOR_HDMI_TYPE_A) { 3026209ff23fSmrg num_hdmi++; 3027b7e1c893Smrg } else if (conntype == CONNECTOR_DISPLAY_PORT) { 3028b7e1c893Smrg num_dp++; 3029ad43ddacSmrg } else if (conntype == CONNECTOR_EDP) { 3030ad43ddacSmrg num_edp++; 3031209ff23fSmrg } 3032209ff23fSmrg } 3033209ff23fSmrg } 3034209ff23fSmrg 3035209ff23fSmrg for (i = 0 ; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 3036209ff23fSmrg if (info->BiosConnector[i].valid) { 3037209ff23fSmrg RADEONOutputPrivatePtr radeon_output; 3038b7e1c893Smrg RADEONConnectorType conntype = info->BiosConnector[i].ConnectorType; 3039209ff23fSmrg 3040b7e1c893Smrg if (conntype == CONNECTOR_NONE) 3041209ff23fSmrg continue; 3042209ff23fSmrg 3043209ff23fSmrg radeon_output = xnfcalloc(sizeof(RADEONOutputPrivateRec), 1); 3044209ff23fSmrg if (!radeon_output) { 3045209ff23fSmrg return FALSE; 3046209ff23fSmrg } 3047209ff23fSmrg radeon_output->MonType = MT_UNKNOWN; 3048b7e1c893Smrg radeon_output->ConnectorType = conntype; 3049209ff23fSmrg radeon_output->devices = info->BiosConnector[i].devices; 3050209ff23fSmrg radeon_output->ddc_i2c = info->BiosConnector[i].ddc_i2c; 3051209ff23fSmrg radeon_output->igp_lane_info = info->BiosConnector[i].igp_lane_info; 3052b7e1c893Smrg radeon_output->shared_ddc = info->BiosConnector[i].shared_ddc; 3053b7e1c893Smrg radeon_output->load_detection = info->BiosConnector[i].load_detection; 3054b7e1c893Smrg radeon_output->linkb = info->BiosConnector[i].linkb; 3055ad43ddacSmrg radeon_output->dig_encoder = -1; 3056b7e1c893Smrg radeon_output->connector_id = info->BiosConnector[i].connector_object; 3057ad43ddacSmrg radeon_output->connector_object_id = info->BiosConnector[i].connector_object_id; 3058ad43ddacSmrg radeon_output->ucI2cId = info->BiosConnector[i].ucI2cId; 3059ad43ddacSmrg radeon_output->hpd_id = info->BiosConnector[i].hpd_id; 3060b7e1c893Smrg 3061ad43ddacSmrg /* Technically HDMI-B is a glorfied DL DVI so the bios is correct, 3062ad43ddacSmrg * but this can be confusing to users when it comes to output names, 3063ad43ddacSmrg * so call it DVI 3064ad43ddacSmrg */ 3065b7e1c893Smrg if ((conntype == CONNECTOR_DVI_D) || 3066b7e1c893Smrg (conntype == CONNECTOR_DVI_I) || 3067ad43ddacSmrg (conntype == CONNECTOR_DVI_A) || 3068ad43ddacSmrg (conntype == CONNECTOR_HDMI_TYPE_B)) { 3069b7e1c893Smrg output = RADEONOutputCreate(pScrn, "DVI-%d", --num_dvi); 3070b7e1c893Smrg } else if (conntype == CONNECTOR_VGA) { 3071b7e1c893Smrg output = RADEONOutputCreate(pScrn, "VGA-%d", --num_vga); 3072ad43ddacSmrg } else if (conntype == CONNECTOR_HDMI_TYPE_A) { 3073b7e1c893Smrg output = RADEONOutputCreate(pScrn, "HDMI-%d", --num_hdmi); 3074b7e1c893Smrg } else if (conntype == CONNECTOR_DISPLAY_PORT) { 3075b7e1c893Smrg output = RADEONOutputCreate(pScrn, "DisplayPort-%d", --num_dp); 3076ad43ddacSmrg } else if (conntype == CONNECTOR_EDP) { 3077ad43ddacSmrg output = RADEONOutputCreate(pScrn, "eDP-%d", --num_edp); 3078b7e1c893Smrg } else { 3079b7e1c893Smrg output = RADEONOutputCreate(pScrn, 3080b7e1c893Smrg ConnectorTypeName[conntype], 0); 3081b7e1c893Smrg } 3082209ff23fSmrg 3083209ff23fSmrg if (!output) { 3084209ff23fSmrg return FALSE; 3085209ff23fSmrg } 30860974d292Smrg output->interlaceAllowed = TRUE; 30870974d292Smrg output->doubleScanAllowed = TRUE; 3088209ff23fSmrg output->driver_private = radeon_output; 3089ad43ddacSmrg if (IS_DCE4_VARIANT) { 3090ad43ddacSmrg output->possible_crtcs = 0x3f; 3091ad43ddacSmrg } else { 3092ad43ddacSmrg output->possible_crtcs = 1; 3093ad43ddacSmrg /* crtc2 can drive LVDS, it just doesn't have RMX */ 3094ad43ddacSmrg if (!(radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT))) 3095ad43ddacSmrg output->possible_crtcs |= 2; 3096ad43ddacSmrg } 3097209ff23fSmrg 3098b7e1c893Smrg /* we can clone the DACs, and probably TV-out, 3099209ff23fSmrg but I'm not sure it's worth the trouble */ 3100209ff23fSmrg output->possible_clones = 0; 3101209ff23fSmrg 3102209ff23fSmrg RADEONInitConnector(output); 3103209ff23fSmrg } 3104209ff23fSmrg } 3105209ff23fSmrg 3106209ff23fSmrg for (i = 0; i < xf86_config->num_output; i++) { 3107209ff23fSmrg xf86OutputPtr output = xf86_config->output[i]; 3108209ff23fSmrg 3109209ff23fSmrg output->possible_clones = radeon_output_clones(pScrn, output); 3110ad43ddacSmrg RADEONGetHardCodedEDIDFromFile(output); 3111209ff23fSmrg } 3112209ff23fSmrg 3113209ff23fSmrg return TRUE; 3114209ff23fSmrg} 3115209ff23fSmrg 3116