1c06b6b69Smrg#include <unistd.h> 2c06b6b69Smrg#include <stdio.h> 3c06b6b69Smrg#include <stdlib.h> 4c06b6b69Smrg 5a1d73b4bSmrg#include "iopl.h" 6c06b6b69Smrg 7c06b6b69Smrgint main(void) 8c06b6b69Smrg{ 9c06b6b69Smrg int i, HTotal, HDisplay, HSyncStart, HSyncEnd, 10c06b6b69Smrg VTotal, VDisplay, VSyncStart, VSyncEnd; 11c06b6b69Smrg unsigned char storeReg, bpp, shift, IOSS = 0, MSS = 0, again = 0; 12c06b6b69Smrg unsigned short port; 13c06b6b69Smrg int isHiQV = 0; 14c06b6b69Smrg int is69030 = 0; 15c06b6b69Smrg 16c06b6b69Smrg SET_IOPL(); 17c06b6b69Smrg 18c06b6b69Smrg printf("0x3C6\t0x%X\n",inw(0x3C6)); 19c06b6b69Smrg 20c06b6b69Smrg/* Check to see if the Chip is HiQV */ 21c06b6b69Smrg outb(0x3D6,0x02); 22c06b6b69Smrg storeReg = inb(0x3D7); 23c06b6b69Smrg if (storeReg == 0xE0 /* CT65550 */ 24c06b6b69Smrg || storeReg == 0xE4 /* CT65554 */ 25c06b6b69Smrg || storeReg == 0xE5 /* CT65555 */ 26c06b6b69Smrg || storeReg == 0xF4 /* CT68554 */ 27c06b6b69Smrg || storeReg == 0xC0) /* CT69000 */ 28c06b6b69Smrg { 29c06b6b69Smrg isHiQV = 1; 30c06b6b69Smrg } else if (storeReg == 0x30) { 31c06b6b69Smrg outb(0x3D6,0x03); 32c06b6b69Smrg storeReg = inb(0x3D7); 33c06b6b69Smrg if (storeReg == 0xC) { 34c06b6b69Smrg isHiQV = 1; 35c06b6b69Smrg is69030 = 1; 36c06b6b69Smrg IOSS=inb(0x3CD); 37c06b6b69Smrg MSS=inb(0x3CB); 38c06b6b69Smrg outb(0x3CD,((IOSS&0xE0)| 0x11)); /* Select Channel 0 */ 39c06b6b69Smrg outb(0x3CB,((MSS&0xF0)| 0x8)); 40c06b6b69Smrg again = 1; 41c06b6b69Smrg printf("Pipeline A:\n"); 42c06b6b69Smrg } 43c06b6b69Smrg } 44c06b6b69Smrg 45c06b6b69Smrg again: 46c06b6b69Smrg printf("port 0x3D6 (C&T)\n"); 47c06b6b69Smrg storeReg = inb(0x3D6); 48c06b6b69Smrg shift = 3; 49c06b6b69Smrg if (isHiQV==1) { 50c06b6b69Smrg outw(0x102,1); /*global enable, VGA awake*/ 51c06b6b69Smrg printf("0x%2.2X\n",inb(0x3C3)&0xFF); 52c06b6b69Smrg outb(0x3C3,0); /*disable VGA*/ 53c06b6b69Smrg outb(0x3C3,1); /*enable VGA*/ 54c06b6b69Smrg for(i = 0;i < 0xFF;i++){ 55c06b6b69Smrg outb(0x3D6,i); 56c06b6b69Smrg printf("XR 0x%2.2X\t0x%2.2X\n",i,inb(0x3D7)&0xFF); 57c06b6b69Smrg } 58c06b6b69Smrg outb(0x3D6,0xE2); 59c06b6b69Smrg bpp = inb(0x3D7)&0xF0; 60c06b6b69Smrg } else { 61c06b6b69Smrg outb(0x3D6, 0x70); 62c06b6b69Smrg outw(0x3D6, (inw(0x3D6) | 0x8070)); 63c06b6b69Smrg outw(0x46E8,0x0016); /*setup mode*/ 64c06b6b69Smrg outw(0x102,1); /*global enable, VGA awake*/ 65c06b6b69Smrg outw(0x46E8,0x000E); /*exit from setup mode*/ 66c06b6b69Smrg printf("0x%2.2X\n",inb(0x3C3)&0xFF); 67c06b6b69Smrg outb(0x3C3,0); /*disable VGA*/ 68c06b6b69Smrg outw(0x46E8,0x0000); /*exit from setup mode*/ 69c06b6b69Smrg outw(0x46E8,0x000E); /*exit from setup mode*/ 70c06b6b69Smrg outb(0x3C3,1); /*enable VGA*/ 71c06b6b69Smrg outw(0x46E8,0x0000); /*exit from setup mode*/ 72c06b6b69Smrg for(i = 0;i < 0x80;i++){ 73c06b6b69Smrg outb(0x3D6,i); 74c06b6b69Smrg printf("XR 0x%2.2X\t0x%2.2X\n",i,inb(0x3D7)&0xFF); 75c06b6b69Smrg } 76c06b6b69Smrg outb(0x3D6,0x2B); 77c06b6b69Smrg bpp = inb(0x3D7)&0xF0; 78c06b6b69Smrg } 79c06b6b69Smrg 80c06b6b69Smrg switch(bpp){ 81c06b6b69Smrg case 0x20: 82c06b6b69Smrg bpp = 4; 83c06b6b69Smrg break; 84c06b6b69Smrg case 0x30: 85c06b6b69Smrg bpp = 8; 86c06b6b69Smrg break; 87c06b6b69Smrg case 0x40: 88c06b6b69Smrg bpp = 16; 89c06b6b69Smrg shift = 2; 90c06b6b69Smrg break; 91c06b6b69Smrg case 0x50: 92c06b6b69Smrg bpp = 24; 93c06b6b69Smrg break; 94c06b6b69Smrg default: 95c06b6b69Smrg bpp = 0; 96c06b6b69Smrg } 97c06b6b69Smrg outb(0x3D6,storeReg); 98c06b6b69Smrg 99c06b6b69Smrg printf("\nport 0x3D4 (CRTC)\n"); 100c06b6b69Smrg storeReg = inb(0x3D4); 101c06b6b69Smrg if (isHiQV==1) { 102c06b6b69Smrg for(i = 0;i < 0x7F;i++){ 103c06b6b69Smrg outb(0x3D4,i); 104c06b6b69Smrg printf("CR 0x%2.2X\t0x%2.2X\n",i,inb(0x3D5)&0xFF); 105c06b6b69Smrg } 106c06b6b69Smrg outb(0x3D4,storeReg); 107c06b6b69Smrg printf("\nport 0x3D0 (Flat Panel)\n"); 108c06b6b69Smrg storeReg = inb(0x3D0); 109c06b6b69Smrg for(i = 0;i < 0x7F;i++){ 110c06b6b69Smrg outb(0x3D0,i); 111c06b6b69Smrg printf("FR 0x%2.2X\t0x%2.2X\n",i,inb(0x3D1)&0xFF); 112c06b6b69Smrg } 113c06b6b69Smrg outb(0x3D1,storeReg); 114c06b6b69Smrg printf("\nport 0x3D2 (Multimedia)\n"); 115c06b6b69Smrg storeReg = inb(0x3D2); 116c06b6b69Smrg for(i = 0;i < 0x7F;i++){ 117c06b6b69Smrg outb(0x3D2,i); 118c06b6b69Smrg printf("MR 0x%2.2X\t0x%2.2X\n",i,inb(0x3D3)&0xFF); 119c06b6b69Smrg } 120c06b6b69Smrg outb(0x3D3,storeReg); 121c06b6b69Smrg } else { 122c06b6b69Smrg for(i = 0;i < 0x40;i++){ 123c06b6b69Smrg outb(0x3D4,i); 124c06b6b69Smrg printf("CR 0x%2.2X\t0x%2.2X\n",i,inb(0x3D5)&0xFF); 125c06b6b69Smrg } 126c06b6b69Smrg outb(0x3D4,storeReg); 127c06b6b69Smrg } 128c06b6b69Smrg 129c06b6b69Smrg 130c06b6b69Smrg printf("port 0x3CE (GC)\n"); 131c06b6b69Smrg storeReg = inb(0x3CE); 132c06b6b69Smrg for(i = 0;i < 0x10;i++){ 133c06b6b69Smrg outb(0x3CE,i); 134c06b6b69Smrg printf("GC 0x%2.2X\t0x%2.2X\n",i,inb(0x3CF)&0xFF); 135c06b6b69Smrg } 136c06b6b69Smrg outb(0x3CE,storeReg); 137c06b6b69Smrg printf("port 0x3C4 (Sequencer)\n"); 138c06b6b69Smrg storeReg = inb(0x3C4); 139c06b6b69Smrg for(i = 0;i < 0x10;i++){ 140c06b6b69Smrg outb(0x3C4,i); 141c06b6b69Smrg printf("SQ 0x%2.2X\t0x%X2.2\n",i,inb(0x3C5)&0xFF); 142c06b6b69Smrg } 143c06b6b69Smrg outb(0x3C4,storeReg); 144c06b6b69Smrg 145c06b6b69Smrg 146c06b6b69Smrg printf("port 0x3C0 (Attribute)\n"); 147c06b6b69Smrg inb(0x3DA); 148c06b6b69Smrg storeReg = inb(0x3C0); 149c06b6b69Smrg for(i = 0;i < 0xFF;i++){ 150c06b6b69Smrg inb(0x3DA); 151c06b6b69Smrg outb(0x3C0,i); 152c06b6b69Smrg printf("AT 0x%2.2X\t0x%2.2X\n",i,inb(0x3C1)&0xFF); 153c06b6b69Smrg } 154c06b6b69Smrg inb(0x3DA); 155c06b6b69Smrg outb(0x3C0,storeReg); 156c06b6b69Smrg 157c06b6b69Smrg printf("0x3CC\t0x%X\n",inb(0x3CC)&0xFF); 158c06b6b69Smrg printf("0x3C2\t0x%X\n",inb(0x3C2)&0xFF); 159c06b6b69Smrg printf("0x3C3\t0x%X\n",inb(0x3C2)&0xFF); 160c06b6b69Smrg printf("0x3CA\t0x%X\n",inb(0x3CA)&0xFF); 161c06b6b69Smrg printf("0x3DA\t0x%X\n",inb(0x3DA)&0xFF); 162c06b6b69Smrg 163c06b6b69Smrg printf("\nRAMDAC\nport\tvalue\n"); 164c06b6b69Smrg for(port = 0x83C6; port < 0x83CA;port++){ 165c06b6b69Smrg printf("0x%4X\t0x%4X\n",port,inw(port)); 166c06b6b69Smrg } 167c06b6b69Smrg 168c06b6b69Smrg if (isHiQV!=1) { 169c06b6b69Smrg printf("\nBitBLT\nport\tvalue\n"); 170c06b6b69Smrg for(port = 0x83D0; port <= 0x9FD0;port+=0x400){ 171c06b6b69Smrg printf("0x%4.4X\t0x%4X\n",port,inw(port)); 172c06b6b69Smrg } 173c06b6b69Smrg 174c06b6b69Smrg printf("\nH/W cursor\nport\tvalue\n"); 175c06b6b69Smrg for(port = 0xA3D0; port <= 0xB3D0;port+=0x400){ 176c06b6b69Smrg printf("0x%4.4X\t0x%4X\n",port,inw(port)); 177c06b6b69Smrg } 178c06b6b69Smrg 179c06b6b69Smrg 180c06b6b69Smrg outb(0x3D6, 0x70); 181c06b6b69Smrg outw(0x3D6, (inw(0x3D6) | 0x8070)); 182c06b6b69Smrg 183c06b6b69Smrg printf("0x46E8\t0x%8X\n",inl(0x46E8)); 184c06b6b69Smrg printf("0x4AE8\t0x%8X\n",inl(0x4AE8)); 185c06b6b69Smrg printf("0x102\t0x%8X\n",inl(0x102)); 186c06b6b69Smrg printf("0x103\t0x%8X\n",inl(0x103)); 187c06b6b69Smrg 188c06b6b69Smrg } 189c06b6b69Smrg 190c06b6b69Smrg storeReg = inb(0x3D4); 191c06b6b69Smrg { 192c06b6b69Smrg outb(0x3D4,0); 193c06b6b69Smrg HTotal = ((inb(0x3D5)&0xFF) + 5) << shift; 194c06b6b69Smrg outb(0x3D4,1); 195c06b6b69Smrg HDisplay = ((inb(0x3D5)&0xFF) + 1) << shift; 196c06b6b69Smrg outb(0x3D4,4); 197c06b6b69Smrg HSyncStart = ((inb(0x3D5)&0xFF) + 1) << shift; 198c06b6b69Smrg outb(0x3D4,5); 199c06b6b69Smrg HSyncEnd = inb(0x3D5)&0x1F; 200c06b6b69Smrg outb(0x3D4,5); 201c06b6b69Smrg HSyncEnd += HSyncStart >> shift; 202c06b6b69Smrg HSyncEnd <<= shift; 203c06b6b69Smrg 204c06b6b69Smrg outb(0x3D4,6); 205c06b6b69Smrg VTotal = inb(0x3D5)&0xFF; 206c06b6b69Smrg outb(0x3D4,7); 207c06b6b69Smrg VTotal |= (inb(0x3D5)&0x1) << 8; 208c06b6b69Smrg VTotal |= (inb(0x3D5)&0x20) << 4; 209c06b6b69Smrg VTotal += 2; 210c06b6b69Smrg VDisplay = (inb(0x3D5)&0x2) << 7; 211c06b6b69Smrg VDisplay |= (inb(0x3D5)&0x40) << 3; 212c06b6b69Smrg VSyncStart = (inb(0x3D5)&0x4) << 6; 213c06b6b69Smrg VSyncStart |= (inb(0x3D5)&0x80) << 2; 214c06b6b69Smrg outb(0x3D4,0x12); 215c06b6b69Smrg VDisplay |= inb(0x3D5)&0xFF; 216c06b6b69Smrg VDisplay += 1; 217c06b6b69Smrg outb(0x3D4,0x10); 218c06b6b69Smrg VSyncStart |= inb(0x3D5)&0xFF; 219c06b6b69Smrg 220c06b6b69Smrg outb(0x3D4,0x11); 221c06b6b69Smrg VSyncEnd = inb(0x3D5)&0xF; 222c06b6b69Smrg VSyncEnd += VSyncStart; 223c06b6b69Smrg 224c06b6b69Smrg } 225c06b6b69Smrg outb(0x3D4,storeReg); 226c06b6b69Smrg 227c06b6b69Smrg printf("\nModeLine with port 0x3D4 (CRTC) %d %d %d %d %d %d %d %d\n", 228c06b6b69Smrg HDisplay, HSyncStart, HSyncEnd, HTotal, 229c06b6b69Smrg VDisplay, VSyncStart, VSyncEnd, VTotal); 230c06b6b69Smrg 231c06b6b69Smrg 232c06b6b69Smrg if (is69030==1) { 233c06b6b69Smrg if (again==1) { 234c06b6b69Smrg again=0; 235c06b6b69Smrg printf("\n\nPipeline B:\n"); 236c06b6b69Smrg outb(0x3CD,((IOSS&0xE0)| 0x1F)); /* Select Channel 1 */ 237c06b6b69Smrg outb(0x3CB,((MSS&0xF0)| 0xF)); 238c06b6b69Smrg goto again; 239c06b6b69Smrg } else { 240c06b6b69Smrg outb(0x3CD,IOSS); 241c06b6b69Smrg outb(0x3CB,MSS); 242c06b6b69Smrg printf("\n\n0x3CB\t0x%X (MSS)\n",inb(0x3CB)&0xFF); 243c06b6b69Smrg printf("0x3CD\t0x%X (IOSS)\n",inb(0x3CD)&0xFF); 244c06b6b69Smrg } 245c06b6b69Smrg } 246c06b6b69Smrg RESET_IOPL(); 247c06b6b69Smrg return 0; 248c06b6b69Smrg} 249