cir_pcirename.h revision 1ae1b5e8
11ae1b5e8Smrg/* 21ae1b5e8Smrg * Copyright 2007 George Sapountzis 31ae1b5e8Smrg * 41ae1b5e8Smrg * Permission is hereby granted, free of charge, to any person obtaining a 51ae1b5e8Smrg * copy of this software and associated documentation files (the "Software"), 61ae1b5e8Smrg * to deal in the Software without restriction, including without limitation 71ae1b5e8Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 81ae1b5e8Smrg * and/or sell copies of the Software, and to permit persons to whom the 91ae1b5e8Smrg * Software is furnished to do so, subject to the following conditions: 101ae1b5e8Smrg * 111ae1b5e8Smrg * The above copyright notice and this permission notice (including the next 121ae1b5e8Smrg * paragraph) shall be included in all copies or substantial portions of the 131ae1b5e8Smrg * Software. 141ae1b5e8Smrg * 151ae1b5e8Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 161ae1b5e8Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 171ae1b5e8Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 181ae1b5e8Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 191ae1b5e8Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 201ae1b5e8Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 211ae1b5e8Smrg * SOFTWARE. 221ae1b5e8Smrg */ 231ae1b5e8Smrg 241ae1b5e8Smrg/** 251ae1b5e8Smrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess 261ae1b5e8Smrg * library. The main purpose being to facilitate source code compatibility. 271ae1b5e8Smrg */ 281ae1b5e8Smrg 291ae1b5e8Smrg#ifndef CIRPCIRENAME_H 301ae1b5e8Smrg#define CIRPCIRENAME_H 311ae1b5e8Smrg 321ae1b5e8Smrgenum region_type { 331ae1b5e8Smrg REGION_MEM, 341ae1b5e8Smrg REGION_IO 351ae1b5e8Smrg}; 361ae1b5e8Smrg 371ae1b5e8Smrg#ifndef XSERVER_LIBPCIACCESS 381ae1b5e8Smrg 391ae1b5e8Smrg/* pciVideoPtr */ 401ae1b5e8Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor) 411ae1b5e8Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType) 421ae1b5e8Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->chipRev) 431ae1b5e8Smrg 441ae1b5e8Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor) 451ae1b5e8Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard) 461ae1b5e8Smrg 471ae1b5e8Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus, \ 481ae1b5e8Smrg (_pcidev)->device, \ 491ae1b5e8Smrg (_pcidev)->func) 501ae1b5e8Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 511ae1b5e8Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->device) 521ae1b5e8Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 531ae1b5e8Smrg 541ae1b5e8Smrg/* pciConfigPtr */ 551ae1b5e8Smrg#define PCI_CFG_TAG(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->tag) 561ae1b5e8Smrg#define PCI_CFG_BUS(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->busnum) 571ae1b5e8Smrg#define PCI_CFG_DEV(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->devnum) 581ae1b5e8Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum) 591ae1b5e8Smrg 601ae1b5e8Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */ 611ae1b5e8Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) \ 621ae1b5e8Smrg (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \ 631ae1b5e8Smrg : (_pcidev)->ioBase[(_b)]) 641ae1b5e8Smrg 651ae1b5e8Smrg/* region size: xfree86 uses the log2 of the region size, 661ae1b5e8Smrg * but with zero meaning no region, not size of one XXX */ 671ae1b5e8Smrg#define PCI_REGION_SIZE(_pcidev, _b) \ 681ae1b5e8Smrg (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0) 691ae1b5e8Smrg 701ae1b5e8Smrg/* read/write PCI configuration space */ 711ae1b5e8Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 721ae1b5e8Smrg *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset)) 731ae1b5e8Smrg 741ae1b5e8Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 751ae1b5e8Smrg *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset)) 761ae1b5e8Smrg 771ae1b5e8Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 781ae1b5e8Smrg pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value)) 791ae1b5e8Smrg 801ae1b5e8Smrg#else /* XSERVER_LIBPCIACCESS */ 811ae1b5e8Smrg 821ae1b5e8Smrgtypedef struct pci_device *pciVideoPtr; 831ae1b5e8Smrg 841ae1b5e8Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id) 851ae1b5e8Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id) 861ae1b5e8Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->revision) 871ae1b5e8Smrg 881ae1b5e8Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id) 891ae1b5e8Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id) 901ae1b5e8Smrg 911ae1b5e8Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 921ae1b5e8Smrg#define PCI_DEV_TAG(_pcidev) (_pcidev) 931ae1b5e8Smrg 941ae1b5e8Smrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */ 951ae1b5e8Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 961ae1b5e8Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->dev) 971ae1b5e8Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 981ae1b5e8Smrg 991ae1b5e8Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 1001ae1b5e8Smrg#define PCI_CFG_TAG(_pcidev) (_pcidev) 1011ae1b5e8Smrg 1021ae1b5e8Smrg/* PCI_CFG macros, typically used in DRI init, contain the domain */ 1031ae1b5e8Smrg#define PCI_CFG_BUS(_pcidev) (((_pcidev)->domain << 8) | \ 1041ae1b5e8Smrg (_pcidev)->bus) 1051ae1b5e8Smrg#define PCI_CFG_DEV(_pcidev) ((_pcidev)->dev) 1061ae1b5e8Smrg#define PCI_CFG_FUNC(_pcidev) ((_pcidev)->func) 1071ae1b5e8Smrg 1081ae1b5e8Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr) 1091ae1b5e8Smrg#define PCI_REGION_SIZE(_pcidev, _b) ((_pcidev)->regions[(_b)].size) 1101ae1b5e8Smrg 1111ae1b5e8Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 1121ae1b5e8Smrg pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset)) 1131ae1b5e8Smrg 1141ae1b5e8Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 1151ae1b5e8Smrg pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset)) 1161ae1b5e8Smrg 1171ae1b5e8Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 1181ae1b5e8Smrg pci_device_cfg_write_u32((_pcidev), (_value), (_offset)) 1191ae1b5e8Smrg 1201ae1b5e8Smrg#endif /* XSERVER_LIBPCIACCESS */ 1211ae1b5e8Smrg 1221ae1b5e8Smrg#endif /* CIRPCIRENAME_H */ 123