1f29dbc25Smrg/* Copyright (c) 2005 Advanced Micro Devices, Inc. 2f29dbc25Smrg * 3f29dbc25Smrg * Permission is hereby granted, free of charge, to any person obtaining a copy 4f29dbc25Smrg * of this software and associated documentation files (the "Software"), to 5f29dbc25Smrg * deal in the Software without restriction, including without limitation the 6f29dbc25Smrg * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 7f29dbc25Smrg * sell copies of the Software, and to permit persons to whom the Software is 8f29dbc25Smrg * furnished to do so, subject to the following conditions: 9f29dbc25Smrg * 10f29dbc25Smrg * The above copyright notice and this permission notice shall be included in 11f29dbc25Smrg * all copies or substantial portions of the Software. 12f29dbc25Smrg * 13f29dbc25Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14f29dbc25Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15f29dbc25Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16f29dbc25Smrg * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17f29dbc25Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 18f29dbc25Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 19f29dbc25Smrg * IN THE SOFTWARE. 20f29dbc25Smrg * 21f29dbc25Smrg * Neither the name of the Advanced Micro Devices, Inc. nor the names of its 22f29dbc25Smrg * contributors may be used to endorse or promote products derived from this 23f29dbc25Smrg * software without specific prior written permission. 24f29dbc25Smrg * */ 25f29dbc25Smrg 26f29dbc25Smrg/* 27f29dbc25Smrg * This file contains routines used in Redcloud initialization. 28f29dbc25Smrg * */ 29f29dbc25Smrg 30f29dbc25Smrg/*---------------------------------------------------------------------------- 31f29dbc25Smrg * gfx_get_core_freq 32f29dbc25Smrg * 33f29dbc25Smrg * Returns the core clock frequency of a GX2. 34f29dbc25Smrg *---------------------------------------------------------------------------- 35f29dbc25Smrg */ 36f29dbc25Smrg#if GFX_INIT_DYNAMIC 37f29dbc25Smrgunsigned long 38f29dbc25Smrggu2_get_core_freq(void) 39f29dbc25Smrg#else 40f29dbc25Smrgunsigned long 41f29dbc25Smrggfx_get_core_freq(void) 42f29dbc25Smrg#endif 43f29dbc25Smrg{ 44f29dbc25Smrg unsigned long value; 45f29dbc25Smrg 46f29dbc25Smrg /* CPU SPEED IS REPORTED BY A VSM IN VSA II */ 47f29dbc25Smrg /* Virtual Register Class = 0x12 (Sysinfo) */ 48f29dbc25Smrg /* CPU Speed Register = 0x01 */ 49f29dbc25Smrg 50f29dbc25Smrg OUTW(0xAC1C, 0xFC53); 51f29dbc25Smrg OUTW(0xAC1C, 0x1201); 52f29dbc25Smrg 5304007ebaSmrg value = (unsigned long) (INW(0xAC1E)); 54f29dbc25Smrg 55f29dbc25Smrg return (value); 56f29dbc25Smrg} 57f29dbc25Smrg 58f29dbc25Smrg/*---------------------------------------------------------------------------- 59f29dbc25Smrg * gfx_get_cpu_register_base 60f29dbc25Smrg * 61f29dbc25Smrg * This routine returns the base address for display controller registers. 62f29dbc25Smrg *---------------------------------------------------------------------------- 63f29dbc25Smrg */ 64f29dbc25Smrg#if GFX_INIT_DYNAMIC 65f29dbc25Smrgunsigned long 66f29dbc25Smrggu2_get_cpu_register_base(void) 67f29dbc25Smrg#else 68f29dbc25Smrgunsigned long 69f29dbc25Smrggfx_get_cpu_register_base(void) 70f29dbc25Smrg#endif 71f29dbc25Smrg{ 72f29dbc25Smrg return gfx_pci_config_read(0x80000918); 73f29dbc25Smrg} 74f29dbc25Smrg 75f29dbc25Smrg/*---------------------------------------------------------------------------- 76f29dbc25Smrg * gfx_get_graphics_register_base 77f29dbc25Smrg * 78f29dbc25Smrg * This routine returns the base address for the graphics acceleration. 79f29dbc25Smrg *---------------------------------------------------------------------------- 80f29dbc25Smrg */ 81f29dbc25Smrg#if GFX_INIT_DYNAMIC 82f29dbc25Smrgunsigned long 83f29dbc25Smrggu2_get_graphics_register_base(void) 84f29dbc25Smrg#else 85f29dbc25Smrgunsigned long 86f29dbc25Smrggfx_get_graphics_register_base(void) 87f29dbc25Smrg#endif 88f29dbc25Smrg{ 89f29dbc25Smrg return gfx_pci_config_read(0x80000914); 90f29dbc25Smrg} 91f29dbc25Smrg 92f29dbc25Smrg/*---------------------------------------------------------------------------- 93f29dbc25Smrg * gfx_get_frame_buffer_base 94f29dbc25Smrg * 95f29dbc25Smrg * This routine returns the base address for graphics memory. 96f29dbc25Smrg *---------------------------------------------------------------------------- 97f29dbc25Smrg */ 98f29dbc25Smrg#if GFX_INIT_DYNAMIC 99f29dbc25Smrgunsigned long 100f29dbc25Smrggu2_get_frame_buffer_base(void) 101f29dbc25Smrg#else 102f29dbc25Smrgunsigned long 103f29dbc25Smrggfx_get_frame_buffer_base(void) 104f29dbc25Smrg#endif 105f29dbc25Smrg{ 106f29dbc25Smrg return gfx_pci_config_read(0x80000910); 107f29dbc25Smrg} 108f29dbc25Smrg 109f29dbc25Smrg/*---------------------------------------------------------------------------- 110f29dbc25Smrg * gfx_get_frame_buffer_size 111f29dbc25Smrg * 112f29dbc25Smrg * This routine returns the total size of graphics memory, in bytes. 113f29dbc25Smrg *---------------------------------------------------------------------------- 114f29dbc25Smrg */ 115f29dbc25Smrg#if GFX_INIT_DYNAMIC 116f29dbc25Smrgunsigned long 117f29dbc25Smrggu2_get_frame_buffer_size(void) 118f29dbc25Smrg#else 119f29dbc25Smrgunsigned long 120f29dbc25Smrggfx_get_frame_buffer_size(void) 121f29dbc25Smrg#endif 122f29dbc25Smrg{ 123f29dbc25Smrg unsigned long value; 124f29dbc25Smrg 125f29dbc25Smrg /* FRAME BUFFER SIZE IS REPORTED BY A VSM IN VSA II */ 126f29dbc25Smrg /* Virtual Register Class = 0x02 */ 127f29dbc25Smrg /* VG_MEM_SIZE (512KB units) = 0x00 */ 128f29dbc25Smrg 129f29dbc25Smrg OUTW(0xAC1C, 0xFC53); 130f29dbc25Smrg OUTW(0xAC1C, 0x0200); 131f29dbc25Smrg 13204007ebaSmrg value = (unsigned long) (INW(0xAC1E)) & 0xFFl; 133f29dbc25Smrg 134f29dbc25Smrg return (value << 19); 135f29dbc25Smrg} 136f29dbc25Smrg 137f29dbc25Smrg/*---------------------------------------------------------------------------- 138f29dbc25Smrg * gfx_get_vid_register_base 139f29dbc25Smrg * 140f29dbc25Smrg * This routine returns the base address for the video hardware. 141f29dbc25Smrg *---------------------------------------------------------------------------- 142f29dbc25Smrg */ 143f29dbc25Smrg#if GFX_INIT_DYNAMIC 144f29dbc25Smrgunsigned long 145f29dbc25Smrggu2_get_vid_register_base(void) 146f29dbc25Smrg#else 147f29dbc25Smrgunsigned long 148f29dbc25Smrggfx_get_vid_register_base(void) 149f29dbc25Smrg#endif 150f29dbc25Smrg{ 151f29dbc25Smrg return gfx_pci_config_read(0x8000091C); 152f29dbc25Smrg} 153f29dbc25Smrg 154f29dbc25Smrg/* END OF FILE */ 155