1f29dbc25Smrg/* Copyright (c) 2005 Advanced Micro Devices, Inc.
2f29dbc25Smrg *
3f29dbc25Smrg * Permission is hereby granted, free of charge, to any person obtaining a copy
4f29dbc25Smrg * of this software and associated documentation files (the "Software"), to
5f29dbc25Smrg * deal in the Software without restriction, including without limitation the
6f29dbc25Smrg * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
7f29dbc25Smrg * sell copies of the Software, and to permit persons to whom the Software is
8f29dbc25Smrg * furnished to do so, subject to the following conditions:
9f29dbc25Smrg *
10f29dbc25Smrg * The above copyright notice and this permission notice shall be included in
11f29dbc25Smrg * all copies or substantial portions of the Software.
12f29dbc25Smrg *
13f29dbc25Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14f29dbc25Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15f29dbc25Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16f29dbc25Smrg * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17f29dbc25Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
18f29dbc25Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
19f29dbc25Smrg * IN THE SOFTWARE.
20f29dbc25Smrg *
21f29dbc25Smrg * Neither the name of the Advanced Micro Devices, Inc. nor the names of its
22f29dbc25Smrg * contributors may be used to endorse or promote products derived from this
23f29dbc25Smrg * software without specific prior written permission.
24f29dbc25Smrg * */
25f29dbc25Smrg
26f29dbc25Smrg/*
27f29dbc25Smrg * File Contents:   This file contains panel functions to interface with
28f29dbc25Smrg *                  the centaraus platform.
29f29dbc25Smrg *
30f29dbc25Smrg * SubModule:       Geode FlatPanel library
31f29dbc25Smrg * */
32f29dbc25Smrg
33f29dbc25Smrg#include "cen9211.h"
34f29dbc25Smrg
35f29dbc25Smrgstatic unsigned char sioc2_orig_val;
36f29dbc25Smrgstatic unsigned char must_restore_97317 = FALSE;
37f29dbc25Smrg
38f29dbc25Smrg/********************************************************************
39f29dbc25Smrg *
40f29dbc25Smrg * PASS_FAIL init_GPIO(void);
41f29dbc25Smrg * Initializes the GPIO pins in the Cx5530 or the National PC97317
42f29dbc25Smrg * for use with a 9211 on a Marmot or Centaurus board. Uses
43f29dbc25Smrg * the global variables RdPCIVal and sioc2_orig_val.
44f29dbc25Smrg *
45f29dbc25Smrg *********************************************************************/
46f29dbc25Smrg
47f29dbc25Smrgunsigned char
48f29dbc25Smrginit_Centaurus_GPIO(void)
49f29dbc25Smrg{
50f29dbc25Smrg    unsigned char reg_val;
51f29dbc25Smrg    static unsigned char first_time = TRUE;
52f29dbc25Smrg
53f29dbc25Smrg    /* The Centaurus board uses ports 1 and 2 of the 97317 for GPIO.
54f29dbc25Smrg     * These ports require bank 0 to be active. The first thing we will
55f29dbc25Smrg     * do is verify that bank 0 is active and set it if it is not.
56f29dbc25Smrg     */
57f29dbc25Smrg
58f29dbc25Smrg    /* set the index for access to the configuration register */
59f29dbc25Smrg    gfx_outb(CENT_CONFIG_INDEX, CENT_SIOC2);
60f29dbc25Smrg    reg_val = gfx_inb(CENT_CONFIG_DATA);
61f29dbc25Smrg
62f29dbc25Smrg    /* set to bank 0 */
63f29dbc25Smrg    if (reg_val & CENT_GPIO_BANK_SELECT) {
64f29dbc25Smrg        gfx_outb(CENT_CONFIG_DATA,
6504007ebaSmrg                 (unsigned char) (reg_val & ~CENT_GPIO_BANK_SELECT));
66f29dbc25Smrg    }
67f29dbc25Smrg
68f29dbc25Smrg    /* If this is the first time we have modified sioc2, we must
69f29dbc25Smrg     * save the current value (set by the BIOS) for restoration by
70f29dbc25Smrg     * the calling program, set the global flag must_restore_97317, and set
71f29dbc25Smrg     * first_time to FALSE.
72f29dbc25Smrg     */
73f29dbc25Smrg
74f29dbc25Smrg    if (first_time == TRUE) {
75f29dbc25Smrg        sioc2_orig_val = reg_val;
76f29dbc25Smrg        must_restore_97317 = TRUE;
77f29dbc25Smrg        first_time = FALSE;
78f29dbc25Smrg    }
79f29dbc25Smrg
80f29dbc25Smrg    /* set port 1 direction */
81f29dbc25Smrg    reg_val = gfx_inb(CENT_PORT1_DIRECTION);
82f29dbc25Smrg
83f29dbc25Smrg    /* make GPIO 14 and 17 outputs  */
84f29dbc25Smrg    reg_val |= CENT_97317_CLOCK_MASK | CENT_97317_DATA_OUT_MASK;
85f29dbc25Smrg    gfx_outb(CENT_PORT1_DIRECTION, reg_val);
86f29dbc25Smrg
87f29dbc25Smrg    /* set port 2 direction */
88f29dbc25Smrg    reg_val = gfx_inb(CENT_PORT2_DIRECTION);
89f29dbc25Smrg
90f29dbc25Smrg    /* make GPIO 20 an output */
91f29dbc25Smrg
92f29dbc25Smrg    reg_val |= CENT_97317_CHIP_SEL_MASK;
93f29dbc25Smrg
94f29dbc25Smrg    /* make GPIO 21 an input */
95f29dbc25Smrg
96f29dbc25Smrg    reg_val &= ~CENT_97317_DATA_IN_MASK;
97f29dbc25Smrg    gfx_outb(CENT_PORT2_DIRECTION, reg_val);
98f29dbc25Smrg
99f29dbc25Smrg    /* make GPIO 14 and 17 push-pull */
100f29dbc25Smrg
101f29dbc25Smrg    reg_val = gfx_inb(CENT_PORT1_OUTPUT_TYPE);
102f29dbc25Smrg    reg_val |= CENT_97317_CLOCK_MASK | CENT_97317_DATA_OUT_MASK;
103f29dbc25Smrg    gfx_outb(CENT_PORT1_OUTPUT_TYPE, reg_val);
104f29dbc25Smrg
105f29dbc25Smrg    /* make GPIO 20 and 21 push-pull */
106f29dbc25Smrg    reg_val = gfx_inb(CENT_PORT2_OUTPUT_TYPE);
107f29dbc25Smrg    reg_val |= CENT_97317_CHIP_SEL_MASK | CENT_97317_DATA_IN_MASK;
108f29dbc25Smrg    gfx_outb(CENT_PORT2_OUTPUT_TYPE, reg_val);
109f29dbc25Smrg    return CENT_PASS;
110f29dbc25Smrg
11104007ebaSmrg}                               /* end init_GPIO() */
112f29dbc25Smrg
113f29dbc25Smrg/*********************************************************************
114f29dbc25Smrg *
115f29dbc25Smrg * PASS_FAIL init_9211(void);
116f29dbc25Smrg * Initializes (sets to 0) the clock, chip select, and data pins
117f29dbc25Smrg * of the Cx9211 on a Marmot or Centaurus board.
118f29dbc25Smrg *
119f29dbc25Smrg **********************************************************************/
120f29dbc25Smrg
121f29dbc25Smrgunsigned char
122f29dbc25Smrginit_Centaurus_9211(void)
123f29dbc25Smrg{
124f29dbc25Smrg    unsigned char ReadData;
125f29dbc25Smrg
126f29dbc25Smrg    /* Uses the 97317 for GPIO.
127f29dbc25Smrg     * we will use the clock port define for port 1
128f29dbc25Smrg     */
129f29dbc25Smrg    ReadData = gfx_inb(CENT_97317_CLOCK_PORT);
130f29dbc25Smrg    ReadData &= ~CENT_97317_CLOCK_MASK & ~CENT_97317_DATA_OUT_MASK;
131f29dbc25Smrg    gfx_outb(CENT_97317_CLOCK_PORT, ReadData);
132f29dbc25Smrg    /* we will use the chip select port define for port 2 */
133f29dbc25Smrg    ReadData = gfx_inb(CENT_97317_CHIP_SELECT);
134f29dbc25Smrg    ReadData &= ~CENT_97317_CHIP_SEL_MASK & ~CENT_97317_DATA_IN_MASK;
135f29dbc25Smrg    gfx_outb(CENT_97317_CHIP_SELECT, ReadData);
136f29dbc25Smrg    return (CENT_PASS);
137f29dbc25Smrg
13804007ebaSmrg}                               /*end init_9211() */
139f29dbc25Smrg
140f29dbc25Smrg/******************************************************************
141f29dbc25Smrg *
142f29dbc25Smrg * PASS_FAIL restore_97317_SIOC2(void);
143f29dbc25Smrg * Restores the original value to the 97317 SIOC2 register using
144f29dbc25Smrg * the global variable sioc2_orig_val. Returns PASS if the value
145f29dbc25Smrg * was written, FAIL if not.
146f29dbc25Smrg *
147f29dbc25Smrg *******************************************************************/
148f29dbc25Smrg
149f29dbc25Smrgunsigned char
150f29dbc25Smrgrestore_Centaurus_97317_SIOC2(void)
151f29dbc25Smrg{
152f29dbc25Smrg    /* set the global flag */
153f29dbc25Smrg    if (must_restore_97317 == TRUE) {
154f29dbc25Smrg        unsigned char cfg;
155f29dbc25Smrg
156f29dbc25Smrg        /* set the index for access to the configuration register */
157f29dbc25Smrg        gfx_outb(CENT_CONFIG_INDEX, CENT_SIOC2);
158f29dbc25Smrg
159f29dbc25Smrg        /* restore the value */
160f29dbc25Smrg        gfx_outb(CENT_CONFIG_DATA, sioc2_orig_val);
161f29dbc25Smrg
162f29dbc25Smrg        /* now read and verify */
163f29dbc25Smrg        cfg = gfx_inb(CENT_CONFIG_DATA);
164f29dbc25Smrg        if (cfg == sioc2_orig_val)
165f29dbc25Smrg            return (CENT_PASS);
166f29dbc25Smrg        else
167f29dbc25Smrg            return (CENT_FAIL);
168f29dbc25Smrg
16904007ebaSmrg    }                           /* end if() */
170f29dbc25Smrg    return (CENT_FAIL);
171f29dbc25Smrg
17204007ebaSmrg}                               /* end restore_97317_SIOC2bank() */
173f29dbc25Smrg
174f29dbc25Smrg/* -----------------------------------------------------------------------
175f29dbc25Smrg *
176f29dbc25Smrg * SET_FLAT_PANEL_MODE
177f29dbc25Smrg *
178f29dbc25Smrg * This routine sets the specified flat panel moden parameters in
179f29dbc25Smrg * the 9211.
180f29dbc25Smrg * Returns PASS if successful, FAIL if the mode parameters could
181f29dbc25Smrg * not be set.
182f29dbc25Smrg *
183f29dbc25Smrg *------------------------------------------------------------------------*/
184f29dbc25Smrg
185f29dbc25Smrgunsigned char
186f29dbc25Smrgset_Centaurus_92xx_mode(Pnl_PanelStat * pstat)
187f29dbc25Smrg{
188f29dbc25Smrg    int mode;
189f29dbc25Smrg
190f29dbc25Smrg    /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
191f29dbc25Smrg
192f29dbc25Smrg    for (mode = 0; mode < NUM_92XX_MODES; mode++) {
193f29dbc25Smrg        if ((FPModeParams[mode].xres == pstat->XRes) &&
194f29dbc25Smrg            (FPModeParams[mode].yres == pstat->YRes) &&
195f29dbc25Smrg            (FPModeParams[mode].bpp == pstat->Depth) &&
196f29dbc25Smrg            (FPModeParams[mode].panel_type == pstat->Type) &&
197f29dbc25Smrg            (FPModeParams[mode].color_type == pstat->MonoColor)) {
198f29dbc25Smrg
199f29dbc25Smrg            /* SET THE 92xx FOR THE SELECTED MODE */
200f29dbc25Smrg            set_Centaurus_92xx_mode_params(mode);
201f29dbc25Smrg            return (CENT_PASS);
20204007ebaSmrg        }                       /* end if() */
20304007ebaSmrg    }                           /* end for() */
204f29dbc25Smrg    return (CENT_FAIL);
205f29dbc25Smrg
20604007ebaSmrg}                               /* end set_Centaurus_92xx_mode() */
207f29dbc25Smrg
208f29dbc25Smrg/*-------------------------------------------------------------------
209f29dbc25Smrg *
210f29dbc25Smrg * SET_92XX_MODE_PARAMS
211f29dbc25Smrg * This routine sets the 9211 mode parameters.
212f29dbc25Smrg *
213f29dbc25Smrg *-------------------------------------------------------------------*/
214f29dbc25Smrg
215f29dbc25Smrgvoid
216f29dbc25Smrgset_Centaurus_92xx_mode_params(int mode)
217f29dbc25Smrg{
218f29dbc25Smrg    CS92xx_MODE *pMode = &FPModeParams[mode];
219f29dbc25Smrg    unsigned long off_data = 0;
220f29dbc25Smrg
221f29dbc25Smrg    /* Turn the 92xx power off before setting any new parameters.
222f29dbc25Smrg     * Since we are going to reset all the power bit positions, we will
223f29dbc25Smrg     * force the power register to 0.
224f29dbc25Smrg     */
225f29dbc25Smrg
226f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
227f29dbc25Smrg
228f29dbc25Smrg    /* set 9211 registers using the desired panel settings */
229f29dbc25Smrg
230f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES,
23104007ebaSmrg                         CS92xx_LCD_PAN_TIMING1, pMode->panel_timing1);
232f29dbc25Smrg
233f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES,
23404007ebaSmrg                         CS92xx_LCD_PAN_TIMING2, pMode->panel_timing2);
235f29dbc25Smrg
236f29dbc25Smrg    if (Pnl_Rev_ID == PNL_9211_C) {
237f29dbc25Smrg
238f29dbc25Smrg        /* load the LSFR seeds */
239f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
24004007ebaSmrg                             CS92xx_LCD_DITH_FR_CNTRL, pMode->rev_C_dither_frc);
241f29dbc25Smrg
242f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
24304007ebaSmrg                             CS92xx_BLUE_LSFR_SEED, pMode->blue_lsfr_seed);
244f29dbc25Smrg
245f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
24604007ebaSmrg                             CS92xx_RED_GREEN_LSFR_SEED,
24704007ebaSmrg                             pMode->red_green_lsfr_seed);
24804007ebaSmrg    }
24904007ebaSmrg    else {
250f29dbc25Smrg
251f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
25204007ebaSmrg                             CS92xx_LCD_DITH_FR_CNTRL, pMode->pre_C_dither_frc);
253f29dbc25Smrg
254f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
25504007ebaSmrg                             CS92xx_LCD_BLOCK_SEL1, pMode->block_select1);
256f29dbc25Smrg
257f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
25804007ebaSmrg                             CS92xx_LCD_BLOCK_SEL2, pMode->block_select2);
259f29dbc25Smrg
260f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
26104007ebaSmrg                             CS92xx_LCD_DISPER1, pMode->dispersion1);
262f29dbc25Smrg
263f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES,
26404007ebaSmrg                             CS92xx_LCD_DISPER2, pMode->dispersion2);
265f29dbc25Smrg
266f29dbc25Smrg        CentaurusProgramFRMload();
267f29dbc25Smrg    }
268f29dbc25Smrg
269f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL,
27004007ebaSmrg                         pMode->memory_control);
271f29dbc25Smrg
272f29dbc25Smrg    /* Set the power register last. This will turn the panel on at the 9211. */
273f29dbc25Smrg
274f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES,
27504007ebaSmrg                         CS92xx_LCD_PWR_MAN, pMode->power_management);
276f29dbc25Smrg
27704007ebaSmrg}                               /* end set_Centaurus_92xx_mode_params() */
278f29dbc25Smrg
279f29dbc25Smrgvoid
280f29dbc25SmrgCentaurus_write_gpio(int width, ULONG address, unsigned long data)
281f29dbc25Smrg{
282f29dbc25Smrg    int num_clock_toggles;
283f29dbc25Smrg    int count;
284f29dbc25Smrg    unsigned long Addr = address;
285f29dbc25Smrg
286f29dbc25Smrg    enable_Centaurus_9211_chip_select();
287f29dbc25Smrg
288f29dbc25Smrg    /* Write 1 Clock period of no valid transfer */
289f29dbc25Smrg    write_Centaurus_CX9211_GPIO(CENT_NO_DATA);
290f29dbc25Smrg
291f29dbc25Smrg    /* Write 1 control bit (the data book calls this the control bar write) */
292f29dbc25Smrg    write_Centaurus_CX9211_GPIO(0x1);
293f29dbc25Smrg
294f29dbc25Smrg    /* Write the 12-bit address */
295f29dbc25Smrg    for (count = 0; count < 12; count++) {
29604007ebaSmrg        write_Centaurus_CX9211_GPIO((unsigned char) (Addr & 0x01));
297f29dbc25Smrg        /*the 9211 expects data LSB->MSB */
298f29dbc25Smrg        Addr = Addr >> 1;
299f29dbc25Smrg    }
300f29dbc25Smrg
301f29dbc25Smrg    /* write */
302f29dbc25Smrg    write_Centaurus_CX9211_DWdata(data);
303f29dbc25Smrg
304f29dbc25Smrg    /* a write will require four toggles after disabling CS */
305f29dbc25Smrg    num_clock_toggles = CENT_NUM_WRITE_CLOCK_TOGGLES;
306f29dbc25Smrg    disable_Centaurus_9211_chip_select();
307f29dbc25Smrg
308f29dbc25Smrg    /* now toggle the clock */
309f29dbc25Smrg    for (count = 0; count < num_clock_toggles; count++) {
310f29dbc25Smrg        toggle_Centaurus_9211_clock();
311f29dbc25Smrg    }
312f29dbc25Smrg    return;
313f29dbc25Smrg
31404007ebaSmrg}                               /* end Centaurus_write_gpio() */
315f29dbc25Smrg
316f29dbc25Smrgunsigned long
317f29dbc25SmrgCentaurus_read_gpio(int width, unsigned long address)
318f29dbc25Smrg{
319f29dbc25Smrg    int num_clock_toggles;
320f29dbc25Smrg    int count;
321f29dbc25Smrg    unsigned long Addr = address;
322f29dbc25Smrg    unsigned long data;
323f29dbc25Smrg
324f29dbc25Smrg    enable_Centaurus_9211_chip_select();
325f29dbc25Smrg
326f29dbc25Smrg    /* Write 1 Clock period of no valid transfer */
327f29dbc25Smrg    write_Centaurus_CX9211_GPIO(CENT_NO_DATA);
328f29dbc25Smrg
329f29dbc25Smrg    /* Write 1 control bit (the data book calls this the control bar write) */
330f29dbc25Smrg    write_Centaurus_CX9211_GPIO(0x1);
331f29dbc25Smrg
332f29dbc25Smrg    /* Write the 12-bit address */
333f29dbc25Smrg    for (count = 0; count < 12; count++) {
33404007ebaSmrg        write_Centaurus_CX9211_GPIO((unsigned char) (Addr & 0x01));
335f29dbc25Smrg
336f29dbc25Smrg        /*the 9211 expects data LSB->MSB */
337f29dbc25Smrg        Addr = Addr >> 1;
338f29dbc25Smrg    }
339f29dbc25Smrg
340f29dbc25Smrg    data = read_Centaurus_CX9211_DWdata();
341f29dbc25Smrg
342f29dbc25Smrg    /* a read will require one toggle after disabling CS */
343f29dbc25Smrg    num_clock_toggles = CENT_NUM_READ_CLOCK_TOGGLES;
344f29dbc25Smrg    disable_Centaurus_9211_chip_select();
345f29dbc25Smrg
346f29dbc25Smrg    /* now toggle the clock */
347f29dbc25Smrg    for (count = 0; count < num_clock_toggles; count++) {
348f29dbc25Smrg        toggle_Centaurus_9211_clock();
349f29dbc25Smrg    }
350f29dbc25Smrg    return data;
351f29dbc25Smrg
35204007ebaSmrg}                               /* end Centaurus_read_gpio() */
353f29dbc25Smrg
354f29dbc25Smrg/*******************************************************************
355f29dbc25Smrg *
356f29dbc25Smrg * void enable_Centaurus_9211_chip_select(void);
357f29dbc25Smrg * Enables the chip select of the CX9211 using the National 97317
358f29dbc25Smrg * on a Centaurus board.
359f29dbc25Smrg *
360f29dbc25Smrg *******************************************************************/
361f29dbc25Smrg
362f29dbc25Smrgvoid
363f29dbc25Smrgenable_Centaurus_9211_chip_select(void)
364f29dbc25Smrg{
365f29dbc25Smrg    unsigned char cs_port_val;
366f29dbc25Smrg
367f29dbc25Smrg    /* Set the chip select (GPIO20) high */
368f29dbc25Smrg    cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT);
369f29dbc25Smrg    gfx_outb(CENT_97317_CHIP_SELECT,
37004007ebaSmrg             (unsigned char) (cs_port_val | CENT_97317_CHIP_SEL_MASK));
371f29dbc25Smrg    return;
37204007ebaSmrg}                               /* end enable_Centaurus_9211_chip_select() */
373f29dbc25Smrg
374f29dbc25Smrg/********************************************************************
375f29dbc25Smrg *
376f29dbc25Smrg * void disable_Centaurus_9211_chip_select(void);
377f29dbc25Smrg * Disables the chip select of the CX9211 using the National 97317
378f29dbc25Smrg * on a Centaurus board.
379f29dbc25Smrg *
380f29dbc25Smrg *******************************************************************/
381f29dbc25Smrg
382f29dbc25Smrgvoid
383f29dbc25Smrgdisable_Centaurus_9211_chip_select(void)
384f29dbc25Smrg{
385f29dbc25Smrg    unsigned char cs_port_val;
386f29dbc25Smrg
387f29dbc25Smrg    /* Set the chip select (GPIO20) low */
388f29dbc25Smrg    cs_port_val = gfx_inb(CENT_97317_CHIP_SELECT);
389f29dbc25Smrg    gfx_outb(CENT_97317_CHIP_SELECT,
39004007ebaSmrg             (unsigned char) (cs_port_val & ~CENT_97317_CHIP_SEL_MASK));
391f29dbc25Smrg    return;
392f29dbc25Smrg
39304007ebaSmrg}                               /* end disable_Centaurus_9211_chip_select() */
394f29dbc25Smrg
395f29dbc25Smrg/**********************************************************************
396f29dbc25Smrg *
397f29dbc25Smrg * void toggle_Centaurus_9211_clock(void);
398f29dbc25Smrg * Toggles the clock bit of the CX9211 using the National 97317 on a
399f29dbc25Smrg * Centaurus board. Assumes the 9211 clock bit has previously been
400f29dbc25Smrg * initialized to 0 (this way we do not have to waste GPIO cycles
401f29dbc25Smrg * windowing the clock pulse).
402f29dbc25Smrg *
403f29dbc25Smrg **********************************************************************/
404f29dbc25Smrg
405f29dbc25Smrgvoid
406f29dbc25Smrgtoggle_Centaurus_9211_clock(void)
407f29dbc25Smrg{
408f29dbc25Smrg    unsigned char port_val;
409f29dbc25Smrg
410f29dbc25Smrg    /* get the 97317 GPIO port contents for the 9211 clock */
411f29dbc25Smrg
412f29dbc25Smrg    port_val = gfx_inb(CENT_97317_CLOCK_PORT);
413f29dbc25Smrg    /* set the clock bit high */
414f29dbc25Smrg    gfx_outb(CENT_97317_CLOCK_PORT,
41504007ebaSmrg             (unsigned char) (port_val | CENT_97317_CLOCK_MASK));
416f29dbc25Smrg
417f29dbc25Smrg    /* set the clock bit low */
418f29dbc25Smrg    gfx_outb(CENT_97317_CLOCK_PORT,
41904007ebaSmrg             (unsigned char) (port_val & ~CENT_97317_CLOCK_MASK));
420f29dbc25Smrg
42104007ebaSmrg}                               /* end toggle_Centaurus_9211_clock() */
422f29dbc25Smrg
423f29dbc25Smrg/********************************************************************
424f29dbc25Smrg *
425f29dbc25Smrg * void write_Centaurus_CX9211_GPIO(unsigned char databit);
426f29dbc25Smrg * Writes the value in bit 0 of the value passed in databit to
427f29dbc25Smrg * the 9211 through the GPIO interface of the National 97317 on a
428f29dbc25Smrg * Centaurus board.
429f29dbc25Smrg * NOTE: This function does not set or reset the chip select line!
430f29dbc25Smrg *
431f29dbc25Smrg *******************************************************************/
432f29dbc25Smrg
433f29dbc25Smrgvoid
434f29dbc25Smrgwrite_Centaurus_CX9211_GPIO(unsigned char databit)
435f29dbc25Smrg{
436f29dbc25Smrg    unsigned char data_port_val;
437f29dbc25Smrg
438f29dbc25Smrg    /* Set the data bit for (GPIO17) */
439f29dbc25Smrg    databit <<= 7;
440f29dbc25Smrg
441f29dbc25Smrg    /* read the value of the other bits in the 97317 data port */
442f29dbc25Smrg    data_port_val = gfx_inb(CENT_97317_DATA_OUTPORT);
443f29dbc25Smrg
444f29dbc25Smrg    /* set the bit accordingly */
445f29dbc25Smrg    data_port_val &= ~CENT_97317_DATA_OUT_MASK;
446f29dbc25Smrg    data_port_val |= databit;
447f29dbc25Smrg    gfx_outb(CENT_97317_DATA_OUTPORT, data_port_val);
448f29dbc25Smrg
449f29dbc25Smrg    /* clock the data */
450f29dbc25Smrg    toggle_Centaurus_9211_clock();
451f29dbc25Smrg    return;
452f29dbc25Smrg
45304007ebaSmrg}                               /* end write_Centaurus_CX9211_GPIO() */
454f29dbc25Smrg
455f29dbc25Smrg/*****************************************************************
456f29dbc25Smrg *
457f29dbc25Smrg * void write_Centaurus_CX9211_DWdata(unsigned long data);
458f29dbc25Smrg * Writes the doubleword value passed in data to the CX9211
459f29dbc25Smrg * using GPIO Pins of the National 97317 on a Centaurus board.
460f29dbc25Smrg * This function assumes the Direction register of the 97317
461f29dbc25Smrg * and the address register of the CX9211 have been previously set.
462f29dbc25Smrg * Uses the global variable count.
463f29dbc25Smrg * NOTE: This function does not set or reset the chip select line!
464f29dbc25Smrg *
465f29dbc25Smrg ******************************************************************/
466f29dbc25Smrg
467f29dbc25Smrgvoid
468f29dbc25Smrgwrite_Centaurus_CX9211_DWdata(unsigned long data)
469f29dbc25Smrg{
470f29dbc25Smrg    int count;
471f29dbc25Smrg
472f29dbc25Smrg    /* Send the read/write command to the 9211 first. */
473f29dbc25Smrg
474f29dbc25Smrg    write_Centaurus_CX9211_GPIO(CENT_WRITE);
475f29dbc25Smrg
476f29dbc25Smrg    /* Now write the 32-bit Data */
477f29dbc25Smrg    for (count = 0; count < 32; count++) {
47804007ebaSmrg        write_Centaurus_CX9211_GPIO((unsigned char) (data & 0x01));
479f29dbc25Smrg
480f29dbc25Smrg        /* the 9211 expects the data LSB->MSB */
481f29dbc25Smrg        data >>= 1;
482f29dbc25Smrg    }
483f29dbc25Smrg    return;
484f29dbc25Smrg
48504007ebaSmrg}                               /* end write_Centaurus_CX9211_DWdata() */
486f29dbc25Smrg
487f29dbc25Smrg/*********************************************************************
488f29dbc25Smrg *
489f29dbc25Smrg * unsigned char read_Centaurus_CX9211_GPIO(void);
490f29dbc25Smrg * Returns the current value of the databit of the 9211 in bit 0
491f29dbc25Smrg * using the GPIO interface of the National 97317 on a Centaurus board.
492f29dbc25Smrg * NOTE: This function does not set or reset the chip select line!
493f29dbc25Smrg *
494f29dbc25Smrg *********************************************************************/
495f29dbc25Smrg
496f29dbc25Smrgunsigned char
497f29dbc25Smrgread_Centaurus_CX9211_GPIO(void)
498f29dbc25Smrg{
499f29dbc25Smrg    unsigned char data_port_val;
500f29dbc25Smrg
501f29dbc25Smrg    toggle_Centaurus_9211_clock();
502f29dbc25Smrg
503f29dbc25Smrg    /* read the data */
504f29dbc25Smrg    data_port_val = gfx_inb(CENT_97317_DATA_INPORT);
505f29dbc25Smrg
506f29dbc25Smrg    /* Save the data from (GPIO21) as bit 0 */
507f29dbc25Smrg    data_port_val >>= 1;
508f29dbc25Smrg    return (data_port_val & 0x1);
509f29dbc25Smrg
51004007ebaSmrg}                               /* end read_Centaurus_CX9211_GPIO() */
511f29dbc25Smrg
512f29dbc25Smrg/**********************************************************************
513f29dbc25Smrg *
514f29dbc25Smrg * void read_Centaurus_CX9211_DWdata(unsigned long *data);
515f29dbc25Smrg * Reads a doubleword value from the CX9211 using GPIO Pins of
516f29dbc25Smrg * the National 97317 on a Centaurus board.
517f29dbc25Smrg * This function assumes the Direction register of the 97317 and
518f29dbc25Smrg * the address register of the CX9211 have been previously set.
519f29dbc25Smrg * NOTE: This function does not set or reset the chip select line!
520f29dbc25Smrg *
521f29dbc25Smrg ***********************************************************************/
522f29dbc25Smrg
523f29dbc25Smrgunsigned long
524f29dbc25Smrgread_Centaurus_CX9211_DWdata(void)
525f29dbc25Smrg{
526f29dbc25Smrg    unsigned char ReadData;
527f29dbc25Smrg    int count;
528f29dbc25Smrg    unsigned long Data;
529f29dbc25Smrg
530f29dbc25Smrg    /* Send read/write command word to the 9211 first. */
531f29dbc25Smrg    write_Centaurus_CX9211_GPIO(CENT_READ);
532f29dbc25Smrg
533f29dbc25Smrg    /* The data book (revision 0.1) states 8 clock periods of no valid data.
534f29dbc25Smrg     * However, the data becomes valid on the eighth clock, making the eighth
535f29dbc25Smrg     * clock valid. Since read_Centaurus_GPIO() toggles the clock before
536f29dbc25Smrg     * reading, we will only toggle the clock 7 times here.
537f29dbc25Smrg     */
538f29dbc25Smrg    for (count = 0; count < 7; count++) /* works */
539f29dbc25Smrg        toggle_Centaurus_9211_clock();
540f29dbc25Smrg
541f29dbc25Smrg    /* Now read the 32-bit Data, bit by bit in a single loop. */
542f29dbc25Smrg    Data = 0;
543f29dbc25Smrg    for (count = 0; count < 32; count++) {
544f29dbc25Smrg        ReadData = read_Centaurus_CX9211_GPIO();
545f29dbc25Smrg        /* 9211 sends data  LSB->MSB */
54604007ebaSmrg        Data = Data | (((unsigned long) ReadData) << count);
54704007ebaSmrg    }                           /* end for() */
548f29dbc25Smrg
549f29dbc25Smrg    return Data;
550f29dbc25Smrg
55104007ebaSmrg}                               /* end read_Centaurus_CX9211_DWdata() */
552f29dbc25Smrg
553f29dbc25Smrgvoid
554f29dbc25SmrgCentaurus_Get_9211_Details(unsigned long flags, Pnl_PanelParams * pParam)
555f29dbc25Smrg{
556f29dbc25Smrg    unsigned long PanelType;
557f29dbc25Smrg    int i;
558f29dbc25Smrg
559f29dbc25Smrg    for (i = 0; i < 0x7fff; i++) {
560f29dbc25Smrg    }
561f29dbc25Smrg
562f29dbc25Smrg    init_Centaurus_GPIO();
563f29dbc25Smrg
564f29dbc25Smrg    for (i = 0; i < 5; i++)
565f29dbc25Smrg        toggle_Centaurus_9211_clock();
566f29dbc25Smrg
567f29dbc25Smrg    if (flags & PNL_PANELCHIP) {
568f29dbc25Smrg
569f29dbc25Smrg        PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430);
570f29dbc25Smrg        PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x430);
571f29dbc25Smrg        if ((PanelType & 0xFFFF0000) == 0x92110000) {
572f29dbc25Smrg
573f29dbc25Smrg            /* found 9211 */
574f29dbc25Smrg            /* check the values for revision ID */
575f29dbc25Smrg            if (PanelType >= 0x92110301)
576f29dbc25Smrg                pParam->PanelChip = PNL_9211_C;
577f29dbc25Smrg            else if ((PanelType >= 0x92110101) && (PanelType < 0x92110301))
578f29dbc25Smrg                pParam->PanelChip = PNL_9211_A;
579f29dbc25Smrg            else
580f29dbc25Smrg                pParam->PanelChip = PNL_UNKNOWN_CHIP;
58104007ebaSmrg        }
58204007ebaSmrg        else {                  /* no 9211 present */
583f29dbc25Smrg            pParam->PanelChip = PNL_UNKNOWN_CHIP;
584f29dbc25Smrg        }
585f29dbc25Smrg        Pnl_Rev_ID = pParam->PanelChip;
586f29dbc25Smrg    }
587f29dbc25Smrg    /* if end */
588f29dbc25Smrg    if ((pParam->PanelChip != PNL_UNKNOWN_CHIP) && (flags & PNL_PANELSTAT)) {
589f29dbc25Smrg        PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x438);
590f29dbc25Smrg        PanelType &= 0x00f8f8f8;
591f29dbc25Smrg        PanelType |= 0x00070000;
592f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES, 0x438, PanelType);
593f29dbc25Smrg        PanelType = 0;
594f29dbc25Smrg        PanelType = Centaurus_read_gpio(FOUR_BYTES, 0x434);
595f29dbc25Smrg        PanelType = (PanelType >> 8);
596f29dbc25Smrg        PanelType &= 0x7;
597f29dbc25Smrg
598f29dbc25Smrg        switch (PanelType) {
599f29dbc25Smrg        case 0:
600f29dbc25Smrg            pParam->PanelStat.XRes = 800;
601f29dbc25Smrg            pParam->PanelStat.YRes = 600;
602f29dbc25Smrg            pParam->PanelStat.Depth = 18;
603f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
604f29dbc25Smrg            pParam->PanelStat.Type = PNL_TFT;
605f29dbc25Smrg            break;
606f29dbc25Smrg        case 1:
607f29dbc25Smrg            pParam->PanelStat.XRes = 640;
608f29dbc25Smrg            pParam->PanelStat.YRes = 480;
609f29dbc25Smrg            pParam->PanelStat.Depth = 8;
610f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
611f29dbc25Smrg            pParam->PanelStat.Type = PNL_SSTN;
612f29dbc25Smrg            break;
613f29dbc25Smrg        case 2:
614f29dbc25Smrg            pParam->PanelStat.XRes = 1024;
615f29dbc25Smrg            pParam->PanelStat.YRes = 768;
616f29dbc25Smrg            pParam->PanelStat.Depth = 18;
617f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
618f29dbc25Smrg            pParam->PanelStat.Type = PNL_TFT;
619f29dbc25Smrg            break;
620f29dbc25Smrg        case 3:
621f29dbc25Smrg            pParam->PanelStat.XRes = 640;
622f29dbc25Smrg            pParam->PanelStat.YRes = 480;
623f29dbc25Smrg            pParam->PanelStat.Depth = 16;
624f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
625f29dbc25Smrg            pParam->PanelStat.Type = PNL_DSTN;
626f29dbc25Smrg            break;
627f29dbc25Smrg        case 4:
628f29dbc25Smrg            pParam->PanelStat.XRes = 640;
629f29dbc25Smrg            pParam->PanelStat.YRes = 480;
630f29dbc25Smrg            pParam->PanelStat.Depth = 18;
631f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
632f29dbc25Smrg            pParam->PanelStat.Type = PNL_TFT;
633f29dbc25Smrg            break;
634f29dbc25Smrg        case 5:
635f29dbc25Smrg            pParam->PanelStat.XRes = 1024;
636f29dbc25Smrg            pParam->PanelStat.YRes = 768;
637f29dbc25Smrg            pParam->PanelStat.Depth = 24;
638f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
639f29dbc25Smrg            pParam->PanelStat.Type = PNL_DSTN;
640f29dbc25Smrg            break;
641f29dbc25Smrg        case 6:
642f29dbc25Smrg            pParam->PanelStat.XRes = 640;
643f29dbc25Smrg            pParam->PanelStat.YRes = 480;
644f29dbc25Smrg            pParam->PanelStat.Depth = 8;
645f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_MONO_PANEL;
646f29dbc25Smrg            pParam->PanelStat.Type = PNL_DSTN;
647f29dbc25Smrg            break;
648f29dbc25Smrg        case 7:
649f29dbc25Smrg            pParam->PanelStat.XRes = 800;
650f29dbc25Smrg            pParam->PanelStat.YRes = 600;
651f29dbc25Smrg            pParam->PanelStat.Depth = 16;
652f29dbc25Smrg            pParam->PanelStat.MonoColor = PNL_COLOR_PANEL;
653f29dbc25Smrg            pParam->PanelStat.Type = PNL_DSTN;
654f29dbc25Smrg            break;
655f29dbc25Smrg        default:
656f29dbc25Smrg            break;
657f29dbc25Smrg        }
658f29dbc25Smrg    }
659f29dbc25Smrg
660f29dbc25Smrg}
661f29dbc25Smrg
662f29dbc25Smrgvoid
663f29dbc25SmrgCentaurusProgramFRMload(void)
664f29dbc25Smrg{
665f29dbc25Smrg    unsigned long CentaurusFRMtable[] = {
666f29dbc25Smrg        0x00000000,
667f29dbc25Smrg        0x00000000,
668f29dbc25Smrg        0x01000100,
669f29dbc25Smrg        0x01000100,
670f29dbc25Smrg        0x01010101,
671f29dbc25Smrg        0x01010101,
672f29dbc25Smrg        0x02081041,
673f29dbc25Smrg        0x02081041,
674f29dbc25Smrg        0x10111111,
675f29dbc25Smrg        0x11111101,
676f29dbc25Smrg        0x49249241,
677f29dbc25Smrg        0x12412492,
678f29dbc25Smrg        0x92244891,
679f29dbc25Smrg        0x92244891,
680f29dbc25Smrg        0x22252525,
681f29dbc25Smrg        0x22252525,
682f29dbc25Smrg        0x528294a5,
683f29dbc25Smrg        0x2528494a,
684f29dbc25Smrg        0x294a5295,
685f29dbc25Smrg        0x294a5295,
686f29dbc25Smrg        0x54a54a95,
687f29dbc25Smrg        0x2952a52a,
688f29dbc25Smrg        0x2a552a55,
689f29dbc25Smrg        0x2a552a55,
690f29dbc25Smrg        0x554aa955,
691f29dbc25Smrg        0x2a9552aa,
692f29dbc25Smrg        0x2aaa5555,
693f29dbc25Smrg        0x2aaa5555,
694f29dbc25Smrg        0x55555555,
695f29dbc25Smrg        0x2aaaaaaa,
696f29dbc25Smrg        0x55555555,
697f29dbc25Smrg        0x55555555,
698f29dbc25Smrg        0xaaaaaaab,
699f29dbc25Smrg        0x55555555,
700f29dbc25Smrg        0x5555aaab,
701f29dbc25Smrg        0x5555aaab,
702f29dbc25Smrg        0xaab556ab,
703f29dbc25Smrg        0x556aad55,
704f29dbc25Smrg        0x55ab55ab,
705f29dbc25Smrg        0x55ab55ab,
706f29dbc25Smrg        0xab5ab56b,
707f29dbc25Smrg        0x56ad5ad5,
708f29dbc25Smrg        0x56b5ad6b,
709f29dbc25Smrg        0x56b5ad6b,
710f29dbc25Smrg        0xad6d6b5b,
711f29dbc25Smrg        0x5ad6b6b6,
712f29dbc25Smrg        0x5b5b5b5b,
713f29dbc25Smrg        0x5b5b5b5b,
714f29dbc25Smrg        0x5F6db6db,
715f29dbc25Smrg        0x5F6db6db,
716f29dbc25Smrg        0xF776F776,
717f29dbc25Smrg        0xF776F776,
718f29dbc25Smrg        0xFBDEFBDE,
719f29dbc25Smrg        0xFBDEFBDE,
720f29dbc25Smrg        0x7eFFBFF7,
721f29dbc25Smrg        0x7eFFBFF7,
722f29dbc25Smrg        0xFF7FF7F7,
723f29dbc25Smrg        0xFF7FF7F7,
724f29dbc25Smrg        0xFF7FFF7F,
725f29dbc25Smrg        0xFF7FFF7F,
726f29dbc25Smrg        0xFFF7FFFF,
727f29dbc25Smrg        0xFFF7FFFF,
728f29dbc25Smrg        0xFFFFFFFF,
729f29dbc25Smrg        0xFFFFFFFF,
730f29dbc25Smrg    };
731f29dbc25Smrg
732f29dbc25Smrg    unsigned char i;
733f29dbc25Smrg    unsigned short index;
734f29dbc25Smrg    unsigned long data;
735f29dbc25Smrg
736f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0);
737f29dbc25Smrg    index = CS92xx_FRM_MEMORY_DATA;
738f29dbc25Smrg    for (i = 0; i < 64; i += 2) {
739f29dbc25Smrg        data = CentaurusFRMtable[i];
740f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data);
741f29dbc25Smrg        data = CentaurusFRMtable[i + 1];
742f29dbc25Smrg        Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, data);
743f29dbc25Smrg    }
744f29dbc25Smrg
745f29dbc25Smrg    /*
746f29dbc25Smrg     * The first FRM location (64 bits) does not program correctly.
747f29dbc25Smrg     * This location always reads back with the last value programmed.
748f29dbc25Smrg     * ie. If 32 64-bit values are programmed, location 0 reads
749f29dbc25Smrg     * back as the 32nd If 30 locations are programmed, location 0
750f29dbc25Smrg     * reads back as the 30th, etc.
751f29dbc25Smrg     * Fix this by re-writing location 0 after programming all 64 in
752f29dbc25Smrg     * the writeFRM loop in RevCFrmload() in CS9211.
753f29dbc25Smrg     */
754f29dbc25Smrg
755f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_INDEX, 0);
756f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0);
757f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_FRM_MEMORY_DATA, 0);
758f29dbc25Smrg}
759f29dbc25Smrg
760f29dbc25Smrg/********************************************************************
761f29dbc25Smrg *
762f29dbc25Smrg * void Centaurus_Enable_Power((void);
763f29dbc25Smrg * Enables the power of the CX9211 using the National 97317 on
764f29dbc25Smrg * a Centaurus board.
765f29dbc25Smrg *
766f29dbc25Smrg ********************************************************************/
767f29dbc25Smrg
768f29dbc25Smrgvoid
769f29dbc25SmrgCentaurus_Power_Up(void)
770f29dbc25Smrg{
771f29dbc25Smrg    unsigned long off_data = 0x01000000;
772f29dbc25Smrg
773f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
774f29dbc25Smrg    return;
775f29dbc25Smrg
77604007ebaSmrg}                               /* Centaurus_Disable_Power */
777f29dbc25Smrg
778f29dbc25Smrg/***********************************************************************
779f29dbc25Smrg *
780f29dbc25Smrg * void Centaurus_Disable_Power((void);
781f29dbc25Smrg * Disables the power of the CX9211 using the National 97317
782f29dbc25Smrg * on a Centaurus board.
783f29dbc25Smrg *
784f29dbc25Smrg **********************************************************************/
785f29dbc25Smrg
786f29dbc25Smrgvoid
787f29dbc25SmrgCentaurus_Power_Down(void)
788f29dbc25Smrg{
789f29dbc25Smrg    unsigned long off_data = 0;
790f29dbc25Smrg
791f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
792f29dbc25Smrg    return;
793f29dbc25Smrg
79404007ebaSmrg}                               /* Centaurus_Disable_Power */
795f29dbc25Smrg
796f29dbc25Smrgvoid
797f29dbc25SmrgCentaurus_9211init(Pnl_PanelStat * pstat)
798f29dbc25Smrg{
799f29dbc25Smrg    init_Centaurus_GPIO();
800f29dbc25Smrg    init_Centaurus_9211();
801f29dbc25Smrg    set_Centaurus_92xx_mode(pstat);
802f29dbc25Smrg    restore_Centaurus_97317_SIOC2();
803f29dbc25Smrg}
804f29dbc25Smrg
805f29dbc25Smrgvoid
806f29dbc25SmrgCentaurus_Save_Panel_State(void)
807f29dbc25Smrg{
808f29dbc25Smrg    /* set 9211 registers using the desired panel settings */
809f29dbc25Smrg
810f29dbc25Smrg    cs9211_regs.panel_timing1 =
811f29dbc25Smrg        Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1);
812f29dbc25Smrg    cs9211_regs.panel_timing2 =
813f29dbc25Smrg        Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2);
814f29dbc25Smrg    cs9211_regs.dither_frc_ctrl =
815f29dbc25Smrg        Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL);
816f29dbc25Smrg    cs9211_regs.blue_lsfr_seed =
817f29dbc25Smrg        Centaurus_read_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED);
818f29dbc25Smrg
819f29dbc25Smrg    cs9211_regs.red_green_lsfr_seed =
820f29dbc25Smrg        Centaurus_read_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED);
821f29dbc25Smrg    /* CentaurusProgramFRMload(); */
822f29dbc25Smrg
823f29dbc25Smrg    cs9211_regs.memory_control =
824f29dbc25Smrg        Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL);
825f29dbc25Smrg
826f29dbc25Smrg    /* Set the power register last.
827f29dbc25Smrg     * This will turn the panel on at the 9211.
828f29dbc25Smrg     */
829f29dbc25Smrg    cs9211_regs.power_management =
830f29dbc25Smrg        Centaurus_read_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN);
831f29dbc25Smrg}
832f29dbc25Smrg
833f29dbc25Smrgvoid
834f29dbc25SmrgCentaurus_Restore_Panel_State(void)
835f29dbc25Smrg{
836f29dbc25Smrg
837f29dbc25Smrg    unsigned long off_data = 0;
838f29dbc25Smrg
839f29dbc25Smrg    /* Before restoring the 9211 registers, power off the 9211. */
840f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN, off_data);
841f29dbc25Smrg
842f29dbc25Smrg    /* set 9211 registers using the desired panel settings */
843f29dbc25Smrg
844f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING1,
84504007ebaSmrg                         cs9211_regs.panel_timing1);
846f29dbc25Smrg
847f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PAN_TIMING2,
84804007ebaSmrg                         cs9211_regs.panel_timing2);
849f29dbc25Smrg
850f29dbc25Smrg    /* load the LSFR seeds */
851f29dbc25Smrg
852f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_DITH_FR_CNTRL,
85304007ebaSmrg                         cs9211_regs.dither_frc_ctrl);
854f29dbc25Smrg
855f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_BLUE_LSFR_SEED,
85604007ebaSmrg                         cs9211_regs.blue_lsfr_seed);
857f29dbc25Smrg
858f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_RED_GREEN_LSFR_SEED,
85904007ebaSmrg                         cs9211_regs.red_green_lsfr_seed);
860f29dbc25Smrg
861f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_MEM_CNTRL,
86204007ebaSmrg                         cs9211_regs.memory_control);
863f29dbc25Smrg
864f29dbc25Smrg    /* Set the power register last. This will turn the panel on at the 9211 */
865f29dbc25Smrg
866f29dbc25Smrg    Centaurus_write_gpio(FOUR_BYTES, CS92xx_LCD_PWR_MAN,
86704007ebaSmrg                         cs9211_regs.power_management);
868f29dbc25Smrg
869f29dbc25Smrg}
870